1 diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
2 index 97a48c3..aaba655 100644
3 --- a/drivers/mtd/nand/nand_base.c
4 +++ b/drivers/mtd/nand/nand_base.c
5 @@ -2934,246 +2934,6 @@ static int nand_flash_detect_onfi(struct mtd_info *mtd, struct nand_chip *chip,
9 - * nand_id_has_period - Check if an ID string has a given wraparound period
10 - * @id_data: the ID string
11 - * @arrlen: the length of the @id_data array
12 - * @period: the period of repitition
14 - * Check if an ID string is repeated within a given sequence of bytes at
15 - * specific repetition interval period (e.g., {0x20,0x01,0x7F,0x20} has a
16 - * period of 2). This is a helper function for nand_id_len(). Returns non-zero
17 - * if the repetition has a period of @period; otherwise, returns zero.
19 -static int nand_id_has_period(u8 *id_data, int arrlen, int period)
22 - for (i = 0; i < period; i++)
23 - for (j = i + period; j < arrlen; j += period)
24 - if (id_data[i] != id_data[j])
30 - * nand_id_len - Get the length of an ID string returned by CMD_READID
31 - * @id_data: the ID string
32 - * @arrlen: the length of the @id_data array
34 - * Returns the length of the ID string, according to known wraparound/trailing
35 - * zero patterns. If no pattern exists, returns the length of the array.
37 -static int nand_id_len(u8 *id_data, int arrlen)
39 - int last_nonzero, period;
41 - /* Find last non-zero byte */
42 - for (last_nonzero = arrlen - 1; last_nonzero >= 0; last_nonzero--)
43 - if (id_data[last_nonzero])
47 - if (last_nonzero < 0)
50 - /* Calculate wraparound period */
51 - for (period = 1; period < arrlen; period++)
52 - if (nand_id_has_period(id_data, arrlen, period))
55 - /* There's a repeated pattern */
56 - if (period < arrlen)
59 - /* There are trailing zeros */
60 - if (last_nonzero < arrlen - 1)
61 - return last_nonzero + 1;
63 - /* No pattern detected */
68 - * Many new NAND share similar device ID codes, which represent the size of the
69 - * chip. The rest of the parameters must be decoded according to generic or
70 - * manufacturer-specific "extended ID" decoding patterns.
72 -static void nand_decode_ext_id(struct mtd_info *mtd, struct nand_chip *chip,
73 - u8 id_data[8], int *busw)
76 - /* The 3rd id byte holds MLC / multichip data */
77 - chip->cellinfo = id_data[2];
78 - /* The 4th id byte is the important one */
81 - id_len = nand_id_len(id_data, 8);
84 - * Field definitions are in the following datasheets:
85 - * Old style (4,5 byte ID): Samsung K9GAG08U0M (p.32)
86 - * New Samsung (6 byte ID): Samsung K9GAG08U0F (p.44)
87 - * Hynix MLC (6 byte ID): Hynix H27UBG8T2B (p.22)
89 - * Check for ID length, non-zero 6th byte, cell type, and Hynix/Samsung
90 - * ID to decide what to do.
92 - if (id_len == 6 && id_data[0] == NAND_MFR_SAMSUNG &&
93 - id_data[5] != 0x00) {
95 - mtd->writesize = 2048 << (extid & 0x03);
98 - switch (((extid >> 2) & 0x04) | (extid & 0x03)) {
100 - mtd->oobsize = 128;
103 - mtd->oobsize = 218;
106 - mtd->oobsize = 400;
109 - mtd->oobsize = 436;
112 - mtd->oobsize = 512;
115 - default: /* Other cases are "reserved" (unknown) */
116 - mtd->oobsize = 640;
120 - /* Calc blocksize */
121 - mtd->erasesize = (128 * 1024) <<
122 - (((extid >> 1) & 0x04) | (extid & 0x03));
124 - } else if (id_len == 6 && id_data[0] == NAND_MFR_HYNIX &&
125 - (chip->cellinfo & NAND_CI_CELLTYPE_MSK)) {
128 - /* Calc pagesize */
129 - mtd->writesize = 2048 << (extid & 0x03);
132 - switch (((extid >> 2) & 0x04) | (extid & 0x03)) {
134 - mtd->oobsize = 128;
137 - mtd->oobsize = 224;
140 - mtd->oobsize = 448;
152 - mtd->oobsize = 640;
156 - /* Calc blocksize */
157 - tmp = ((extid >> 1) & 0x04) | (extid & 0x03);
159 - mtd->erasesize = (128 * 1024) << tmp;
160 - else if (tmp == 0x03)
161 - mtd->erasesize = 768 * 1024;
163 - mtd->erasesize = (64 * 1024) << tmp;
166 - /* Calc pagesize */
167 - mtd->writesize = 1024 << (extid & 0x03);
170 - mtd->oobsize = (8 << (extid & 0x01)) *
171 - (mtd->writesize >> 9);
173 - /* Calc blocksize. Blocksize is multiples of 64KiB */
174 - mtd->erasesize = (64 * 1024) << (extid & 0x03);
176 - /* Get buswidth information */
177 - *busw = (extid & 0x01) ? NAND_BUSWIDTH_16 : 0;
182 - * Old devices have chip data hardcoded in the device ID table. nand_decode_id
183 - * decodes a matching ID table entry and assigns the MTD size parameters for
186 -static void nand_decode_id(struct mtd_info *mtd, struct nand_chip *chip,
187 - struct nand_flash_dev *type, u8 id_data[8],
190 - int maf_id = id_data[0];
192 - mtd->erasesize = type->erasesize;
193 - mtd->writesize = type->pagesize;
194 - mtd->oobsize = mtd->writesize / 32;
195 - *busw = type->options & NAND_BUSWIDTH_16;
198 - * Check for Spansion/AMD ID + repeating 5th, 6th byte since
199 - * some Spansion chips have erasesize that conflicts with size
200 - * listed in nand_ids table.
201 - * Data sheet (5 byte ID): Spansion S30ML-P ORNAND (p.39)
203 - if (maf_id == NAND_MFR_AMD && id_data[4] != 0x00 && id_data[5] == 0x00
204 - && id_data[6] == 0x00 && id_data[7] == 0x00
205 - && mtd->writesize == 512) {
206 - mtd->erasesize = 128 * 1024;
207 - mtd->erasesize <<= ((id_data[3] & 0x03) << 1);
212 - * Set the bad block marker/indicator (BBM/BBI) patterns according to some
213 - * heuristic patterns using various detected parameters (e.g., manufacturer,
214 - * page size, cell-type information).
216 -static void nand_decode_bbm_options(struct mtd_info *mtd,
217 - struct nand_chip *chip, u8 id_data[8])
219 - int maf_id = id_data[0];
221 - /* Set the bad block position */
222 - if (mtd->writesize > 512 || (chip->options & NAND_BUSWIDTH_16))
223 - chip->badblockpos = NAND_LARGE_BADBLOCK_POS;
225 - chip->badblockpos = NAND_SMALL_BADBLOCK_POS;
228 - * Bad block marker is stored in the last page of each block on Samsung
229 - * and Hynix MLC devices; stored in first two pages of each block on
230 - * Micron devices with 2KiB pages and on SLC Samsung, Hynix, Toshiba,
231 - * AMD/Spansion, and Macronix. All others scan only the first page.
233 - if ((chip->cellinfo & NAND_CI_CELLTYPE_MSK) &&
234 - (maf_id == NAND_MFR_SAMSUNG ||
235 - maf_id == NAND_MFR_HYNIX))
236 - chip->bbt_options |= NAND_BBT_SCANLASTPAGE;
237 - else if ((!(chip->cellinfo & NAND_CI_CELLTYPE_MSK) &&
238 - (maf_id == NAND_MFR_SAMSUNG ||
239 - maf_id == NAND_MFR_HYNIX ||
240 - maf_id == NAND_MFR_TOSHIBA ||
241 - maf_id == NAND_MFR_AMD ||
242 - maf_id == NAND_MFR_MACRONIX)) ||
243 - (mtd->writesize == 2048 &&
244 - maf_id == NAND_MFR_MICRON))
245 - chip->bbt_options |= NAND_BBT_SCAN2NDPAGE;
249 * Get the flash and manufacturer id and lookup if the type is supported.
251 static struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd,
252 @@ -3184,6 +2944,7 @@ static struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd,
258 /* Select the device */
259 chip->select_chip(mtd, 0);
260 @@ -3210,8 +2971,7 @@ static struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd,
262 chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);
264 - /* Read entire ID string */
265 - for (i = 0; i < 8; i++)
266 + for (i = 0; i < 2; i++)
267 id_data[i] = chip->read_byte(mtd);
269 if (id_data[0] != *maf_id || id_data[1] != *dev_id) {
270 @@ -3231,10 +2991,18 @@ static struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd,
271 chip->onfi_version = 0;
272 if (!type->name || !type->pagesize) {
273 /* Check is chip is ONFI compliant */
274 - if (nand_flash_detect_onfi(mtd, chip, &busw))
275 + ret = nand_flash_detect_onfi(mtd, chip, &busw);
280 + chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);
282 + /* Read entire ID string */
284 + for (i = 0; i < 8; i++)
285 + id_data[i] = chip->read_byte(mtd);
288 return ERR_PTR(-ENODEV);
290 @@ -3247,10 +3015,82 @@ static struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd,
291 /* Set the pagesize, oobsize, erasesize by the driver */
292 busw = chip->init_size(mtd, chip, id_data);
293 } else if (!type->pagesize) {
294 - /* Decode parameters from extended ID */
295 - nand_decode_ext_id(mtd, chip, id_data, &busw);
297 + /* The 3rd id byte holds MLC / multichip data */
298 + chip->cellinfo = id_data[2];
299 + /* The 4th id byte is the important one */
300 + extid = id_data[3];
303 + * Field definitions are in the following datasheets:
304 + * Old style (4,5 byte ID): Samsung K9GAG08U0M (p.32)
305 + * New style (6 byte ID): Samsung K9GBG08U0M (p.40)
307 + * Check for wraparound + Samsung ID + nonzero 6th byte
308 + * to decide what to do.
310 + if (id_data[0] == id_data[6] && id_data[1] == id_data[7] &&
311 + id_data[0] == NAND_MFR_SAMSUNG &&
312 + (chip->cellinfo & NAND_CI_CELLTYPE_MSK) &&
313 + id_data[5] != 0x00) {
314 + /* Calc pagesize */
315 + mtd->writesize = 2048 << (extid & 0x03);
318 + switch (extid & 0x03) {
320 + mtd->oobsize = 128;
323 + mtd->oobsize = 218;
326 + mtd->oobsize = 400;
329 + mtd->oobsize = 436;
333 + /* Calc blocksize */
334 + mtd->erasesize = (128 * 1024) <<
335 + (((extid >> 1) & 0x04) | (extid & 0x03));
338 + /* Calc pagesize */
339 + mtd->writesize = 1024 << (extid & 0x03);
342 + mtd->oobsize = (8 << (extid & 0x01)) *
343 + (mtd->writesize >> 9);
345 + /* Calc blocksize. Blocksize is multiples of 64KiB */
346 + mtd->erasesize = (64 * 1024) << (extid & 0x03);
348 + /* Get buswidth information */
349 + busw = (extid & 0x01) ? NAND_BUSWIDTH_16 : 0;
352 - nand_decode_id(mtd, chip, type, id_data, &busw);
354 + * Old devices have chip data hardcoded in the device id table.
356 + mtd->erasesize = type->erasesize;
357 + mtd->writesize = type->pagesize;
358 + mtd->oobsize = mtd->writesize / 32;
359 + busw = type->options & NAND_BUSWIDTH_16;
362 + * Check for Spansion/AMD ID + repeating 5th, 6th byte since
363 + * some Spansion chips have erasesize that conflicts with size
364 + * listed in nand_ids table.
365 + * Data sheet (5 byte ID): Spansion S30ML-P ORNAND (p.39)
367 + if (*maf_id == NAND_MFR_AMD && id_data[4] != 0x00 &&
368 + id_data[5] == 0x00 && id_data[6] == 0x00 &&
369 + id_data[7] == 0x00 && mtd->writesize == 512) {
370 + mtd->erasesize = 128 * 1024;
371 + mtd->erasesize <<= ((id_data[3] & 0x03) << 1);
374 /* Get chip options, preserve non chip based options */
375 chip->options &= ~NAND_CHIPOPTIONS_MSK;
376 @@ -3284,8 +3124,6 @@ ident_done:
377 return ERR_PTR(-EINVAL);
380 - nand_decode_bbm_options(mtd, chip, id_data);
382 /* Calculate the address shift from the page size */
383 chip->page_shift = ffs(mtd->writesize) - 1;
384 /* Convert chipsize to number of pages per chip -1 */
385 @@ -3302,6 +3140,33 @@ ident_done:
387 chip->badblockbits = 8;
389 + /* Set the bad block position */
390 + if (mtd->writesize > 512 || (busw & NAND_BUSWIDTH_16))
391 + chip->badblockpos = NAND_LARGE_BADBLOCK_POS;
393 + chip->badblockpos = NAND_SMALL_BADBLOCK_POS;
396 + * Bad block marker is stored in the last page of each block
397 + * on Samsung and Hynix MLC devices; stored in first two pages
398 + * of each block on Micron devices with 2KiB pages and on
399 + * SLC Samsung, Hynix, Toshiba, AMD/Spansion, and Macronix.
400 + * All others scan only the first page.
402 + if ((chip->cellinfo & NAND_CI_CELLTYPE_MSK) &&
403 + (*maf_id == NAND_MFR_SAMSUNG ||
404 + *maf_id == NAND_MFR_HYNIX))
405 + chip->bbt_options |= NAND_BBT_SCANLASTPAGE;
406 + else if ((!(chip->cellinfo & NAND_CI_CELLTYPE_MSK) &&
407 + (*maf_id == NAND_MFR_SAMSUNG ||
408 + *maf_id == NAND_MFR_HYNIX ||
409 + *maf_id == NAND_MFR_TOSHIBA ||
410 + *maf_id == NAND_MFR_AMD ||
411 + *maf_id == NAND_MFR_MACRONIX)) ||
412 + (mtd->writesize == 2048 &&
413 + *maf_id == NAND_MFR_MICRON))
414 + chip->bbt_options |= NAND_BBT_SCAN2NDPAGE;
416 /* Check for AND chips with 4 page planes */
417 if (chip->options & NAND_4PAGE_ARRAY)
418 chip->erase_cmd = multi_erase_cmd;