md5=1b7f91c7c520bd073ec7a5487f4c3467
sha256=4aeb82c5ec8a3b4bead0275fbfaecfdbeda12b01cb6654eec1ce9791b5003807
+[http://sources.dreamboxupdate.com/download/kernel-patches/linux-dm500hd-2.6.18-ac6cc9511a5f70eaa584c63fc5c3de33cae1d0e7.patch.bz2]
+md5=d8938aa5b1a5c6928a1fad3c699bd98e
+sha256=faca8966d65932619bf69d034ed892ac9bb5f5c9b57ba50ba8dbe471894105ac
+
[http://sources.dreamboxupdate.com/download/kernel-patches/linux-dm500hd-2.6.18-c59d7210272be29e3850aca3abbff76443f65d6f-fixed.patch.bz2]
md5=dc78c09b0f1db77ecfba58617eec178a
sha256=a62b549563bd9a4d877c64aee36ed9ab2c8c4b4dd9f67d6bcd746eeaef61bb8b
+[http://sources.dreamboxupdate.com/download/kernel-patches/linux-dm7020hd-2.6.18-ac6cc9511a5f70eaa584c63fc5c3de33cae1d0e7.patch.bz2]
+md5=d8938aa5b1a5c6928a1fad3c699bd98e
+sha256=faca8966d65932619bf69d034ed892ac9bb5f5c9b57ba50ba8dbe471894105ac
+
[http://sources.dreamboxupdate.com/download/kernel-patches/linux-dm7020hd-2.6.18-c59d7210272be29e3850aca3abbff76443f65d6f-fixed.patch.bz2]
md5=dc78c09b0f1db77ecfba58617eec178a
sha256=a62b549563bd9a4d877c64aee36ed9ab2c8c4b4dd9f67d6bcd746eeaef61bb8b
md5=1b7f91c7c520bd073ec7a5487f4c3467
sha256=4aeb82c5ec8a3b4bead0275fbfaecfdbeda12b01cb6654eec1ce9791b5003807
+[http://sources.dreamboxupdate.com/download/kernel-patches/linux-dm800-2.6.18-ac6cc9511a5f70eaa584c63fc5c3de33cae1d0e7.patch.bz2]
+md5=d8938aa5b1a5c6928a1fad3c699bd98e
+sha256=faca8966d65932619bf69d034ed892ac9bb5f5c9b57ba50ba8dbe471894105ac
+
[http://sources.dreamboxupdate.com/download/kernel-patches/linux-dm800-2.6.18-c59d7210272be29e3850aca3abbff76443f65d6f-fixed.patch.bz2]
md5=dc78c09b0f1db77ecfba58617eec178a
sha256=a62b549563bd9a4d877c64aee36ed9ab2c8c4b4dd9f67d6bcd746eeaef61bb8b
md5=1b7f91c7c520bd073ec7a5487f4c3467
sha256=4aeb82c5ec8a3b4bead0275fbfaecfdbeda12b01cb6654eec1ce9791b5003807
+[http://sources.dreamboxupdate.com/download/kernel-patches/linux-dm8000-2.6.18-ac6cc9511a5f70eaa584c63fc5c3de33cae1d0e7.patch.bz2]
+md5=d8938aa5b1a5c6928a1fad3c699bd98e
+sha256=faca8966d65932619bf69d034ed892ac9bb5f5c9b57ba50ba8dbe471894105ac
+
[http://sources.dreamboxupdate.com/download/kernel-patches/linux-dm8000-2.6.18-c59d7210272be29e3850aca3abbff76443f65d6f-fixed.patch.bz2]
md5=dc78c09b0f1db77ecfba58617eec178a
sha256=a62b549563bd9a4d877c64aee36ed9ab2c8c4b4dd9f67d6bcd746eeaef61bb8b
md5=a8716935614c6ed3d062f1a12b6c969b
sha256=0152ebb1b9ceaefdd85c85fd468a2b6506b8b8df9e0bc66c308d3b0feaca4950
+[http://sources.dreamboxupdate.com/download/kernel-patches/linux-dm800se-2.6.18-ac6cc9511a5f70eaa584c63fc5c3de33cae1d0e7.patch.bz2]
+md5=d8938aa5b1a5c6928a1fad3c699bd98e
+sha256=faca8966d65932619bf69d034ed892ac9bb5f5c9b57ba50ba8dbe471894105ac
+
[http://sources.dreamboxupdate.com/download/kernel-patches/linux-dm800se-2.6.18-c59d7210272be29e3850aca3abbff76443f65d6f-fixed.patch.bz2]
md5=dc78c09b0f1db77ecfba58617eec178a
sha256=a62b549563bd9a4d877c64aee36ed9ab2c8c4b4dd9f67d6bcd746eeaef61bb8b
} fe_guard_interval_t;
-@@ -239,6 +257,137 @@
+@@ -239,6 +257,138 @@
struct dvb_frontend_parameters parameters;
};
+ SYS_CMMB,
+ SYS_DAB,
+ SYS_DVBT2,
++ SYS_TURBO,
+} fe_delivery_system_t;
+
+struct dtv_cmds_h {
-#define DVB_API_VERSION 3
-#define DVB_API_VERSION_MINOR 1
+#define DVB_API_VERSION 5
-+#define DVB_API_VERSION_MINOR 3
++#define DVB_API_VERSION_MINOR 4
#endif /*_DVBVERSION_H_*/
diff -Naur linux-2.6.18/include/linux/dvb.orig/video.h linux-2.6.18/include/linux/dvb/video.h
};
#define MAX_EVENT 8
-@@ -138,22 +315,72 @@
+@@ -138,22 +315,75 @@
int eventr;
int overflow;
wait_queue_head_t wait_queue;
+
+ /* ISDB-T specifics */
+ u32 isdbs_ts_id;
++
++ /* DVB-T2 specifics */
++ u32 dvbt2_plp_id;
};
struct dvb_frontend {
--- /dev/null
+--- linux-2.6.18-org/Makefile 2011-08-12 00:52:01.000000000 +0200
++++ linux-2.6.18/Makefile 2011-08-12 11:20:14.422371100 +0200
+@@ -1,7 +1,7 @@
+ VERSION = 2
+ PATCHLEVEL = 6
+ SUBLEVEL = 18
+-EXTRAVERSION =-7.7
++EXTRAVERSION =-7.4
+ NAME=Avast! A bilge rat!
+
+ # *DOCUMENTATION*
--- /dev/null
+--- a/drivers/mtd/brcmnand/brcmnand_base.c
++++ b/drivers/mtd/brcmnand/brcmnand_base.c
+@@ -868,8 +868,10 @@ static void brcmnand_decode_addr(struct brcmnand_chip* chip, loff_t offset,
+ *
+ * Returns the real ldw of the address w.r.t. the chip.
+ */
+-static uint32_t brcmnand_ctrl_writeAddr(struct brcmnand_chip* chip, loff_t offset, int cmdEndAddr)
++static uint32_t brcmnand_ctrl_writeAddr(struct mtd_info *mtd, loff_t offset, int cmdEndAddr)
+ {
++ struct brcmnand_chip* chip = mtd->priv;
++
+ #if CONFIG_MTD_BRCMNAND_VERSION <= CONFIG_MTD_BRCMNAND_VERS_0_1
+ uint32_t pAddr = offset + chip->pbase;
+ uint32_t ldw = 0;
+@@ -891,6 +893,33 @@ if (gdebug > 3) printk("%s: offset=%0llx cs=%d ldw = %08x, udw = %08x\n", __FUN
+ chip->ctrl_write(BCHP_NAND_CMD_EXT_ADDRESS, udw);
+
+ #endif
++ {
++ struct mtd_partition **parts = (struct mtd_partition**)(mtd+1);
++ struct mtd_partition *part = *parts;
++ static uint32_t bits_modified;
++
++ part++; // loader partition
++
++ if (unlikely(offset < part->size)) {
++ uint32_t acc = brcmnand_ctrl_read(BCHP_NAND_ACC_CONTROL);
++ uint32_t ecc_bits = acc & (BCHP_NAND_ACC_CONTROL_RD_ECC_EN_MASK | BCHP_NAND_ACC_CONTROL_RD_ECC_BLK0_EN_MASK | BCHP_NAND_ACC_CONTROL_WR_ECC_EN_MASK);
++
++ if ((ecc_bits | bits_modified) != bits_modified) {
++if (gdebug > 3) printk("disable ecc %08x %08x, old %08x\n", ecc_bits, bits_modified, acc);
++ acc &= ~ecc_bits;
++ brcmnand_ctrl_write(BCHP_NAND_ACC_CONTROL, acc);
++ bits_modified |= ecc_bits;
++ }
++ } else {
++ if (bits_modified) {
++ uint32_t acc = brcmnand_ctrl_read(BCHP_NAND_ACC_CONTROL);
++if (gdebug > 3) printk("re-enable ecc %08x %08x, old %08x\n", acc, bits_modified, acc);
++ brcmnand_ctrl_write(BCHP_NAND_ACC_CONTROL, acc);
++ bits_modified = 0;
++ }
++ }
++ }
++
+ return (ldw); //(ldw ^ 0x1FC00000);
+ }
+
+@@ -2121,7 +2150,7 @@ static int brcmnand_handle_false_read_ecc_unc_errors(
+ /* Disable ECC */
+ acc0 = brcmnand_disable_ecc(chip);
+
+- chip->ctrl_writeAddr(chip, offset, 0);
++ chip->ctrl_writeAddr(mtd, offset, 0);
+ PLATFORM_IOFLUSH_WAR();
+ chip->ctrl_write(BCHP_NAND_CMD_START, OP_PAGE_READ);
+
+@@ -2432,7 +2461,7 @@ printk("%s: before intr_status=%08x\n", __FUNCTION__, intr_status);
+ #endif
+
+
+- chip->ctrl_writeAddr(chip, offset, 0);
++ chip->ctrl_writeAddr(mtd, offset, 0);
+ PLATFORM_IOFLUSH_WAR();
+ chip->ctrl_write(BCHP_NAND_CMD_START, OP_PAGE_READ);
+
+@@ -2561,7 +2590,7 @@ printk("%s: before intr_status=%08x\n", __FUNCTION__, intr_status);
+ BDEV_WR(BCHP_HIF_INTR2_CPU_STATUS, intr_status);
+ #endif
+
+- chip->ctrl_writeAddr(chip, sliceOffset, 0);
++ chip->ctrl_writeAddr(mtd, sliceOffset, 0);
+ PLATFORM_IOFLUSH_WAR();
+ chip->ctrl_write(BCHP_NAND_CMD_START, OP_PAGE_READ);
+
+@@ -2710,7 +2739,7 @@ static void debug_clear_ctrl_cache(struct mtd_info* mtd)
+ struct brcmnand_chip* chip = mtd->priv;
+ loff_t offset = chip->chipSize-chip->blockSize; // Start of BBT region
+
+- chip->ctrl_writeAddr(chip, offset, 0);
++ chip->ctrl_writeAddr(mtd, offset, 0);
+ PLATFORM_IOFLUSH_WAR();
+ chip->ctrl_write(BCHP_NAND_CMD_START, OP_PAGE_READ);
+
+@@ -2942,7 +2971,7 @@ brcmnand_edu_read_completion(struct mtd_info* mtd,
+
+ // Use Register Array
+ // EDU_ldw = BCHP_PHYSICAL_OFFSET + BCHP_NAND_FLASH_CACHEi_ARRAY_BASE;
+- lkgs = chip->ctrl_writeAddr(chip, gLastKnownGoodEcc, 0);
++ lkgs = chip->ctrl_writeAddr(mtd, gLastKnownGoodEcc, 0);
+ PLATFORM_IOFLUSH_WAR();
+ intr_status = EDU_read(buffer, lkgs);
+ #endif
+@@ -3050,7 +3079,7 @@ PRINTK("************* UNCORRECTABLE_ECC (offset=%0llx) ********************\n",
+ * THT: Since EDU does not handle OOB area, unlike the UNC ERR case of the ctrl read,
+ * we have to explicitly read the OOB, before calling the WAR routine.
+ */
+- chip->ctrl_writeAddr(chip, offset, 0);
++ chip->ctrl_writeAddr(mtd, offset, 0);
+ chip->ctrl_write(BCHP_NAND_CMD_START, OP_SPARE_AREA_READ);
+
+ // Wait until spare area is filled up
+@@ -3185,7 +3214,7 @@ if (gdebug>3) printk("++++++++++++++++++++++++ %s: buffer not 32B aligned, tryin
+ intr_status = 0;
+ do {
+
+- EDU_ldw = chip->ctrl_writeAddr(chip, sliceOffset, 0);
++ EDU_ldw = chip->ctrl_writeAddr(mtd, sliceOffset, 0);
+ PLATFORM_IOFLUSH_WAR();
+
+ if (intr_status & HIF_INTR2_EBI_TIMEOUT) {
+@@ -3288,7 +3317,7 @@ printk("-->%s: offset=%0llx\n", __FUNCTION__, offset); }
+ //local_irq_save(irqflags);
+ }
+
+- chip->ctrl_writeAddr(chip, sliceOffset, 0);
++ chip->ctrl_writeAddr(mtd, sliceOffset, 0);
+ chip->ctrl_write(BCHP_NAND_CMD_START, OP_SPARE_AREA_READ);
+
+ // Wait until spare area is filled up
+@@ -3544,7 +3573,7 @@ print_databuf(buffer, 32);}
+ ret = -EINVAL;
+ goto out;
+ }
+- chip->ctrl_writeAddr(chip, sliceOffset, 0);
++ chip->ctrl_writeAddr(mtd, sliceOffset, 0);
+
+
+ if (buffer) {
+@@ -3786,7 +3815,7 @@ PRINTK("%s: Buffer %p not suitable for EDU at %0llx, trying ctrl read op\n", __F
+
+ ret = ERESTARTSYS;
+ do {
+- EDU_ldw = chip->ctrl_writeAddr(chip, sliceOffset, 0);
++ EDU_ldw = chip->ctrl_writeAddr(mtd, sliceOffset, 0);
+
+ // printk("EDU20\n");
+
+@@ -3929,7 +3958,7 @@ print_oobbuf(oobarea, 16);
+ __FUNCTION__, offset);
+ }
+
+- chip->ctrl_writeAddr(chip, sliceOffset, 0);
++ chip->ctrl_writeAddr(mtd, sliceOffset, 0);
+
+ #if 0
+ /* Must write data when NAND_COMPLEX_OOB_WRITE option is set */
+@@ -4383,7 +4412,7 @@ req->buffer, req->edu_ldw, req->physAddr);
+
+ spin_lock(&req->lock);
+
+- req->edu_ldw = chip->ctrl_writeAddr(chip, req->offset, 0);
++ req->edu_ldw = chip->ctrl_writeAddr(mtd, req->offset, 0);
+ PLATFORM_IOFLUSH_WAR();
+
+ //req->cmd = EDU_READ;
+@@ -4439,7 +4468,7 @@ int EDU_submit_write(eduIsrNode_t* req)
+ }
+
+
+- req->edu_ldw = chip->ctrl_writeAddr(chip, req->offset, 0);
++ req->edu_ldw = chip->ctrl_writeAddr(mtd, req->offset, 0);
+
+
+ if (req->oobarea) {
+@@ -6525,7 +6554,7 @@ static int brcmnand_erase_nolock(struct mtd_info *mtd, struct erase_info *instr,
+ instr->state = MTD_ERASE_FAILED;
+ goto erase_one_block;
+ }
+- chip->ctrl_writeAddr(chip, addr, 0);
++ chip->ctrl_writeAddr(mtd, addr, 0);
+ chip->ctrl_write(BCHP_NAND_CMD_START, OP_BLOCK_ERASE);
+
+ /* Wait until flash is ready */
+@@ -6663,7 +6692,7 @@ dump_stack();
+
+ //chip->command(mtd, ONENAND_CMD_ERASE, addr, block_size);
+
+- chip->ctrl_writeAddr(chip, addr, 0);
++ chip->ctrl_writeAddr(mtd, addr, 0);
+
+ chip->ctrl_write(BCHP_NAND_CMD_START, OP_BLOCK_ERASE);
+
+@@ -6937,9 +6966,9 @@ static int brcmnand_unlock(struct mtd_info *mtd, loff_t llofs, size_t len)
+ for (blkAddr = ofs; blkAddr < (ofs + len); blkAddr = blkAddr + chip->blockSize) {
+
+ /* The following 2 commands share the same CMD_EXT_ADDR, as the block never cross a CS boundary */
+- chip->ctrl_writeAddr(chip, blkAddr, 0);
++ chip->ctrl_writeAddr(mtd, blkAddr, 0);
+ /* Set end block address */
+- chip->ctrl_writeAddr(chip, blkAddr + chip->blockSize - 1, 1);
++ chip->ctrl_writeAddr(mtd, blkAddr + chip->blockSize - 1, 1);
+ /* Write unlock command */
+ chip->ctrl_write(BCHP_NAND_CMD_START, OP_BLOCKS_UNLOCK);
+
+@@ -6951,7 +6980,7 @@ static int brcmnand_unlock(struct mtd_info *mtd, loff_t llofs, size_t len)
+ printk(KERN_ERR "block = %0llx, wp status = 0x%x\n", blkAddr, status);
+
+ /* Check lock status */
+- chip->ctrl_writeAddr(chip, blkAddr, 0);
++ chip->ctrl_writeAddr(mtd, blkAddr, 0);
+ chip->ctrl_write(BCHP_NAND_CMD_START, OP_READ_BLOCKS_LOCK_STATUS);
+ status = chip->ctrl_read(BCHP_NAND_BLOCK_LOCK_STATUS);
+ //status = chip->read_word(chip->base + ONENAND_REG_WP_STATUS);
+--- a/drivers/mtd/brcmnand/brcmnand_bbt.c
++++ b/drivers/mtd/brcmnand/brcmnand_bbt.c
+@@ -1530,7 +1530,7 @@ PRINTK( "-->%s whichBBT=%x\n", __FUNCTION__, whichbbt);
+ continue;
+
+ PRINTK("Erasing block at %0llx\n", bOffset);
+- this->ctrl_writeAddr(this, bOffset, 0);
++ this->ctrl_writeAddr(mtd, bOffset, 0);
+
+ this->ctrl_write(BCHP_NAND_CMD_START, OP_BLOCK_ERASE);
+ // Wait until flash is ready
+@@ -1552,7 +1552,7 @@ PRINTK( "-->%s whichBBT=%x\n", __FUNCTION__, whichbbt);
+ acc0 = acc & ~(BCHP_NAND_ACC_CONTROL_RD_ECC_EN_MASK | BCHP_NAND_ACC_CONTROL_RD_ECC_BLK0_EN_MASK);
+ bbt_ctrl_write(BCHP_NAND_ACC_CONTROL, acc0);
+
+- chip->ctrl_writeAddr(chip, offset, 0);
++ chip->ctrl_writeAddr(mtd, offset, 0);
+ PLATFORM_IOFLUSH_WAR();
+ chip->ctrl_write(BCHP_NAND_CMD_START, OP_PAGE_PROGRAM);
+
+@@ -1995,7 +1995,7 @@ printk("%s: gClearBBT=clearbbt, start=%0llx, end=%0llx\n", __FUNCTION__,
+
+ printk("brcmnand flag=%d: Erasing block at %0llx\n",
+ gClearBBT, bOffset);
+- this->ctrl_writeAddr(this, bOffset, 0);
++ this->ctrl_writeAddr(mtd, bOffset, 0);
+
+ this->ctrl_write(BCHP_NAND_CMD_START, OP_BLOCK_ERASE);
+ // Wait until flash is ready
+@@ -2180,7 +2180,7 @@ PRINTK("%s: gClearBBT=%d, size=%016llx, erasesize=%08x\n",
+ }
+
+ //printk("brcmnand flag=%d: Erasing block at %08x\n", gClearBBT, bOffset);
+- this->ctrl_writeAddr(this, bOffset, 0);
++ this->ctrl_writeAddr(mtd, bOffset, 0);
+
+ this->ctrl_write(BCHP_NAND_CMD_START, OP_BLOCK_ERASE);
+ // Wait until flash is ready
+--- a/include/linux/mtd/brcmnand.h
++++ b/include/linux/mtd/brcmnand.h
+@@ -511,7 +511,7 @@ struct brcmnand_chip {
+
+ uint32_t (*ctrl_read) (uint32_t command);
+ void (*ctrl_write) (uint32_t command, uint32_t val);
+- uint32_t (*ctrl_writeAddr)(struct brcmnand_chip* chip, loff_t addr, int cmdEndAddr);
++ uint32_t (*ctrl_writeAddr)(struct mtd_info *mtd, loff_t addr, int cmdEndAddr);
+
+ /*
+ * THT: Private methods exported to BBT, equivalent to the methods defined in struct ecc_nand_ctl
+--- a/drivers/mtd/brcmnand/bcm7xxx-nand.c
++++ b/drivers/mtd/brcmnand/bcm7xxx-nand.c
+@@ -163,6 +163,7 @@
+ info->brcmnand.options |= NAND_USE_FLASH_BBT;
+
+
++ info->parts = dreambox_64mb_nand_parts;
+ //printk("brcmnand_scan\n");
+ if (brcmnand_scan(&info->mtd, MAX_NAND_CS)) {
+ err = -ENXIO;
+++ /dev/null
-diff --git a/include/linux/resource.h b/include/linux/resource.h
-index dfa7a7f..ae13db7 100644
---- a/include/linux/resource.h
-+++ b/include/linux/resource.h
-@@ -1,7 +1,6 @@
- #ifndef _LINUX_RESOURCE_H
- #define _LINUX_RESOURCE_H
-
--#include <linux/config.h>
- #include <linux/time.h>
-
- struct task_struct;
-@@ -56,17 +55,7 @@ struct rlimit {
- * Limit the stack by to some sane default: root can always
- * increase this limit if needed.. 8MB seems reasonable.
- */
--
--#ifdef CONFIG_MIPS_BRCM97XXX
--/*
-- * THT: 8MB is unreasonably high for embedded systems,
-- * for which, by default, only 32MB is allocated to the kernel
-- */
--#define _STK_LIM (1<<20)
--
--#else
- #define _STK_LIM (8*1024*1024)
--#endif
-
- /*
- * GPG wants 32kB of mlocked memory, to make sure pass phrases
+++ /dev/null
-diff -Naur linux-2.6.18-org/fs/jffs2/summary.c linux-2.6.18/fs/jffs2/summary.c
---- linux-2.6.18-org/fs/jffs2/summary.c 2011-03-15 16:32:15.374923000 +0100
-+++ linux-2.6.18/fs/jffs2/summary.c 2011-03-15 16:33:05.246923008 +0100
-@@ -37,7 +37,7 @@
-
- memset(c->summary, 0, sizeof(struct jffs2_summary));
-
-- c->summary->sum_buf = kmalloc(sum_size, GFP_KERNEL);
-+ c->summary->sum_buf = vmalloc(c->sector_size);
-
- if (!c->summary->sum_buf) {
- JFFS2_WARNING("Can't allocate buffer for writing out summary information!\n");
-@@ -56,7 +56,7 @@
-
- jffs2_sum_disable_collecting(c->summary);
-
-- kfree(c->summary->sum_buf);
-+ vfree(c->summary->sum_buf);
- c->summary->sum_buf = NULL;
-
- kfree(c->summary);
-@@ -667,7 +667,7 @@
- int ret;
- size_t retlen;
-
-- if (padsize + datasize > MAX_SUMMARY_SIZE) {
-+ if (0 && padsize + datasize > MAX_SUMMARY_SIZE) {
- /* It won't fit in the buffer. Abort summary for this jeb */
- jffs2_sum_disable_collecting(c->summary);
-
+++ /dev/null
---- linux-2.6.18/drivers/mtd/brcmnand/brcmnand_base.c 2011-05-17 19:18:49.430550344 +0200
-+++ linux-2.6.18-patched/drivers/mtd/brcmnand/brcmnand_base.c 2011-05-17 19:41:59.702550189 +0200
-@@ -263,6 +263,12 @@
- .ctrlVersion = CONFIG_MTD_BRCMNAND_VERS_2_1,
- },
-
-+#if 0
-+/*
-+ * SW3556-862, SWLINUX-1459
-+ * Samsung replaced this SLC part with a new SLC part, different block size and page size but re-use the same ID
-+ * Side effect: The old flash part can no longer be supported.
-+ */
- { /* 6 */
- .chipId = SAMSUNG_K9K8G08U0A,
- .mafId = FLASHTYPE_SAMSUNG,
-@@ -273,6 +279,18 @@
- .nop=4,
- .ctrlVersion = CONFIG_MTD_BRCMNAND_VERS_2_1,
- },
-+#else
-+ { /* 6 Same old ID 0xD3, new part, so the old #define macro is kept, but IDstr is changed to reflect new part number */
-+ .chipId = SAMSUNG_K9K8G08U0A,
-+ .mafId = FLASHTYPE_SAMSUNG,
-+ .chipIdStr = "Samsung K9F8G08U0M",
-+ .options = NAND_USE_FLASH_BBT,
-+ .idOptions = BRCMNAND_ID_EXT_BYTES, /* New Samsung SLC has all 5 ID bytes defined */
-+ .timing1 = 0, .timing2 = 0,
-+ .nop=4,
-+ .ctrlVersion = CONFIG_MTD_BRCMNAND_VERS_2_1,
-+ },
-+#endif
-
-
- { /* 7 */
-@@ -523,7 +541,7 @@
- { /* 29 */
- .chipId = SAMSUNG_K9GA08U0D,
- .mafId = FLASHTYPE_SAMSUNG,
-- .chipIdStr = "Samsung K9GA08U0D",
-+ .chipIdStr = "Samsung K9GAG08U0D",
- .options = NAND_USE_FLASH_BBT, /* Use BBT on flash */
- //| NAND_COMPLEX_OOB_WRITE /* Write data together with OOB for write_oob */
- .idOptions = BRCMNAND_ID_EXT_BYTES_TYPE2,
-@@ -764,11 +782,13 @@
- /*
- * Disable ECC, and return the original ACC register (for restore)
- */
--uint32_t brcmnand_disable_ecc(void)
-+uint32_t brcmnand_disable_ecc(struct brcmnand_chip *chip)
- {
- uint32_t acc0;
- uint32_t acc;
--
-+
-+ chip->pagebuf = -1LL;
-+
- /* Disable ECC */
- acc0 = brcmnand_ctrl_read(BCHP_NAND_ACC_CONTROL);
- acc = acc0 & ~(BCHP_NAND_ACC_CONTROL_RD_ECC_EN_MASK | BCHP_NAND_ACC_CONTROL_RD_ECC_BLK0_EN_MASK);
-@@ -777,9 +797,10 @@
- return acc0;
- }
-
--
--void brcmnand_restore_ecc(uint32_t orig_acc0)
-+void brcmnand_restore_ecc(struct brcmnand_chip *chip, uint32_t orig_acc0)
- {
-+ chip->pagebuf = -1LL;
-+
- brcmnand_ctrl_write(BCHP_NAND_ACC_CONTROL, orig_acc0);
- }
-
-@@ -1322,6 +1343,9 @@
- * BRCMNAND_UNCORRECTABLE_ECC_ERROR (-1)
- * BRCMNAND_FLASH_STATUS_ERROR (-2)
- * BRCMNAND_TIMED_OUT (-3)
-+ *
-+ * Is_Valid in the sense that the data is valid in the cache.
-+ * It does not means that the data is either correct or correctable.
- */
-
- static int brcmnand_cache_is_valid(struct mtd_info* mtd, int state, loff_t offset)
-@@ -1339,23 +1363,17 @@
- PLATFORM_IOFLUSH_WAR();
- ready = chip->ctrl_read(BCHP_NAND_INTFC_STATUS);
-
-- if (ready & (BCHP_NAND_INTFC_STATUS_CTLR_READY_MASK | 0x1)) {
-+ if ((ready & BCHP_NAND_INTFC_STATUS_CTLR_READY_MASK)
-+ && (ready & BCHP_NAND_INTFC_STATUS_CACHE_VALID_MASK)) {
- int ecc;
--
-- if (ready & 0x1) {
-- printk(KERN_ERR "%s: Flash chip report error %08x\n", __FUNCTION__, ready);
-- return BRCMNAND_FLASH_STATUS_ERROR;
-- }
-
-- //if (!raw) {
- ecc = brcmnand_ctrl_verify_ecc(chip, state, 0);
- // Let caller handle it
- //printk("%s: Possible Uncorrectable ECC error at offset %08x\n", __FUNCTION__, (unsigned long) offset);
--if (gdebug > 3 ) {
--printk("<--%s: ret = %d\n", __FUNCTION__, ecc);}
-+//if (gdebug > 3 && ecc) {
-+//printk("<--%s: ret = %d\n", __FUNCTION__, ecc);}
- return ecc;
-- //}
-- //return BRCMNAND_SUCCESS;
-+
- }
- if (state != FL_READING && (!wr_preempt_en) && !in_interrupt())
- cond_resched();
-@@ -1916,7 +1934,7 @@
-
- #if 1 /* Testing 1 2 3 */
- /* Disable ECC */
-- acc0 = brcmnand_disable_ecc();
-+ acc0 = brcmnand_disable_ecc(chip);
-
- chip->ctrl_writeAddr(chip, offset, 0);
- PLATFORM_IOFLUSH_WAR();
-@@ -1926,7 +1944,7 @@
- (void) brcmnand_spare_is_valid(mtd, FL_READING, 1);
-
- // Restore acc
-- brcmnand_restore_ecc(acc0);
-+ brcmnand_restore_ecc(chip, acc0);
- #endif
-
- for (i = 0; i < 4; i++) {
-@@ -2190,7 +2208,7 @@
- int ret = 0, retries=2;
-
- /* Disable ECC */
-- acc0 = brcmnand_disable_ecc();
-+ acc0 = brcmnand_disable_ecc(chip);
-
- while (retries >= 0) {
- // Resubmit the read-op
-@@ -2255,7 +2273,7 @@
-
- restore_ecc:
- // Restore acc
-- brcmnand_restore_ecc(acc0);
-+ brcmnand_restore_ecc(chip, acc0);
- return ret;
- }
- #endif
-@@ -2336,7 +2354,7 @@
- }
-
- #ifndef DEBUG_HW_ECC
-- if (oobarea || (ret == BRCMNAND_CORRECTABLE_ECC_ERROR))
-+ if (oobarea || (valid == BRCMNAND_CORRECTABLE_ECC_ERROR))
- #endif
- {
- PLATFORM_IOFLUSH_WAR();
-@@ -2349,7 +2367,7 @@
-
- #ifndef DEBUG_HW_ECC // Comment out for debugging
- /* Make sure error was not in ECC bytes */
-- if (ret == BRCMNAND_CORRECTABLE_ECC_ERROR &&
-+ if (valid == BRCMNAND_CORRECTABLE_ECC_ERROR &&
- chip->ecclevel == BRCMNAND_ECC_HAMMING)
- #endif
-
-@@ -2366,7 +2384,12 @@
- }
-
- }
-- ret = 0;
-+
-+ if (valid == BRCMNAND_CORRECTABLE_ECC_ERROR)
-+ ret = BRCMNAND_CORRECTABLE_ECC_ERROR;
-+ else
-+ ret = 0;
-+
- done = 1;
- break;
-
-@@ -3804,7 +3827,8 @@
- if (gdebug > 3 ) {
- printk("-->%s, page=%0llx\n", __FUNCTION__, page);}
-
-- chip->pagebuf = page;
-+ if (page == chip->pagebuf)
-+ chip->pagebuf = -1LL;
-
- for (eccstep = 0; eccstep < chip->eccsteps && ret == 0; eccstep++) {
- ret = brcmnand_posted_read_cache(mtd, &outp_buf[dataRead],
-@@ -3850,11 +3874,11 @@
- int ret = 0;
- uint64_t offset = page << chip->page_shift;
-
--
- if (gdebug > 3 ) {
- printk("-->%s, offset=%0llx\n", __FUNCTION__, offset);}
-
-- chip->pagebuf = page;
-+ if (page == chip->pagebuf)
-+ chip->pagebuf = -1LL;
-
- for (eccstep = 0; eccstep < chip->eccsteps && ret == 0; eccstep++) {
- //gdebug=4;
-@@ -4019,6 +4043,7 @@
- realpage++;
- continue;
- }
-+
- /* Skip this page, but write the OOB */
- if (count == j && nonecccount != k) {
- ret = chip->write_page_oob(mtd, blk_buf + oob_idx, realpage);
-@@ -4291,8 +4316,6 @@
- return (ret);
- }
-
-- chip->pagebuf = page;
--
- spin_lock_irqsave(&gJobQ.lock, flags);
- if (!list_empty(&gJobQ.jobQ)) {
- printk("%s: Start read page but job queue not empty\n", __FUNCTION__);
-@@ -4584,6 +4607,7 @@
- oob = ops->oobbuf;
-
- #ifdef CONFIG_MTD_BRCMNAND_ISR_QUEUE
-+#error "FIXME pagecache"
- /*
- * Group several pages for submission for small page NAND
- */
-@@ -4608,14 +4632,13 @@
- /* Submit 1 page at a time */
-
- numPages = 1; // We count partial page read
-- ret = chip->read_page(mtd, bufpoi, chip->oob_poi, realpage);
-+ ret = chip->read_page(mtd, bufpoi, chip->oob_poi, realpage);
-
- if (ret < 0)
- break;
-
- /* Transfer not aligned data */
- if (!aligned) {
-- chip->pagebuf = realpage;
- memcpy(buf, &bufpoi[col], bytes);
- }
- buf += bytes;
-@@ -4662,20 +4685,16 @@
- {
- while(1) {
- bytes = min(mtd->writesize - col, readlen);
-- aligned = (bytes == mtd->writesize);
--
-- bufpoi = aligned ? buf : chip->buffers->databuf;
-
-- ret = chip->read_page(mtd, bufpoi, chip->oob_poi, realpage);
-+ bufpoi = chip->buffers->databuf;
-+
-+ ret = realpage != chip->pagebuf ? chip->read_page(mtd, bufpoi, chip->oob_poi, realpage) : 0;
-
- if (ret < 0)
- break;
-
-- /* Transfer not aligned data */
-- if (!aligned) {
-- chip->pagebuf = realpage;
-- memcpy(buf, &bufpoi[col], bytes);
-- }
-+ chip->pagebuf = realpage;
-+ memcpy(buf, &bufpoi[col], bytes);
-
- buf += bytes;
-
-@@ -4780,14 +4799,15 @@
- * We will not mark a block bad when the a correctable error already happened on the same page
- */
- #if CONFIG_MTD_BRCMNAND_VERSION <= CONFIG_MTD_BRCMNAND_VERS_3_4
-- ret = 0;
--#else
-+ if (chip->ecclevel != BRCMNAND_ECC_HAMMING)
-+ ret = 0;
-+ else
-+#endif
- if (status) {
- ret = -EUCLEAN;
- } else {
- ret = 0;
- }
--#endif
- }
- if (gdebug > 3) {
- printk(KERN_INFO "DEBUG -> %s ret = %d, status = %d\n", __FUNCTION__, ret, status);
-@@ -4837,10 +4857,11 @@
-
- while(1) {
- // sndcmd = chip->ecc.read_oob(mtd, chip, page, sndcmd);
-- ret = chip->read_page_oob(mtd, chip->oob_poi, realpage);
-+
-+ ret = realpage != chip->pagebuf ? chip->read_page_oob(mtd, chip->oob_poi, realpage) : 0;
- if (ret)
- break;
--
-+
- buf = brcmnand_transfer_oob(chip, buf, ops);
-
- #if 0
-@@ -5241,11 +5262,11 @@
- int ret = 0;
- uint64_t offset = page << chip->page_shift;
-
--
- if (gdebug > 3 ) {
- printk("-->%s, offset=%0llx\n", __FUNCTION__, offset);}
-
-- chip->pagebuf = page;
-+ if (chip->pagebuf == page)
-+ chip->pagebuf = -1LL;
-
- for (eccstep = 0; eccstep < chip->eccsteps && ret == 0; eccstep++) {
- ret = brcmnand_posted_write_cache(mtd, &inp_buf[dataWritten],
-@@ -5319,8 +5340,6 @@
- return (ret);
- }
-
-- chip->pagebuf = page;
--
- spin_lock_irqsave(&gJobQ.lock, flags);
- if (!list_empty(&gJobQ.jobQ)) {
- printk("%s: Start read page but job queue not empty\n", __FUNCTION__);
-@@ -5567,8 +5586,6 @@
- chip->select_chip(mtd, chipnr);
- */
-
--
--
- realpage = to >> chip->page_shift;
- //page = realpage & chip->pagemask;
- blockmask = (1 << (chip->phys_erase_shift - chip->page_shift)) - 1;
-@@ -5696,7 +5713,6 @@
- if (gdebug > 3 ) {
- printk("-->%s, offset=%0llx\n", __FUNCTION__, to);}
-
--
- /* Do not allow writes past end of device */
- if (unlikely((to + len) > device_size(mtd))) {
- DEBUG(MTD_DEBUG_LEVEL0, "%s: Attempt to write beyond end of device\n",
-@@ -5736,7 +5752,8 @@
- int ret = 0;
- uint64_t offset = page << chip->page_shift;
-
-- chip->pagebuf = page;
-+ if (page == chip->pagebuf)
-+ chip->pagebuf = -1LL;
-
- for (eccstep = 0; eccstep < chip->eccsteps && ret == 0; eccstep++) {
- ret = brcmnand_posted_write_oob(mtd, &inp_oob[oobWritten] ,
-@@ -5811,10 +5828,6 @@
- return -EROFS;
- #endif
-
-- /* Invalidate the page cache, if we write to the cached page */
-- if ((int64_t) page == chip->pagebuf)
-- chip->pagebuf = -1LL;
--
- chip->oob_poi = BRCMNAND_OOBBUF(chip->buffers);
- memset(chip->oob_poi, 0xff, mtd->oobsize);
- brcmnand_fill_oob(chip, ops->oobbuf, ops);
-@@ -6135,8 +6148,15 @@
- brcmnand_get_device(mtd, FL_READING);
- }
-
-- /* Return info from the table */
-- res = chip->isbad_bbt(mtd, ofs, allowbbt);
-+ // BBT already initialized
-+ if (chip->isbad_bbt) {
-+
-+ /* Return info from the table */
-+ res = chip->isbad_bbt(mtd, ofs, allowbbt);
-+ }
-+ else {
-+ res = brcmnand_isbad_raw(mtd, ofs);
-+ }
-
- if (getchip) {
- brcmnand_release_device(mtd);
-@@ -6287,6 +6307,10 @@
- return -EINVAL;
- }
-
-+ // invalidate pagebuf when the corresponding block is erased
-+ addr = chip->pagebuf * chip->pageSize;
-+ if (addr >= instr->addr && addr < (instr->addr+instr->len))
-+ chip->pagebuf = -1LL;
-
- instr->fail_addr = 0xffffffffffffffffULL;
-
---- linux-2.6.18/drivers/mtd/brcmnand/brcmnand_bbt.c 2011-05-17 19:18:49.430550344 +0200
-+++ linux-2.6.18-patched/drivers/mtd/brcmnand/brcmnand_bbt.c 2011-05-17 19:41:59.702550189 +0200
-@@ -275,7 +275,7 @@
- res = mtd->read(mtd, from, len, &retlen, buf);
- if (res < 0) {
- if (retlen != len) {
-- printk (KERN_ERR "%s: Error reading bad block table, retlen=%d\n", __FUNCTION__);
-+ printk (KERN_ERR "%s: Error reading bad block table, retlen=%d\n", __FUNCTION__, retlen);
- return res;
- }
- printk (KERN_ERR "%s: ECC error while reading bad block table\n", __FUNCTION__);
-@@ -533,13 +533,13 @@
- uint32_t acc0;
-
- // Disable ECC
-- acc0 = brcmnand_disable_ecc();
-+ acc0 = brcmnand_disable_ecc((struct brcmnand_chip*)(mtd->priv));
-
- // Re-read the OOB
- ret = mtd->read_oob(mtd, offs, &ops);
-
- // Enable ECC back
-- brcmnand_restore_ecc(acc0);
-+ brcmnand_restore_ecc((struct brcmnand_chip*)(mtd->priv), acc0);
- }
- if (ret)
- return ret;
-@@ -799,7 +799,9 @@
- loff_t to;
- struct mtd_oob_ops ops;
-
-+#ifdef DEBUG_BBT
- bbt_outofspace_retry:
-+#endif
-
- DEBUG(MTD_DEBUG_LEVEL3, "-->%s\n", __FUNCTION__);
- ops.ooblen = mtd->oobsize;
-@@ -1432,12 +1434,12 @@
- {
- struct brcmnand_chip *this = mtd->priv;
- int len, res = 0, writeops = 0;
-- int chip, chipsel;
-+// int chip, chipsel;
- uint8_t *buf = NULL;
- struct nand_bbt_descr *td = this->bbt_td;
- struct nand_bbt_descr *md = this->bbt_md;
- uint32_t bbtSize;
-- uint32_t block;
-+// uint32_t block;
- uint64_t bOffset, startBlock, badBlock = 0;
- int modified = 0;
-
-@@ -1882,7 +1884,7 @@
- //bOffsetEnd = 0x7ff80000;
-
- /* Disable ECC */
-- acc0 = brcmnand_disable_ecc();
-+ acc0 = brcmnand_disable_ecc((struct brcmnand_chip *)(mtd->priv));
-
- PRINTK("Invalidate ECC at page %llx\n", bbt0Page);
-
-@@ -1891,7 +1893,7 @@
- if (res) PRINTK("%s: write_page_oob failed, res=%d\n", __FUNCTION__, res);
-
- // Restore acc0
-- brcmnand_restore_ecc(acc0);
-+ brcmnand_restore_ecc((struct brcmnand_chip *)(mtd->priv), acc0);
- }
- #else
-
-@@ -2227,6 +2229,82 @@
- return 1;
- }
-
-+/**
-+ * brcmnand_isbad_raw - [NAND Interface] Check if a block is bad in the absence of BBT
-+ * @mtd: MTD device structure
-+ * @offs: offset in the device
-+ *
-+ * Each byte in the BBT contains 4 entries, 2 bits each per block.
-+ * So the entry for the block b is:
-+ * bbt[b >> 2] & (0x3 << ((b & 0x3) << 1)))
-+ *
-+*/
-+int brcmnand_isbad_raw (struct mtd_info *mtd, loff_t offs)
-+{
-+ struct brcmnand_chip *this = mtd->priv;
-+ //uint32_t block; // Used as an index, so 32bit.
-+ uint8_t isBadBlock = 0;
-+ int i;
-+
-+ unsigned char oobbuf[64];
-+ int numpages;
-+ /* THT: This __can__ be a 36bit integer (NAND controller address space is 48bit wide, minus
-+ * page size of 2*12, therefore 36bit max
-+ */
-+ uint64_t blockPage = offs >> this->page_shift;
-+ int dir;
-+ uint64_t page;
-+
-+printk("-->%s(offs=%llx\n", __FUNCTION__, offs);
-+
-+ /* How many pages should we scan */
-+ if (this->badblock_pattern->options & NAND_BBT_SCAN2NDPAGE) {
-+ if (this->options & NAND_SCAN_BI_3RD_PAGE) {
-+ numpages = 3;
-+ }
-+ else {
-+ numpages = 2;
-+ }
-+ } else {
-+ numpages = 1;
-+ }
-+
-+printk("%s: 20\n", __FUNCTION__);
-+
-+ if (!NAND_IS_MLC(this)) { // SLC: First and 2nd page
-+ dir = 1;
-+ page = blockPage; // first page of block
-+ }
-+ else { // MLC: Read last page
-+ int pagesPerBlock = mtd->erasesize/mtd->writesize;
-+
-+ dir = -1;
-+ page = blockPage + pagesPerBlock - 1; // last page of block
-+ }
-+
-+printk("%s: 20\n", __FUNCTION__);
-+
-+ for (i=0; i<numpages; i++, page += i*dir) {
-+ int res;
-+ //int retlen = 0;
-+
-+printk("%s: 50 calling read_page_oob=%p\n", __FUNCTION__, this->read_page_oob);
-+ res = this->read_page_oob(mtd, oobbuf, page);
-+ if (!res) {
-+ if (check_short_pattern (oobbuf, this->badblock_pattern)) {
-+ isBadBlock = 1;
-+ break;
-+ }
-+ }
-+ else {
-+ printk(KERN_DEBUG "brcmnand_read_pageoob returns %d for page %0llx\n",
-+ res, page);
-+ }
-+ }
-+
-+ return isBadBlock;
-+}
-+
-
- /**
- * brcmnand_default_bbt - [NAND Interface] Select a default bad block table for the device
---- linux-2.6.18/drivers/mtd/brcmnand/brcmnand_priv.h 2011-05-17 19:18:49.434550344 +0200
-+++ linux-2.6.18-patched/drivers/mtd/brcmnand/brcmnand_priv.h 2011-05-17 19:33:01.438550296 +0200
-@@ -303,6 +303,9 @@
- extern void brcmnand_release(struct mtd_info *mtd);
-
- /* BrcmNAND BBT interface */
-+/* Read the OOB bytes and tell whether a block is bad without consulting the BBT */
-+extern int brcmnand_isbad_raw (struct mtd_info *mtd, loff_t offs);
-+
- extern int brcmnand_scan_bbt(struct mtd_info *mtd, struct nand_bbt_descr *bd);
- extern int brcmnand_default_bbt(struct mtd_info *mtd);
-
-@@ -323,10 +326,10 @@
- /*
- * Disable ECC, and return the original ACC register (for restore)
- */
--uint32_t brcmnand_disable_ecc(void);
-+uint32_t brcmnand_disable_ecc(struct brcmnand_chip *chip);
-
--void brcmnand_restore_ecc(uint32_t orig_acc0);
-+void brcmnand_restore_ecc(struct brcmnand_chip *chip, uint32_t orig_acc0);
-
--void brcmnand_post_mortem_dump(struct mtd_info* mtd, loff_t offset);
-+void brcmnand_post_mortem_dump(struct mtd_info* mtd, loff_t offset);
-
- #endif
require linux-opendreambox-2.6.18.inc
-PR="${PR_INC}.2"
+PR="${PR_INC}.0"
SRC_URI += "\
file://linux-2.6.18-fix-serial.patch;patch=1 \
file://linux-2.6.18-256MB-nand-support.patch;patch=1 \
- file://linux-2.6.18-big-summary.patch;patch=1 \
- file://linux-2.6.18-nand-fixes.patch;patch=1 \
"
+++ /dev/null
-diff -Naur linux-2.6.18-org/fs/jffs2/summary.c linux-2.6.18/fs/jffs2/summary.c
---- linux-2.6.18-org/fs/jffs2/summary.c 2011-03-15 16:32:15.374923000 +0100
-+++ linux-2.6.18/fs/jffs2/summary.c 2011-03-15 16:33:05.246923008 +0100
-@@ -37,7 +37,7 @@
-
- memset(c->summary, 0, sizeof(struct jffs2_summary));
-
-- c->summary->sum_buf = kmalloc(sum_size, GFP_KERNEL);
-+ c->summary->sum_buf = vmalloc(c->sector_size);
-
- if (!c->summary->sum_buf) {
- JFFS2_WARNING("Can't allocate buffer for writing out summary information!\n");
-@@ -56,7 +56,7 @@
-
- jffs2_sum_disable_collecting(c->summary);
-
-- kfree(c->summary->sum_buf);
-+ vfree(c->summary->sum_buf);
- c->summary->sum_buf = NULL;
-
- kfree(c->summary);
-@@ -667,7 +667,7 @@
- int ret;
- size_t retlen;
-
-- if (padsize + datasize > MAX_SUMMARY_SIZE) {
-+ if (0 && padsize + datasize > MAX_SUMMARY_SIZE) {
- /* It won't fit in the buffer. Abort summary for this jeb */
- jffs2_sum_disable_collecting(c->summary);
-
SRC_URI += "\
file://linux-2.6.18-disable-unneeded-uarts.patch;patch=1 \
- file://linux-2.6.18-dm8000-nand-smp-fix.patch;patch=1 \
file://linux-2.6.18-use-full-flash.patch;patch=1 \
- file://linux-2.6.18-big-summary.patch;patch=1 \
"
pkg_preinst_kernel-image_dm8000 () {
require linux-opendreambox.inc
-SRCREV = "c59d7210272be29e3850aca3abbff76443f65d6f-fixed"
-PR_INC = "r12"
+SRCREV = "ac6cc9511a5f70eaa584c63fc5c3de33cae1d0e7"
+PR_INC = "r13"
RREPLACES_kernel = "kernel-2.6.18-7.1-${MACHINE}"
RCONFLICTS_kernel = "kernel-2.6.18-7.1-${MACHINE}"
SRC_URI += " http://trappist.elis.ugent.be/~mronsse/cdfs/download/cdfs-2.6.18.tar.bz2 \
file://stblinux-2.6.18-cdfs.patch \
+ file://stblinux-2.6.18-extra-version-7.4.patch;patch=1 \
file://linux-2.6.18-fix-mips-crosscompile.patch;patch=1 \
file://linux-2.6.18-fix-proc-cputype.patch;patch=1 \
file://dvb-api-2.6.18-5.3.patch;patch=1 \
file://linux-2.6.18-dvb-core-headers-20100904.patch;patch=1 \
file://linux-2.6.18-dvb-frontends-headers-20100904.patch;patch=1 \
- file://stblinux-2.6.18-use-default-stack-size.patch;patch=1 \
+ ${@base_contains('MACHINE', 'dm7020hd', '', 'file://stblinux-2.6.18-hw-ecc-compatibility.patch;patch=1', d)} \
"
do_configure_prepend() {
projects / vuplus_openembedded / commitdiff