code.vuplus.com Git - vuplus_openembedded/blob - recipes/linux/linux-kirkwood/0002--ARM-Kirkwood-peripherals-clock-gating-for-power-m.patch

   1 From 17589962c1787310e6373478a9fcb7641184cd91 Mon Sep 17 00:00:00 2001
   2 From: Rabeeh Khoury <rabeeh@marvell.com>
   3 Date: Sun, 22 Mar 2009 17:30:32 +0200
   4 Subject: [PATCH] [ARM] Kirkwood: peripherals clock gating for power management
   5
   6 1. Enabling clock gating of unused peripherals
   7 2. PLL and PHY of the units are also disabled (when possible.
   8
   9 Signed-off-by: Rabeeh Khoury <rabeeh@marvell.com>
  10
  11 [ This needs to be revisited to make power handling dynamic and
  12   per device.  -- Nico ]
  13 ---
  14  arch/arm/mach-kirkwood/common.c                |   32 ++++++++++++++++++++++++
  15  arch/arm/mach-kirkwood/common.h                |    1 +
  16  arch/arm/mach-kirkwood/include/mach/kirkwood.h |   23 +++++++++++++++++
  17  arch/arm/mach-kirkwood/sheevaplug-setup.c      |    2 +
  18  4 files changed, 58 insertions(+), 0 deletions(-)
  19
  20 Index: git/arch/arm/mach-kirkwood/common.c
  21 ===================================================================
  22 --- git.orig/arch/arm/mach-kirkwood/common.c
  23 +++ git/arch/arm/mach-kirkwood/common.c
  24 @@ -779,6 +779,38 @@ static void __init kirkwood_l2_init(void
  25  #endif
  26  }
  27
  28 +void __init kirkwood_clock_gate(u32 reg)
  29 +{
  30 +       printk(KERN_INFO "Kirkwood: Gating clock using mask 0x%x\n", reg);
  31 +       /* First make sure that the units are accessible */
  32 +       writel(readl(CLOCK_GATING_CTRL) | reg, CLOCK_GATING_CTRL);
  33 +       /* For SATA first shutdown the phy */
  34 +       if (reg & CGC_SATA0) {
  35 +               /* Disable PLL and IVREF */
  36 +               writel(readl(SATA0_PHY_MODE_2) & ~0xf, SATA0_PHY_MODE_2);
  37 +               /* Disable PHY */
  38 +               writel(readl(SATA0_IF_CTRL) | 0x200, SATA0_IF_CTRL);
  39 +       }
  40 +       if (reg & CGC_SATA1) {
  41 +               /* Disable PLL and IVREF */
  42 +               writel(readl(SATA1_PHY_MODE_2) & ~0xf, SATA1_PHY_MODE_2);
  43 +               /* Disable PHY */
  44 +               writel(readl(SATA1_IF_CTRL) | 0x200, SATA1_IF_CTRL);
  45 +       }
  46 +       /* For PCI-E first shutdown the phy */
  47 +       if (reg & CGC_PEX0) {
  48 +               writel(readl(PCIE_LINK_CTRL) | 0x10, PCIE_LINK_CTRL);
  49 +               while (1) {
  50 +                       if (readl(PCIE_STATUS) & 0x1)
  51 +                               break;
  52 +               }
  53 +               writel(readl(PCIE_LINK_CTRL) & ~0x10, PCIE_LINK_CTRL);
  54 +       }
  55 +       /* Now gate clock the required units */
  56 +       writel(readl(CLOCK_GATING_CTRL) & ~reg, CLOCK_GATING_CTRL);
  57 +       return;
  58 +}
  59 +
  60  void __init kirkwood_init(void)
  61  {
  62         printk(KERN_INFO "Kirkwood: %s, TCLK=%d.\n",
  63 Index: git/arch/arm/mach-kirkwood/common.h
  64 ===================================================================
  65 --- git.orig/arch/arm/mach-kirkwood/common.h
  66 +++ git/arch/arm/mach-kirkwood/common.h
  67 @@ -22,6 +22,7 @@ struct mvsdio_platform_data;
  68  void kirkwood_map_io(void);
  69  void kirkwood_init(void);
  70  void kirkwood_init_irq(void);
  71 +void __init kirkwood_clock_gate(u32 reg);
  72
  73  extern struct mbus_dram_target_info kirkwood_mbus_dram_info;
  74  void kirkwood_setup_cpu_mbus(void);
  75 Index: git/arch/arm/mach-kirkwood/include/mach/kirkwood.h
  76 ===================================================================
  77 --- git.orig/arch/arm/mach-kirkwood/include/mach/kirkwood.h
  78 +++ git/arch/arm/mach-kirkwood/include/mach/kirkwood.h
  79 @@ -65,6 +65,8 @@
  80  #define BRIDGE_VIRT_BASE       (KIRKWOOD_REGS_VIRT_BASE | 0x20000)
  81
  82  #define PCIE_VIRT_BASE         (KIRKWOOD_REGS_VIRT_BASE | 0x40000)
  83 +#define PCIE_LINK_CTRL         (PCIE_VIRT_BASE | 0x70)
  84 +#define PCIE_STATUS            (PCIE_VIRT_BASE | 0x1a04)
  85
  86  #define USB_PHYS_BASE          (KIRKWOOD_REGS_PHYS_BASE | 0x50000)
  87
  88 @@ -81,9 +83,30 @@
  89  #define GE01_PHYS_BASE         (KIRKWOOD_REGS_PHYS_BASE | 0x74000)
  90
  91  #define SATA_PHYS_BASE         (KIRKWOOD_REGS_PHYS_BASE | 0x80000)
  92 +#define SATA_VIRT_BASE         (KIRKWOOD_REGS_VIRT_BASE | 0x80000)
  93 +#define SATA0_IF_CTRL          (SATA_VIRT_BASE | 0x2050)
  94 +#define SATA0_PHY_MODE_2       (SATA_VIRT_BASE | 0x2330)
  95 +#define SATA1_IF_CTRL          (SATA_VIRT_BASE | 0x4050)
  96 +#define SATA1_PHY_MODE_2       (SATA_VIRT_BASE | 0x4330)
  97
  98  #define SDIO_PHYS_BASE         (KIRKWOOD_REGS_PHYS_BASE | 0x90000)
  99
 100 +#define  CLOCK_GATING_CTRL    (BRIDGE_VIRT_BASE | 0x11c)
 101 +#define   CGC_GE0             0x1
 102 +#define   CGC_PEX0            0x4
 103 +#define   CGC_USB0            0x8
 104 +#define   CGC_SDIO            0x10
 105 +#define   CGC_TSU             0x20
 106 +#define   CGC_NAND_SPI        0x80
 107 +#define   CGC_XOR0            0x100
 108 +#define   CGC_AUDIO           0x200
 109 +#define   CGC_SATA0           0x4000
 110 +#define   CGC_SATA1           0x8000
 111 +#define   CGC_XOR1            0x10000
 112 +#define   CGC_CRYPTO          0x20000
 113 +#define   CGC_GE1             0x80000
 114 +#define   CGC_TDM             0x100000
 115 +
 116  /*
 117   * Supported devices and revisions.
 118   */
 119 Index: git/arch/arm/mach-kirkwood/sheevaplug-setup.c
 120 ===================================================================
 121 --- git.orig/arch/arm/mach-kirkwood/sheevaplug-setup.c
 122 +++ git/arch/arm/mach-kirkwood/sheevaplug-setup.c
 123 @@ -122,6 +122,8 @@ static void __init sheevaplug_init(void)
 124
 125         platform_device_register(&sheevaplug_nand_flash);
 126         platform_device_register(&sheevaplug_leds);
 127 +       kirkwood_clock_gate(CGC_PEX0 | CGC_TSU | CGC_AUDIO | CGC_SATA0 |\
 128 +                               CGC_SATA1 | CGC_CRYPTO | CGC_GE1 | CGC_TDM);
 129  }
 130
 131  MACHINE_START(SHEEVAPLUG, "Marvell SheevaPlug Reference Board")