code.vuplus.com Git - vuplus_openembedded/blob - packages/linux/linux-rp-2.6.24/tosa/0041-From-80a359e60c2aec59ccf4fca0a7fd20495f82b1d2-Mon-Se.patch

   1 From 2a143b9546b01fd6c58ebaac7eb46568a17d6a41 Mon Sep 17 00:00:00 2001
   2 From: Dmitry Baryshkov <dbaryshkov@gmail.com>
   3 Date: Tue, 12 Feb 2008 04:58:59 +0300
   4 Subject: [PATCH 41/64] From 80a359e60c2aec59ccf4fca0a7fd20495f82b1d2 Mon Sep 17 00:00:00 2001
   5  In-Reply-To: <20080207005839.GA28509@doriath.ww600.siemens.net>
   6  References: <20080207005839.GA28509@doriath.ww600.siemens.net>
   7  Date: Thu, 7 Feb 2008 03:35:08 +0300
   8  Subject: [PATCH 3/5] Use clocklib for ARM pxa sub-arch.
   9  Signed-off-by: Dmitry Baryshkov <dbaryshkov@gmail.com>
  10
  11 ---
  12  arch/arm/Kconfig           |    1 +
  13  arch/arm/mach-pxa/clock.c  |  108 ++++++--------------------------------------
  14  arch/arm/mach-pxa/clock.h  |   58 +++++++++++++-----------
  15  arch/arm/mach-pxa/pxa25x.c |   64 +++++++++++++++-----------
  16  arch/arm/mach-pxa/pxa27x.c |   61 +++++++++++++-----------
  17  arch/arm/mach-pxa/pxa3xx.c |   91 +++++++++++++++++++++----------------
  18  6 files changed, 169 insertions(+), 214 deletions(-)
  19
  20 diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
  21 index 423e953..47f3c73 100644
  22 --- a/arch/arm/Kconfig
  23 +++ b/arch/arm/Kconfig
  24 @@ -347,6 +347,7 @@ config ARCH_PXA
  25         select GENERIC_CLOCKEVENTS
  26         select TICK_ONESHOT
  27         select HAVE_GPIO_LIB
  28 +       select HAVE_CLOCK_LIB
  29         help
  30           Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
  31
  32 diff --git a/arch/arm/mach-pxa/clock.c b/arch/arm/mach-pxa/clock.c
  33 index 83ef5ec..3296b02 100644
  34 --- a/arch/arm/mach-pxa/clock.c
  35 +++ b/arch/arm/mach-pxa/clock.c
  36 @@ -8,6 +8,7 @@
  37  #include <linux/err.h>
  38  #include <linux/string.h>
  39  #include <linux/clk.h>
  40 +#include <linux/clklib.h>
  41  #include <linux/spinlock.h>
  42  #include <linux/platform_device.h>
  43  #include <linux/delay.h>
  44 @@ -19,123 +20,42 @@
  45  #include "generic.h"
  46  #include "clock.h"
  47
  48 -static LIST_HEAD(clocks);
  49 -static DEFINE_MUTEX(clocks_mutex);
  50 -static DEFINE_SPINLOCK(clocks_lock);
  51 -
  52 -struct clk *clk_get(struct device *dev, const char *id)
  53 -{
  54 -       struct clk *p, *clk = ERR_PTR(-ENOENT);
  55 -
  56 -       mutex_lock(&clocks_mutex);
  57 -       list_for_each_entry(p, &clocks, node) {
  58 -               if (strcmp(id, p->name) == 0 &&
  59 -                   (p->dev == NULL || p->dev == dev)) {
  60 -                       clk = p;
  61 -                       break;
  62 -               }
  63 -       }
  64 -       mutex_unlock(&clocks_mutex);
  65 -
  66 -       return clk;
  67 -}
  68 -EXPORT_SYMBOL(clk_get);
  69 -
  70 -void clk_put(struct clk *clk)
  71 +static int clk_gpio27_enable(struct clk *clk)
  72  {
  73 -}
  74 -EXPORT_SYMBOL(clk_put);
  75 -
  76 -int clk_enable(struct clk *clk)
  77 -{
  78 -       unsigned long flags;
  79 -
  80 -       spin_lock_irqsave(&clocks_lock, flags);
  81 -       if (clk->enabled++ == 0)
  82 -               clk->ops->enable(clk);
  83 -       spin_unlock_irqrestore(&clocks_lock, flags);
  84 -
  85 -       if (clk->delay)
  86 -               udelay(clk->delay);
  87 +       pxa_gpio_mode(GPIO11_3_6MHz_MD);
  88
  89         return 0;
  90  }
  91 -EXPORT_SYMBOL(clk_enable);
  92 -
  93 -void clk_disable(struct clk *clk)
  94 -{
  95 -       unsigned long flags;
  96 -
  97 -       WARN_ON(clk->enabled == 0);
  98 -
  99 -       spin_lock_irqsave(&clocks_lock, flags);
 100 -       if (--clk->enabled == 0)
 101 -               clk->ops->disable(clk);
 102 -       spin_unlock_irqrestore(&clocks_lock, flags);
 103 -}
 104 -EXPORT_SYMBOL(clk_disable);
 105 -
 106 -unsigned long clk_get_rate(struct clk *clk)
 107 -{
 108 -       unsigned long rate;
 109 -
 110 -       rate = clk->rate;
 111 -       if (clk->ops->getrate)
 112 -               rate = clk->ops->getrate(clk);
 113 -
 114 -       return rate;
 115 -}
 116 -EXPORT_SYMBOL(clk_get_rate);
 117 -
 118 -
 119 -static void clk_gpio27_enable(struct clk *clk)
 120 -{
 121 -       pxa_gpio_mode(GPIO11_3_6MHz_MD);
 122 -}
 123
 124  static void clk_gpio27_disable(struct clk *clk)
 125  {
 126 +       /* FIXME: disable clock */
 127  }
 128
 129 -static const struct clkops clk_gpio27_ops = {
 130 -       .enable         = clk_gpio27_enable,
 131 -       .disable        = clk_gpio27_disable,
 132 -};
 133 -
 134 -
 135 -void clk_cken_enable(struct clk *clk)
 136 +int clk_cken_enable(struct clk *clk)
 137  {
 138 -       CKEN |= 1 << clk->cken;
 139 +       int cken = ((struct clk_cken_priv *)clk->priv)->cken;
 140 +       CKEN |= 1 << cken;
 141 +
 142 +       return 0;
 143  }
 144
 145  void clk_cken_disable(struct clk *clk)
 146  {
 147 -       CKEN &= ~(1 << clk->cken);
 148 +       int cken = ((struct clk_cken_priv *)clk->priv)->cken;
 149 +       CKEN &= ~(1 << cken);
 150  }
 151
 152 -const struct clkops clk_cken_ops = {
 153 -       .enable         = clk_cken_enable,
 154 -       .disable        = clk_cken_disable,
 155 -};
 156 -
 157  static struct clk common_clks[] = {
 158         {
 159                 .name           = "GPIO27_CLK",
 160 -               .ops            = &clk_gpio27_ops,
 161                 .rate           = 3686400,
 162 +               .owner          = THIS_MODULE,
 163 +               .enable         = clk_gpio27_enable,
 164 +               .disable        = clk_gpio27_disable,
 165         },
 166  };
 167
 168 -void clks_register(struct clk *clks, size_t num)
 169 -{
 170 -       int i;
 171 -
 172 -       mutex_lock(&clocks_mutex);
 173 -       for (i = 0; i < num; i++)
 174 -               list_add(&clks[i].node, &clocks);
 175 -       mutex_unlock(&clocks_mutex);
 176 -}
 177 -
 178  static int __init clk_init(void)
 179  {
 180         clks_register(common_clks, ARRAY_SIZE(common_clks));
 181 diff --git a/arch/arm/mach-pxa/clock.h b/arch/arm/mach-pxa/clock.h
 182 index bc6b77e..5d0d067 100644
 183 --- a/arch/arm/mach-pxa/clock.h
 184 +++ b/arch/arm/mach-pxa/clock.h
 185 @@ -1,43 +1,47 @@
 186 -struct clk;
 187 +#include <linux/clklib.h>
 188 +#include <linux/seq_file.h>
 189
 190 -struct clkops {
 191 -       void                    (*enable)(struct clk *);
 192 -       void                    (*disable)(struct clk *);
 193 -       unsigned long           (*getrate)(struct clk *);
 194 +struct clk_cken_priv {
 195 +       unsigned int    cken;
 196  };
 197
 198 -struct clk {
 199 -       struct list_head        node;
 200 -       const char              *name;
 201 -       struct device           *dev;
 202 -       const struct clkops     *ops;
 203 -       unsigned long           rate;
 204 -       unsigned int            cken;
 205 -       unsigned int            delay;
 206 -       unsigned int            enabled;
 207 -};
 208 -
 209 -#define INIT_CKEN(_name, _cken, _rate, _delay, _dev)   \
 210 +#define INIT_CKEN(_name, _cken, _rate, _delay)         \
 211         {                                               \
 212                 .name   = _name,                        \
 213 -               .dev    = _dev,                         \
 214 -               .ops    = &clk_cken_ops,                \
 215 +               .enable = clk_cken_enable,              \
 216 +               .disable = clk_cken_disable,            \
 217                 .rate   = _rate,                        \
 218 -               .cken   = CKEN_##_cken,                 \
 219                 .delay  = _delay,                       \
 220 +               .priv   = &(struct clk_cken_priv) {     \
 221 +                       .cken = CKEN_##_cken,           \
 222 +               },                                      \
 223         }
 224
 225 -#define INIT_CK(_name, _cken, _ops, _dev)              \
 226 +#define INIT_CK(_name, _cken, _getrate)                        \
 227         {                                               \
 228                 .name   = _name,                        \
 229 -               .dev    = _dev,                         \
 230 -               .ops    = _ops,                         \
 231 -               .cken   = CKEN_##_cken,                 \
 232 +               .enable = clk_cken_enable,              \
 233 +               .disable = clk_cken_disable,            \
 234 +               .getrate = _getrate,                    \
 235 +               .priv   = &(struct clk_cken_priv) {     \
 236 +                       .cken = CKEN_##_cken,           \
 237 +               },                                      \
 238         }
 239
 240 -extern const struct clkops clk_cken_ops;
 241 -
 242 -void clk_cken_enable(struct clk *clk);
 243 +int clk_cken_enable(struct clk *clk);
 244  void clk_cken_disable(struct clk *clk);
 245
 246  void clks_register(struct clk *clks, size_t num);
 247 +
 248 +static int __maybe_unused clk_dev_can_get(struct clk *clk, struct device *dev)
 249 +{
 250 +       return (dev == clk->priv);
 251 +}
 252 +
 253 +static int __maybe_unused clk_dev_format(struct clk *clk, struct seq_file *s)
 254 +{
 255 +       BUG_ON(!clk->priv);
 256 +       seq_puts(s, "for device ");
 257 +       seq_puts(s, ((struct device *)clk->priv)->bus_id);
 258 +       return 0;
 259 +}
 260 diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c
 261 index 5988d99..ed3719b 100644
 262 --- a/arch/arm/mach-pxa/pxa25x.c
 263 +++ b/arch/arm/mach-pxa/pxa25x.c
 264 @@ -100,40 +100,50 @@ static unsigned long clk_pxa25x_lcd_getrate(struct clk *clk)
 265         return pxa25x_get_memclk_frequency_10khz() * 10000;
 266  }
 267
 268 -static const struct clkops clk_pxa25x_lcd_ops = {
 269 -       .enable         = clk_cken_enable,
 270 -       .disable        = clk_cken_disable,
 271 -       .getrate        = clk_pxa25x_lcd_getrate,
 272 -};
 273 -
 274  /*
 275   * 3.6864MHz -> OST, GPIO, SSP, PWM, PLLs (95.842MHz, 147.456MHz)
 276   * 95.842MHz -> MMC 19.169MHz, I2C 31.949MHz, FICP 47.923MHz, USB 47.923MHz
 277   * 147.456MHz -> UART 14.7456MHz, AC97 12.288MHz, I2S 5.672MHz (allegedly)
 278   */
 279 -static struct clk pxa25x_hwuart_clk =
 280 -       INIT_CKEN("UARTCLK", HWUART, 14745600, 1, &pxa_device_hwuart.dev)
 281 -;
 282 +static struct clk pxa25x_hwuart_clk[] = {
 283 +       INIT_CKEN("HWUARTCLK", HWUART, 14745600, 1),
 284 +       {
 285 +               .parent =       &pxa25x_hwuart_clk[0],
 286 +               .name   =       "UARTCLK",
 287 +               .can_get =      clk_dev_can_get,
 288 +               .priv   =       &pxa_device_hwuart.dev,
 289 +       },
 290 +};
 291
 292  static struct clk pxa25x_clks[] = {
 293 -       INIT_CK("LCDCLK", LCD, &clk_pxa25x_lcd_ops, &pxa_device_fb.dev),
 294 -       INIT_CKEN("UARTCLK", FFUART, 14745600, 1, &pxa_device_ffuart.dev),
 295 -       INIT_CKEN("UARTCLK", BTUART, 14745600, 1, &pxa_device_btuart.dev),
 296 -       INIT_CKEN("UARTCLK", STUART, 14745600, 1, NULL),
 297 -       INIT_CKEN("UDCCLK", USB, 47923000, 5, &pxa_device_udc.dev),
 298 -       INIT_CKEN("MMCCLK", MMC, 19169000, 0, &pxa_device_mci.dev),
 299 -       INIT_CKEN("I2CCLK", I2C, 31949000, 0, &pxa_device_i2c.dev),
 300 -
 301 -       INIT_CKEN("SSPCLK",  SSP, 3686400, 0, &pxa25x_device_ssp.dev),
 302 -       INIT_CKEN("SSPCLK", NSSP, 3686400, 0, &pxa25x_device_nssp.dev),
 303 -       INIT_CKEN("SSPCLK", ASSP, 3686400, 0, &pxa25x_device_assp.dev),
 304 +       INIT_CK("LCDCLK", LCD, &clk_pxa25x_lcd_getrate),
 305 +       INIT_CKEN("FFUARTCLK", FFUART, 14745600, 1),
 306 +       INIT_CKEN("BTUARTCLK", BTUART, 14745600, 1),
 307 +       INIT_CKEN("STUARTCLK", STUART, 14745600, 1),
 308 +       INIT_CKEN("UDCCLK", USB, 47923000, 5),
 309 +       INIT_CKEN("MMCCLK", MMC, 19169000, 0),
 310 +       INIT_CKEN("I2CCLK", I2C, 31949000, 0),
 311 +
 312 +       INIT_CKEN("SSP_CLK",  SSP, 3686400, 0),
 313 +       INIT_CKEN("NSSPCLK", NSSP, 3686400, 0),
 314 +       INIT_CKEN("ASSPCLK", ASSP, 3686400, 0),
 315
 316         /*
 317 -       INIT_CKEN("PWMCLK",  PWM0, 3686400,  0, NULL),
 318 -       INIT_CKEN("PWMCLK",  PWM0, 3686400,  0, NULL),
 319 -       INIT_CKEN("I2SCLK",  I2S,  14745600, 0, NULL),
 320 +       INIT_CKEN("PWMCLK",  PWM0, 3686400,  0),
 321 +       INIT_CKEN("PWMCLK",  PWM0, 3686400,  0),
 322 +       INIT_CKEN("I2SCLK",  I2S,  14745600, 0),
 323         */
 324 -       INIT_CKEN("FICPCLK", FICP, 47923000, 0, NULL),
 325 +       INIT_CKEN("FICPCLK", FICP, 47923000, 0),
 326 +};
 327 +
 328 +static struct clk_function __initdata pxa25x_clk_funcs[] = {
 329 +       CLK_FUNC("FFUARTCLK", "UARTCLK", clk_dev_can_get, &pxa_device_ffuart.dev, clk_dev_format),
 330 +       CLK_FUNC("BTUARTCLK", "UARTCLK", clk_dev_can_get, &pxa_device_btuart.dev, clk_dev_format),
 331 +       CLK_FUNC("STUARTCLK", "UARTCLK", clk_dev_can_get, &pxa_device_stuart.dev, clk_dev_format),
 332 +       CLK_FUNC("STUARTCLK", "SIRCLK", NULL, NULL, NULL),
 333 +       CLK_FUNC("SSP_CLK", "SSPCLK", clk_dev_can_get, &pxa25x_device_ssp.dev, clk_dev_format),
 334 +       CLK_FUNC("NSSPCLK", "SSPCLK", clk_dev_can_get, &pxa25x_device_nssp.dev, clk_dev_format),
 335 +       CLK_FUNC("ASSPCLK", "SSPCLK", clk_dev_can_get, &pxa25x_device_assp.dev, clk_dev_format),
 336  };
 337
 338  #ifdef CONFIG_PM
 339 @@ -313,11 +323,13 @@ static int __init pxa25x_init(void)
 340         int ret = 0;
 341
 342         /* Only add HWUART for PXA255/26x; PXA210/250/27x do not have it. */
 343 -       if (cpu_is_pxa25x())
 344 -               clks_register(&pxa25x_hwuart_clk, 1);
 345 +       if (cpu_is_pxa25x()) {
 346 +               clks_register(pxa25x_hwuart_clk, ARRAY_SIZE(pxa25x_hwuart_clk));
 347 +       }
 348
 349         if (cpu_is_pxa21x() || cpu_is_pxa25x()) {
 350                 clks_register(pxa25x_clks, ARRAY_SIZE(pxa25x_clks));
 351 +               clk_alloc_functions(pxa25x_clk_funcs, ARRAY_SIZE(pxa25x_clk_funcs));
 352
 353                 if ((ret = pxa_init_dma(16)))
 354                         return ret;
 355 diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c
 356 index 30ca4fd..c51e7b2 100644
 357 --- a/arch/arm/mach-pxa/pxa27x.c
 358 +++ b/arch/arm/mach-pxa/pxa27x.c
 359 @@ -126,44 +126,48 @@ static unsigned long clk_pxa27x_lcd_getrate(struct clk *clk)
 360         return pxa27x_get_lcdclk_frequency_10khz() * 10000;
 361  }
 362
 363 -static const struct clkops clk_pxa27x_lcd_ops = {
 364 -       .enable         = clk_cken_enable,
 365 -       .disable        = clk_cken_disable,
 366 -       .getrate        = clk_pxa27x_lcd_getrate,
 367 -};
 368 -
 369  static struct clk pxa27x_clks[] = {
 370 -       INIT_CK("LCDCLK", LCD,    &clk_pxa27x_lcd_ops, &pxa_device_fb.dev),
 371 -       INIT_CK("CAMCLK", CAMERA, &clk_pxa27x_lcd_ops, NULL),
 372 +       INIT_CK("LCDCLK", LCD,    &clk_pxa27x_lcd_getrate),
 373 +       INIT_CK("CAMCLK", CAMERA, &clk_pxa27x_lcd_getrate),
 374
 375 -       INIT_CKEN("UARTCLK", FFUART, 14857000, 1, &pxa_device_ffuart.dev),
 376 -       INIT_CKEN("UARTCLK", BTUART, 14857000, 1, &pxa_device_btuart.dev),
 377 -       INIT_CKEN("UARTCLK", STUART, 14857000, 1, NULL),
 378 +       INIT_CKEN("FFUARTCLK", FFUART, 14857000, 1),
 379 +       INIT_CKEN("BTUARTCLK", BTUART, 14857000, 1),
 380 +       INIT_CKEN("STUARTCLK", STUART, 14857000, 1),
 381
 382 -       INIT_CKEN("I2SCLK",  I2S,  14682000, 0, &pxa_device_i2s.dev),
 383 -       INIT_CKEN("I2CCLK",  I2C,  32842000, 0, &pxa_device_i2c.dev),
 384 -       INIT_CKEN("UDCCLK",  USB,  48000000, 5, &pxa_device_udc.dev),
 385 -       INIT_CKEN("MMCCLK",  MMC,  19500000, 0, &pxa_device_mci.dev),
 386 -       INIT_CKEN("FICPCLK", FICP, 48000000, 0, &pxa_device_ficp.dev),
 387 +       INIT_CKEN("I2SCLK",  I2S,  14682000, 0),
 388 +       INIT_CKEN("I2CCLK",  I2C,  32842000, 0),
 389 +       INIT_CKEN("UDCCLK",  USB,  48000000, 5),
 390 +       INIT_CKEN("MMCCLK",  MMC,  19500000, 0),
 391 +       INIT_CKEN("FICPCLK", FICP, 48000000, 0),
 392
 393 -       INIT_CKEN("USBCLK", USBHOST, 48000000, 0, &pxa27x_device_ohci.dev),
 394 -       INIT_CKEN("I2CCLK", PWRI2C, 13000000, 0, &pxa27x_device_i2c_power.dev),
 395 -       INIT_CKEN("KBDCLK", KEYPAD, 32768, 0, NULL),
 396 +       INIT_CKEN("USBCLK", USBHOST, 48000000, 0),
 397 +       INIT_CKEN("I2CCLK", PWRI2C, 13000000, 0),
 398 +       INIT_CKEN("KBDCLK", KEYPAD, 32768, 0),
 399
 400 -       INIT_CKEN("SSPCLK", SSP1, 13000000, 0, &pxa27x_device_ssp1.dev),
 401 -       INIT_CKEN("SSPCLK", SSP2, 13000000, 0, &pxa27x_device_ssp2.dev),
 402 -       INIT_CKEN("SSPCLK", SSP3, 13000000, 0, &pxa27x_device_ssp3.dev),
 403 +       INIT_CKEN("SSP1CLK", SSP1, 13000000, 0),
 404 +       INIT_CKEN("SSP2CLK", SSP2, 13000000, 0),
 405 +       INIT_CKEN("SSP3CLK", SSP3, 13000000, 0),
 406
 407         /*
 408 -       INIT_CKEN("PWMCLK",  PWM0, 13000000, 0, NULL),
 409 -       INIT_CKEN("MSLCLK",  MSL,  48000000, 0, NULL),
 410 -       INIT_CKEN("USIMCLK", USIM, 48000000, 0, NULL),
 411 -       INIT_CKEN("MSTKCLK", MEMSTK, 19500000, 0, NULL),
 412 -       INIT_CKEN("IMCLK",   IM,   0, 0, NULL),
 413 -       INIT_CKEN("MEMCLK",  MEMC, 0, 0, NULL),
 414 +       INIT_CKEN("PWMCLK",  PWM0, 13000000, 0),
 415 +       INIT_CKEN("MSLCLK",  MSL,  48000000, 0),
 416 +       INIT_CKEN("USIMCLK", USIM, 48000000, 0),
 417 +       INIT_CKEN("MSTKCLK", MEMSTK, 19500000, 0),
 418 +       INIT_CKEN("IMCLK",   IM,   0, 0),
 419 +       INIT_CKEN("MEMCLK",  MEMC, 0, 0),
 420         */
 421  };
 422
 423 +static struct clk_function __initdata pxa27x_clk_funcs[] = {
 424 +       CLK_FUNC("FFUARTCLK", "UARTCLK", clk_dev_can_get, &pxa_device_ffuart.dev, clk_dev_format),
 425 +       CLK_FUNC("BTUARTCLK", "UARTCLK", clk_dev_can_get, &pxa_device_btuart.dev, clk_dev_format),
 426 +       CLK_FUNC("STUARTCLK", "UARTCLK", clk_dev_can_get, &pxa_device_stuart.dev, clk_dev_format),
 427 +       CLK_FUNC("STUARTCLK", "SIRCLK", NULL, NULL, NULL),
 428 +       CLK_FUNC("SSP1CLK", "SSPCLK", clk_dev_can_get, &pxa27x_device_ssp1.dev, clk_dev_format),
 429 +       CLK_FUNC("SSP2CLK", "SSPCLK", clk_dev_can_get, &pxa27x_device_ssp2.dev, clk_dev_format),
 430 +       CLK_FUNC("SSP3CLK", "SSPCLK", clk_dev_can_get, &pxa27x_device_ssp3.dev, clk_dev_format),
 431 +};
 432 +
 433  #ifdef CONFIG_PM
 434
 435  #define SAVE(x)                sleep_save[SLEEP_SAVE_##x] = x
 436 @@ -453,6 +457,7 @@ static int __init pxa27x_init(void)
 437         int ret = 0;
 438         if (cpu_is_pxa27x()) {
 439                 clks_register(pxa27x_clks, ARRAY_SIZE(pxa27x_clks));
 440 +               clk_alloc_functions(pxa27x_clk_funcs, ARRAY_SIZE(pxa27x_clk_funcs));
 441
 442                 if ((ret = pxa_init_dma(32)))
 443                         return ret;
 444 diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c
 445 index ccab9da..0f8bbf3 100644
 446 --- a/arch/arm/mach-pxa/pxa3xx.c
 447 +++ b/arch/arm/mach-pxa/pxa3xx.c
 448 @@ -122,27 +122,31 @@ static unsigned long clk_pxa3xx_hsio_getrate(struct clk *clk)
 449         return hsio_clk;
 450  }
 451
 452 -static void clk_pxa3xx_cken_enable(struct clk *clk)
 453 +static int clk_pxa3xx_cken_enable(struct clk *clk)
 454  {
 455 -       unsigned long mask = 1ul << (clk->cken & 0x1f);
 456 +       int cken = ((struct clk_cken_priv *)clk->priv)->cken;
 457 +       unsigned long mask = 1ul << (cken & 0x1f);
 458
 459         local_irq_disable();
 460
 461 -       if (clk->cken < 32)
 462 +       if (cken < 32)
 463                 CKENA |= mask;
 464         else
 465                 CKENB |= mask;
 466
 467         local_irq_enable();
 468 +
 469 +       return 0;
 470  }
 471
 472  static void clk_pxa3xx_cken_disable(struct clk *clk)
 473  {
 474 -       unsigned long mask = 1ul << (clk->cken & 0x1f);
 475 +       int cken = ((struct clk_cken_priv *)clk->priv)->cken;
 476 +       unsigned long mask = 1ul << (cken & 0x1f);
 477
 478         local_irq_disable();
 479
 480 -       if (clk->cken < 32)
 481 +       if (cken < 32)
 482                 CKENA &= ~mask;
 483         else
 484                 CKENB &= ~mask;
 485 @@ -150,55 +154,63 @@ static void clk_pxa3xx_cken_disable(struct clk *clk)
 486         local_irq_enable();
 487  }
 488
 489 -static const struct clkops clk_pxa3xx_cken_ops = {
 490 -       .enable         = clk_pxa3xx_cken_enable,
 491 -       .disable        = clk_pxa3xx_cken_disable,
 492 -};
 493 -
 494 -static const struct clkops clk_pxa3xx_hsio_ops = {
 495 -       .enable         = clk_pxa3xx_cken_enable,
 496 -       .disable        = clk_pxa3xx_cken_disable,
 497 -       .getrate        = clk_pxa3xx_hsio_getrate,
 498 -};
 499 -
 500 -#define PXA3xx_CKEN(_name, _cken, _rate, _delay, _dev) \
 501 +#define PXA3xx_CKEN(_name, _cken, _rate, _delay)       \
 502         {                                               \
 503                 .name   = _name,                        \
 504 -               .dev    = _dev,                         \
 505 -               .ops    = &clk_pxa3xx_cken_ops,         \
 506 +               .enable = clk_pxa3xx_cken_enable,       \
 507 +               .disable = clk_pxa3xx_cken_disable,     \
 508                 .rate   = _rate,                        \
 509 -               .cken   = CKEN_##_cken,                 \
 510                 .delay  = _delay,                       \
 511 +               .priv   = &(struct clk_cken_priv) {     \
 512 +                       .cken = CKEN_##_cken,           \
 513 +               },                                      \
 514         }
 515
 516 -#define PXA3xx_CK(_name, _cken, _ops, _dev)            \
 517 +#define PXA3xx_CK(_name, _cken, _getrate)              \
 518         {                                               \
 519                 .name   = _name,                        \
 520 -               .dev    = _dev,                         \
 521 -               .ops    = _ops,                         \
 522 -               .cken   = CKEN_##_cken,                 \
 523 +               .enable = clk_pxa3xx_cken_enable,       \
 524 +               .disable = clk_pxa3xx_cken_disable,     \
 525 +               .getrate = _getrate,                    \
 526 +               .priv   = &(struct clk_cken_priv) {     \
 527 +                       .cken = CKEN_##_cken,           \
 528 +               },                                      \
 529         }
 530
 531  static struct clk pxa3xx_clks[] = {
 532 -       PXA3xx_CK("LCDCLK", LCD,    &clk_pxa3xx_hsio_ops, &pxa_device_fb.dev),
 533 -       PXA3xx_CK("CAMCLK", CAMERA, &clk_pxa3xx_hsio_ops, NULL),
 534 +       PXA3xx_CK("LCDCLK", LCD,    &clk_pxa3xx_hsio_getrate),
 535 +       PXA3xx_CK("CAMCLK", CAMERA, &clk_pxa3xx_hsio_getrate),
 536
 537 -       PXA3xx_CKEN("UARTCLK", FFUART, 14857000, 1, &pxa_device_ffuart.dev),
 538 -       PXA3xx_CKEN("UARTCLK", BTUART, 14857000, 1, &pxa_device_btuart.dev),
 539 -       PXA3xx_CKEN("UARTCLK", STUART, 14857000, 1, NULL),
 540 +       PXA3xx_CKEN("FFUARTCLK", FFUART, 14857000, 1),
 541 +       PXA3xx_CKEN("BTUARTCLK", BTUART, 14857000, 1),
 542 +       PXA3xx_CKEN("STUARTCLK", STUART, 14857000, 1),
 543
 544 -       PXA3xx_CKEN("I2CCLK", I2C,  32842000, 0, &pxa_device_i2c.dev),
 545 -       PXA3xx_CKEN("UDCCLK", UDC,  48000000, 5, &pxa_device_udc.dev),
 546 -       PXA3xx_CKEN("USBCLK", USBH, 48000000, 0, &pxa27x_device_ohci.dev),
 547 +       PXA3xx_CKEN("I2CCLK", I2C,  32842000, 0),
 548 +       PXA3xx_CKEN("UDCCLK", UDC,  48000000, 5),
 549 +       PXA3xx_CKEN("USBCLK", USBH, 48000000, 0),
 550
 551 -       PXA3xx_CKEN("SSPCLK", SSP1, 13000000, 0, &pxa27x_device_ssp1.dev),
 552 -       PXA3xx_CKEN("SSPCLK", SSP2, 13000000, 0, &pxa27x_device_ssp2.dev),
 553 -       PXA3xx_CKEN("SSPCLK", SSP3, 13000000, 0, &pxa27x_device_ssp3.dev),
 554 -       PXA3xx_CKEN("SSPCLK", SSP4, 13000000, 0, &pxa3xx_device_ssp4.dev),
 555 +       PXA3xx_CKEN("SSP1CLK", SSP1, 13000000, 0),
 556 +       PXA3xx_CKEN("SSP2CLK", SSP2, 13000000, 0),
 557 +       PXA3xx_CKEN("SSP3CLK", SSP3, 13000000, 0),
 558 +       PXA3xx_CKEN("SSP4CLK", SSP4, 13000000, 0),
 559 +
 560 +       PXA3xx_CKEN("MMC1CLK", MMC1, 19500000, 0),
 561 +       PXA3xx_CKEN("MMC2CLK", MMC2, 19500000, 0),
 562 +       PXA3xx_CKEN("MMC3CLK", MMC3, 19500000, 0),
 563 +};
 564
 565 -       PXA3xx_CKEN("MMCCLK", MMC1, 19500000, 0, &pxa_device_mci.dev),
 566 -       PXA3xx_CKEN("MMCCLK", MMC2, 19500000, 0, &pxa3xx_device_mci2.dev),
 567 -       PXA3xx_CKEN("MMCCLK", MMC3, 19500000, 0, &pxa3xx_device_mci3.dev),
 568 +static struct clk_function __initdata pxa3xx_clk_funcs[] = {
 569 +       CLK_FUNC("FFUARTCLK", "UARTCLK", clk_dev_can_get, &pxa_device_ffuart.dev, clk_dev_format),
 570 +       CLK_FUNC("BTUARTCLK", "UARTCLK", clk_dev_can_get, &pxa_device_btuart.dev, clk_dev_format),
 571 +       CLK_FUNC("STUARTCLK", "UARTCLK", clk_dev_can_get, &pxa_device_stuart.dev, clk_dev_format),
 572 +       CLK_FUNC("STUARTCLK", "SIRCLK", NULL, NULL, NULL),
 573 +       CLK_FUNC("SSP1CLK", "SSPCLK", clk_dev_can_get, &pxa27x_device_ssp1.dev, clk_dev_format),
 574 +       CLK_FUNC("SSP2CLK", "SSPCLK", clk_dev_can_get, &pxa27x_device_ssp2.dev, clk_dev_format),
 575 +       CLK_FUNC("SSP3CLK", "SSPCLK", clk_dev_can_get, &pxa27x_device_ssp3.dev, clk_dev_format),
 576 +       CLK_FUNC("SSP4CLK", "SSPCLK", clk_dev_can_get, &pxa3xx_device_ssp4.dev, clk_dev_format),
 577 +       CLK_FUNC("MMC1CLK", "MMCCLK", clk_dev_can_get, &pxa_device_mci.dev, clk_dev_format),
 578 +       CLK_FUNC("MMC2CLK", "MMCCLK", clk_dev_can_get, &pxa3xx_device_mci2.dev, clk_dev_format),
 579 +       CLK_FUNC("MMC3CLK", "MMCCLK", clk_dev_can_get, &pxa3xx_device_mci3.dev, clk_dev_format),
 580  };
 581
 582  #ifdef CONFIG_PM
 583 @@ -255,6 +267,7 @@ static int __init pxa3xx_init(void)
 584
 585         if (cpu_is_pxa3xx()) {
 586                 clks_register(pxa3xx_clks, ARRAY_SIZE(pxa3xx_clks));
 587 +               clk_alloc_functions(pxa3xx_clk_funcs, ARRAY_SIZE(pxa3xx_clk_funcs));
 588
 589                 if ((ret = pxa_init_dma(32)))
 590                         return ret;
 591 --
 592 1.5.3.8
 593