X-Git-Url: http://code.vuplus.com/gitweb/?p=vuplus_openvuplus_3.0;a=blobdiff_plain;f=meta-bsp%2Frecipes-kernel%2Flinux%2Flinux-vuplus-3.9.6%2Fvuultimo%2Flinux-sata_bcm.patch;fp=meta-bsp%2Frecipes-kernel%2Flinux%2Flinux-vuplus-3.9.6%2Fvuultimo%2Flinux-sata_bcm.patch;h=cbfc4b727484346d256786d88f2c1ad8595e7b5c;hp=0000000000000000000000000000000000000000;hb=ae009e7e28ec4df53dfacd46f7afcc7835ad9b3e;hpb=9efcbdc1ab9b560da84765907eecc22620e0dfcd

diff --git a/meta-bsp/recipes-kernel/linux/linux-vuplus-3.9.6/vuultimo/linux-sata_bcm.patch b/meta-bsp/recipes-kernel/linux/linux-vuplus-3.9.6/vuultimo/linux-sata_bcm.patch
new file mode 100644
index 0000000..cbfc4b7
--- /dev/null
+++ b/meta-bsp/recipes-kernel/linux/linux-vuplus-3.9.6/vuultimo/linux-sata_bcm.patch
@@ -0,0 +1,55 @@
+diff --git a/drivers/ata/sata_brcmstb.c b/drivers/ata/sata_brcmstb.c
+index 7ba20e0..1e2e947 100644
+--- a/drivers/ata/sata_brcmstb.c
++++ b/drivers/ata/sata_brcmstb.c
+@@ -330,6 +330,22 @@ static void brcm_EnableOOBWindowFix(void __iomem *mmio_base, int port)
+ 	mdio_write_reg(mmio_base, port, 0x0D, sval);
+ }
+ 
++static void brcm_Enable256AlignDetection(void __iomem *mmio_base, int port)
++{
++        uint32_t tmp32;
++        void __iomem *port_mmio;
++
++        port_mmio = PORT_BASE(mmio_base, port);
++
++        tmp32 = readl(port_mmio + K2_SATA_SICR1_OFFSET);
++        tmp32 |= 0x08000000;
++        writel(tmp32, port_mmio + K2_SATA_SICR1_OFFSET);
++
++        tmp32 = readl(port_mmio + K2_SATA_SICR2_OFFSET);
++        tmp32 |= 0x00800000;
++        writel(tmp32, port_mmio + K2_SATA_SICR2_OFFSET);
++}
++
+ static void brcm_AnalogReset(void __iomem *mmio_base, int port)
+ {
+ 	/* do analog reset */
+@@ -385,6 +401,8 @@ static void brcm_InitSata_1_5Gb(void __iomem *mmio_base, int port)
+ 	brcm_SetPllTxRxCtrl(mmio_base, port);
+ 	brcm_EnableOOBWindowFix(mmio_base, port);
+ 
++	brcm_Enable256AlignDetection(mmio_base, port);
++
+ 	if (!port) {
+ #ifdef CONFIG_BRCM_SATA_75MHZ_PLL
+ 		/* use 75Mhz PLL clock */
+@@ -446,6 +464,8 @@ static void brcm_InitSata2_3Gb(void __iomem *mmio_base, int port)
+ 	brcm_SetPllTxRxCtrl(mmio_base, port);
+ 	brcm_EnableOOBWindowFix(mmio_base, port);
+ 
++	brcm_Enable256AlignDetection(mmio_base, port);
++
+ 	if (!port) {
+ #ifdef CONFIG_BRCM_SATA_75MHZ_PLL
+ 		/* use 75Mhz PLL clock */
+@@ -1135,7 +1155,9 @@ static int k2_sata_resume(struct device *dev)
+ 		ap = host->ports[i];
+ 
+ 		ata_for_each_link(link, ap, EDGE) {
++			spin_unlock_irqrestore(&hp->lock, flags);
+ 			sata_std_hardreset(link, NULL, 1000);
++			spin_lock_irqsave(&hp->lock, flags);
+ 		}
+ 	}
+