--- /dev/null
+diff --git a/drivers/ata/sata_brcmstb.c b/drivers/ata/sata_brcmstb.c
+index 7ba20e0..1e2e947 100644
+--- a/drivers/ata/sata_brcmstb.c
++++ b/drivers/ata/sata_brcmstb.c
+@@ -330,6 +330,22 @@ static void brcm_EnableOOBWindowFix(void __iomem *mmio_base, int port)
+ mdio_write_reg(mmio_base, port, 0x0D, sval);
+ }
+
++static void brcm_Enable256AlignDetection(void __iomem *mmio_base, int port)
++{
++ uint32_t tmp32;
++ void __iomem *port_mmio;
++
++ port_mmio = PORT_BASE(mmio_base, port);
++
++ tmp32 = readl(port_mmio + K2_SATA_SICR1_OFFSET);
++ tmp32 |= 0x08000000;
++ writel(tmp32, port_mmio + K2_SATA_SICR1_OFFSET);
++
++ tmp32 = readl(port_mmio + K2_SATA_SICR2_OFFSET);
++ tmp32 |= 0x00800000;
++ writel(tmp32, port_mmio + K2_SATA_SICR2_OFFSET);
++}
++
+ static void brcm_AnalogReset(void __iomem *mmio_base, int port)
+ {
+ /* do analog reset */
+@@ -385,6 +401,8 @@ static void brcm_InitSata_1_5Gb(void __iomem *mmio_base, int port)
+ brcm_SetPllTxRxCtrl(mmio_base, port);
+ brcm_EnableOOBWindowFix(mmio_base, port);
+
++ brcm_Enable256AlignDetection(mmio_base, port);
++
+ if (!port) {
+ #ifdef CONFIG_BRCM_SATA_75MHZ_PLL
+ /* use 75Mhz PLL clock */
+@@ -446,6 +464,8 @@ static void brcm_InitSata2_3Gb(void __iomem *mmio_base, int port)
+ brcm_SetPllTxRxCtrl(mmio_base, port);
+ brcm_EnableOOBWindowFix(mmio_base, port);
+
++ brcm_Enable256AlignDetection(mmio_base, port);
++
+ if (!port) {
+ #ifdef CONFIG_BRCM_SATA_75MHZ_PLL
+ /* use 75Mhz PLL clock */
+@@ -1135,7 +1155,9 @@ static int k2_sata_resume(struct device *dev)
+ ap = host->ports[i];
+
+ ata_for_each_link(link, ap, EDGE) {
++ spin_unlock_irqrestore(&hp->lock, flags);
+ sata_std_hardreset(link, NULL, 1000);
++ spin_lock_irqsave(&hp->lock, flags);
+ }
+ }
+