1 diff --git a/arch/mips/brcmstb/board.c b/arch/mips/brcmstb/board.c
2 index ab1cb65..f25c74b 100644
3 --- a/arch/mips/brcmstb/board.c
4 +++ b/arch/mips/brcmstb/board.c
5 @@ -718,15 +718,13 @@ void __init board_get_ram_size(unsigned long *dram0_mb, unsigned long *dram1_mb)
7 static struct mtd_partition fixed_partition_map[] = {
9 - { name: "rootfs", offset: 0, size:0x1F200000 /* DEFAULT_ROOTFS_SIZE*/ }, /* rootfs is total nand size - 6 M Bytes. referr to cfe. bcm97335_devs.c */
10 - { name: "kernel", offset: 0x1F200000, size: 4<<20 },
11 - { name: "boot", offset: 0x1F600000, size: 4<<20 },
12 - { name: "splash", offset: 0x1FA00000, size: 2<<20 },
13 - { name: "cfe", offset: 0x1FC00000, size: 1<<20 },
14 - { name: "mac", offset: 0x1FD00000, size: 1<<19 },
15 - { name: "env", offset: 0x1FD80000, size: 1<<19 },
16 - { name: "nvm", offset: 0x1FE00000, size: 1<<20 },
17 - { name: "data", offset: 0x20000000, size: 0x1FC00000 },
18 + { name: "rootfs", offset: 0, size: (128-4-4-3-1)<<20 }, /* rootfs is total nand size - 6 M Bytes. referr to cfe. bcm97335_devs.c */
19 + { name: "kernel", offset: 0x07400000, size: 4<<20 },
20 + { name: "boot", offset: 0x07800000, size: 4<<20 },
21 + { name: "cfe", offset: 0x07C00000, size: 1<<20 },
22 + { name: "mac", offset: 0x07D00000, size: 1<<19 },
23 + { name: "env", offset: 0x07D80000, size: 1<<19 },
24 + { name: "nvm", offset: 0x07E00000, size: 1<<20 },
25 /* BBT 1MB not mountable by anyone */
26 /* { name: "data", offset: 0x20000000, size: 0 },*/
27 /* Add 1 extra place-holder partition for splash, and a safety guard element */
28 diff --git a/drivers/mtd/brcmnand/brcmnand_base.c b/drivers/mtd/brcmnand/brcmnand_base.c
29 index 22035af..b54bc29 100644
30 --- a/drivers/mtd/brcmnand/brcmnand_base.c
31 +++ b/drivers/mtd/brcmnand/brcmnand_base.c
32 @@ -226,8 +226,8 @@ static brcmnand_chip_Id brcmnand_chips[] = {
33 .options = NAND_USE_FLASH_BBT, /* Use BBT on flash */
35 //| NAND_COMPLEX_OOB_WRITE /* Write data together with OOB for write_oob */
36 - .timing1 = 0, //00070000,
38 + .timing1 = 0x4232222D,
39 + .timing2 = 0x00000D94,
41 .ctrlVersion = 0, /* THT Verified on data-sheet 7/10/08: Allows 4 on main and 4 on OOB */
43 @@ -7553,10 +7553,7 @@ brcmnand_decode_config(struct brcmnand_chip* chip, uint32_t nand_config)
44 chip->blockSize = 2048 << 10;
47 - case BCHP_NAND_CONFIG_BLOCK_SIZE_BK_SIZE_256KB:
48 - chip->blockSize = 256 << 10;
50 - case BCHP_NAND_CONFIG_BLOCK_SIZE_BK_SIZE_512KB:
51 + case BCHP_NAND_CONFIG_BLOCK_SIZE_BK_SIZE_512KB:
52 chip->blockSize = 512 << 10;
54 case BCHP_NAND_CONFIG_BLOCK_SIZE_BK_SIZE_8KB:
55 @@ -7772,7 +7769,7 @@ is_ecc_strong(int registerEcc, int requiredEcc)
60 +#if CONFIG_MTD_BRCMNAND_VERSION >= CONFIG_MTD_BRCMNAND_VERS_3_0
62 brcmnand_set_acccontrol(struct brcmnand_chip * chip , unsigned int chipSelect,
63 uint32_t pageSize, uint16_t oobSizePerPage, int reqEcc, int codeWorkSize, int nbrBitsPerCell)
64 @@ -7928,7 +7925,7 @@ PRINTK("%s: gAccControl[CS=%d]=%08x, ACC=%08lx\n",
72 brcmnand_read_id(struct mtd_info *mtd, unsigned int chipSelect, unsigned long* dev_id)
73 @@ -8005,6 +8002,7 @@ printk("After: NandSelect=%08x, nandConfig=%08x\n", nandSelect, nandConfig);
77 +#if CONFIG_MTD_BRCMNAND_VERSION >= CONFIG_MTD_BRCMNAND_VERS_3_0
79 * Type-1 ID string, called from brcmnand_probe with the following condition
80 * if ((brcmnand_chips[i].idOptions & BRCMNAND_ID_HAS_BYTE4) &&
81 @@ -8202,7 +8200,9 @@ PRINTK("nandConfigChipSize = %04x\n", nandConfigChipSize);
87 +#if CONFIG_MTD_BRCMNAND_VERSION >= CONFIG_MTD_BRCMNAND_VERS_3_0
90 * Type-2 ID string, called from brcmnand_probe with the following condition
91 @@ -8372,8 +8372,9 @@ PRINTK("Required ECC level = %d, devIdExt=%08x, eccShift=%02x, sector Size=%d\n"
98 +#if CONFIG_MTD_BRCMNAND_VERSION >= CONFIG_MTD_BRCMNAND_VERS_3_0
100 * Type-2 ID string, called from brcmnand_probe with the following condition
101 * if ((brcmnand_chips[i].idOptions & BRCMNAND_ID_EXT_BYTES_TYPE2) ==
102 @@ -8519,6 +8520,7 @@ PRINTK("Updating Config Reg on CS%1d: Block & Page Size: After: %08x\n", chip->c
109 #if CONFIG_MTD_BRCMNAND_VERSION >= CONFIG_MTD_BRCMNAND_VERS_4_0
110 @@ -9074,7 +9076,7 @@ static int brcmnand_probe(struct mtd_info *mtd, unsigned int chipSelect)
111 for (i=0; i < BRCMNAND_MAX_CHIPS; i++) {
112 if (brcmnand_dev_id == brcmnand_chips[i].chipId
113 && brcmnand_maf_id == brcmnand_chips[i].mafId) {
115 +#if CONFIG_MTD_BRCMNAND_VERSION >= CONFIG_MTD_BRCMNAND_VERS_3_0
116 /* No ambiguity in ID#3,4,5 */
117 if (brcmnand_chips[i].chipId345[0] == 0x0
118 && brcmnand_chips[i].chipId345[1] == 0x0
119 @@ -9113,6 +9115,15 @@ static int brcmnand_probe(struct mtd_info *mtd, unsigned int chipSelect)
124 + if (brcmnand_chips[i].chipId345[0] == 0x0
125 + && brcmnand_chips[i].chipId345[1] == 0x0
126 + && brcmnand_chips[i].chipId345[2] == 0x0) {
127 + foundInIdTable = 1;
135 @@ -9312,7 +9323,7 @@ static int brcmnand_probe(struct mtd_info *mtd, unsigned int chipSelect)
136 printk("%s: Ecc level set to %d, sectorSize=%d from ID table\n", __FUNCTION__, chip->reqEccLevel, chip->eccSectorSize);
140 +#if CONFIG_MTD_BRCMNAND_VERSION >= CONFIG_MTD_BRCMNAND_VERS_3_0
141 /* ID not in table, and no CONFIG REG was passed at command line */
142 else if (!skipIdLookup && !foundInIdTable) {
144 @@ -9339,6 +9350,7 @@ printk("%s: Ecc level set to %d, sectorSize=%d from ID table\n", __FUNCTION__, c
145 printk("Spare Area Size = %dB/512B\n", chip->eccOobSize);
152 @@ -9355,10 +9367,11 @@ printk("%s: Ecc level set to %d, sectorSize=%d from ID table\n", __FUNCTION__, c
153 // Also works for dummy entries, but no adjustments possible
154 brcmnand_adjust_timings(chip, &brcmnand_chips[i]);
156 +#if CONFIG_MTD_BRCMNAND_VERSION >= CONFIG_MTD_BRCMNAND_VERS_3_0
157 // Adjust perchip NAND ACC CONTROL
158 // updateInternalData = not ONFI .or. not in ID table
159 brcmnand_adjust_acccontrol(chip, isONFI, foundInIdTable, i);
163 /* Flash device information */
164 brcmnand_print_device_info(&brcmnand_chips[i], mtd);