1 diff --git a/drivers/net/ethernet/broadcom/genet/bcmgenet.c b/drivers/net/ethernet/broadcom/genet/bcmgenet.c
2 index c23156a..9ae22a9 100644
3 --- a/drivers/net/ethernet/broadcom/genet/bcmgenet.c
4 +++ b/drivers/net/ethernet/broadcom/genet/bcmgenet.c
5 @@ -3115,6 +3115,34 @@ static int bcmgenet_set_wol(struct net_device *dev,
6 umac->mpd_pw_ls = get_unaligned_be32(&wol->sopass[2]);
7 umac->mpd_ctrl |= MPD_PW_EN;
9 + if (pDevCtrl->phyType == BRCM_PHY_TYPE_EXT_RGMII)
11 + if(wol->wolopts & WAKE_MAGIC)
13 + pDevCtrl->mii.mdio_write(dev, pDevCtrl->phyAddr, 0x1f, 0x0007);
14 + pDevCtrl->mii.mdio_write(dev, pDevCtrl->phyAddr, 0x1e, 0x006e);
15 + pDevCtrl->mii.mdio_write(dev, pDevCtrl->phyAddr, 0x15, dev->dev_addr[1]<<8 | dev->dev_addr[0]);
16 + pDevCtrl->mii.mdio_write(dev, pDevCtrl->phyAddr, 0x16, dev->dev_addr[3]<<8 | dev->dev_addr[2]);
17 + pDevCtrl->mii.mdio_write(dev, pDevCtrl->phyAddr, 0x17, dev->dev_addr[5]<<8 | dev->dev_addr[4]);
18 + pDevCtrl->mii.mdio_write(dev, pDevCtrl->phyAddr, 0x1f, 0x0007);
19 + pDevCtrl->mii.mdio_write(dev, pDevCtrl->phyAddr, 0x1e, 0x006d);
20 + pDevCtrl->mii.mdio_write(dev, pDevCtrl->phyAddr, 0x16, 0x9fff);
21 + pDevCtrl->mii.mdio_write(dev, pDevCtrl->phyAddr, 0x15, 0x1000);
22 + pDevCtrl->mii.mdio_write(dev, pDevCtrl->phyAddr, 0x1e, 0x006d);
23 + pDevCtrl->mii.mdio_write(dev, pDevCtrl->phyAddr, 0x19, 0x0001);
24 + pDevCtrl->mii.mdio_write(dev, pDevCtrl->phyAddr, 0x1f, 0x0000);
29 + pDevCtrl->mii.mdio_write(dev, pDevCtrl->phyAddr, 0x1f, 0x0007);
30 + pDevCtrl->mii.mdio_write(dev, pDevCtrl->phyAddr, 0x1e, 0x006d);
31 + pDevCtrl->mii.mdio_write(dev, pDevCtrl->phyAddr, 0x16, 0x9fff);
32 + pDevCtrl->mii.mdio_write(dev, pDevCtrl->phyAddr, 0x15, 0x0000);
33 + pDevCtrl->mii.mdio_write(dev, pDevCtrl->phyAddr, 0x1f, 0x0000);
38 device_set_wakeup_enable(&dev->dev, wol->wolopts);
39 pDevCtrl->wolopts = wol->wolopts;
40 diff --git a/drivers/brcmstb/setup.c b/drivers/brcmstb/setup.c
41 index 21a6e42..954b902 100644
42 --- a/drivers/brcmstb/setup.c
43 +++ b/drivers/brcmstb/setup.c
44 @@ -932,6 +932,15 @@ void brcm_machine_restart(const char *command)
48 +void (*brcm_s3_cb)(void);
51 +void register_brcm_s3_cb(void (*cb)(void))
55 +EXPORT_SYMBOL(register_brcm_s3_cb);
57 void brcm_machine_halt(void)
59 #ifdef CONFIG_BRCM_IRW_HALT
60 @@ -939,6 +948,7 @@ void brcm_machine_halt(void)
61 BDEV_WR_F_RB(SUN_TOP_CTRL_GENERAL_CTRL_1, irw_top_sw_pwroff, 0);
62 BDEV_WR_F_RB(SUN_TOP_CTRL_GENERAL_CTRL_1, irw_top_sw_pwroff, 1);
64 + if(brcm_s3_cb) brcm_s3_cb();
65 #ifdef CONFIG_BRCM_HAS_AON
66 /* may be S3 cold boot */
67 brcm_pm_s3_cold_boot();