code.vuplus.com Git - vuplus_openvuplus_3.0/blob - meta-bsp/common/recipes/linux/linux-vuplus-3.3.8/rt5372_kernel_3.3.8.patch

   1 diff -Naur linux.orig/drivers/net/wireless/rt2x00/rt2800.h linux/drivers/net/wireless/rt2x00/rt2800.h\r
   2 --- linux.orig/drivers/net/wireless/rt2x00/rt2800.h     2012-10-27 06:39:33.000000000 +0200\r
   3 +++ linux/drivers/net/wireless/rt2x00/rt2800.h  2014-02-23 17:59:22.000000000 +0100\r
   4 @@ -68,6 +68,7 @@\r
   5  #define RF3322                         0x000c\r
   6  #define RF3053                         0x000d\r
   7  #define RF5370                         0x5370\r
   8 +#define RF5372                         0x5372\r
   9  #define RF5390                         0x5390\r
  10  \r
  11  /*\r
  12 diff -Naur linux.orig/drivers/net/wireless/rt2x00/rt2800lib.c linux/drivers/net/wireless/rt2x00/rt2800lib.c\r
  13 --- linux.orig/drivers/net/wireless/rt2x00/rt2800lib.c  2012-10-27 06:39:33.000000000 +0200\r
  14 +++ linux/drivers/net/wireless/rt2x00/rt2800lib.c       2014-02-23 17:59:21.000000000 +0100\r
  15 @@ -402,7 +402,8 @@\r
  16  \r
  17         if (rt2x00_is_pci(rt2x00dev)) {\r
  18                 if (rt2x00_rt(rt2x00dev, RT3572) ||\r
  19 -                   rt2x00_rt(rt2x00dev, RT5390)) {\r
  20 +                   rt2x00_rt(rt2x00dev, RT5390) ||\r
  21 +                   rt2x00_rt(rt2x00dev, RT5392)) {\r
  22                         rt2800_register_read(rt2x00dev, AUX_CTRL, &reg);\r
  23                         rt2x00_set_field32(&reg, AUX_CTRL_FORCE_PCIE_CLK, 1);\r
  24                         rt2x00_set_field32(&reg, AUX_CTRL_WAKE_PCIE_EN, 1);\r
  25 @@ -1956,6 +1957,7 @@\r
  26                 rt2800_config_channel_rf3052(rt2x00dev, conf, rf, info);\r
  27                 break;\r
  28         case RF5370:\r
  29 +       case RF5372:\r
  30         case RF5390:\r
  31                 rt2800_config_channel_rf53xx(rt2x00dev, conf, rf, info);\r
  32                 break;\r
  33 @@ -1972,7 +1974,8 @@\r
  34         rt2800_bbp_write(rt2x00dev, 86, 0);\r
  35  \r
  36         if (rf->channel <= 14) {\r
  37 -               if (!rt2x00_rt(rt2x00dev, RT5390)) {\r
  38 +               if (!rt2x00_rt(rt2x00dev, RT5390) &&\r
  39 +                       !rt2x00_rt(rt2x00dev, RT5392)) {\r
  40                         if (test_bit(CAPABILITY_EXTERNAL_LNA_BG,\r
  41                                      &rt2x00dev->cap_flags)) {\r
  42                                 rt2800_bbp_write(rt2x00dev, 82, 0x62);\r
  43 @@ -2502,7 +2505,8 @@\r
  44                     rt2x00_rt(rt2x00dev, RT3071) ||\r
  45                     rt2x00_rt(rt2x00dev, RT3090) ||\r
  46                     rt2x00_rt(rt2x00dev, RT3390) ||\r
  47 -                   rt2x00_rt(rt2x00dev, RT5390))\r
  48 +                   rt2x00_rt(rt2x00dev, RT5390) ||\r
  49 +                   rt2x00_rt(rt2x00dev, RT5392))\r
  50                         return 0x1c + (2 * rt2x00dev->lna_gain);\r
  51                 else\r
  52                         return 0x2e + rt2x00dev->lna_gain;\r
  53 @@ -2637,7 +2641,8 @@\r
  54         } else if (rt2x00_rt(rt2x00dev, RT3572)) {\r
  55                 rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000400);\r
  56                 rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00080606);\r
  57 -       } else if (rt2x00_rt(rt2x00dev, RT5390)) {\r
  58 +       } else if (rt2x00_rt(rt2x00dev, RT5390) ||\r
  59 +                          rt2x00_rt(rt2x00dev, RT5392)) {\r
  60                 rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000404);\r
  61                 rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00080606);\r
  62                 rt2800_register_write(rt2x00dev, TX_SW_CFG2, 0x00000000);\r
  63 @@ -3013,7 +3018,8 @@\r
  64                      rt2800_wait_bbp_ready(rt2x00dev)))\r
  65                 return -EACCES;\r
  66  \r
  67 -       if (rt2x00_rt(rt2x00dev, RT5390)) {\r
  68 +       if (rt2x00_rt(rt2x00dev, RT5390) ||\r
  69 +               rt2x00_rt(rt2x00dev, RT5392)) {\r
  70                 rt2800_bbp_read(rt2x00dev, 4, &value);\r
  71                 rt2x00_set_field8(&value, BBP4_MAC_IF_CTRL, 1);\r
  72                 rt2800_bbp_write(rt2x00dev, 4, value);\r
  73 @@ -3021,19 +3027,22 @@\r
  74  \r
  75         if (rt2800_is_305x_soc(rt2x00dev) ||\r
  76             rt2x00_rt(rt2x00dev, RT3572) ||\r
  77 -           rt2x00_rt(rt2x00dev, RT5390))\r
  78 +           rt2x00_rt(rt2x00dev, RT5390) ||\r
  79 +           rt2x00_rt(rt2x00dev, RT5392))\r
  80                 rt2800_bbp_write(rt2x00dev, 31, 0x08);\r
  81  \r
  82         rt2800_bbp_write(rt2x00dev, 65, 0x2c);\r
  83         rt2800_bbp_write(rt2x00dev, 66, 0x38);\r
  84  \r
  85 -       if (rt2x00_rt(rt2x00dev, RT5390))\r
  86 +       if (rt2x00_rt(rt2x00dev, RT5390) ||\r
  87 +               rt2x00_rt(rt2x00dev, RT5392))\r
  88                 rt2800_bbp_write(rt2x00dev, 68, 0x0b);\r
  89  \r
  90         if (rt2x00_rt_rev(rt2x00dev, RT2860, REV_RT2860C)) {\r
  91                 rt2800_bbp_write(rt2x00dev, 69, 0x16);\r
  92                 rt2800_bbp_write(rt2x00dev, 73, 0x12);\r
  93 -       } else if (rt2x00_rt(rt2x00dev, RT5390)) {\r
  94 +       } else if (rt2x00_rt(rt2x00dev, RT5390) ||\r
  95 +                          rt2x00_rt(rt2x00dev, RT5392)) {\r
  96                 rt2800_bbp_write(rt2x00dev, 69, 0x12);\r
  97                 rt2800_bbp_write(rt2x00dev, 73, 0x13);\r
  98                 rt2800_bbp_write(rt2x00dev, 75, 0x46);\r
  99 @@ -3051,7 +3060,8 @@\r
 100             rt2x00_rt(rt2x00dev, RT3090) ||\r
 101             rt2x00_rt(rt2x00dev, RT3390) ||\r
 102             rt2x00_rt(rt2x00dev, RT3572) ||\r
 103 -           rt2x00_rt(rt2x00dev, RT5390)) {\r
 104 +           rt2x00_rt(rt2x00dev, RT5390) ||\r
 105 +           rt2x00_rt(rt2x00dev, RT5392)) {\r
 106                 rt2800_bbp_write(rt2x00dev, 79, 0x13);\r
 107                 rt2800_bbp_write(rt2x00dev, 80, 0x05);\r
 108                 rt2800_bbp_write(rt2x00dev, 81, 0x33);\r
 109 @@ -3063,64 +3073,88 @@\r
 110         }\r
 111  \r
 112         rt2800_bbp_write(rt2x00dev, 82, 0x62);\r
 113 -       if (rt2x00_rt(rt2x00dev, RT5390))\r
 114 +       if (rt2x00_rt(rt2x00dev, RT5390) ||\r
 115 +               rt2x00_rt(rt2x00dev, RT5392))\r
 116                 rt2800_bbp_write(rt2x00dev, 83, 0x7a);\r
 117         else\r
 118                 rt2800_bbp_write(rt2x00dev, 83, 0x6a);\r
 119  \r
 120         if (rt2x00_rt_rev(rt2x00dev, RT2860, REV_RT2860D))\r
 121                 rt2800_bbp_write(rt2x00dev, 84, 0x19);\r
 122 -       else if (rt2x00_rt(rt2x00dev, RT5390))\r
 123 +       else if (rt2x00_rt(rt2x00dev, RT5390) ||\r
 124 +                        rt2x00_rt(rt2x00dev, RT5392))\r
 125                 rt2800_bbp_write(rt2x00dev, 84, 0x9a);\r
 126         else\r
 127                 rt2800_bbp_write(rt2x00dev, 84, 0x99);\r
 128  \r
 129 -       if (rt2x00_rt(rt2x00dev, RT5390))\r
 130 +       if (rt2x00_rt(rt2x00dev, RT5390) ||\r
 131 +               rt2x00_rt(rt2x00dev, RT5392))\r
 132                 rt2800_bbp_write(rt2x00dev, 86, 0x38);\r
 133         else\r
 134                 rt2800_bbp_write(rt2x00dev, 86, 0x00);\r
 135  \r
 136 +       if (rt2x00_rt(rt2x00dev, RT5392))\r
 137 +               rt2800_bbp_write(rt2x00dev, 88, 0x90);\r
 138 +\r
 139         rt2800_bbp_write(rt2x00dev, 91, 0x04);\r
 140  \r
 141 -       if (rt2x00_rt(rt2x00dev, RT5390))\r
 142 +       if (rt2x00_rt(rt2x00dev, RT5390) ||\r
 143 +               rt2x00_rt(rt2x00dev, RT5392))\r
 144                 rt2800_bbp_write(rt2x00dev, 92, 0x02);\r
 145         else\r
 146                 rt2800_bbp_write(rt2x00dev, 92, 0x00);\r
 147  \r
 148 +       if (rt2x00_rt(rt2x00dev, RT5392)) {\r
 149 +               rt2800_bbp_write(rt2x00dev, 95, 0x9a);\r
 150 +               rt2800_bbp_write(rt2x00dev, 98, 0x12);\r
 151 +       }\r
 152 +\r
 153         if (rt2x00_rt_rev_gte(rt2x00dev, RT3070, REV_RT3070F) ||\r
 154             rt2x00_rt_rev_gte(rt2x00dev, RT3071, REV_RT3071E) ||\r
 155             rt2x00_rt_rev_gte(rt2x00dev, RT3090, REV_RT3090E) ||\r
 156             rt2x00_rt_rev_gte(rt2x00dev, RT3390, REV_RT3390E) ||\r
 157             rt2x00_rt(rt2x00dev, RT3572) ||\r
 158             rt2x00_rt(rt2x00dev, RT5390) ||\r
 159 +           rt2x00_rt(rt2x00dev, RT5392) ||\r
 160             rt2800_is_305x_soc(rt2x00dev))\r
 161                 rt2800_bbp_write(rt2x00dev, 103, 0xc0);\r
 162         else\r
 163                 rt2800_bbp_write(rt2x00dev, 103, 0x00);\r
 164  \r
 165 -       if (rt2x00_rt(rt2x00dev, RT5390))\r
 166 +       if (rt2x00_rt(rt2x00dev, RT5390) ||\r
 167 +               rt2x00_rt(rt2x00dev, RT5392))\r
 168                 rt2800_bbp_write(rt2x00dev, 104, 0x92);\r
 169  \r
 170         if (rt2800_is_305x_soc(rt2x00dev))\r
 171                 rt2800_bbp_write(rt2x00dev, 105, 0x01);\r
 172 -       else if (rt2x00_rt(rt2x00dev, RT5390))\r
 173 +       else if (rt2x00_rt(rt2x00dev, RT5390) ||\r
 174 +                        rt2x00_rt(rt2x00dev, RT5392))\r
 175                 rt2800_bbp_write(rt2x00dev, 105, 0x3c);\r
 176         else\r
 177                 rt2800_bbp_write(rt2x00dev, 105, 0x05);\r
 178  \r
 179         if (rt2x00_rt(rt2x00dev, RT5390))\r
 180                 rt2800_bbp_write(rt2x00dev, 106, 0x03);\r
 181 +       else if (rt2x00_rt(rt2x00dev, RT5392))\r
 182 +               rt2800_bbp_write(rt2x00dev, 106, 0x12);\r
 183         else\r
 184                 rt2800_bbp_write(rt2x00dev, 106, 0x35);\r
 185  \r
 186 -       if (rt2x00_rt(rt2x00dev, RT5390))\r
 187 +       if (rt2x00_rt(rt2x00dev, RT5390) ||\r
 188 +               rt2x00_rt(rt2x00dev, RT5392))\r
 189                 rt2800_bbp_write(rt2x00dev, 128, 0x12);\r
 190  \r
 191 +       if (rt2x00_rt(rt2x00dev, RT5392)) {\r
 192 +               rt2800_bbp_write(rt2x00dev, 134, 0xd0);\r
 193 +               rt2800_bbp_write(rt2x00dev, 135, 0xf6);\r
 194 +       }\r
 195 +\r
 196         if (rt2x00_rt(rt2x00dev, RT3071) ||\r
 197             rt2x00_rt(rt2x00dev, RT3090) ||\r
 198             rt2x00_rt(rt2x00dev, RT3390) ||\r
 199             rt2x00_rt(rt2x00dev, RT3572) ||\r
 200 -           rt2x00_rt(rt2x00dev, RT5390)) {\r
 201 +           rt2x00_rt(rt2x00dev, RT5390) ||\r
 202 +           rt2x00_rt(rt2x00dev, RT5392)) {\r
 203                 rt2800_bbp_read(rt2x00dev, 138, &value);\r
 204  \r
 205                 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC_CONF0, &eeprom);\r
 206 @@ -3132,7 +3166,8 @@\r
 207                 rt2800_bbp_write(rt2x00dev, 138, value);\r
 208         }\r
 209  \r
 210 -       if (rt2x00_rt(rt2x00dev, RT5390)) {\r
 211 +       if (rt2x00_rt(rt2x00dev, RT5390) ||\r
 212 +               rt2x00_rt(rt2x00dev, RT5392)) {\r
 213                 int ant, div_mode;\r
 214  \r
 215                 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC_CONF1, &eeprom);\r
 216 @@ -3258,13 +3293,15 @@\r
 217             !rt2x00_rt(rt2x00dev, RT3390) &&\r
 218             !rt2x00_rt(rt2x00dev, RT3572) &&\r
 219             !rt2x00_rt(rt2x00dev, RT5390) &&\r
 220 +           !rt2x00_rt(rt2x00dev, RT5392) &&\r
 221             !rt2800_is_305x_soc(rt2x00dev))\r
 222                 return 0;\r
 223  \r
 224         /*\r
 225          * Init RF calibration.\r
 226          */\r
 227 -       if (rt2x00_rt(rt2x00dev, RT5390)) {\r
 228 +       if (rt2x00_rt(rt2x00dev, RT5390) ||\r
 229 +               rt2x00_rt(rt2x00dev, RT5392)) {\r
 230                 rt2800_rfcsr_read(rt2x00dev, 2, &rfcsr);\r
 231                 rt2x00_set_field8(&rfcsr, RFCSR2_RESCAL_EN, 1);\r
 232                 rt2800_rfcsr_write(rt2x00dev, 2, rfcsr);\r
 233 @@ -3482,6 +3519,66 @@\r
 234                         rt2800_rfcsr_write(rt2x00dev, 61, 0xdd);\r
 235                 rt2800_rfcsr_write(rt2x00dev, 62, 0x00);\r
 236                 rt2800_rfcsr_write(rt2x00dev, 63, 0x00);\r
 237 +       }       else if (rt2x00_rt(rt2x00dev, RT5392)) {\r
 238 +                       rt2800_rfcsr_write(rt2x00dev, 1, 0x17);\r
 239 +                       rt2800_rfcsr_write(rt2x00dev, 2, 0x80);\r
 240 +                       rt2800_rfcsr_write(rt2x00dev, 3, 0x88);\r
 241 +                       rt2800_rfcsr_write(rt2x00dev, 5, 0x10);\r
 242 +                       rt2800_rfcsr_write(rt2x00dev, 6, 0xe0);\r
 243 +                       rt2800_rfcsr_write(rt2x00dev, 7, 0x00);\r
 244 +                       rt2800_rfcsr_write(rt2x00dev, 10, 0x53);\r
 245 +                       rt2800_rfcsr_write(rt2x00dev, 11, 0x4a);\r
 246 +                       rt2800_rfcsr_write(rt2x00dev, 12, 0x46);\r
 247 +                       rt2800_rfcsr_write(rt2x00dev, 13, 0x9f);\r
 248 +                       rt2800_rfcsr_write(rt2x00dev, 14, 0x00);\r
 249 +                       rt2800_rfcsr_write(rt2x00dev, 15, 0x00);\r
 250 +                       rt2800_rfcsr_write(rt2x00dev, 16, 0x00);\r
 251 +                       rt2800_rfcsr_write(rt2x00dev, 18, 0x03);\r
 252 +                       rt2800_rfcsr_write(rt2x00dev, 19, 0x4d);\r
 253 +                       rt2800_rfcsr_write(rt2x00dev, 20, 0x00);\r
 254 +                       rt2800_rfcsr_write(rt2x00dev, 21, 0x8d);\r
 255 +                       rt2800_rfcsr_write(rt2x00dev, 22, 0x20);\r
 256 +                       rt2800_rfcsr_write(rt2x00dev, 23, 0x0b);\r
 257 +                       rt2800_rfcsr_write(rt2x00dev, 24, 0x44);\r
 258 +                       rt2800_rfcsr_write(rt2x00dev, 25, 0x80);\r
 259 +                       rt2800_rfcsr_write(rt2x00dev, 26, 0x82);\r
 260 +                       rt2800_rfcsr_write(rt2x00dev, 27, 0x09);\r
 261 +                       rt2800_rfcsr_write(rt2x00dev, 28, 0x00);\r
 262 +                       rt2800_rfcsr_write(rt2x00dev, 29, 0x10);\r
 263 +                       rt2800_rfcsr_write(rt2x00dev, 30, 0x10);\r
 264 +                       rt2800_rfcsr_write(rt2x00dev, 31, 0x80);\r
 265 +                       rt2800_rfcsr_write(rt2x00dev, 32, 0x20);\r
 266 +                       rt2800_rfcsr_write(rt2x00dev, 33, 0xC0);\r
 267 +                       rt2800_rfcsr_write(rt2x00dev, 34, 0x07);\r
 268 +                       rt2800_rfcsr_write(rt2x00dev, 35, 0x12);\r
 269 +                       rt2800_rfcsr_write(rt2x00dev, 36, 0x00);\r
 270 +                       rt2800_rfcsr_write(rt2x00dev, 37, 0x08);\r
 271 +                       rt2800_rfcsr_write(rt2x00dev, 38, 0x89);\r
 272 +                       rt2800_rfcsr_write(rt2x00dev, 39, 0x1b);\r
 273 +                       rt2800_rfcsr_write(rt2x00dev, 40, 0x0f);\r
 274 +                       rt2800_rfcsr_write(rt2x00dev, 41, 0xbb);\r
 275 +                       rt2800_rfcsr_write(rt2x00dev, 42, 0xd5);\r
 276 +                       rt2800_rfcsr_write(rt2x00dev, 43, 0x9b);\r
 277 +                       rt2800_rfcsr_write(rt2x00dev, 44, 0x0e);\r
 278 +                       rt2800_rfcsr_write(rt2x00dev, 45, 0xa2);\r
 279 +                       rt2800_rfcsr_write(rt2x00dev, 46, 0x73);\r
 280 +                       rt2800_rfcsr_write(rt2x00dev, 47, 0x0c);\r
 281 +                       rt2800_rfcsr_write(rt2x00dev, 48, 0x10);\r
 282 +                       rt2800_rfcsr_write(rt2x00dev, 49, 0x94);\r
 283 +                       rt2800_rfcsr_write(rt2x00dev, 50, 0x94);\r
 284 +                       rt2800_rfcsr_write(rt2x00dev, 51, 0x3a);\r
 285 +                       rt2800_rfcsr_write(rt2x00dev, 52, 0x48);\r
 286 +                       rt2800_rfcsr_write(rt2x00dev, 53, 0x44);\r
 287 +                       rt2800_rfcsr_write(rt2x00dev, 54, 0x38);\r
 288 +                       rt2800_rfcsr_write(rt2x00dev, 55, 0x43);\r
 289 +                       rt2800_rfcsr_write(rt2x00dev, 56, 0xa1);\r
 290 +                       rt2800_rfcsr_write(rt2x00dev, 57, 0x00);\r
 291 +                       rt2800_rfcsr_write(rt2x00dev, 58, 0x39);\r
 292 +                       rt2800_rfcsr_write(rt2x00dev, 59, 0x07);\r
 293 +                       rt2800_rfcsr_write(rt2x00dev, 60, 0x45);\r
 294 +                       rt2800_rfcsr_write(rt2x00dev, 61, 0x91);\r
 295 +                       rt2800_rfcsr_write(rt2x00dev, 62, 0x39);\r
 296 +                       rt2800_rfcsr_write(rt2x00dev, 63, 0x07);\r
 297         }\r
 298  \r
 299         if (rt2x00_rt_rev_lt(rt2x00dev, RT3070, REV_RT3070F)) {\r
 300 @@ -3549,7 +3646,8 @@\r
 301                         rt2800_init_rx_filter(rt2x00dev, true, 0x27, 0x15);\r
 302         }\r
 303  \r
 304 -       if (!rt2x00_rt(rt2x00dev, RT5390)) {\r
 305 +       if (!rt2x00_rt(rt2x00dev, RT5390) &&\r
 306 +               !rt2x00_rt(rt2x00dev, RT5392)) {\r
 307                 /*\r
 308                  * Set back to initial state\r
 309                  */\r
 310 @@ -3577,7 +3675,8 @@\r
 311         rt2x00_set_field32(&reg, OPT_14_CSR_BIT0, 1);\r
 312         rt2800_register_write(rt2x00dev, OPT_14_CSR, reg);\r
 313  \r
 314 -       if (!rt2x00_rt(rt2x00dev, RT5390)) {\r
 315 +       if (!rt2x00_rt(rt2x00dev, RT5390) &&\r
 316 +               !rt2x00_rt(rt2x00dev, RT5392)) {\r
 317                 rt2800_rfcsr_read(rt2x00dev, 17, &rfcsr);\r
 318                 rt2x00_set_field8(&rfcsr, RFCSR17_TX_LO1_EN, 0);\r
 319                 if (rt2x00_rt(rt2x00dev, RT3070) ||\r
 320 @@ -3645,7 +3744,8 @@\r
 321                 rt2800_rfcsr_write(rt2x00dev, 27, rfcsr);\r
 322         }\r
 323  \r
 324 -       if (rt2x00_rt(rt2x00dev, RT5390)) {\r
 325 +       if (rt2x00_rt(rt2x00dev, RT5390) ||\r
 326 +               rt2x00_rt(rt2x00dev, RT5392)) {\r
 327                 rt2800_rfcsr_read(rt2x00dev, 38, &rfcsr);\r
 328                 rt2x00_set_field8(&rfcsr, RFCSR38_RX_LO1_EN, 0);\r
 329                 rt2800_rfcsr_write(rt2x00dev, 38, rfcsr);\r
 330 @@ -3929,7 +4029,8 @@\r
 331          * RT53xx: defined in "EEPROM_CHIP_ID" field\r
 332          */\r
 333         rt2800_register_read(rt2x00dev, MAC_CSR0, &reg);\r
 334 -       if (rt2x00_get_field32(reg, MAC_CSR0_CHIPSET) == RT5390)\r
 335 +       if (rt2x00_get_field32(reg, MAC_CSR0_CHIPSET) == RT5390 ||\r
 336 +               rt2x00_get_field32(reg, MAC_CSR0_CHIPSET) == RT5392)\r
 337                 rt2x00_eeprom_read(rt2x00dev, EEPROM_CHIP_ID, &value);\r
 338         else\r
 339                 value = rt2x00_get_field16(eeprom, EEPROM_NIC_CONF0_RF_TYPE);\r
 340 @@ -3947,6 +4048,7 @@\r
 341         case RT3390:\r
 342         case RT3572:\r
 343         case RT5390:\r
 344 +       case RT5392:\r
 345                 break;\r
 346         default:\r
 347                 ERROR(rt2x00dev, "Invalid RT chipset detected.\n");\r
 348 @@ -3965,6 +4067,7 @@\r
 349         case RF3052:\r
 350         case RF3320:\r
 351         case RF5370:\r
 352 +       case RF5372:\r
 353         case RF5390:\r
 354                 break;\r
 355         default:\r
 356 @@ -4271,6 +4374,7 @@\r
 357                    rt2x00_rf(rt2x00dev, RF3022) ||\r
 358                    rt2x00_rf(rt2x00dev, RF3320) ||\r
 359                    rt2x00_rf(rt2x00dev, RF5370) ||\r
 360 +                  rt2x00_rf(rt2x00dev, RF5372) ||\r
 361                    rt2x00_rf(rt2x00dev, RF5390)) {\r
 362                 spec->num_channels = 14;\r
 363                 spec->channels = rf_vals_3x;\r
 364 diff -Naur linux.orig/drivers/net/wireless/rt2x00/rt2800pci.c linux/drivers/net/wireless/rt2x00/rt2800pci.c\r
 365 --- linux.orig/drivers/net/wireless/rt2x00/rt2800pci.c  2012-10-27 06:39:33.000000000 +0200\r
 366 +++ linux/drivers/net/wireless/rt2x00/rt2800pci.c       2014-02-24 22:56:12.744488448 +0100\r
 367 @@ -480,7 +480,8 @@\r
 368  \r
 369         if (rt2x00_is_pcie(rt2x00dev) &&\r
 370             (rt2x00_rt(rt2x00dev, RT3572) ||\r
 371 -            rt2x00_rt(rt2x00dev, RT5390))) {\r
 372 +            rt2x00_rt(rt2x00dev, RT5390) ||\r
 373 +            rt2x00_rt(rt2x00dev, RT5392))) {\r
 374                 rt2x00pci_register_read(rt2x00dev, AUX_CTRL, &reg);\r
 375                 rt2x00_set_field32(&reg, AUX_CTRL_FORCE_PCIE_CLK, 1);\r
 376                 rt2x00_set_field32(&reg, AUX_CTRL_WAKE_PCIE_EN, 1);\r
 377 diff -Naur linux.orig/drivers/net/wireless/rt2x00/rt2x00.h linux/drivers/net/wireless/rt2x00/rt2x00.h\r
 378 --- linux.orig/drivers/net/wireless/rt2x00/rt2x00.h     2012-10-27 06:39:33.000000000 +0200\r
 379 +++ linux/drivers/net/wireless/rt2x00/rt2x00.h  2014-02-23 17:59:23.000000000 +0100\r
 380 @@ -192,6 +192,7 @@\r
 381  #define RT3593         0x3593\r
 382  #define RT3883         0x3883  /* WSOC */\r
 383  #define RT5390         0x5390  /* 2.4GHz */\r
 384 +#define RT5392          0x5392 /* 2.4GHz */\r
 385  \r
 386         u16 rf;\r
 387         u16 rev;\r