X-Git-Url: http://code.vuplus.com/gitweb/?p=vuplus_openvuplus;a=blobdiff_plain;f=meta-bsp%2Fcommon%2Frecipes%2Flinux%2Flinux-vuplus-3.3.8%2Frt5372_kernel_3.3.8.patch;fp=meta-bsp%2Fcommon%2Frecipes%2Flinux%2Flinux-vuplus-3.3.8%2Frt5372_kernel_3.3.8.patch;h=a655a074bad98036018376f46eb755af86561dde;hp=0000000000000000000000000000000000000000;hb=b52ef2945d01857f61b611a57e36d4f7b2f8c315;hpb=1cf7057ef4b5fb9b2fadd677902cbee229a25eea

diff --git a/meta-bsp/common/recipes/linux/linux-vuplus-3.3.8/rt5372_kernel_3.3.8.patch b/meta-bsp/common/recipes/linux/linux-vuplus-3.3.8/rt5372_kernel_3.3.8.patch
new file mode 100644
index 0000000..a655a07
--- /dev/null
+++ b/meta-bsp/common/recipes/linux/linux-vuplus-3.3.8/rt5372_kernel_3.3.8.patch
@@ -0,0 +1,387 @@
+diff -Naur linux.orig/drivers/net/wireless/rt2x00/rt2800.h linux/drivers/net/wireless/rt2x00/rt2800.h
+--- linux.orig/drivers/net/wireless/rt2x00/rt2800.h	2012-10-27 06:39:33.000000000 +0200
++++ linux/drivers/net/wireless/rt2x00/rt2800.h	2014-02-23 17:59:22.000000000 +0100
+@@ -68,6 +68,7 @@
+ #define RF3322				0x000c
+ #define RF3053				0x000d
+ #define RF5370				0x5370
++#define RF5372				0x5372
+ #define RF5390				0x5390
+ 
+ /*
+diff -Naur linux.orig/drivers/net/wireless/rt2x00/rt2800lib.c linux/drivers/net/wireless/rt2x00/rt2800lib.c
+--- linux.orig/drivers/net/wireless/rt2x00/rt2800lib.c	2012-10-27 06:39:33.000000000 +0200
++++ linux/drivers/net/wireless/rt2x00/rt2800lib.c	2014-02-23 17:59:21.000000000 +0100
+@@ -402,7 +402,8 @@
+ 
+ 	if (rt2x00_is_pci(rt2x00dev)) {
+ 		if (rt2x00_rt(rt2x00dev, RT3572) ||
+-		    rt2x00_rt(rt2x00dev, RT5390)) {
++		    rt2x00_rt(rt2x00dev, RT5390) ||
++		    rt2x00_rt(rt2x00dev, RT5392)) {
+ 			rt2800_register_read(rt2x00dev, AUX_CTRL, &reg);
+ 			rt2x00_set_field32(&reg, AUX_CTRL_FORCE_PCIE_CLK, 1);
+ 			rt2x00_set_field32(&reg, AUX_CTRL_WAKE_PCIE_EN, 1);
+@@ -1956,6 +1957,7 @@
+ 		rt2800_config_channel_rf3052(rt2x00dev, conf, rf, info);
+ 		break;
+ 	case RF5370:
++	case RF5372:
+ 	case RF5390:
+ 		rt2800_config_channel_rf53xx(rt2x00dev, conf, rf, info);
+ 		break;
+@@ -1972,7 +1974,8 @@
+ 	rt2800_bbp_write(rt2x00dev, 86, 0);
+ 
+ 	if (rf->channel <= 14) {
+-		if (!rt2x00_rt(rt2x00dev, RT5390)) {
++		if (!rt2x00_rt(rt2x00dev, RT5390) &&
++			!rt2x00_rt(rt2x00dev, RT5392)) {
+ 			if (test_bit(CAPABILITY_EXTERNAL_LNA_BG,
+ 				     &rt2x00dev->cap_flags)) {
+ 				rt2800_bbp_write(rt2x00dev, 82, 0x62);
+@@ -2502,7 +2505,8 @@
+ 		    rt2x00_rt(rt2x00dev, RT3071) ||
+ 		    rt2x00_rt(rt2x00dev, RT3090) ||
+ 		    rt2x00_rt(rt2x00dev, RT3390) ||
+-		    rt2x00_rt(rt2x00dev, RT5390))
++		    rt2x00_rt(rt2x00dev, RT5390) ||
++		    rt2x00_rt(rt2x00dev, RT5392))
+ 			return 0x1c + (2 * rt2x00dev->lna_gain);
+ 		else
+ 			return 0x2e + rt2x00dev->lna_gain;
+@@ -2637,7 +2641,8 @@
+ 	} else if (rt2x00_rt(rt2x00dev, RT3572)) {
+ 		rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000400);
+ 		rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00080606);
+-	} else if (rt2x00_rt(rt2x00dev, RT5390)) {
++	} else if (rt2x00_rt(rt2x00dev, RT5390) ||
++			   rt2x00_rt(rt2x00dev, RT5392)) {
+ 		rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000404);
+ 		rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00080606);
+ 		rt2800_register_write(rt2x00dev, TX_SW_CFG2, 0x00000000);
+@@ -3013,7 +3018,8 @@
+ 		     rt2800_wait_bbp_ready(rt2x00dev)))
+ 		return -EACCES;
+ 
+-	if (rt2x00_rt(rt2x00dev, RT5390)) {
++	if (rt2x00_rt(rt2x00dev, RT5390) ||
++		rt2x00_rt(rt2x00dev, RT5392)) {
+ 		rt2800_bbp_read(rt2x00dev, 4, &value);
+ 		rt2x00_set_field8(&value, BBP4_MAC_IF_CTRL, 1);
+ 		rt2800_bbp_write(rt2x00dev, 4, value);
+@@ -3021,19 +3027,22 @@
+ 
+ 	if (rt2800_is_305x_soc(rt2x00dev) ||
+ 	    rt2x00_rt(rt2x00dev, RT3572) ||
+-	    rt2x00_rt(rt2x00dev, RT5390))
++	    rt2x00_rt(rt2x00dev, RT5390) ||
++	    rt2x00_rt(rt2x00dev, RT5392))
+ 		rt2800_bbp_write(rt2x00dev, 31, 0x08);
+ 
+ 	rt2800_bbp_write(rt2x00dev, 65, 0x2c);
+ 	rt2800_bbp_write(rt2x00dev, 66, 0x38);
+ 
+-	if (rt2x00_rt(rt2x00dev, RT5390))
++	if (rt2x00_rt(rt2x00dev, RT5390) ||
++		rt2x00_rt(rt2x00dev, RT5392))
+ 		rt2800_bbp_write(rt2x00dev, 68, 0x0b);
+ 
+ 	if (rt2x00_rt_rev(rt2x00dev, RT2860, REV_RT2860C)) {
+ 		rt2800_bbp_write(rt2x00dev, 69, 0x16);
+ 		rt2800_bbp_write(rt2x00dev, 73, 0x12);
+-	} else if (rt2x00_rt(rt2x00dev, RT5390)) {
++	} else if (rt2x00_rt(rt2x00dev, RT5390) ||
++			   rt2x00_rt(rt2x00dev, RT5392)) {
+ 		rt2800_bbp_write(rt2x00dev, 69, 0x12);
+ 		rt2800_bbp_write(rt2x00dev, 73, 0x13);
+ 		rt2800_bbp_write(rt2x00dev, 75, 0x46);
+@@ -3051,7 +3060,8 @@
+ 	    rt2x00_rt(rt2x00dev, RT3090) ||
+ 	    rt2x00_rt(rt2x00dev, RT3390) ||
+ 	    rt2x00_rt(rt2x00dev, RT3572) ||
+-	    rt2x00_rt(rt2x00dev, RT5390)) {
++	    rt2x00_rt(rt2x00dev, RT5390) ||
++	    rt2x00_rt(rt2x00dev, RT5392)) {
+ 		rt2800_bbp_write(rt2x00dev, 79, 0x13);
+ 		rt2800_bbp_write(rt2x00dev, 80, 0x05);
+ 		rt2800_bbp_write(rt2x00dev, 81, 0x33);
+@@ -3063,64 +3073,88 @@
+ 	}
+ 
+ 	rt2800_bbp_write(rt2x00dev, 82, 0x62);
+-	if (rt2x00_rt(rt2x00dev, RT5390))
++	if (rt2x00_rt(rt2x00dev, RT5390) ||
++		rt2x00_rt(rt2x00dev, RT5392))
+ 		rt2800_bbp_write(rt2x00dev, 83, 0x7a);
+ 	else
+ 		rt2800_bbp_write(rt2x00dev, 83, 0x6a);
+ 
+ 	if (rt2x00_rt_rev(rt2x00dev, RT2860, REV_RT2860D))
+ 		rt2800_bbp_write(rt2x00dev, 84, 0x19);
+-	else if (rt2x00_rt(rt2x00dev, RT5390))
++	else if (rt2x00_rt(rt2x00dev, RT5390) ||
++			 rt2x00_rt(rt2x00dev, RT5392))
+ 		rt2800_bbp_write(rt2x00dev, 84, 0x9a);
+ 	else
+ 		rt2800_bbp_write(rt2x00dev, 84, 0x99);
+ 
+-	if (rt2x00_rt(rt2x00dev, RT5390))
++	if (rt2x00_rt(rt2x00dev, RT5390) ||
++		rt2x00_rt(rt2x00dev, RT5392))
+ 		rt2800_bbp_write(rt2x00dev, 86, 0x38);
+ 	else
+ 		rt2800_bbp_write(rt2x00dev, 86, 0x00);
+ 
++	if (rt2x00_rt(rt2x00dev, RT5392))
++		rt2800_bbp_write(rt2x00dev, 88, 0x90);
++
+ 	rt2800_bbp_write(rt2x00dev, 91, 0x04);
+ 
+-	if (rt2x00_rt(rt2x00dev, RT5390))
++	if (rt2x00_rt(rt2x00dev, RT5390) ||
++		rt2x00_rt(rt2x00dev, RT5392))
+ 		rt2800_bbp_write(rt2x00dev, 92, 0x02);
+ 	else
+ 		rt2800_bbp_write(rt2x00dev, 92, 0x00);
+ 
++	if (rt2x00_rt(rt2x00dev, RT5392)) {
++		rt2800_bbp_write(rt2x00dev, 95, 0x9a);
++		rt2800_bbp_write(rt2x00dev, 98, 0x12);
++	}
++
+ 	if (rt2x00_rt_rev_gte(rt2x00dev, RT3070, REV_RT3070F) ||
+ 	    rt2x00_rt_rev_gte(rt2x00dev, RT3071, REV_RT3071E) ||
+ 	    rt2x00_rt_rev_gte(rt2x00dev, RT3090, REV_RT3090E) ||
+ 	    rt2x00_rt_rev_gte(rt2x00dev, RT3390, REV_RT3390E) ||
+ 	    rt2x00_rt(rt2x00dev, RT3572) ||
+ 	    rt2x00_rt(rt2x00dev, RT5390) ||
++	    rt2x00_rt(rt2x00dev, RT5392) ||
+ 	    rt2800_is_305x_soc(rt2x00dev))
+ 		rt2800_bbp_write(rt2x00dev, 103, 0xc0);
+ 	else
+ 		rt2800_bbp_write(rt2x00dev, 103, 0x00);
+ 
+-	if (rt2x00_rt(rt2x00dev, RT5390))
++	if (rt2x00_rt(rt2x00dev, RT5390) ||
++		rt2x00_rt(rt2x00dev, RT5392))
+ 		rt2800_bbp_write(rt2x00dev, 104, 0x92);
+ 
+ 	if (rt2800_is_305x_soc(rt2x00dev))
+ 		rt2800_bbp_write(rt2x00dev, 105, 0x01);
+-	else if (rt2x00_rt(rt2x00dev, RT5390))
++	else if (rt2x00_rt(rt2x00dev, RT5390) ||
++			 rt2x00_rt(rt2x00dev, RT5392))
+ 		rt2800_bbp_write(rt2x00dev, 105, 0x3c);
+ 	else
+ 		rt2800_bbp_write(rt2x00dev, 105, 0x05);
+ 
+ 	if (rt2x00_rt(rt2x00dev, RT5390))
+ 		rt2800_bbp_write(rt2x00dev, 106, 0x03);
++	else if (rt2x00_rt(rt2x00dev, RT5392))
++		rt2800_bbp_write(rt2x00dev, 106, 0x12);
+ 	else
+ 		rt2800_bbp_write(rt2x00dev, 106, 0x35);
+ 
+-	if (rt2x00_rt(rt2x00dev, RT5390))
++	if (rt2x00_rt(rt2x00dev, RT5390) ||
++		rt2x00_rt(rt2x00dev, RT5392))
+ 		rt2800_bbp_write(rt2x00dev, 128, 0x12);
+ 
++	if (rt2x00_rt(rt2x00dev, RT5392)) {
++		rt2800_bbp_write(rt2x00dev, 134, 0xd0);
++		rt2800_bbp_write(rt2x00dev, 135, 0xf6);
++	}
++
+ 	if (rt2x00_rt(rt2x00dev, RT3071) ||
+ 	    rt2x00_rt(rt2x00dev, RT3090) ||
+ 	    rt2x00_rt(rt2x00dev, RT3390) ||
+ 	    rt2x00_rt(rt2x00dev, RT3572) ||
+-	    rt2x00_rt(rt2x00dev, RT5390)) {
++	    rt2x00_rt(rt2x00dev, RT5390) ||
++	    rt2x00_rt(rt2x00dev, RT5392)) {
+ 		rt2800_bbp_read(rt2x00dev, 138, &value);
+ 
+ 		rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC_CONF0, &eeprom);
+@@ -3132,7 +3166,8 @@
+ 		rt2800_bbp_write(rt2x00dev, 138, value);
+ 	}
+ 
+-	if (rt2x00_rt(rt2x00dev, RT5390)) {
++	if (rt2x00_rt(rt2x00dev, RT5390) ||
++		rt2x00_rt(rt2x00dev, RT5392)) {
+ 		int ant, div_mode;
+ 
+ 		rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC_CONF1, &eeprom);
+@@ -3258,13 +3293,15 @@
+ 	    !rt2x00_rt(rt2x00dev, RT3390) &&
+ 	    !rt2x00_rt(rt2x00dev, RT3572) &&
+ 	    !rt2x00_rt(rt2x00dev, RT5390) &&
++	    !rt2x00_rt(rt2x00dev, RT5392) &&
+ 	    !rt2800_is_305x_soc(rt2x00dev))
+ 		return 0;
+ 
+ 	/*
+ 	 * Init RF calibration.
+ 	 */
+-	if (rt2x00_rt(rt2x00dev, RT5390)) {
++	if (rt2x00_rt(rt2x00dev, RT5390) ||
++		rt2x00_rt(rt2x00dev, RT5392)) {
+ 		rt2800_rfcsr_read(rt2x00dev, 2, &rfcsr);
+ 		rt2x00_set_field8(&rfcsr, RFCSR2_RESCAL_EN, 1);
+ 		rt2800_rfcsr_write(rt2x00dev, 2, rfcsr);
+@@ -3482,6 +3519,66 @@
+ 			rt2800_rfcsr_write(rt2x00dev, 61, 0xdd);
+ 		rt2800_rfcsr_write(rt2x00dev, 62, 0x00);
+ 		rt2800_rfcsr_write(rt2x00dev, 63, 0x00);
++	}	else if (rt2x00_rt(rt2x00dev, RT5392)) {
++			rt2800_rfcsr_write(rt2x00dev, 1, 0x17);
++			rt2800_rfcsr_write(rt2x00dev, 2, 0x80);
++			rt2800_rfcsr_write(rt2x00dev, 3, 0x88);
++			rt2800_rfcsr_write(rt2x00dev, 5, 0x10);
++			rt2800_rfcsr_write(rt2x00dev, 6, 0xe0);
++			rt2800_rfcsr_write(rt2x00dev, 7, 0x00);
++			rt2800_rfcsr_write(rt2x00dev, 10, 0x53);
++			rt2800_rfcsr_write(rt2x00dev, 11, 0x4a);
++			rt2800_rfcsr_write(rt2x00dev, 12, 0x46);
++			rt2800_rfcsr_write(rt2x00dev, 13, 0x9f);
++			rt2800_rfcsr_write(rt2x00dev, 14, 0x00);
++			rt2800_rfcsr_write(rt2x00dev, 15, 0x00);
++			rt2800_rfcsr_write(rt2x00dev, 16, 0x00);
++			rt2800_rfcsr_write(rt2x00dev, 18, 0x03);
++			rt2800_rfcsr_write(rt2x00dev, 19, 0x4d);
++			rt2800_rfcsr_write(rt2x00dev, 20, 0x00);
++			rt2800_rfcsr_write(rt2x00dev, 21, 0x8d);
++			rt2800_rfcsr_write(rt2x00dev, 22, 0x20);
++			rt2800_rfcsr_write(rt2x00dev, 23, 0x0b);
++			rt2800_rfcsr_write(rt2x00dev, 24, 0x44);
++			rt2800_rfcsr_write(rt2x00dev, 25, 0x80);
++			rt2800_rfcsr_write(rt2x00dev, 26, 0x82);
++			rt2800_rfcsr_write(rt2x00dev, 27, 0x09);
++			rt2800_rfcsr_write(rt2x00dev, 28, 0x00);
++			rt2800_rfcsr_write(rt2x00dev, 29, 0x10);
++			rt2800_rfcsr_write(rt2x00dev, 30, 0x10);
++			rt2800_rfcsr_write(rt2x00dev, 31, 0x80);
++			rt2800_rfcsr_write(rt2x00dev, 32, 0x20);
++			rt2800_rfcsr_write(rt2x00dev, 33, 0xC0);
++			rt2800_rfcsr_write(rt2x00dev, 34, 0x07);
++			rt2800_rfcsr_write(rt2x00dev, 35, 0x12);
++			rt2800_rfcsr_write(rt2x00dev, 36, 0x00);
++			rt2800_rfcsr_write(rt2x00dev, 37, 0x08);
++			rt2800_rfcsr_write(rt2x00dev, 38, 0x89);
++			rt2800_rfcsr_write(rt2x00dev, 39, 0x1b);
++			rt2800_rfcsr_write(rt2x00dev, 40, 0x0f);
++			rt2800_rfcsr_write(rt2x00dev, 41, 0xbb);
++			rt2800_rfcsr_write(rt2x00dev, 42, 0xd5);
++			rt2800_rfcsr_write(rt2x00dev, 43, 0x9b);
++			rt2800_rfcsr_write(rt2x00dev, 44, 0x0e);
++			rt2800_rfcsr_write(rt2x00dev, 45, 0xa2);
++			rt2800_rfcsr_write(rt2x00dev, 46, 0x73);
++			rt2800_rfcsr_write(rt2x00dev, 47, 0x0c);
++			rt2800_rfcsr_write(rt2x00dev, 48, 0x10);
++			rt2800_rfcsr_write(rt2x00dev, 49, 0x94);
++			rt2800_rfcsr_write(rt2x00dev, 50, 0x94);
++			rt2800_rfcsr_write(rt2x00dev, 51, 0x3a);
++			rt2800_rfcsr_write(rt2x00dev, 52, 0x48);
++			rt2800_rfcsr_write(rt2x00dev, 53, 0x44);
++			rt2800_rfcsr_write(rt2x00dev, 54, 0x38);
++			rt2800_rfcsr_write(rt2x00dev, 55, 0x43);
++			rt2800_rfcsr_write(rt2x00dev, 56, 0xa1);
++			rt2800_rfcsr_write(rt2x00dev, 57, 0x00);
++			rt2800_rfcsr_write(rt2x00dev, 58, 0x39);
++			rt2800_rfcsr_write(rt2x00dev, 59, 0x07);
++			rt2800_rfcsr_write(rt2x00dev, 60, 0x45);
++			rt2800_rfcsr_write(rt2x00dev, 61, 0x91);
++			rt2800_rfcsr_write(rt2x00dev, 62, 0x39);
++			rt2800_rfcsr_write(rt2x00dev, 63, 0x07);
+ 	}
+ 
+ 	if (rt2x00_rt_rev_lt(rt2x00dev, RT3070, REV_RT3070F)) {
+@@ -3549,7 +3646,8 @@
+ 			rt2800_init_rx_filter(rt2x00dev, true, 0x27, 0x15);
+ 	}
+ 
+-	if (!rt2x00_rt(rt2x00dev, RT5390)) {
++	if (!rt2x00_rt(rt2x00dev, RT5390) &&
++		!rt2x00_rt(rt2x00dev, RT5392)) {
+ 		/*
+ 		 * Set back to initial state
+ 		 */
+@@ -3577,7 +3675,8 @@
+ 	rt2x00_set_field32(&reg, OPT_14_CSR_BIT0, 1);
+ 	rt2800_register_write(rt2x00dev, OPT_14_CSR, reg);
+ 
+-	if (!rt2x00_rt(rt2x00dev, RT5390)) {
++	if (!rt2x00_rt(rt2x00dev, RT5390) &&
++		!rt2x00_rt(rt2x00dev, RT5392)) {
+ 		rt2800_rfcsr_read(rt2x00dev, 17, &rfcsr);
+ 		rt2x00_set_field8(&rfcsr, RFCSR17_TX_LO1_EN, 0);
+ 		if (rt2x00_rt(rt2x00dev, RT3070) ||
+@@ -3645,7 +3744,8 @@
+ 		rt2800_rfcsr_write(rt2x00dev, 27, rfcsr);
+ 	}
+ 
+-	if (rt2x00_rt(rt2x00dev, RT5390)) {
++	if (rt2x00_rt(rt2x00dev, RT5390) ||
++		rt2x00_rt(rt2x00dev, RT5392)) {
+ 		rt2800_rfcsr_read(rt2x00dev, 38, &rfcsr);
+ 		rt2x00_set_field8(&rfcsr, RFCSR38_RX_LO1_EN, 0);
+ 		rt2800_rfcsr_write(rt2x00dev, 38, rfcsr);
+@@ -3929,7 +4029,8 @@
+ 	 * RT53xx: defined in "EEPROM_CHIP_ID" field
+ 	 */
+ 	rt2800_register_read(rt2x00dev, MAC_CSR0, &reg);
+-	if (rt2x00_get_field32(reg, MAC_CSR0_CHIPSET) == RT5390)
++	if (rt2x00_get_field32(reg, MAC_CSR0_CHIPSET) == RT5390 ||
++		rt2x00_get_field32(reg, MAC_CSR0_CHIPSET) == RT5392)
+ 		rt2x00_eeprom_read(rt2x00dev, EEPROM_CHIP_ID, &value);
+ 	else
+ 		value = rt2x00_get_field16(eeprom, EEPROM_NIC_CONF0_RF_TYPE);
+@@ -3947,6 +4048,7 @@
+ 	case RT3390:
+ 	case RT3572:
+ 	case RT5390:
++	case RT5392:
+ 		break;
+ 	default:
+ 		ERROR(rt2x00dev, "Invalid RT chipset detected.\n");
+@@ -3965,6 +4067,7 @@
+ 	case RF3052:
+ 	case RF3320:
+ 	case RF5370:
++	case RF5372:
+ 	case RF5390:
+ 		break;
+ 	default:
+@@ -4271,6 +4374,7 @@
+ 		   rt2x00_rf(rt2x00dev, RF3022) ||
+ 		   rt2x00_rf(rt2x00dev, RF3320) ||
+ 		   rt2x00_rf(rt2x00dev, RF5370) ||
++		   rt2x00_rf(rt2x00dev, RF5372) ||
+ 		   rt2x00_rf(rt2x00dev, RF5390)) {
+ 		spec->num_channels = 14;
+ 		spec->channels = rf_vals_3x;
+diff -Naur linux.orig/drivers/net/wireless/rt2x00/rt2800pci.c linux/drivers/net/wireless/rt2x00/rt2800pci.c
+--- linux.orig/drivers/net/wireless/rt2x00/rt2800pci.c	2012-10-27 06:39:33.000000000 +0200
++++ linux/drivers/net/wireless/rt2x00/rt2800pci.c	2014-02-24 22:56:12.744488448 +0100
+@@ -480,7 +480,8 @@
+ 
+ 	if (rt2x00_is_pcie(rt2x00dev) &&
+ 	    (rt2x00_rt(rt2x00dev, RT3572) ||
+-	     rt2x00_rt(rt2x00dev, RT5390))) {
++	     rt2x00_rt(rt2x00dev, RT5390) ||
++	     rt2x00_rt(rt2x00dev, RT5392))) {
+ 		rt2x00pci_register_read(rt2x00dev, AUX_CTRL, &reg);
+ 		rt2x00_set_field32(&reg, AUX_CTRL_FORCE_PCIE_CLK, 1);
+ 		rt2x00_set_field32(&reg, AUX_CTRL_WAKE_PCIE_EN, 1);
+diff -Naur linux.orig/drivers/net/wireless/rt2x00/rt2x00.h linux/drivers/net/wireless/rt2x00/rt2x00.h
+--- linux.orig/drivers/net/wireless/rt2x00/rt2x00.h	2012-10-27 06:39:33.000000000 +0200
++++ linux/drivers/net/wireless/rt2x00/rt2x00.h	2014-02-23 17:59:23.000000000 +0100
+@@ -192,6 +192,7 @@
+ #define RT3593		0x3593
+ #define RT3883		0x3883	/* WSOC */
+ #define RT5390		0x5390  /* 2.4GHz */
++#define RT5392          0x5392 /* 2.4GHz */
+ 
+ 	u16 rf;
+ 	u16 rev;