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support rt5370 AP mode.
[vuplus_openvuplus] / meta-bsp / common / recipes / linux / linux-vuplus-3.3.8 / rt5372_kernel_3.3.8.patch
diff --git a/meta-bsp/common/recipes/linux/linux-vuplus-3.3.8/rt5372_kernel_3.3.8.patch b/meta-bsp/common/recipes/linux/linux-vuplus-3.3.8/rt5372_kernel_3.3.8.patch
new file mode 100644 (file)
index 0000000..a655a07
--- /dev/null
+++ b/meta-bsp/common/recipes/linux/linux-vuplus-3.3.8/rt5372_kernel_3.3.8.patch
@@ -0,0 +1,387 @@
+diff -Naur linux.orig/drivers/net/wireless/rt2x00/rt2800.h linux/drivers/net/wireless/rt2x00/rt2800.h\r
+--- linux.orig/drivers/net/wireless/rt2x00/rt2800.h    2012-10-27 06:39:33.000000000 +0200\r
++++ linux/drivers/net/wireless/rt2x00/rt2800.h 2014-02-23 17:59:22.000000000 +0100\r
+@@ -68,6 +68,7 @@\r
+ #define RF3322                                0x000c\r
+ #define RF3053                                0x000d\r
+ #define RF5370                                0x5370\r
++#define RF5372                                0x5372\r
+ #define RF5390                                0x5390\r
+ \r
+ /*\r
+diff -Naur linux.orig/drivers/net/wireless/rt2x00/rt2800lib.c linux/drivers/net/wireless/rt2x00/rt2800lib.c\r
+--- linux.orig/drivers/net/wireless/rt2x00/rt2800lib.c 2012-10-27 06:39:33.000000000 +0200\r
++++ linux/drivers/net/wireless/rt2x00/rt2800lib.c      2014-02-23 17:59:21.000000000 +0100\r
+@@ -402,7 +402,8 @@\r
+ \r
+       if (rt2x00_is_pci(rt2x00dev)) {\r
+               if (rt2x00_rt(rt2x00dev, RT3572) ||\r
+-                  rt2x00_rt(rt2x00dev, RT5390)) {\r
++                  rt2x00_rt(rt2x00dev, RT5390) ||\r
++                  rt2x00_rt(rt2x00dev, RT5392)) {\r
+                       rt2800_register_read(rt2x00dev, AUX_CTRL, &reg);\r
+                       rt2x00_set_field32(&reg, AUX_CTRL_FORCE_PCIE_CLK, 1);\r
+                       rt2x00_set_field32(&reg, AUX_CTRL_WAKE_PCIE_EN, 1);\r
+@@ -1956,6 +1957,7 @@\r
+               rt2800_config_channel_rf3052(rt2x00dev, conf, rf, info);\r
+               break;\r
+       case RF5370:\r
++      case RF5372:\r
+       case RF5390:\r
+               rt2800_config_channel_rf53xx(rt2x00dev, conf, rf, info);\r
+               break;\r
+@@ -1972,7 +1974,8 @@\r
+       rt2800_bbp_write(rt2x00dev, 86, 0);\r
+ \r
+       if (rf->channel <= 14) {\r
+-              if (!rt2x00_rt(rt2x00dev, RT5390)) {\r
++              if (!rt2x00_rt(rt2x00dev, RT5390) &&\r
++                      !rt2x00_rt(rt2x00dev, RT5392)) {\r
+                       if (test_bit(CAPABILITY_EXTERNAL_LNA_BG,\r
+                                    &rt2x00dev->cap_flags)) {\r
+                               rt2800_bbp_write(rt2x00dev, 82, 0x62);\r
+@@ -2502,7 +2505,8 @@\r
+                   rt2x00_rt(rt2x00dev, RT3071) ||\r
+                   rt2x00_rt(rt2x00dev, RT3090) ||\r
+                   rt2x00_rt(rt2x00dev, RT3390) ||\r
+-                  rt2x00_rt(rt2x00dev, RT5390))\r
++                  rt2x00_rt(rt2x00dev, RT5390) ||\r
++                  rt2x00_rt(rt2x00dev, RT5392))\r
+                       return 0x1c + (2 * rt2x00dev->lna_gain);\r
+               else\r
+                       return 0x2e + rt2x00dev->lna_gain;\r
+@@ -2637,7 +2641,8 @@\r
+       } else if (rt2x00_rt(rt2x00dev, RT3572)) {\r
+               rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000400);\r
+               rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00080606);\r
+-      } else if (rt2x00_rt(rt2x00dev, RT5390)) {\r
++      } else if (rt2x00_rt(rt2x00dev, RT5390) ||\r
++                         rt2x00_rt(rt2x00dev, RT5392)) {\r
+               rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000404);\r
+               rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00080606);\r
+               rt2800_register_write(rt2x00dev, TX_SW_CFG2, 0x00000000);\r
+@@ -3013,7 +3018,8 @@\r
+                    rt2800_wait_bbp_ready(rt2x00dev)))\r
+               return -EACCES;\r
+ \r
+-      if (rt2x00_rt(rt2x00dev, RT5390)) {\r
++      if (rt2x00_rt(rt2x00dev, RT5390) ||\r
++              rt2x00_rt(rt2x00dev, RT5392)) {\r
+               rt2800_bbp_read(rt2x00dev, 4, &value);\r
+               rt2x00_set_field8(&value, BBP4_MAC_IF_CTRL, 1);\r
+               rt2800_bbp_write(rt2x00dev, 4, value);\r
+@@ -3021,19 +3027,22 @@\r
+ \r
+       if (rt2800_is_305x_soc(rt2x00dev) ||\r
+           rt2x00_rt(rt2x00dev, RT3572) ||\r
+-          rt2x00_rt(rt2x00dev, RT5390))\r
++          rt2x00_rt(rt2x00dev, RT5390) ||\r
++          rt2x00_rt(rt2x00dev, RT5392))\r
+               rt2800_bbp_write(rt2x00dev, 31, 0x08);\r
+ \r
+       rt2800_bbp_write(rt2x00dev, 65, 0x2c);\r
+       rt2800_bbp_write(rt2x00dev, 66, 0x38);\r
+ \r
+-      if (rt2x00_rt(rt2x00dev, RT5390))\r
++      if (rt2x00_rt(rt2x00dev, RT5390) ||\r
++              rt2x00_rt(rt2x00dev, RT5392))\r
+               rt2800_bbp_write(rt2x00dev, 68, 0x0b);\r
+ \r
+       if (rt2x00_rt_rev(rt2x00dev, RT2860, REV_RT2860C)) {\r
+               rt2800_bbp_write(rt2x00dev, 69, 0x16);\r
+               rt2800_bbp_write(rt2x00dev, 73, 0x12);\r
+-      } else if (rt2x00_rt(rt2x00dev, RT5390)) {\r
++      } else if (rt2x00_rt(rt2x00dev, RT5390) ||\r
++                         rt2x00_rt(rt2x00dev, RT5392)) {\r
+               rt2800_bbp_write(rt2x00dev, 69, 0x12);\r
+               rt2800_bbp_write(rt2x00dev, 73, 0x13);\r
+               rt2800_bbp_write(rt2x00dev, 75, 0x46);\r
+@@ -3051,7 +3060,8 @@\r
+           rt2x00_rt(rt2x00dev, RT3090) ||\r
+           rt2x00_rt(rt2x00dev, RT3390) ||\r
+           rt2x00_rt(rt2x00dev, RT3572) ||\r
+-          rt2x00_rt(rt2x00dev, RT5390)) {\r
++          rt2x00_rt(rt2x00dev, RT5390) ||\r
++          rt2x00_rt(rt2x00dev, RT5392)) {\r
+               rt2800_bbp_write(rt2x00dev, 79, 0x13);\r
+               rt2800_bbp_write(rt2x00dev, 80, 0x05);\r
+               rt2800_bbp_write(rt2x00dev, 81, 0x33);\r
+@@ -3063,64 +3073,88 @@\r
+       }\r
+ \r
+       rt2800_bbp_write(rt2x00dev, 82, 0x62);\r
+-      if (rt2x00_rt(rt2x00dev, RT5390))\r
++      if (rt2x00_rt(rt2x00dev, RT5390) ||\r
++              rt2x00_rt(rt2x00dev, RT5392))\r
+               rt2800_bbp_write(rt2x00dev, 83, 0x7a);\r
+       else\r
+               rt2800_bbp_write(rt2x00dev, 83, 0x6a);\r
+ \r
+       if (rt2x00_rt_rev(rt2x00dev, RT2860, REV_RT2860D))\r
+               rt2800_bbp_write(rt2x00dev, 84, 0x19);\r
+-      else if (rt2x00_rt(rt2x00dev, RT5390))\r
++      else if (rt2x00_rt(rt2x00dev, RT5390) ||\r
++                       rt2x00_rt(rt2x00dev, RT5392))\r
+               rt2800_bbp_write(rt2x00dev, 84, 0x9a);\r
+       else\r
+               rt2800_bbp_write(rt2x00dev, 84, 0x99);\r
+ \r
+-      if (rt2x00_rt(rt2x00dev, RT5390))\r
++      if (rt2x00_rt(rt2x00dev, RT5390) ||\r
++              rt2x00_rt(rt2x00dev, RT5392))\r
+               rt2800_bbp_write(rt2x00dev, 86, 0x38);\r
+       else\r
+               rt2800_bbp_write(rt2x00dev, 86, 0x00);\r
+ \r
++      if (rt2x00_rt(rt2x00dev, RT5392))\r
++              rt2800_bbp_write(rt2x00dev, 88, 0x90);\r
++\r
+       rt2800_bbp_write(rt2x00dev, 91, 0x04);\r
+ \r
+-      if (rt2x00_rt(rt2x00dev, RT5390))\r
++      if (rt2x00_rt(rt2x00dev, RT5390) ||\r
++              rt2x00_rt(rt2x00dev, RT5392))\r
+               rt2800_bbp_write(rt2x00dev, 92, 0x02);\r
+       else\r
+               rt2800_bbp_write(rt2x00dev, 92, 0x00);\r
+ \r
++      if (rt2x00_rt(rt2x00dev, RT5392)) {\r
++              rt2800_bbp_write(rt2x00dev, 95, 0x9a);\r
++              rt2800_bbp_write(rt2x00dev, 98, 0x12);\r
++      }\r
++\r
+       if (rt2x00_rt_rev_gte(rt2x00dev, RT3070, REV_RT3070F) ||\r
+           rt2x00_rt_rev_gte(rt2x00dev, RT3071, REV_RT3071E) ||\r
+           rt2x00_rt_rev_gte(rt2x00dev, RT3090, REV_RT3090E) ||\r
+           rt2x00_rt_rev_gte(rt2x00dev, RT3390, REV_RT3390E) ||\r
+           rt2x00_rt(rt2x00dev, RT3572) ||\r
+           rt2x00_rt(rt2x00dev, RT5390) ||\r
++          rt2x00_rt(rt2x00dev, RT5392) ||\r
+           rt2800_is_305x_soc(rt2x00dev))\r
+               rt2800_bbp_write(rt2x00dev, 103, 0xc0);\r
+       else\r
+               rt2800_bbp_write(rt2x00dev, 103, 0x00);\r
+ \r
+-      if (rt2x00_rt(rt2x00dev, RT5390))\r
++      if (rt2x00_rt(rt2x00dev, RT5390) ||\r
++              rt2x00_rt(rt2x00dev, RT5392))\r
+               rt2800_bbp_write(rt2x00dev, 104, 0x92);\r
+ \r
+       if (rt2800_is_305x_soc(rt2x00dev))\r
+               rt2800_bbp_write(rt2x00dev, 105, 0x01);\r
+-      else if (rt2x00_rt(rt2x00dev, RT5390))\r
++      else if (rt2x00_rt(rt2x00dev, RT5390) ||\r
++                       rt2x00_rt(rt2x00dev, RT5392))\r
+               rt2800_bbp_write(rt2x00dev, 105, 0x3c);\r
+       else\r
+               rt2800_bbp_write(rt2x00dev, 105, 0x05);\r
+ \r
+       if (rt2x00_rt(rt2x00dev, RT5390))\r
+               rt2800_bbp_write(rt2x00dev, 106, 0x03);\r
++      else if (rt2x00_rt(rt2x00dev, RT5392))\r
++              rt2800_bbp_write(rt2x00dev, 106, 0x12);\r
+       else\r
+               rt2800_bbp_write(rt2x00dev, 106, 0x35);\r
+ \r
+-      if (rt2x00_rt(rt2x00dev, RT5390))\r
++      if (rt2x00_rt(rt2x00dev, RT5390) ||\r
++              rt2x00_rt(rt2x00dev, RT5392))\r
+               rt2800_bbp_write(rt2x00dev, 128, 0x12);\r
+ \r
++      if (rt2x00_rt(rt2x00dev, RT5392)) {\r
++              rt2800_bbp_write(rt2x00dev, 134, 0xd0);\r
++              rt2800_bbp_write(rt2x00dev, 135, 0xf6);\r
++      }\r
++\r
+       if (rt2x00_rt(rt2x00dev, RT3071) ||\r
+           rt2x00_rt(rt2x00dev, RT3090) ||\r
+           rt2x00_rt(rt2x00dev, RT3390) ||\r
+           rt2x00_rt(rt2x00dev, RT3572) ||\r
+-          rt2x00_rt(rt2x00dev, RT5390)) {\r
++          rt2x00_rt(rt2x00dev, RT5390) ||\r
++          rt2x00_rt(rt2x00dev, RT5392)) {\r
+               rt2800_bbp_read(rt2x00dev, 138, &value);\r
+ \r
+               rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC_CONF0, &eeprom);\r
+@@ -3132,7 +3166,8 @@\r
+               rt2800_bbp_write(rt2x00dev, 138, value);\r
+       }\r
+ \r
+-      if (rt2x00_rt(rt2x00dev, RT5390)) {\r
++      if (rt2x00_rt(rt2x00dev, RT5390) ||\r
++              rt2x00_rt(rt2x00dev, RT5392)) {\r
+               int ant, div_mode;\r
+ \r
+               rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC_CONF1, &eeprom);\r
+@@ -3258,13 +3293,15 @@\r
+           !rt2x00_rt(rt2x00dev, RT3390) &&\r
+           !rt2x00_rt(rt2x00dev, RT3572) &&\r
+           !rt2x00_rt(rt2x00dev, RT5390) &&\r
++          !rt2x00_rt(rt2x00dev, RT5392) &&\r
+           !rt2800_is_305x_soc(rt2x00dev))\r
+               return 0;\r
+ \r
+       /*\r
+        * Init RF calibration.\r
+        */\r
+-      if (rt2x00_rt(rt2x00dev, RT5390)) {\r
++      if (rt2x00_rt(rt2x00dev, RT5390) ||\r
++              rt2x00_rt(rt2x00dev, RT5392)) {\r
+               rt2800_rfcsr_read(rt2x00dev, 2, &rfcsr);\r
+               rt2x00_set_field8(&rfcsr, RFCSR2_RESCAL_EN, 1);\r
+               rt2800_rfcsr_write(rt2x00dev, 2, rfcsr);\r
+@@ -3482,6 +3519,66 @@\r
+                       rt2800_rfcsr_write(rt2x00dev, 61, 0xdd);\r
+               rt2800_rfcsr_write(rt2x00dev, 62, 0x00);\r
+               rt2800_rfcsr_write(rt2x00dev, 63, 0x00);\r
++      }       else if (rt2x00_rt(rt2x00dev, RT5392)) {\r
++                      rt2800_rfcsr_write(rt2x00dev, 1, 0x17);\r
++                      rt2800_rfcsr_write(rt2x00dev, 2, 0x80);\r
++                      rt2800_rfcsr_write(rt2x00dev, 3, 0x88);\r
++                      rt2800_rfcsr_write(rt2x00dev, 5, 0x10);\r
++                      rt2800_rfcsr_write(rt2x00dev, 6, 0xe0);\r
++                      rt2800_rfcsr_write(rt2x00dev, 7, 0x00);\r
++                      rt2800_rfcsr_write(rt2x00dev, 10, 0x53);\r
++                      rt2800_rfcsr_write(rt2x00dev, 11, 0x4a);\r
++                      rt2800_rfcsr_write(rt2x00dev, 12, 0x46);\r
++                      rt2800_rfcsr_write(rt2x00dev, 13, 0x9f);\r
++                      rt2800_rfcsr_write(rt2x00dev, 14, 0x00);\r
++                      rt2800_rfcsr_write(rt2x00dev, 15, 0x00);\r
++                      rt2800_rfcsr_write(rt2x00dev, 16, 0x00);\r
++                      rt2800_rfcsr_write(rt2x00dev, 18, 0x03);\r
++                      rt2800_rfcsr_write(rt2x00dev, 19, 0x4d);\r
++                      rt2800_rfcsr_write(rt2x00dev, 20, 0x00);\r
++                      rt2800_rfcsr_write(rt2x00dev, 21, 0x8d);\r
++                      rt2800_rfcsr_write(rt2x00dev, 22, 0x20);\r
++                      rt2800_rfcsr_write(rt2x00dev, 23, 0x0b);\r
++                      rt2800_rfcsr_write(rt2x00dev, 24, 0x44);\r
++                      rt2800_rfcsr_write(rt2x00dev, 25, 0x80);\r
++                      rt2800_rfcsr_write(rt2x00dev, 26, 0x82);\r
++                      rt2800_rfcsr_write(rt2x00dev, 27, 0x09);\r
++                      rt2800_rfcsr_write(rt2x00dev, 28, 0x00);\r
++                      rt2800_rfcsr_write(rt2x00dev, 29, 0x10);\r
++                      rt2800_rfcsr_write(rt2x00dev, 30, 0x10);\r
++                      rt2800_rfcsr_write(rt2x00dev, 31, 0x80);\r
++                      rt2800_rfcsr_write(rt2x00dev, 32, 0x20);\r
++                      rt2800_rfcsr_write(rt2x00dev, 33, 0xC0);\r
++                      rt2800_rfcsr_write(rt2x00dev, 34, 0x07);\r
++                      rt2800_rfcsr_write(rt2x00dev, 35, 0x12);\r
++                      rt2800_rfcsr_write(rt2x00dev, 36, 0x00);\r
++                      rt2800_rfcsr_write(rt2x00dev, 37, 0x08);\r
++                      rt2800_rfcsr_write(rt2x00dev, 38, 0x89);\r
++                      rt2800_rfcsr_write(rt2x00dev, 39, 0x1b);\r
++                      rt2800_rfcsr_write(rt2x00dev, 40, 0x0f);\r
++                      rt2800_rfcsr_write(rt2x00dev, 41, 0xbb);\r
++                      rt2800_rfcsr_write(rt2x00dev, 42, 0xd5);\r
++                      rt2800_rfcsr_write(rt2x00dev, 43, 0x9b);\r
++                      rt2800_rfcsr_write(rt2x00dev, 44, 0x0e);\r
++                      rt2800_rfcsr_write(rt2x00dev, 45, 0xa2);\r
++                      rt2800_rfcsr_write(rt2x00dev, 46, 0x73);\r
++                      rt2800_rfcsr_write(rt2x00dev, 47, 0x0c);\r
++                      rt2800_rfcsr_write(rt2x00dev, 48, 0x10);\r
++                      rt2800_rfcsr_write(rt2x00dev, 49, 0x94);\r
++                      rt2800_rfcsr_write(rt2x00dev, 50, 0x94);\r
++                      rt2800_rfcsr_write(rt2x00dev, 51, 0x3a);\r
++                      rt2800_rfcsr_write(rt2x00dev, 52, 0x48);\r
++                      rt2800_rfcsr_write(rt2x00dev, 53, 0x44);\r
++                      rt2800_rfcsr_write(rt2x00dev, 54, 0x38);\r
++                      rt2800_rfcsr_write(rt2x00dev, 55, 0x43);\r
++                      rt2800_rfcsr_write(rt2x00dev, 56, 0xa1);\r
++                      rt2800_rfcsr_write(rt2x00dev, 57, 0x00);\r
++                      rt2800_rfcsr_write(rt2x00dev, 58, 0x39);\r
++                      rt2800_rfcsr_write(rt2x00dev, 59, 0x07);\r
++                      rt2800_rfcsr_write(rt2x00dev, 60, 0x45);\r
++                      rt2800_rfcsr_write(rt2x00dev, 61, 0x91);\r
++                      rt2800_rfcsr_write(rt2x00dev, 62, 0x39);\r
++                      rt2800_rfcsr_write(rt2x00dev, 63, 0x07);\r
+       }\r
+ \r
+       if (rt2x00_rt_rev_lt(rt2x00dev, RT3070, REV_RT3070F)) {\r
+@@ -3549,7 +3646,8 @@\r
+                       rt2800_init_rx_filter(rt2x00dev, true, 0x27, 0x15);\r
+       }\r
+ \r
+-      if (!rt2x00_rt(rt2x00dev, RT5390)) {\r
++      if (!rt2x00_rt(rt2x00dev, RT5390) &&\r
++              !rt2x00_rt(rt2x00dev, RT5392)) {\r
+               /*\r
+                * Set back to initial state\r
+                */\r
+@@ -3577,7 +3675,8 @@\r
+       rt2x00_set_field32(&reg, OPT_14_CSR_BIT0, 1);\r
+       rt2800_register_write(rt2x00dev, OPT_14_CSR, reg);\r
+ \r
+-      if (!rt2x00_rt(rt2x00dev, RT5390)) {\r
++      if (!rt2x00_rt(rt2x00dev, RT5390) &&\r
++              !rt2x00_rt(rt2x00dev, RT5392)) {\r
+               rt2800_rfcsr_read(rt2x00dev, 17, &rfcsr);\r
+               rt2x00_set_field8(&rfcsr, RFCSR17_TX_LO1_EN, 0);\r
+               if (rt2x00_rt(rt2x00dev, RT3070) ||\r
+@@ -3645,7 +3744,8 @@\r
+               rt2800_rfcsr_write(rt2x00dev, 27, rfcsr);\r
+       }\r
+ \r
+-      if (rt2x00_rt(rt2x00dev, RT5390)) {\r
++      if (rt2x00_rt(rt2x00dev, RT5390) ||\r
++              rt2x00_rt(rt2x00dev, RT5392)) {\r
+               rt2800_rfcsr_read(rt2x00dev, 38, &rfcsr);\r
+               rt2x00_set_field8(&rfcsr, RFCSR38_RX_LO1_EN, 0);\r
+               rt2800_rfcsr_write(rt2x00dev, 38, rfcsr);\r
+@@ -3929,7 +4029,8 @@\r
+        * RT53xx: defined in "EEPROM_CHIP_ID" field\r
+        */\r
+       rt2800_register_read(rt2x00dev, MAC_CSR0, &reg);\r
+-      if (rt2x00_get_field32(reg, MAC_CSR0_CHIPSET) == RT5390)\r
++      if (rt2x00_get_field32(reg, MAC_CSR0_CHIPSET) == RT5390 ||\r
++              rt2x00_get_field32(reg, MAC_CSR0_CHIPSET) == RT5392)\r
+               rt2x00_eeprom_read(rt2x00dev, EEPROM_CHIP_ID, &value);\r
+       else\r
+               value = rt2x00_get_field16(eeprom, EEPROM_NIC_CONF0_RF_TYPE);\r
+@@ -3947,6 +4048,7 @@\r
+       case RT3390:\r
+       case RT3572:\r
+       case RT5390:\r
++      case RT5392:\r
+               break;\r
+       default:\r
+               ERROR(rt2x00dev, "Invalid RT chipset detected.\n");\r
+@@ -3965,6 +4067,7 @@\r
+       case RF3052:\r
+       case RF3320:\r
+       case RF5370:\r
++      case RF5372:\r
+       case RF5390:\r
+               break;\r
+       default:\r
+@@ -4271,6 +4374,7 @@\r
+                  rt2x00_rf(rt2x00dev, RF3022) ||\r
+                  rt2x00_rf(rt2x00dev, RF3320) ||\r
+                  rt2x00_rf(rt2x00dev, RF5370) ||\r
++                 rt2x00_rf(rt2x00dev, RF5372) ||\r
+                  rt2x00_rf(rt2x00dev, RF5390)) {\r
+               spec->num_channels = 14;\r
+               spec->channels = rf_vals_3x;\r
+diff -Naur linux.orig/drivers/net/wireless/rt2x00/rt2800pci.c linux/drivers/net/wireless/rt2x00/rt2800pci.c\r
+--- linux.orig/drivers/net/wireless/rt2x00/rt2800pci.c 2012-10-27 06:39:33.000000000 +0200\r
++++ linux/drivers/net/wireless/rt2x00/rt2800pci.c      2014-02-24 22:56:12.744488448 +0100\r
+@@ -480,7 +480,8 @@\r
+ \r
+       if (rt2x00_is_pcie(rt2x00dev) &&\r
+           (rt2x00_rt(rt2x00dev, RT3572) ||\r
+-           rt2x00_rt(rt2x00dev, RT5390))) {\r
++           rt2x00_rt(rt2x00dev, RT5390) ||\r
++           rt2x00_rt(rt2x00dev, RT5392))) {\r
+               rt2x00pci_register_read(rt2x00dev, AUX_CTRL, &reg);\r
+               rt2x00_set_field32(&reg, AUX_CTRL_FORCE_PCIE_CLK, 1);\r
+               rt2x00_set_field32(&reg, AUX_CTRL_WAKE_PCIE_EN, 1);\r
+diff -Naur linux.orig/drivers/net/wireless/rt2x00/rt2x00.h linux/drivers/net/wireless/rt2x00/rt2x00.h\r
+--- linux.orig/drivers/net/wireless/rt2x00/rt2x00.h    2012-10-27 06:39:33.000000000 +0200\r
++++ linux/drivers/net/wireless/rt2x00/rt2x00.h 2014-02-23 17:59:23.000000000 +0100\r
+@@ -192,6 +192,7 @@\r
+ #define RT3593                0x3593\r
+ #define RT3883                0x3883  /* WSOC */\r
+ #define RT5390                0x5390  /* 2.4GHz */\r
++#define RT5392          0x5392 /* 2.4GHz */\r
+ \r
+       u16 rf;\r
+       u16 rev;\r
openvuplus 2.1 repository.