From 4574f22cde5bbe485e31f806425db1603495599c Mon Sep 17 00:00:00 2001 From: hschang Date: Fri, 14 Mar 2014 20:06:29 +0900 Subject: [PATCH 1/1] support rt5370 AP mode. - patch ralink kernel-module. - install ralink legacy/kernel module. - increase dvbapp PR. - rt3070 : fix iface name ra -> wlan. --- conf/machine/bm750.conf | 3 +- conf/machine/include/vuplus-modules.inc | 2 +- conf/machine/include/vuplus-modules2.inc | 2 +- conf/machine/vuduo2.conf | 3 +- conf/machine/vusolo.conf | 3 +- conf/machine/vusolo2.conf | 3 +- conf/machine/vuultimo.conf | 3 +- conf/machine/vuuno.conf | 3 +- recipes/enigma2/enigma2.bb | 2 +- .../linux-bm750-3.1.1/rt5372_kernel_3.1.1.patch | 437 +++++++++++++++++++++ recipes/linux/linux-bm750_3.1.1.bb | 2 +- .../linux-vuduo2-3.3.8/rt5372_kernel_3.3.8.patch | 387 ++++++++++++++++++ recipes/linux/linux-vuduo2_3.3.8.bb | 2 +- .../linux-vusolo-3.1.1/rt5372_kernel_3.1.1.patch | 437 +++++++++++++++++++++ .../linux-vusolo2-3.3.8/rt5372_kernel_3.3.8.patch | 387 ++++++++++++++++++ recipes/linux/linux-vusolo2_3.3.8.bb | 2 +- recipes/linux/linux-vusolo_3.1.1.bb | 2 +- .../linux-vuultimo-3.1.1/rt5372_kernel_3.1.1.patch | 437 +++++++++++++++++++++ recipes/linux/linux-vuultimo_3.1.1.bb | 2 +- .../linux-vuuno-3.1.1/rt5372_kernel_3.1.1.patch | 437 +++++++++++++++++++++ recipes/linux/linux-vuuno_3.1.1.bb | 2 +- .../files/change_device_name_wlan_from_ra.patch | 68 ++++ recipes/ralink/rt3070_2.5.0.3.bb | 15 +- recipes/tasks/task-boot.bb | 2 +- recipes/tasks/task-vuplus-wlan.bb | 6 +- 25 files changed, 2624 insertions(+), 25 deletions(-) create mode 100644 recipes/linux/linux-bm750-3.1.1/rt5372_kernel_3.1.1.patch create mode 100644 recipes/linux/linux-vuduo2-3.3.8/rt5372_kernel_3.3.8.patch create mode 100644 recipes/linux/linux-vusolo-3.1.1/rt5372_kernel_3.1.1.patch create mode 100644 recipes/linux/linux-vusolo2-3.3.8/rt5372_kernel_3.3.8.patch create mode 100644 recipes/linux/linux-vuultimo-3.1.1/rt5372_kernel_3.1.1.patch create mode 100644 recipes/linux/linux-vuuno-3.1.1/rt5372_kernel_3.1.1.patch create mode 100644 recipes/ralink/files/change_device_name_wlan_from_ra.patch diff --git a/conf/machine/bm750.conf b/conf/machine/bm750.conf index 64ee935..83e5aa7 100644 --- a/conf/machine/bm750.conf +++ b/conf/machine/bm750.conf @@ -45,7 +45,8 @@ MACHINE_ESSENTIAL_EXTRA_RRECOMMENDS_3.1.1 = "\ MACHINE_ESSENTIAL_EXTRA_RDEPENDS = ${@base_contains('PREFERRED_VERSION_linux-bm750', '2.6.18', '${MACHINE_ESSENTIAL_EXTRA_RDEPENDS_2.6.18}', '${MACHINE_ESSENTIAL_EXTRA_RDEPENDS_3.1.1}', d)} MACHINE_ESSENTIAL_EXTRA_RRECOMMENDS = ${@base_contains('PREFERRED_VERSION_linux-bm750', '2.6.18', '${MACHINE_ESSENTIAL_EXTRA_RRECOMMENDS_2.6.18}', '${MACHINE_ESSENTIAL_EXTRA_RRECOMMENDS_3.1.1}', d)} -MACHINE_FEATURES += "rt3070-legacy" +MACHINE_FEATURES += "ralink-legacy" +MACHINE_FEATURES += "ralink-kmod" require conf/machine/include/vuplus-modules.inc MACHINE_ESSENTIAL_EXTRA_RDEPENDS += ${@base_contains('PREFERRED_VERSION_linux-bm750', '3.1.1', '${KERNEL_WIFI_MODULES}', '', d)} diff --git a/conf/machine/include/vuplus-modules.inc b/conf/machine/include/vuplus-modules.inc index c1d4108..dbf8f8c 100644 --- a/conf/machine/include/vuplus-modules.inc +++ b/conf/machine/include/vuplus-modules.inc @@ -22,7 +22,7 @@ KERNEL_WIFI_MODULES = " \ kernel-module-r8712u \ kernel-module-w35und \ kernel-module-zd1211rw \ - ${@base_contains("MACHINE_FEATURES", "rt3070-legacy", "", "kernel-module-rt2800usb", d)} \ + ${@base_contains("MACHINE_FEATURES", "ralink-kmod", "kernel-module-rt2800usb", " ", d)} \ kernel-module-llc \ kernel-module-stp \ kernel-module-bridge \ diff --git a/conf/machine/include/vuplus-modules2.inc b/conf/machine/include/vuplus-modules2.inc index 4f3246f..603aa68 100644 --- a/conf/machine/include/vuplus-modules2.inc +++ b/conf/machine/include/vuplus-modules2.inc @@ -21,7 +21,7 @@ KERNEL_WIFI_MODULES = " \ kernel-module-r8712u \ kernel-module-w35und \ kernel-module-zd1211rw \ - ${@base_contains("MACHINE_FEATURES", "rt3070-legacy", "", "kernel-module-rt2800usb", d)} \ + ${@base_contains("MACHINE_FEATURES", "ralink-kmod", "kernel-module-rt2800usb", " ", d)} \ kernel-module-llc \ kernel-module-stp \ kernel-module-bridge \ diff --git a/conf/machine/vuduo2.conf b/conf/machine/vuduo2.conf index a69b305..1482061 100644 --- a/conf/machine/vuduo2.conf +++ b/conf/machine/vuduo2.conf @@ -15,7 +15,8 @@ MACHINE_ESSENTIAL_EXTRA_RRECOMMENDS = "\ kernel-module-ext2 \ " -MACHINE_FEATURES += "rt3070-legacy" +MACHINE_FEATURES += "ralink-legacy" +MACHINE_FEATURES += "ralink-kmod" require conf/machine/include/vuplus-modules2.inc MACHINE_ESSENTIAL_EXTRA_RDEPENDS += ${@base_contains('PREFERRED_VERSION_linux-vuduo2', '3.3.8', '${KERNEL_WIFI_MODULES}', '', d)} diff --git a/conf/machine/vusolo.conf b/conf/machine/vusolo.conf index b1638fa..822cd7c 100644 --- a/conf/machine/vusolo.conf +++ b/conf/machine/vusolo.conf @@ -45,7 +45,8 @@ MACHINE_ESSENTIAL_EXTRA_RRECOMMENDS_3.1.1 = "\ MACHINE_ESSENTIAL_EXTRA_RDEPENDS = ${@base_contains('PREFERRED_VERSION_linux-vusolo', '2.6.18', '${MACHINE_ESSENTIAL_EXTRA_RDEPENDS_2.6.18}', '${MACHINE_ESSENTIAL_EXTRA_RDEPENDS_3.1.1}', d)} MACHINE_ESSENTIAL_EXTRA_RRECOMMENDS = ${@base_contains('PREFERRED_VERSION_linux-vusolo', '2.6.18', '${MACHINE_ESSENTIAL_EXTRA_RRECOMMENDS_2.6.18}', '${MACHINE_ESSENTIAL_EXTRA_RRECOMMENDS_3.1.1}', d)} -MACHINE_FEATURES += "rt3070-legacy" +MACHINE_FEATURES += "ralink-legacy" +MACHINE_FEATURES += "ralink-kmod" require conf/machine/include/vuplus-modules.inc MACHINE_ESSENTIAL_EXTRA_RDEPENDS += ${@base_contains('PREFERRED_VERSION_linux-vusolo', '3.1.1', '${KERNEL_WIFI_MODULES}', '', d)} diff --git a/conf/machine/vusolo2.conf b/conf/machine/vusolo2.conf index eb9d674..d3d6299 100644 --- a/conf/machine/vusolo2.conf +++ b/conf/machine/vusolo2.conf @@ -15,7 +15,8 @@ MACHINE_ESSENTIAL_EXTRA_RRECOMMENDS = "\ kernel-module-ext2 \ " -MACHINE_FEATURES += "rt3070-legacy" +MACHINE_FEATURES += "ralink-legacy" +MACHINE_FEATURES += "ralink-kmod" require conf/machine/include/vuplus-modules2.inc MACHINE_ESSENTIAL_EXTRA_RDEPENDS += ${@base_contains('PREFERRED_VERSION_linux-vusolo2', '3.3.8', '${KERNEL_WIFI_MODULES}', '', d)} diff --git a/conf/machine/vuultimo.conf b/conf/machine/vuultimo.conf index 8b57ae5..308a0c1 100644 --- a/conf/machine/vuultimo.conf +++ b/conf/machine/vuultimo.conf @@ -43,7 +43,8 @@ MACHINE_ESSENTIAL_EXTRA_RRECOMMENDS_3.1.1 = "\ MACHINE_ESSENTIAL_EXTRA_RDEPENDS = ${@base_contains('PREFERRED_VERSION_linux-vuultimo', '2.6.18', '${MACHINE_ESSENTIAL_EXTRA_RDEPENDS_2.6.18}', '${MACHINE_ESSENTIAL_EXTRA_RDEPENDS_3.1.1}', d)} MACHINE_ESSENTIAL_EXTRA_RRECOMMENDS = ${@base_contains('PREFERRED_VERSION_linux-vuultimo', '2.6.18', '${MACHINE_ESSENTIAL_EXTRA_RRECOMMENDS_2.6.18}', '${MACHINE_ESSENTIAL_EXTRA_RRECOMMENDS_3.1.1}', d)} -MACHINE_FEATURES += "rt3070-legacy" +MACHINE_FEATURES += "ralink-legacy" +MACHINE_FEATURES += "ralink-kmod" require conf/machine/include/vuplus-modules.inc MACHINE_ESSENTIAL_EXTRA_RDEPENDS += ${@base_contains('PREFERRED_VERSION_linux-vuultimo', '3.1.1', '${KERNEL_WIFI_MODULES}', '', d)} diff --git a/conf/machine/vuuno.conf b/conf/machine/vuuno.conf index 4a41493..4aef9bc 100644 --- a/conf/machine/vuuno.conf +++ b/conf/machine/vuuno.conf @@ -44,7 +44,8 @@ MACHINE_ESSENTIAL_EXTRA_RRECOMMENDS_3.1.1 = "\ MACHINE_ESSENTIAL_EXTRA_RDEPENDS = ${@base_contains('PREFERRED_VERSION_linux-vuuno', '2.6.18', '${MACHINE_ESSENTIAL_EXTRA_RDEPENDS_2.6.18}', '${MACHINE_ESSENTIAL_EXTRA_RDEPENDS_3.1.1}', d)} MACHINE_ESSENTIAL_EXTRA_RRECOMMENDS = ${@base_contains('PREFERRED_VERSION_linux-vuuno', '2.6.18', '${MACHINE_ESSENTIAL_EXTRA_RRECOMMENDS_2.6.18}', '${MACHINE_ESSENTIAL_EXTRA_RRECOMMENDS_3.1.1}', d)} -MACHINE_FEATURES += "rt3070-legacy" +MACHINE_FEATURES += "ralink-legacy" +MACHINE_FEATURES += "ralink-kmod" require conf/machine/include/vuplus-modules.inc MACHINE_ESSENTIAL_EXTRA_RDEPENDS += ${@base_contains('PREFERRED_VERSION_linux-vuuno', '3.1.1', '${KERNEL_WIFI_MODULES}', '', d)} diff --git a/recipes/enigma2/enigma2.bb b/recipes/enigma2/enigma2.bb index 2f27fd7..75fb574 100644 --- a/recipes/enigma2/enigma2.bb +++ b/recipes/enigma2/enigma2.bb @@ -79,7 +79,7 @@ RDEPENDS_enigma2-plugin-systemplugins-devicemanager = "util-linux-ng-blkid ntfs- RDEPENDS_enigma2-plugin-systemplugins-netdrive = "curlftpfs kernel-module-fuse libfuse2" PN = "enigma2" -PR = "r122" +PR = "r123" SRCDATE = "20110922" SRCREV = "5e19a3f8a5e8ce8a4e2cb2b601a1b8ef3554e4be" diff --git a/recipes/linux/linux-bm750-3.1.1/rt5372_kernel_3.1.1.patch b/recipes/linux/linux-bm750-3.1.1/rt5372_kernel_3.1.1.patch new file mode 100644 index 0000000..d70c5c6 --- /dev/null +++ b/recipes/linux/linux-bm750-3.1.1/rt5372_kernel_3.1.1.patch @@ -0,0 +1,437 @@ +diff -Naur linux.orig/drivers/net/wireless/rt2x00/rt2800.h linux/drivers/net/wireless/rt2x00/rt2800.h +--- linux.orig/drivers/net/wireless/rt2x00/rt2800.h 2011-11-11 21:19:27.000000000 +0100 ++++ linux/drivers/net/wireless/rt2x00/rt2800.h 2014-02-23 20:21:13.000000000 +0100 +@@ -68,6 +68,7 @@ + #define RF3322 0x000c + #define RF3853 0x000d + #define RF5370 0x5370 ++#define RF5372 0x5372 + #define RF5390 0x5390 + + /* +diff -Naur linux.orig/drivers/net/wireless/rt2x00/rt2800lib.c linux/drivers/net/wireless/rt2x00/rt2800lib.c +--- linux.orig/drivers/net/wireless/rt2x00/rt2800lib.c 2011-11-11 21:19:27.000000000 +0100 ++++ linux/drivers/net/wireless/rt2x00/rt2800lib.c 2014-02-23 20:25:27.000000000 +0100 +@@ -402,7 +402,8 @@ + + if (rt2x00_is_pci(rt2x00dev)) { + if (rt2x00_rt(rt2x00dev, RT3572) || +- rt2x00_rt(rt2x00dev, RT5390)) { ++ rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) { + rt2800_register_read(rt2x00dev, AUX_CTRL, ®); + rt2x00_set_field32(®, AUX_CTRL_FORCE_PCIE_CLK, 1); + rt2x00_set_field32(®, AUX_CTRL_WAKE_PCIE_EN, 1); +@@ -1128,8 +1129,10 @@ + !(filter_flags & FIF_CONTROL)); + rt2x00_set_field32(®, RX_FILTER_CFG_DROP_PSPOLL, + !(filter_flags & FIF_PSPOLL)); +- rt2x00_set_field32(®, RX_FILTER_CFG_DROP_BA, 1); +- rt2x00_set_field32(®, RX_FILTER_CFG_DROP_BAR, 0); ++ rt2x00_set_field32(®, RX_FILTER_CFG_DROP_BA, ++ !(filter_flags & FIF_CONTROL)); ++ rt2x00_set_field32(®, RX_FILTER_CFG_DROP_BAR, ++ !(filter_flags & FIF_CONTROL)); + rt2x00_set_field32(®, RX_FILTER_CFG_DROP_CNTL, + !(filter_flags & FIF_CONTROL)); + rt2800_register_write(rt2x00dev, RX_FILTER_CFG, reg); +@@ -1867,19 +1870,25 @@ + info->default_power2 = TXPOWER_A_TO_DEV(info->default_power2); + } + +- if (rt2x00_rf(rt2x00dev, RF2020) || +- rt2x00_rf(rt2x00dev, RF3020) || +- rt2x00_rf(rt2x00dev, RF3021) || +- rt2x00_rf(rt2x00dev, RF3022) || +- rt2x00_rf(rt2x00dev, RF3320)) ++ switch (rt2x00dev->chip.rf) { ++ case RF2020: ++ case RF3020: ++ case RF3021: ++ case RF3022: ++ case RF3320: + rt2800_config_channel_rf3xxx(rt2x00dev, conf, rf, info); +- else if (rt2x00_rf(rt2x00dev, RF3052)) ++ break; ++ case RF3052: + rt2800_config_channel_rf3052(rt2x00dev, conf, rf, info); +- else if (rt2x00_rf(rt2x00dev, RF5370) || +- rt2x00_rf(rt2x00dev, RF5390)) ++ break; ++ case RF5370: ++ case RF5372: ++ case RF5390: + rt2800_config_channel_rf53xx(rt2x00dev, conf, rf, info); +- else ++ break; ++ default: + rt2800_config_channel_rf2xxx(rt2x00dev, conf, rf, info); ++ } + + /* + * Change BBP settings +@@ -1890,7 +1899,8 @@ + rt2800_bbp_write(rt2x00dev, 86, 0); + + if (rf->channel <= 14) { +- if (!rt2x00_rt(rt2x00dev, RT5390)) { ++ if (!rt2x00_rt(rt2x00dev, RT5390) && ++ !rt2x00_rt(rt2x00dev, RT5392)) { + if (test_bit(CAPABILITY_EXTERNAL_LNA_BG, + &rt2x00dev->cap_flags)) { + rt2800_bbp_write(rt2x00dev, 82, 0x62); +@@ -2420,7 +2430,8 @@ + rt2x00_rt(rt2x00dev, RT3071) || + rt2x00_rt(rt2x00dev, RT3090) || + rt2x00_rt(rt2x00dev, RT3390) || +- rt2x00_rt(rt2x00dev, RT5390)) ++ rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) + return 0x1c + (2 * rt2x00dev->lna_gain); + else + return 0x2e + rt2x00dev->lna_gain; +@@ -2555,7 +2566,8 @@ + } else if (rt2x00_rt(rt2x00dev, RT3572)) { + rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000400); + rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00080606); +- } else if (rt2x00_rt(rt2x00dev, RT5390)) { ++ } else if (rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) { + rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000404); + rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00080606); + rt2800_register_write(rt2x00dev, TX_SW_CFG2, 0x00000000); +@@ -2934,7 +2946,8 @@ + rt2800_wait_bbp_ready(rt2x00dev))) + return -EACCES; + +- if (rt2x00_rt(rt2x00dev, RT5390)) { ++ if (rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) { + rt2800_bbp_read(rt2x00dev, 4, &value); + rt2x00_set_field8(&value, BBP4_MAC_IF_CTRL, 1); + rt2800_bbp_write(rt2x00dev, 4, value); +@@ -2942,19 +2955,22 @@ + + if (rt2800_is_305x_soc(rt2x00dev) || + rt2x00_rt(rt2x00dev, RT3572) || +- rt2x00_rt(rt2x00dev, RT5390)) ++ rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) + rt2800_bbp_write(rt2x00dev, 31, 0x08); + + rt2800_bbp_write(rt2x00dev, 65, 0x2c); + rt2800_bbp_write(rt2x00dev, 66, 0x38); + +- if (rt2x00_rt(rt2x00dev, RT5390)) ++ if (rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) + rt2800_bbp_write(rt2x00dev, 68, 0x0b); + + if (rt2x00_rt_rev(rt2x00dev, RT2860, REV_RT2860C)) { + rt2800_bbp_write(rt2x00dev, 69, 0x16); + rt2800_bbp_write(rt2x00dev, 73, 0x12); +- } else if (rt2x00_rt(rt2x00dev, RT5390)) { ++ } else if (rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) { + rt2800_bbp_write(rt2x00dev, 69, 0x12); + rt2800_bbp_write(rt2x00dev, 73, 0x13); + rt2800_bbp_write(rt2x00dev, 75, 0x46); +@@ -2972,7 +2988,8 @@ + rt2x00_rt(rt2x00dev, RT3090) || + rt2x00_rt(rt2x00dev, RT3390) || + rt2x00_rt(rt2x00dev, RT3572) || +- rt2x00_rt(rt2x00dev, RT5390)) { ++ rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) { + rt2800_bbp_write(rt2x00dev, 79, 0x13); + rt2800_bbp_write(rt2x00dev, 80, 0x05); + rt2800_bbp_write(rt2x00dev, 81, 0x33); +@@ -2984,64 +3001,88 @@ + } + + rt2800_bbp_write(rt2x00dev, 82, 0x62); +- if (rt2x00_rt(rt2x00dev, RT5390)) ++ if (rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) + rt2800_bbp_write(rt2x00dev, 83, 0x7a); + else + rt2800_bbp_write(rt2x00dev, 83, 0x6a); + + if (rt2x00_rt_rev(rt2x00dev, RT2860, REV_RT2860D)) + rt2800_bbp_write(rt2x00dev, 84, 0x19); +- else if (rt2x00_rt(rt2x00dev, RT5390)) ++ else if (rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) + rt2800_bbp_write(rt2x00dev, 84, 0x9a); + else + rt2800_bbp_write(rt2x00dev, 84, 0x99); + +- if (rt2x00_rt(rt2x00dev, RT5390)) ++ if (rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) + rt2800_bbp_write(rt2x00dev, 86, 0x38); + else + rt2800_bbp_write(rt2x00dev, 86, 0x00); + ++ if (rt2x00_rt(rt2x00dev, RT5392)) ++ rt2800_bbp_write(rt2x00dev, 88, 0x90); ++ + rt2800_bbp_write(rt2x00dev, 91, 0x04); + +- if (rt2x00_rt(rt2x00dev, RT5390)) ++ if (rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) + rt2800_bbp_write(rt2x00dev, 92, 0x02); + else + rt2800_bbp_write(rt2x00dev, 92, 0x00); + ++ if (rt2x00_rt(rt2x00dev, RT5392)) { ++ rt2800_bbp_write(rt2x00dev, 95, 0x9a); ++ rt2800_bbp_write(rt2x00dev, 98, 0x12); ++ } ++ + if (rt2x00_rt_rev_gte(rt2x00dev, RT3070, REV_RT3070F) || + rt2x00_rt_rev_gte(rt2x00dev, RT3071, REV_RT3071E) || + rt2x00_rt_rev_gte(rt2x00dev, RT3090, REV_RT3090E) || + rt2x00_rt_rev_gte(rt2x00dev, RT3390, REV_RT3390E) || + rt2x00_rt(rt2x00dev, RT3572) || + rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392) || + rt2800_is_305x_soc(rt2x00dev)) + rt2800_bbp_write(rt2x00dev, 103, 0xc0); + else + rt2800_bbp_write(rt2x00dev, 103, 0x00); + +- if (rt2x00_rt(rt2x00dev, RT5390)) ++ if (rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) + rt2800_bbp_write(rt2x00dev, 104, 0x92); + + if (rt2800_is_305x_soc(rt2x00dev)) + rt2800_bbp_write(rt2x00dev, 105, 0x01); +- else if (rt2x00_rt(rt2x00dev, RT5390)) ++ else if (rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) + rt2800_bbp_write(rt2x00dev, 105, 0x3c); + else + rt2800_bbp_write(rt2x00dev, 105, 0x05); + + if (rt2x00_rt(rt2x00dev, RT5390)) + rt2800_bbp_write(rt2x00dev, 106, 0x03); ++ else if (rt2x00_rt(rt2x00dev, RT5392)) ++ rt2800_bbp_write(rt2x00dev, 106, 0x12); + else + rt2800_bbp_write(rt2x00dev, 106, 0x35); + +- if (rt2x00_rt(rt2x00dev, RT5390)) ++ if (rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) + rt2800_bbp_write(rt2x00dev, 128, 0x12); + ++ if (rt2x00_rt(rt2x00dev, RT5392)) { ++ rt2800_bbp_write(rt2x00dev, 134, 0xd0); ++ rt2800_bbp_write(rt2x00dev, 135, 0xf6); ++ } ++ + if (rt2x00_rt(rt2x00dev, RT3071) || + rt2x00_rt(rt2x00dev, RT3090) || + rt2x00_rt(rt2x00dev, RT3390) || + rt2x00_rt(rt2x00dev, RT3572) || +- rt2x00_rt(rt2x00dev, RT5390)) { ++ rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) { + rt2800_bbp_read(rt2x00dev, 138, &value); + + rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC_CONF0, &eeprom); +@@ -3053,7 +3094,8 @@ + rt2800_bbp_write(rt2x00dev, 138, value); + } + +- if (rt2x00_rt(rt2x00dev, RT5390)) { ++ if (rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) { + int ant, div_mode; + + rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC_CONF1, &eeprom); +@@ -3179,13 +3221,15 @@ + !rt2x00_rt(rt2x00dev, RT3390) && + !rt2x00_rt(rt2x00dev, RT3572) && + !rt2x00_rt(rt2x00dev, RT5390) && ++ !rt2x00_rt(rt2x00dev, RT5392) && + !rt2800_is_305x_soc(rt2x00dev)) + return 0; + + /* + * Init RF calibration. + */ +- if (rt2x00_rt(rt2x00dev, RT5390)) { ++ if (rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) { + rt2800_rfcsr_read(rt2x00dev, 2, &rfcsr); + rt2x00_set_field8(&rfcsr, RFCSR2_RESCAL_EN, 1); + rt2800_rfcsr_write(rt2x00dev, 2, rfcsr); +@@ -3403,6 +3447,66 @@ + rt2800_rfcsr_write(rt2x00dev, 61, 0xdd); + rt2800_rfcsr_write(rt2x00dev, 62, 0x00); + rt2800_rfcsr_write(rt2x00dev, 63, 0x00); ++ } else if (rt2x00_rt(rt2x00dev, RT5392)) { ++ rt2800_rfcsr_write(rt2x00dev, 1, 0x17); ++ rt2800_rfcsr_write(rt2x00dev, 2, 0x80); ++ rt2800_rfcsr_write(rt2x00dev, 3, 0x88); ++ rt2800_rfcsr_write(rt2x00dev, 5, 0x10); ++ rt2800_rfcsr_write(rt2x00dev, 6, 0xe0); ++ rt2800_rfcsr_write(rt2x00dev, 7, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 10, 0x53); ++ rt2800_rfcsr_write(rt2x00dev, 11, 0x4a); ++ rt2800_rfcsr_write(rt2x00dev, 12, 0x46); ++ rt2800_rfcsr_write(rt2x00dev, 13, 0x9f); ++ rt2800_rfcsr_write(rt2x00dev, 14, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 15, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 16, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 18, 0x03); ++ rt2800_rfcsr_write(rt2x00dev, 19, 0x4d); ++ rt2800_rfcsr_write(rt2x00dev, 20, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 21, 0x8d); ++ rt2800_rfcsr_write(rt2x00dev, 22, 0x20); ++ rt2800_rfcsr_write(rt2x00dev, 23, 0x0b); ++ rt2800_rfcsr_write(rt2x00dev, 24, 0x44); ++ rt2800_rfcsr_write(rt2x00dev, 25, 0x80); ++ rt2800_rfcsr_write(rt2x00dev, 26, 0x82); ++ rt2800_rfcsr_write(rt2x00dev, 27, 0x09); ++ rt2800_rfcsr_write(rt2x00dev, 28, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 29, 0x10); ++ rt2800_rfcsr_write(rt2x00dev, 30, 0x10); ++ rt2800_rfcsr_write(rt2x00dev, 31, 0x80); ++ rt2800_rfcsr_write(rt2x00dev, 32, 0x20); ++ rt2800_rfcsr_write(rt2x00dev, 33, 0xC0); ++ rt2800_rfcsr_write(rt2x00dev, 34, 0x07); ++ rt2800_rfcsr_write(rt2x00dev, 35, 0x12); ++ rt2800_rfcsr_write(rt2x00dev, 36, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 37, 0x08); ++ rt2800_rfcsr_write(rt2x00dev, 38, 0x89); ++ rt2800_rfcsr_write(rt2x00dev, 39, 0x1b); ++ rt2800_rfcsr_write(rt2x00dev, 40, 0x0f); ++ rt2800_rfcsr_write(rt2x00dev, 41, 0xbb); ++ rt2800_rfcsr_write(rt2x00dev, 42, 0xd5); ++ rt2800_rfcsr_write(rt2x00dev, 43, 0x9b); ++ rt2800_rfcsr_write(rt2x00dev, 44, 0x0e); ++ rt2800_rfcsr_write(rt2x00dev, 45, 0xa2); ++ rt2800_rfcsr_write(rt2x00dev, 46, 0x73); ++ rt2800_rfcsr_write(rt2x00dev, 47, 0x0c); ++ rt2800_rfcsr_write(rt2x00dev, 48, 0x10); ++ rt2800_rfcsr_write(rt2x00dev, 49, 0x94); ++ rt2800_rfcsr_write(rt2x00dev, 50, 0x94); ++ rt2800_rfcsr_write(rt2x00dev, 51, 0x3a); ++ rt2800_rfcsr_write(rt2x00dev, 52, 0x48); ++ rt2800_rfcsr_write(rt2x00dev, 53, 0x44); ++ rt2800_rfcsr_write(rt2x00dev, 54, 0x38); ++ rt2800_rfcsr_write(rt2x00dev, 55, 0x43); ++ rt2800_rfcsr_write(rt2x00dev, 56, 0xa1); ++ rt2800_rfcsr_write(rt2x00dev, 57, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 58, 0x39); ++ rt2800_rfcsr_write(rt2x00dev, 59, 0x07); ++ rt2800_rfcsr_write(rt2x00dev, 60, 0x45); ++ rt2800_rfcsr_write(rt2x00dev, 61, 0x91); ++ rt2800_rfcsr_write(rt2x00dev, 62, 0x39); ++ rt2800_rfcsr_write(rt2x00dev, 63, 0x07); + } + + if (rt2x00_rt_rev_lt(rt2x00dev, RT3070, REV_RT3070F)) { +@@ -3470,7 +3574,8 @@ + rt2800_init_rx_filter(rt2x00dev, true, 0x27, 0x15); + } + +- if (!rt2x00_rt(rt2x00dev, RT5390)) { ++ if (!rt2x00_rt(rt2x00dev, RT5390) && ++ !rt2x00_rt(rt2x00dev, RT5392)) { + /* + * Set back to initial state + */ +@@ -3498,7 +3603,8 @@ + rt2x00_set_field32(®, OPT_14_CSR_BIT0, 1); + rt2800_register_write(rt2x00dev, OPT_14_CSR, reg); + +- if (!rt2x00_rt(rt2x00dev, RT5390)) { ++ if (!rt2x00_rt(rt2x00dev, RT5390) && ++ !rt2x00_rt(rt2x00dev, RT5392)) { + rt2800_rfcsr_read(rt2x00dev, 17, &rfcsr); + rt2x00_set_field8(&rfcsr, RFCSR17_TX_LO1_EN, 0); + if (rt2x00_rt(rt2x00dev, RT3070) || +@@ -3566,7 +3672,8 @@ + rt2800_rfcsr_write(rt2x00dev, 27, rfcsr); + } + +- if (rt2x00_rt(rt2x00dev, RT5390)) { ++ if (rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) { + rt2800_rfcsr_read(rt2x00dev, 38, &rfcsr); + rt2x00_set_field8(&rfcsr, RFCSR38_RX_LO1_EN, 0); + rt2800_rfcsr_write(rt2x00dev, 38, rfcsr); +@@ -3850,7 +3957,8 @@ + * RT53xx: defined in "EEPROM_CHIP_ID" field + */ + rt2800_register_read(rt2x00dev, MAC_CSR0, ®); +- if (rt2x00_get_field32(reg, MAC_CSR0_CHIPSET) == RT5390) ++ if (rt2x00_get_field32(reg, MAC_CSR0_CHIPSET) == RT5390 || ++ rt2x00_get_field32(reg, MAC_CSR0_CHIPSET) == RT5392) + rt2x00_eeprom_read(rt2x00dev, EEPROM_CHIP_ID, &value); + else + value = rt2x00_get_field16(eeprom, EEPROM_NIC_CONF0_RF_TYPE); +@@ -3858,15 +3966,19 @@ + rt2x00_set_chip(rt2x00dev, rt2x00_get_field32(reg, MAC_CSR0_CHIPSET), + value, rt2x00_get_field32(reg, MAC_CSR0_REVISION)); + +- if (!rt2x00_rt(rt2x00dev, RT2860) && +- !rt2x00_rt(rt2x00dev, RT2872) && +- !rt2x00_rt(rt2x00dev, RT2883) && +- !rt2x00_rt(rt2x00dev, RT3070) && +- !rt2x00_rt(rt2x00dev, RT3071) && +- !rt2x00_rt(rt2x00dev, RT3090) && +- !rt2x00_rt(rt2x00dev, RT3390) && +- !rt2x00_rt(rt2x00dev, RT3572) && +- !rt2x00_rt(rt2x00dev, RT5390)) { ++ switch (rt2x00dev->chip.rt) { ++ case RT2860: ++ case RT2872: ++ case RT2883: ++ case RT3070: ++ case RT3071: ++ case RT3090: ++ case RT3390: ++ case RT3572: ++ case RT5390: ++ case RT5392: ++ break; ++ default: + ERROR(rt2x00dev, "Invalid RT chipset detected.\n"); + return -ENODEV; + } +@@ -3883,6 +3995,7 @@ + case RF3052: + case RF3320: + case RF5370: ++ case RF5372: + case RF5390: + break; + default: +@@ -4189,6 +4302,7 @@ + rt2x00_rf(rt2x00dev, RF3022) || + rt2x00_rf(rt2x00dev, RF3320) || + rt2x00_rf(rt2x00dev, RF5370) || ++ rt2x00_rf(rt2x00dev, RF5372) || + rt2x00_rf(rt2x00dev, RF5390)) { + spec->num_channels = 14; + spec->channels = rf_vals_3x; +diff -Naur linux.orig/drivers/net/wireless/rt2x00/rt2x00.h linux/drivers/net/wireless/rt2x00/rt2x00.h +--- linux.orig/drivers/net/wireless/rt2x00/rt2x00.h 2011-11-11 21:19:27.000000000 +0100 ++++ linux/drivers/net/wireless/rt2x00/rt2x00.h 2014-02-23 20:20:33.000000000 +0100 +@@ -191,7 +191,8 @@ + #define RT3572 0x3572 + #define RT3593 0x3593 /* PCIe */ + #define RT3883 0x3883 /* WSOC */ +-#define RT5390 0x5390 /* 2.4GHz */ ++#define RT5390 0x5390 /* 2.4GHz */ ++#define RT5392 0x5392 /* 2.4GHz */ + + u16 rf; + u16 rev; diff --git a/recipes/linux/linux-bm750_3.1.1.bb b/recipes/linux/linux-bm750_3.1.1.bb index e41eb48..7fac5ea 100644 --- a/recipes/linux/linux-bm750_3.1.1.bb +++ b/recipes/linux/linux-bm750_3.1.1.bb @@ -1,6 +1,6 @@ require linux-vuplus-3.1.1.inc -PR = "r11" +PR = "r12" SRC_URI += "\ file://linux_3.1.1_bm750.patch;patch=1;pnum=1 \ diff --git a/recipes/linux/linux-vuduo2-3.3.8/rt5372_kernel_3.3.8.patch b/recipes/linux/linux-vuduo2-3.3.8/rt5372_kernel_3.3.8.patch new file mode 100644 index 0000000..a655a07 --- /dev/null +++ b/recipes/linux/linux-vuduo2-3.3.8/rt5372_kernel_3.3.8.patch @@ -0,0 +1,387 @@ +diff -Naur linux.orig/drivers/net/wireless/rt2x00/rt2800.h linux/drivers/net/wireless/rt2x00/rt2800.h +--- linux.orig/drivers/net/wireless/rt2x00/rt2800.h 2012-10-27 06:39:33.000000000 +0200 ++++ linux/drivers/net/wireless/rt2x00/rt2800.h 2014-02-23 17:59:22.000000000 +0100 +@@ -68,6 +68,7 @@ + #define RF3322 0x000c + #define RF3053 0x000d + #define RF5370 0x5370 ++#define RF5372 0x5372 + #define RF5390 0x5390 + + /* +diff -Naur linux.orig/drivers/net/wireless/rt2x00/rt2800lib.c linux/drivers/net/wireless/rt2x00/rt2800lib.c +--- linux.orig/drivers/net/wireless/rt2x00/rt2800lib.c 2012-10-27 06:39:33.000000000 +0200 ++++ linux/drivers/net/wireless/rt2x00/rt2800lib.c 2014-02-23 17:59:21.000000000 +0100 +@@ -402,7 +402,8 @@ + + if (rt2x00_is_pci(rt2x00dev)) { + if (rt2x00_rt(rt2x00dev, RT3572) || +- rt2x00_rt(rt2x00dev, RT5390)) { ++ rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) { + rt2800_register_read(rt2x00dev, AUX_CTRL, ®); + rt2x00_set_field32(®, AUX_CTRL_FORCE_PCIE_CLK, 1); + rt2x00_set_field32(®, AUX_CTRL_WAKE_PCIE_EN, 1); +@@ -1956,6 +1957,7 @@ + rt2800_config_channel_rf3052(rt2x00dev, conf, rf, info); + break; + case RF5370: ++ case RF5372: + case RF5390: + rt2800_config_channel_rf53xx(rt2x00dev, conf, rf, info); + break; +@@ -1972,7 +1974,8 @@ + rt2800_bbp_write(rt2x00dev, 86, 0); + + if (rf->channel <= 14) { +- if (!rt2x00_rt(rt2x00dev, RT5390)) { ++ if (!rt2x00_rt(rt2x00dev, RT5390) && ++ !rt2x00_rt(rt2x00dev, RT5392)) { + if (test_bit(CAPABILITY_EXTERNAL_LNA_BG, + &rt2x00dev->cap_flags)) { + rt2800_bbp_write(rt2x00dev, 82, 0x62); +@@ -2502,7 +2505,8 @@ + rt2x00_rt(rt2x00dev, RT3071) || + rt2x00_rt(rt2x00dev, RT3090) || + rt2x00_rt(rt2x00dev, RT3390) || +- rt2x00_rt(rt2x00dev, RT5390)) ++ rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) + return 0x1c + (2 * rt2x00dev->lna_gain); + else + return 0x2e + rt2x00dev->lna_gain; +@@ -2637,7 +2641,8 @@ + } else if (rt2x00_rt(rt2x00dev, RT3572)) { + rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000400); + rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00080606); +- } else if (rt2x00_rt(rt2x00dev, RT5390)) { ++ } else if (rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) { + rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000404); + rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00080606); + rt2800_register_write(rt2x00dev, TX_SW_CFG2, 0x00000000); +@@ -3013,7 +3018,8 @@ + rt2800_wait_bbp_ready(rt2x00dev))) + return -EACCES; + +- if (rt2x00_rt(rt2x00dev, RT5390)) { ++ if (rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) { + rt2800_bbp_read(rt2x00dev, 4, &value); + rt2x00_set_field8(&value, BBP4_MAC_IF_CTRL, 1); + rt2800_bbp_write(rt2x00dev, 4, value); +@@ -3021,19 +3027,22 @@ + + if (rt2800_is_305x_soc(rt2x00dev) || + rt2x00_rt(rt2x00dev, RT3572) || +- rt2x00_rt(rt2x00dev, RT5390)) ++ rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) + rt2800_bbp_write(rt2x00dev, 31, 0x08); + + rt2800_bbp_write(rt2x00dev, 65, 0x2c); + rt2800_bbp_write(rt2x00dev, 66, 0x38); + +- if (rt2x00_rt(rt2x00dev, RT5390)) ++ if (rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) + rt2800_bbp_write(rt2x00dev, 68, 0x0b); + + if (rt2x00_rt_rev(rt2x00dev, RT2860, REV_RT2860C)) { + rt2800_bbp_write(rt2x00dev, 69, 0x16); + rt2800_bbp_write(rt2x00dev, 73, 0x12); +- } else if (rt2x00_rt(rt2x00dev, RT5390)) { ++ } else if (rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) { + rt2800_bbp_write(rt2x00dev, 69, 0x12); + rt2800_bbp_write(rt2x00dev, 73, 0x13); + rt2800_bbp_write(rt2x00dev, 75, 0x46); +@@ -3051,7 +3060,8 @@ + rt2x00_rt(rt2x00dev, RT3090) || + rt2x00_rt(rt2x00dev, RT3390) || + rt2x00_rt(rt2x00dev, RT3572) || +- rt2x00_rt(rt2x00dev, RT5390)) { ++ rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) { + rt2800_bbp_write(rt2x00dev, 79, 0x13); + rt2800_bbp_write(rt2x00dev, 80, 0x05); + rt2800_bbp_write(rt2x00dev, 81, 0x33); +@@ -3063,64 +3073,88 @@ + } + + rt2800_bbp_write(rt2x00dev, 82, 0x62); +- if (rt2x00_rt(rt2x00dev, RT5390)) ++ if (rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) + rt2800_bbp_write(rt2x00dev, 83, 0x7a); + else + rt2800_bbp_write(rt2x00dev, 83, 0x6a); + + if (rt2x00_rt_rev(rt2x00dev, RT2860, REV_RT2860D)) + rt2800_bbp_write(rt2x00dev, 84, 0x19); +- else if (rt2x00_rt(rt2x00dev, RT5390)) ++ else if (rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) + rt2800_bbp_write(rt2x00dev, 84, 0x9a); + else + rt2800_bbp_write(rt2x00dev, 84, 0x99); + +- if (rt2x00_rt(rt2x00dev, RT5390)) ++ if (rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) + rt2800_bbp_write(rt2x00dev, 86, 0x38); + else + rt2800_bbp_write(rt2x00dev, 86, 0x00); + ++ if (rt2x00_rt(rt2x00dev, RT5392)) ++ rt2800_bbp_write(rt2x00dev, 88, 0x90); ++ + rt2800_bbp_write(rt2x00dev, 91, 0x04); + +- if (rt2x00_rt(rt2x00dev, RT5390)) ++ if (rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) + rt2800_bbp_write(rt2x00dev, 92, 0x02); + else + rt2800_bbp_write(rt2x00dev, 92, 0x00); + ++ if (rt2x00_rt(rt2x00dev, RT5392)) { ++ rt2800_bbp_write(rt2x00dev, 95, 0x9a); ++ rt2800_bbp_write(rt2x00dev, 98, 0x12); ++ } ++ + if (rt2x00_rt_rev_gte(rt2x00dev, RT3070, REV_RT3070F) || + rt2x00_rt_rev_gte(rt2x00dev, RT3071, REV_RT3071E) || + rt2x00_rt_rev_gte(rt2x00dev, RT3090, REV_RT3090E) || + rt2x00_rt_rev_gte(rt2x00dev, RT3390, REV_RT3390E) || + rt2x00_rt(rt2x00dev, RT3572) || + rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392) || + rt2800_is_305x_soc(rt2x00dev)) + rt2800_bbp_write(rt2x00dev, 103, 0xc0); + else + rt2800_bbp_write(rt2x00dev, 103, 0x00); + +- if (rt2x00_rt(rt2x00dev, RT5390)) ++ if (rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) + rt2800_bbp_write(rt2x00dev, 104, 0x92); + + if (rt2800_is_305x_soc(rt2x00dev)) + rt2800_bbp_write(rt2x00dev, 105, 0x01); +- else if (rt2x00_rt(rt2x00dev, RT5390)) ++ else if (rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) + rt2800_bbp_write(rt2x00dev, 105, 0x3c); + else + rt2800_bbp_write(rt2x00dev, 105, 0x05); + + if (rt2x00_rt(rt2x00dev, RT5390)) + rt2800_bbp_write(rt2x00dev, 106, 0x03); ++ else if (rt2x00_rt(rt2x00dev, RT5392)) ++ rt2800_bbp_write(rt2x00dev, 106, 0x12); + else + rt2800_bbp_write(rt2x00dev, 106, 0x35); + +- if (rt2x00_rt(rt2x00dev, RT5390)) ++ if (rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) + rt2800_bbp_write(rt2x00dev, 128, 0x12); + ++ if (rt2x00_rt(rt2x00dev, RT5392)) { ++ rt2800_bbp_write(rt2x00dev, 134, 0xd0); ++ rt2800_bbp_write(rt2x00dev, 135, 0xf6); ++ } ++ + if (rt2x00_rt(rt2x00dev, RT3071) || + rt2x00_rt(rt2x00dev, RT3090) || + rt2x00_rt(rt2x00dev, RT3390) || + rt2x00_rt(rt2x00dev, RT3572) || +- rt2x00_rt(rt2x00dev, RT5390)) { ++ rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) { + rt2800_bbp_read(rt2x00dev, 138, &value); + + rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC_CONF0, &eeprom); +@@ -3132,7 +3166,8 @@ + rt2800_bbp_write(rt2x00dev, 138, value); + } + +- if (rt2x00_rt(rt2x00dev, RT5390)) { ++ if (rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) { + int ant, div_mode; + + rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC_CONF1, &eeprom); +@@ -3258,13 +3293,15 @@ + !rt2x00_rt(rt2x00dev, RT3390) && + !rt2x00_rt(rt2x00dev, RT3572) && + !rt2x00_rt(rt2x00dev, RT5390) && ++ !rt2x00_rt(rt2x00dev, RT5392) && + !rt2800_is_305x_soc(rt2x00dev)) + return 0; + + /* + * Init RF calibration. + */ +- if (rt2x00_rt(rt2x00dev, RT5390)) { ++ if (rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) { + rt2800_rfcsr_read(rt2x00dev, 2, &rfcsr); + rt2x00_set_field8(&rfcsr, RFCSR2_RESCAL_EN, 1); + rt2800_rfcsr_write(rt2x00dev, 2, rfcsr); +@@ -3482,6 +3519,66 @@ + rt2800_rfcsr_write(rt2x00dev, 61, 0xdd); + rt2800_rfcsr_write(rt2x00dev, 62, 0x00); + rt2800_rfcsr_write(rt2x00dev, 63, 0x00); ++ } else if (rt2x00_rt(rt2x00dev, RT5392)) { ++ rt2800_rfcsr_write(rt2x00dev, 1, 0x17); ++ rt2800_rfcsr_write(rt2x00dev, 2, 0x80); ++ rt2800_rfcsr_write(rt2x00dev, 3, 0x88); ++ rt2800_rfcsr_write(rt2x00dev, 5, 0x10); ++ rt2800_rfcsr_write(rt2x00dev, 6, 0xe0); ++ rt2800_rfcsr_write(rt2x00dev, 7, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 10, 0x53); ++ rt2800_rfcsr_write(rt2x00dev, 11, 0x4a); ++ rt2800_rfcsr_write(rt2x00dev, 12, 0x46); ++ rt2800_rfcsr_write(rt2x00dev, 13, 0x9f); ++ rt2800_rfcsr_write(rt2x00dev, 14, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 15, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 16, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 18, 0x03); ++ rt2800_rfcsr_write(rt2x00dev, 19, 0x4d); ++ rt2800_rfcsr_write(rt2x00dev, 20, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 21, 0x8d); ++ rt2800_rfcsr_write(rt2x00dev, 22, 0x20); ++ rt2800_rfcsr_write(rt2x00dev, 23, 0x0b); ++ rt2800_rfcsr_write(rt2x00dev, 24, 0x44); ++ rt2800_rfcsr_write(rt2x00dev, 25, 0x80); ++ rt2800_rfcsr_write(rt2x00dev, 26, 0x82); ++ rt2800_rfcsr_write(rt2x00dev, 27, 0x09); ++ rt2800_rfcsr_write(rt2x00dev, 28, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 29, 0x10); ++ rt2800_rfcsr_write(rt2x00dev, 30, 0x10); ++ rt2800_rfcsr_write(rt2x00dev, 31, 0x80); ++ rt2800_rfcsr_write(rt2x00dev, 32, 0x20); ++ rt2800_rfcsr_write(rt2x00dev, 33, 0xC0); ++ rt2800_rfcsr_write(rt2x00dev, 34, 0x07); ++ rt2800_rfcsr_write(rt2x00dev, 35, 0x12); ++ rt2800_rfcsr_write(rt2x00dev, 36, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 37, 0x08); ++ rt2800_rfcsr_write(rt2x00dev, 38, 0x89); ++ rt2800_rfcsr_write(rt2x00dev, 39, 0x1b); ++ rt2800_rfcsr_write(rt2x00dev, 40, 0x0f); ++ rt2800_rfcsr_write(rt2x00dev, 41, 0xbb); ++ rt2800_rfcsr_write(rt2x00dev, 42, 0xd5); ++ rt2800_rfcsr_write(rt2x00dev, 43, 0x9b); ++ rt2800_rfcsr_write(rt2x00dev, 44, 0x0e); ++ rt2800_rfcsr_write(rt2x00dev, 45, 0xa2); ++ rt2800_rfcsr_write(rt2x00dev, 46, 0x73); ++ rt2800_rfcsr_write(rt2x00dev, 47, 0x0c); ++ rt2800_rfcsr_write(rt2x00dev, 48, 0x10); ++ rt2800_rfcsr_write(rt2x00dev, 49, 0x94); ++ rt2800_rfcsr_write(rt2x00dev, 50, 0x94); ++ rt2800_rfcsr_write(rt2x00dev, 51, 0x3a); ++ rt2800_rfcsr_write(rt2x00dev, 52, 0x48); ++ rt2800_rfcsr_write(rt2x00dev, 53, 0x44); ++ rt2800_rfcsr_write(rt2x00dev, 54, 0x38); ++ rt2800_rfcsr_write(rt2x00dev, 55, 0x43); ++ rt2800_rfcsr_write(rt2x00dev, 56, 0xa1); ++ rt2800_rfcsr_write(rt2x00dev, 57, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 58, 0x39); ++ rt2800_rfcsr_write(rt2x00dev, 59, 0x07); ++ rt2800_rfcsr_write(rt2x00dev, 60, 0x45); ++ rt2800_rfcsr_write(rt2x00dev, 61, 0x91); ++ rt2800_rfcsr_write(rt2x00dev, 62, 0x39); ++ rt2800_rfcsr_write(rt2x00dev, 63, 0x07); + } + + if (rt2x00_rt_rev_lt(rt2x00dev, RT3070, REV_RT3070F)) { +@@ -3549,7 +3646,8 @@ + rt2800_init_rx_filter(rt2x00dev, true, 0x27, 0x15); + } + +- if (!rt2x00_rt(rt2x00dev, RT5390)) { ++ if (!rt2x00_rt(rt2x00dev, RT5390) && ++ !rt2x00_rt(rt2x00dev, RT5392)) { + /* + * Set back to initial state + */ +@@ -3577,7 +3675,8 @@ + rt2x00_set_field32(®, OPT_14_CSR_BIT0, 1); + rt2800_register_write(rt2x00dev, OPT_14_CSR, reg); + +- if (!rt2x00_rt(rt2x00dev, RT5390)) { ++ if (!rt2x00_rt(rt2x00dev, RT5390) && ++ !rt2x00_rt(rt2x00dev, RT5392)) { + rt2800_rfcsr_read(rt2x00dev, 17, &rfcsr); + rt2x00_set_field8(&rfcsr, RFCSR17_TX_LO1_EN, 0); + if (rt2x00_rt(rt2x00dev, RT3070) || +@@ -3645,7 +3744,8 @@ + rt2800_rfcsr_write(rt2x00dev, 27, rfcsr); + } + +- if (rt2x00_rt(rt2x00dev, RT5390)) { ++ if (rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) { + rt2800_rfcsr_read(rt2x00dev, 38, &rfcsr); + rt2x00_set_field8(&rfcsr, RFCSR38_RX_LO1_EN, 0); + rt2800_rfcsr_write(rt2x00dev, 38, rfcsr); +@@ -3929,7 +4029,8 @@ + * RT53xx: defined in "EEPROM_CHIP_ID" field + */ + rt2800_register_read(rt2x00dev, MAC_CSR0, ®); +- if (rt2x00_get_field32(reg, MAC_CSR0_CHIPSET) == RT5390) ++ if (rt2x00_get_field32(reg, MAC_CSR0_CHIPSET) == RT5390 || ++ rt2x00_get_field32(reg, MAC_CSR0_CHIPSET) == RT5392) + rt2x00_eeprom_read(rt2x00dev, EEPROM_CHIP_ID, &value); + else + value = rt2x00_get_field16(eeprom, EEPROM_NIC_CONF0_RF_TYPE); +@@ -3947,6 +4048,7 @@ + case RT3390: + case RT3572: + case RT5390: ++ case RT5392: + break; + default: + ERROR(rt2x00dev, "Invalid RT chipset detected.\n"); +@@ -3965,6 +4067,7 @@ + case RF3052: + case RF3320: + case RF5370: ++ case RF5372: + case RF5390: + break; + default: +@@ -4271,6 +4374,7 @@ + rt2x00_rf(rt2x00dev, RF3022) || + rt2x00_rf(rt2x00dev, RF3320) || + rt2x00_rf(rt2x00dev, RF5370) || ++ rt2x00_rf(rt2x00dev, RF5372) || + rt2x00_rf(rt2x00dev, RF5390)) { + spec->num_channels = 14; + spec->channels = rf_vals_3x; +diff -Naur linux.orig/drivers/net/wireless/rt2x00/rt2800pci.c linux/drivers/net/wireless/rt2x00/rt2800pci.c +--- linux.orig/drivers/net/wireless/rt2x00/rt2800pci.c 2012-10-27 06:39:33.000000000 +0200 ++++ linux/drivers/net/wireless/rt2x00/rt2800pci.c 2014-02-24 22:56:12.744488448 +0100 +@@ -480,7 +480,8 @@ + + if (rt2x00_is_pcie(rt2x00dev) && + (rt2x00_rt(rt2x00dev, RT3572) || +- rt2x00_rt(rt2x00dev, RT5390))) { ++ rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392))) { + rt2x00pci_register_read(rt2x00dev, AUX_CTRL, ®); + rt2x00_set_field32(®, AUX_CTRL_FORCE_PCIE_CLK, 1); + rt2x00_set_field32(®, AUX_CTRL_WAKE_PCIE_EN, 1); +diff -Naur linux.orig/drivers/net/wireless/rt2x00/rt2x00.h linux/drivers/net/wireless/rt2x00/rt2x00.h +--- linux.orig/drivers/net/wireless/rt2x00/rt2x00.h 2012-10-27 06:39:33.000000000 +0200 ++++ linux/drivers/net/wireless/rt2x00/rt2x00.h 2014-02-23 17:59:23.000000000 +0100 +@@ -192,6 +192,7 @@ + #define RT3593 0x3593 + #define RT3883 0x3883 /* WSOC */ + #define RT5390 0x5390 /* 2.4GHz */ ++#define RT5392 0x5392 /* 2.4GHz */ + + u16 rf; + u16 rev; diff --git a/recipes/linux/linux-vuduo2_3.3.8.bb b/recipes/linux/linux-vuduo2_3.3.8.bb index f9c3e95..19a2d96 100644 --- a/recipes/linux/linux-vuduo2_3.3.8.bb +++ b/recipes/linux/linux-vuduo2_3.3.8.bb @@ -5,4 +5,4 @@ SRC_URI += "file://remove_genet1.patch;patch=1;pnum=1 \ file://brcm_s3_wol.patch;patch=1;pnum=1 \ " -PR = "r5" +PR = "r6" diff --git a/recipes/linux/linux-vusolo-3.1.1/rt5372_kernel_3.1.1.patch b/recipes/linux/linux-vusolo-3.1.1/rt5372_kernel_3.1.1.patch new file mode 100644 index 0000000..d70c5c6 --- /dev/null +++ b/recipes/linux/linux-vusolo-3.1.1/rt5372_kernel_3.1.1.patch @@ -0,0 +1,437 @@ +diff -Naur linux.orig/drivers/net/wireless/rt2x00/rt2800.h linux/drivers/net/wireless/rt2x00/rt2800.h +--- linux.orig/drivers/net/wireless/rt2x00/rt2800.h 2011-11-11 21:19:27.000000000 +0100 ++++ linux/drivers/net/wireless/rt2x00/rt2800.h 2014-02-23 20:21:13.000000000 +0100 +@@ -68,6 +68,7 @@ + #define RF3322 0x000c + #define RF3853 0x000d + #define RF5370 0x5370 ++#define RF5372 0x5372 + #define RF5390 0x5390 + + /* +diff -Naur linux.orig/drivers/net/wireless/rt2x00/rt2800lib.c linux/drivers/net/wireless/rt2x00/rt2800lib.c +--- linux.orig/drivers/net/wireless/rt2x00/rt2800lib.c 2011-11-11 21:19:27.000000000 +0100 ++++ linux/drivers/net/wireless/rt2x00/rt2800lib.c 2014-02-23 20:25:27.000000000 +0100 +@@ -402,7 +402,8 @@ + + if (rt2x00_is_pci(rt2x00dev)) { + if (rt2x00_rt(rt2x00dev, RT3572) || +- rt2x00_rt(rt2x00dev, RT5390)) { ++ rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) { + rt2800_register_read(rt2x00dev, AUX_CTRL, ®); + rt2x00_set_field32(®, AUX_CTRL_FORCE_PCIE_CLK, 1); + rt2x00_set_field32(®, AUX_CTRL_WAKE_PCIE_EN, 1); +@@ -1128,8 +1129,10 @@ + !(filter_flags & FIF_CONTROL)); + rt2x00_set_field32(®, RX_FILTER_CFG_DROP_PSPOLL, + !(filter_flags & FIF_PSPOLL)); +- rt2x00_set_field32(®, RX_FILTER_CFG_DROP_BA, 1); +- rt2x00_set_field32(®, RX_FILTER_CFG_DROP_BAR, 0); ++ rt2x00_set_field32(®, RX_FILTER_CFG_DROP_BA, ++ !(filter_flags & FIF_CONTROL)); ++ rt2x00_set_field32(®, RX_FILTER_CFG_DROP_BAR, ++ !(filter_flags & FIF_CONTROL)); + rt2x00_set_field32(®, RX_FILTER_CFG_DROP_CNTL, + !(filter_flags & FIF_CONTROL)); + rt2800_register_write(rt2x00dev, RX_FILTER_CFG, reg); +@@ -1867,19 +1870,25 @@ + info->default_power2 = TXPOWER_A_TO_DEV(info->default_power2); + } + +- if (rt2x00_rf(rt2x00dev, RF2020) || +- rt2x00_rf(rt2x00dev, RF3020) || +- rt2x00_rf(rt2x00dev, RF3021) || +- rt2x00_rf(rt2x00dev, RF3022) || +- rt2x00_rf(rt2x00dev, RF3320)) ++ switch (rt2x00dev->chip.rf) { ++ case RF2020: ++ case RF3020: ++ case RF3021: ++ case RF3022: ++ case RF3320: + rt2800_config_channel_rf3xxx(rt2x00dev, conf, rf, info); +- else if (rt2x00_rf(rt2x00dev, RF3052)) ++ break; ++ case RF3052: + rt2800_config_channel_rf3052(rt2x00dev, conf, rf, info); +- else if (rt2x00_rf(rt2x00dev, RF5370) || +- rt2x00_rf(rt2x00dev, RF5390)) ++ break; ++ case RF5370: ++ case RF5372: ++ case RF5390: + rt2800_config_channel_rf53xx(rt2x00dev, conf, rf, info); +- else ++ break; ++ default: + rt2800_config_channel_rf2xxx(rt2x00dev, conf, rf, info); ++ } + + /* + * Change BBP settings +@@ -1890,7 +1899,8 @@ + rt2800_bbp_write(rt2x00dev, 86, 0); + + if (rf->channel <= 14) { +- if (!rt2x00_rt(rt2x00dev, RT5390)) { ++ if (!rt2x00_rt(rt2x00dev, RT5390) && ++ !rt2x00_rt(rt2x00dev, RT5392)) { + if (test_bit(CAPABILITY_EXTERNAL_LNA_BG, + &rt2x00dev->cap_flags)) { + rt2800_bbp_write(rt2x00dev, 82, 0x62); +@@ -2420,7 +2430,8 @@ + rt2x00_rt(rt2x00dev, RT3071) || + rt2x00_rt(rt2x00dev, RT3090) || + rt2x00_rt(rt2x00dev, RT3390) || +- rt2x00_rt(rt2x00dev, RT5390)) ++ rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) + return 0x1c + (2 * rt2x00dev->lna_gain); + else + return 0x2e + rt2x00dev->lna_gain; +@@ -2555,7 +2566,8 @@ + } else if (rt2x00_rt(rt2x00dev, RT3572)) { + rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000400); + rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00080606); +- } else if (rt2x00_rt(rt2x00dev, RT5390)) { ++ } else if (rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) { + rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000404); + rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00080606); + rt2800_register_write(rt2x00dev, TX_SW_CFG2, 0x00000000); +@@ -2934,7 +2946,8 @@ + rt2800_wait_bbp_ready(rt2x00dev))) + return -EACCES; + +- if (rt2x00_rt(rt2x00dev, RT5390)) { ++ if (rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) { + rt2800_bbp_read(rt2x00dev, 4, &value); + rt2x00_set_field8(&value, BBP4_MAC_IF_CTRL, 1); + rt2800_bbp_write(rt2x00dev, 4, value); +@@ -2942,19 +2955,22 @@ + + if (rt2800_is_305x_soc(rt2x00dev) || + rt2x00_rt(rt2x00dev, RT3572) || +- rt2x00_rt(rt2x00dev, RT5390)) ++ rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) + rt2800_bbp_write(rt2x00dev, 31, 0x08); + + rt2800_bbp_write(rt2x00dev, 65, 0x2c); + rt2800_bbp_write(rt2x00dev, 66, 0x38); + +- if (rt2x00_rt(rt2x00dev, RT5390)) ++ if (rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) + rt2800_bbp_write(rt2x00dev, 68, 0x0b); + + if (rt2x00_rt_rev(rt2x00dev, RT2860, REV_RT2860C)) { + rt2800_bbp_write(rt2x00dev, 69, 0x16); + rt2800_bbp_write(rt2x00dev, 73, 0x12); +- } else if (rt2x00_rt(rt2x00dev, RT5390)) { ++ } else if (rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) { + rt2800_bbp_write(rt2x00dev, 69, 0x12); + rt2800_bbp_write(rt2x00dev, 73, 0x13); + rt2800_bbp_write(rt2x00dev, 75, 0x46); +@@ -2972,7 +2988,8 @@ + rt2x00_rt(rt2x00dev, RT3090) || + rt2x00_rt(rt2x00dev, RT3390) || + rt2x00_rt(rt2x00dev, RT3572) || +- rt2x00_rt(rt2x00dev, RT5390)) { ++ rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) { + rt2800_bbp_write(rt2x00dev, 79, 0x13); + rt2800_bbp_write(rt2x00dev, 80, 0x05); + rt2800_bbp_write(rt2x00dev, 81, 0x33); +@@ -2984,64 +3001,88 @@ + } + + rt2800_bbp_write(rt2x00dev, 82, 0x62); +- if (rt2x00_rt(rt2x00dev, RT5390)) ++ if (rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) + rt2800_bbp_write(rt2x00dev, 83, 0x7a); + else + rt2800_bbp_write(rt2x00dev, 83, 0x6a); + + if (rt2x00_rt_rev(rt2x00dev, RT2860, REV_RT2860D)) + rt2800_bbp_write(rt2x00dev, 84, 0x19); +- else if (rt2x00_rt(rt2x00dev, RT5390)) ++ else if (rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) + rt2800_bbp_write(rt2x00dev, 84, 0x9a); + else + rt2800_bbp_write(rt2x00dev, 84, 0x99); + +- if (rt2x00_rt(rt2x00dev, RT5390)) ++ if (rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) + rt2800_bbp_write(rt2x00dev, 86, 0x38); + else + rt2800_bbp_write(rt2x00dev, 86, 0x00); + ++ if (rt2x00_rt(rt2x00dev, RT5392)) ++ rt2800_bbp_write(rt2x00dev, 88, 0x90); ++ + rt2800_bbp_write(rt2x00dev, 91, 0x04); + +- if (rt2x00_rt(rt2x00dev, RT5390)) ++ if (rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) + rt2800_bbp_write(rt2x00dev, 92, 0x02); + else + rt2800_bbp_write(rt2x00dev, 92, 0x00); + ++ if (rt2x00_rt(rt2x00dev, RT5392)) { ++ rt2800_bbp_write(rt2x00dev, 95, 0x9a); ++ rt2800_bbp_write(rt2x00dev, 98, 0x12); ++ } ++ + if (rt2x00_rt_rev_gte(rt2x00dev, RT3070, REV_RT3070F) || + rt2x00_rt_rev_gte(rt2x00dev, RT3071, REV_RT3071E) || + rt2x00_rt_rev_gte(rt2x00dev, RT3090, REV_RT3090E) || + rt2x00_rt_rev_gte(rt2x00dev, RT3390, REV_RT3390E) || + rt2x00_rt(rt2x00dev, RT3572) || + rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392) || + rt2800_is_305x_soc(rt2x00dev)) + rt2800_bbp_write(rt2x00dev, 103, 0xc0); + else + rt2800_bbp_write(rt2x00dev, 103, 0x00); + +- if (rt2x00_rt(rt2x00dev, RT5390)) ++ if (rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) + rt2800_bbp_write(rt2x00dev, 104, 0x92); + + if (rt2800_is_305x_soc(rt2x00dev)) + rt2800_bbp_write(rt2x00dev, 105, 0x01); +- else if (rt2x00_rt(rt2x00dev, RT5390)) ++ else if (rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) + rt2800_bbp_write(rt2x00dev, 105, 0x3c); + else + rt2800_bbp_write(rt2x00dev, 105, 0x05); + + if (rt2x00_rt(rt2x00dev, RT5390)) + rt2800_bbp_write(rt2x00dev, 106, 0x03); ++ else if (rt2x00_rt(rt2x00dev, RT5392)) ++ rt2800_bbp_write(rt2x00dev, 106, 0x12); + else + rt2800_bbp_write(rt2x00dev, 106, 0x35); + +- if (rt2x00_rt(rt2x00dev, RT5390)) ++ if (rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) + rt2800_bbp_write(rt2x00dev, 128, 0x12); + ++ if (rt2x00_rt(rt2x00dev, RT5392)) { ++ rt2800_bbp_write(rt2x00dev, 134, 0xd0); ++ rt2800_bbp_write(rt2x00dev, 135, 0xf6); ++ } ++ + if (rt2x00_rt(rt2x00dev, RT3071) || + rt2x00_rt(rt2x00dev, RT3090) || + rt2x00_rt(rt2x00dev, RT3390) || + rt2x00_rt(rt2x00dev, RT3572) || +- rt2x00_rt(rt2x00dev, RT5390)) { ++ rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) { + rt2800_bbp_read(rt2x00dev, 138, &value); + + rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC_CONF0, &eeprom); +@@ -3053,7 +3094,8 @@ + rt2800_bbp_write(rt2x00dev, 138, value); + } + +- if (rt2x00_rt(rt2x00dev, RT5390)) { ++ if (rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) { + int ant, div_mode; + + rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC_CONF1, &eeprom); +@@ -3179,13 +3221,15 @@ + !rt2x00_rt(rt2x00dev, RT3390) && + !rt2x00_rt(rt2x00dev, RT3572) && + !rt2x00_rt(rt2x00dev, RT5390) && ++ !rt2x00_rt(rt2x00dev, RT5392) && + !rt2800_is_305x_soc(rt2x00dev)) + return 0; + + /* + * Init RF calibration. + */ +- if (rt2x00_rt(rt2x00dev, RT5390)) { ++ if (rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) { + rt2800_rfcsr_read(rt2x00dev, 2, &rfcsr); + rt2x00_set_field8(&rfcsr, RFCSR2_RESCAL_EN, 1); + rt2800_rfcsr_write(rt2x00dev, 2, rfcsr); +@@ -3403,6 +3447,66 @@ + rt2800_rfcsr_write(rt2x00dev, 61, 0xdd); + rt2800_rfcsr_write(rt2x00dev, 62, 0x00); + rt2800_rfcsr_write(rt2x00dev, 63, 0x00); ++ } else if (rt2x00_rt(rt2x00dev, RT5392)) { ++ rt2800_rfcsr_write(rt2x00dev, 1, 0x17); ++ rt2800_rfcsr_write(rt2x00dev, 2, 0x80); ++ rt2800_rfcsr_write(rt2x00dev, 3, 0x88); ++ rt2800_rfcsr_write(rt2x00dev, 5, 0x10); ++ rt2800_rfcsr_write(rt2x00dev, 6, 0xe0); ++ rt2800_rfcsr_write(rt2x00dev, 7, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 10, 0x53); ++ rt2800_rfcsr_write(rt2x00dev, 11, 0x4a); ++ rt2800_rfcsr_write(rt2x00dev, 12, 0x46); ++ rt2800_rfcsr_write(rt2x00dev, 13, 0x9f); ++ rt2800_rfcsr_write(rt2x00dev, 14, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 15, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 16, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 18, 0x03); ++ rt2800_rfcsr_write(rt2x00dev, 19, 0x4d); ++ rt2800_rfcsr_write(rt2x00dev, 20, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 21, 0x8d); ++ rt2800_rfcsr_write(rt2x00dev, 22, 0x20); ++ rt2800_rfcsr_write(rt2x00dev, 23, 0x0b); ++ rt2800_rfcsr_write(rt2x00dev, 24, 0x44); ++ rt2800_rfcsr_write(rt2x00dev, 25, 0x80); ++ rt2800_rfcsr_write(rt2x00dev, 26, 0x82); ++ rt2800_rfcsr_write(rt2x00dev, 27, 0x09); ++ rt2800_rfcsr_write(rt2x00dev, 28, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 29, 0x10); ++ rt2800_rfcsr_write(rt2x00dev, 30, 0x10); ++ rt2800_rfcsr_write(rt2x00dev, 31, 0x80); ++ rt2800_rfcsr_write(rt2x00dev, 32, 0x20); ++ rt2800_rfcsr_write(rt2x00dev, 33, 0xC0); ++ rt2800_rfcsr_write(rt2x00dev, 34, 0x07); ++ rt2800_rfcsr_write(rt2x00dev, 35, 0x12); ++ rt2800_rfcsr_write(rt2x00dev, 36, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 37, 0x08); ++ rt2800_rfcsr_write(rt2x00dev, 38, 0x89); ++ rt2800_rfcsr_write(rt2x00dev, 39, 0x1b); ++ rt2800_rfcsr_write(rt2x00dev, 40, 0x0f); ++ rt2800_rfcsr_write(rt2x00dev, 41, 0xbb); ++ rt2800_rfcsr_write(rt2x00dev, 42, 0xd5); ++ rt2800_rfcsr_write(rt2x00dev, 43, 0x9b); ++ rt2800_rfcsr_write(rt2x00dev, 44, 0x0e); ++ rt2800_rfcsr_write(rt2x00dev, 45, 0xa2); ++ rt2800_rfcsr_write(rt2x00dev, 46, 0x73); ++ rt2800_rfcsr_write(rt2x00dev, 47, 0x0c); ++ rt2800_rfcsr_write(rt2x00dev, 48, 0x10); ++ rt2800_rfcsr_write(rt2x00dev, 49, 0x94); ++ rt2800_rfcsr_write(rt2x00dev, 50, 0x94); ++ rt2800_rfcsr_write(rt2x00dev, 51, 0x3a); ++ rt2800_rfcsr_write(rt2x00dev, 52, 0x48); ++ rt2800_rfcsr_write(rt2x00dev, 53, 0x44); ++ rt2800_rfcsr_write(rt2x00dev, 54, 0x38); ++ rt2800_rfcsr_write(rt2x00dev, 55, 0x43); ++ rt2800_rfcsr_write(rt2x00dev, 56, 0xa1); ++ rt2800_rfcsr_write(rt2x00dev, 57, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 58, 0x39); ++ rt2800_rfcsr_write(rt2x00dev, 59, 0x07); ++ rt2800_rfcsr_write(rt2x00dev, 60, 0x45); ++ rt2800_rfcsr_write(rt2x00dev, 61, 0x91); ++ rt2800_rfcsr_write(rt2x00dev, 62, 0x39); ++ rt2800_rfcsr_write(rt2x00dev, 63, 0x07); + } + + if (rt2x00_rt_rev_lt(rt2x00dev, RT3070, REV_RT3070F)) { +@@ -3470,7 +3574,8 @@ + rt2800_init_rx_filter(rt2x00dev, true, 0x27, 0x15); + } + +- if (!rt2x00_rt(rt2x00dev, RT5390)) { ++ if (!rt2x00_rt(rt2x00dev, RT5390) && ++ !rt2x00_rt(rt2x00dev, RT5392)) { + /* + * Set back to initial state + */ +@@ -3498,7 +3603,8 @@ + rt2x00_set_field32(®, OPT_14_CSR_BIT0, 1); + rt2800_register_write(rt2x00dev, OPT_14_CSR, reg); + +- if (!rt2x00_rt(rt2x00dev, RT5390)) { ++ if (!rt2x00_rt(rt2x00dev, RT5390) && ++ !rt2x00_rt(rt2x00dev, RT5392)) { + rt2800_rfcsr_read(rt2x00dev, 17, &rfcsr); + rt2x00_set_field8(&rfcsr, RFCSR17_TX_LO1_EN, 0); + if (rt2x00_rt(rt2x00dev, RT3070) || +@@ -3566,7 +3672,8 @@ + rt2800_rfcsr_write(rt2x00dev, 27, rfcsr); + } + +- if (rt2x00_rt(rt2x00dev, RT5390)) { ++ if (rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) { + rt2800_rfcsr_read(rt2x00dev, 38, &rfcsr); + rt2x00_set_field8(&rfcsr, RFCSR38_RX_LO1_EN, 0); + rt2800_rfcsr_write(rt2x00dev, 38, rfcsr); +@@ -3850,7 +3957,8 @@ + * RT53xx: defined in "EEPROM_CHIP_ID" field + */ + rt2800_register_read(rt2x00dev, MAC_CSR0, ®); +- if (rt2x00_get_field32(reg, MAC_CSR0_CHIPSET) == RT5390) ++ if (rt2x00_get_field32(reg, MAC_CSR0_CHIPSET) == RT5390 || ++ rt2x00_get_field32(reg, MAC_CSR0_CHIPSET) == RT5392) + rt2x00_eeprom_read(rt2x00dev, EEPROM_CHIP_ID, &value); + else + value = rt2x00_get_field16(eeprom, EEPROM_NIC_CONF0_RF_TYPE); +@@ -3858,15 +3966,19 @@ + rt2x00_set_chip(rt2x00dev, rt2x00_get_field32(reg, MAC_CSR0_CHIPSET), + value, rt2x00_get_field32(reg, MAC_CSR0_REVISION)); + +- if (!rt2x00_rt(rt2x00dev, RT2860) && +- !rt2x00_rt(rt2x00dev, RT2872) && +- !rt2x00_rt(rt2x00dev, RT2883) && +- !rt2x00_rt(rt2x00dev, RT3070) && +- !rt2x00_rt(rt2x00dev, RT3071) && +- !rt2x00_rt(rt2x00dev, RT3090) && +- !rt2x00_rt(rt2x00dev, RT3390) && +- !rt2x00_rt(rt2x00dev, RT3572) && +- !rt2x00_rt(rt2x00dev, RT5390)) { ++ switch (rt2x00dev->chip.rt) { ++ case RT2860: ++ case RT2872: ++ case RT2883: ++ case RT3070: ++ case RT3071: ++ case RT3090: ++ case RT3390: ++ case RT3572: ++ case RT5390: ++ case RT5392: ++ break; ++ default: + ERROR(rt2x00dev, "Invalid RT chipset detected.\n"); + return -ENODEV; + } +@@ -3883,6 +3995,7 @@ + case RF3052: + case RF3320: + case RF5370: ++ case RF5372: + case RF5390: + break; + default: +@@ -4189,6 +4302,7 @@ + rt2x00_rf(rt2x00dev, RF3022) || + rt2x00_rf(rt2x00dev, RF3320) || + rt2x00_rf(rt2x00dev, RF5370) || ++ rt2x00_rf(rt2x00dev, RF5372) || + rt2x00_rf(rt2x00dev, RF5390)) { + spec->num_channels = 14; + spec->channels = rf_vals_3x; +diff -Naur linux.orig/drivers/net/wireless/rt2x00/rt2x00.h linux/drivers/net/wireless/rt2x00/rt2x00.h +--- linux.orig/drivers/net/wireless/rt2x00/rt2x00.h 2011-11-11 21:19:27.000000000 +0100 ++++ linux/drivers/net/wireless/rt2x00/rt2x00.h 2014-02-23 20:20:33.000000000 +0100 +@@ -191,7 +191,8 @@ + #define RT3572 0x3572 + #define RT3593 0x3593 /* PCIe */ + #define RT3883 0x3883 /* WSOC */ +-#define RT5390 0x5390 /* 2.4GHz */ ++#define RT5390 0x5390 /* 2.4GHz */ ++#define RT5392 0x5392 /* 2.4GHz */ + + u16 rf; + u16 rev; diff --git a/recipes/linux/linux-vusolo2-3.3.8/rt5372_kernel_3.3.8.patch b/recipes/linux/linux-vusolo2-3.3.8/rt5372_kernel_3.3.8.patch new file mode 100644 index 0000000..a655a07 --- /dev/null +++ b/recipes/linux/linux-vusolo2-3.3.8/rt5372_kernel_3.3.8.patch @@ -0,0 +1,387 @@ +diff -Naur linux.orig/drivers/net/wireless/rt2x00/rt2800.h linux/drivers/net/wireless/rt2x00/rt2800.h +--- linux.orig/drivers/net/wireless/rt2x00/rt2800.h 2012-10-27 06:39:33.000000000 +0200 ++++ linux/drivers/net/wireless/rt2x00/rt2800.h 2014-02-23 17:59:22.000000000 +0100 +@@ -68,6 +68,7 @@ + #define RF3322 0x000c + #define RF3053 0x000d + #define RF5370 0x5370 ++#define RF5372 0x5372 + #define RF5390 0x5390 + + /* +diff -Naur linux.orig/drivers/net/wireless/rt2x00/rt2800lib.c linux/drivers/net/wireless/rt2x00/rt2800lib.c +--- linux.orig/drivers/net/wireless/rt2x00/rt2800lib.c 2012-10-27 06:39:33.000000000 +0200 ++++ linux/drivers/net/wireless/rt2x00/rt2800lib.c 2014-02-23 17:59:21.000000000 +0100 +@@ -402,7 +402,8 @@ + + if (rt2x00_is_pci(rt2x00dev)) { + if (rt2x00_rt(rt2x00dev, RT3572) || +- rt2x00_rt(rt2x00dev, RT5390)) { ++ rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) { + rt2800_register_read(rt2x00dev, AUX_CTRL, ®); + rt2x00_set_field32(®, AUX_CTRL_FORCE_PCIE_CLK, 1); + rt2x00_set_field32(®, AUX_CTRL_WAKE_PCIE_EN, 1); +@@ -1956,6 +1957,7 @@ + rt2800_config_channel_rf3052(rt2x00dev, conf, rf, info); + break; + case RF5370: ++ case RF5372: + case RF5390: + rt2800_config_channel_rf53xx(rt2x00dev, conf, rf, info); + break; +@@ -1972,7 +1974,8 @@ + rt2800_bbp_write(rt2x00dev, 86, 0); + + if (rf->channel <= 14) { +- if (!rt2x00_rt(rt2x00dev, RT5390)) { ++ if (!rt2x00_rt(rt2x00dev, RT5390) && ++ !rt2x00_rt(rt2x00dev, RT5392)) { + if (test_bit(CAPABILITY_EXTERNAL_LNA_BG, + &rt2x00dev->cap_flags)) { + rt2800_bbp_write(rt2x00dev, 82, 0x62); +@@ -2502,7 +2505,8 @@ + rt2x00_rt(rt2x00dev, RT3071) || + rt2x00_rt(rt2x00dev, RT3090) || + rt2x00_rt(rt2x00dev, RT3390) || +- rt2x00_rt(rt2x00dev, RT5390)) ++ rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) + return 0x1c + (2 * rt2x00dev->lna_gain); + else + return 0x2e + rt2x00dev->lna_gain; +@@ -2637,7 +2641,8 @@ + } else if (rt2x00_rt(rt2x00dev, RT3572)) { + rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000400); + rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00080606); +- } else if (rt2x00_rt(rt2x00dev, RT5390)) { ++ } else if (rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) { + rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000404); + rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00080606); + rt2800_register_write(rt2x00dev, TX_SW_CFG2, 0x00000000); +@@ -3013,7 +3018,8 @@ + rt2800_wait_bbp_ready(rt2x00dev))) + return -EACCES; + +- if (rt2x00_rt(rt2x00dev, RT5390)) { ++ if (rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) { + rt2800_bbp_read(rt2x00dev, 4, &value); + rt2x00_set_field8(&value, BBP4_MAC_IF_CTRL, 1); + rt2800_bbp_write(rt2x00dev, 4, value); +@@ -3021,19 +3027,22 @@ + + if (rt2800_is_305x_soc(rt2x00dev) || + rt2x00_rt(rt2x00dev, RT3572) || +- rt2x00_rt(rt2x00dev, RT5390)) ++ rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) + rt2800_bbp_write(rt2x00dev, 31, 0x08); + + rt2800_bbp_write(rt2x00dev, 65, 0x2c); + rt2800_bbp_write(rt2x00dev, 66, 0x38); + +- if (rt2x00_rt(rt2x00dev, RT5390)) ++ if (rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) + rt2800_bbp_write(rt2x00dev, 68, 0x0b); + + if (rt2x00_rt_rev(rt2x00dev, RT2860, REV_RT2860C)) { + rt2800_bbp_write(rt2x00dev, 69, 0x16); + rt2800_bbp_write(rt2x00dev, 73, 0x12); +- } else if (rt2x00_rt(rt2x00dev, RT5390)) { ++ } else if (rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) { + rt2800_bbp_write(rt2x00dev, 69, 0x12); + rt2800_bbp_write(rt2x00dev, 73, 0x13); + rt2800_bbp_write(rt2x00dev, 75, 0x46); +@@ -3051,7 +3060,8 @@ + rt2x00_rt(rt2x00dev, RT3090) || + rt2x00_rt(rt2x00dev, RT3390) || + rt2x00_rt(rt2x00dev, RT3572) || +- rt2x00_rt(rt2x00dev, RT5390)) { ++ rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) { + rt2800_bbp_write(rt2x00dev, 79, 0x13); + rt2800_bbp_write(rt2x00dev, 80, 0x05); + rt2800_bbp_write(rt2x00dev, 81, 0x33); +@@ -3063,64 +3073,88 @@ + } + + rt2800_bbp_write(rt2x00dev, 82, 0x62); +- if (rt2x00_rt(rt2x00dev, RT5390)) ++ if (rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) + rt2800_bbp_write(rt2x00dev, 83, 0x7a); + else + rt2800_bbp_write(rt2x00dev, 83, 0x6a); + + if (rt2x00_rt_rev(rt2x00dev, RT2860, REV_RT2860D)) + rt2800_bbp_write(rt2x00dev, 84, 0x19); +- else if (rt2x00_rt(rt2x00dev, RT5390)) ++ else if (rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) + rt2800_bbp_write(rt2x00dev, 84, 0x9a); + else + rt2800_bbp_write(rt2x00dev, 84, 0x99); + +- if (rt2x00_rt(rt2x00dev, RT5390)) ++ if (rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) + rt2800_bbp_write(rt2x00dev, 86, 0x38); + else + rt2800_bbp_write(rt2x00dev, 86, 0x00); + ++ if (rt2x00_rt(rt2x00dev, RT5392)) ++ rt2800_bbp_write(rt2x00dev, 88, 0x90); ++ + rt2800_bbp_write(rt2x00dev, 91, 0x04); + +- if (rt2x00_rt(rt2x00dev, RT5390)) ++ if (rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) + rt2800_bbp_write(rt2x00dev, 92, 0x02); + else + rt2800_bbp_write(rt2x00dev, 92, 0x00); + ++ if (rt2x00_rt(rt2x00dev, RT5392)) { ++ rt2800_bbp_write(rt2x00dev, 95, 0x9a); ++ rt2800_bbp_write(rt2x00dev, 98, 0x12); ++ } ++ + if (rt2x00_rt_rev_gte(rt2x00dev, RT3070, REV_RT3070F) || + rt2x00_rt_rev_gte(rt2x00dev, RT3071, REV_RT3071E) || + rt2x00_rt_rev_gte(rt2x00dev, RT3090, REV_RT3090E) || + rt2x00_rt_rev_gte(rt2x00dev, RT3390, REV_RT3390E) || + rt2x00_rt(rt2x00dev, RT3572) || + rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392) || + rt2800_is_305x_soc(rt2x00dev)) + rt2800_bbp_write(rt2x00dev, 103, 0xc0); + else + rt2800_bbp_write(rt2x00dev, 103, 0x00); + +- if (rt2x00_rt(rt2x00dev, RT5390)) ++ if (rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) + rt2800_bbp_write(rt2x00dev, 104, 0x92); + + if (rt2800_is_305x_soc(rt2x00dev)) + rt2800_bbp_write(rt2x00dev, 105, 0x01); +- else if (rt2x00_rt(rt2x00dev, RT5390)) ++ else if (rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) + rt2800_bbp_write(rt2x00dev, 105, 0x3c); + else + rt2800_bbp_write(rt2x00dev, 105, 0x05); + + if (rt2x00_rt(rt2x00dev, RT5390)) + rt2800_bbp_write(rt2x00dev, 106, 0x03); ++ else if (rt2x00_rt(rt2x00dev, RT5392)) ++ rt2800_bbp_write(rt2x00dev, 106, 0x12); + else + rt2800_bbp_write(rt2x00dev, 106, 0x35); + +- if (rt2x00_rt(rt2x00dev, RT5390)) ++ if (rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) + rt2800_bbp_write(rt2x00dev, 128, 0x12); + ++ if (rt2x00_rt(rt2x00dev, RT5392)) { ++ rt2800_bbp_write(rt2x00dev, 134, 0xd0); ++ rt2800_bbp_write(rt2x00dev, 135, 0xf6); ++ } ++ + if (rt2x00_rt(rt2x00dev, RT3071) || + rt2x00_rt(rt2x00dev, RT3090) || + rt2x00_rt(rt2x00dev, RT3390) || + rt2x00_rt(rt2x00dev, RT3572) || +- rt2x00_rt(rt2x00dev, RT5390)) { ++ rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) { + rt2800_bbp_read(rt2x00dev, 138, &value); + + rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC_CONF0, &eeprom); +@@ -3132,7 +3166,8 @@ + rt2800_bbp_write(rt2x00dev, 138, value); + } + +- if (rt2x00_rt(rt2x00dev, RT5390)) { ++ if (rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) { + int ant, div_mode; + + rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC_CONF1, &eeprom); +@@ -3258,13 +3293,15 @@ + !rt2x00_rt(rt2x00dev, RT3390) && + !rt2x00_rt(rt2x00dev, RT3572) && + !rt2x00_rt(rt2x00dev, RT5390) && ++ !rt2x00_rt(rt2x00dev, RT5392) && + !rt2800_is_305x_soc(rt2x00dev)) + return 0; + + /* + * Init RF calibration. + */ +- if (rt2x00_rt(rt2x00dev, RT5390)) { ++ if (rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) { + rt2800_rfcsr_read(rt2x00dev, 2, &rfcsr); + rt2x00_set_field8(&rfcsr, RFCSR2_RESCAL_EN, 1); + rt2800_rfcsr_write(rt2x00dev, 2, rfcsr); +@@ -3482,6 +3519,66 @@ + rt2800_rfcsr_write(rt2x00dev, 61, 0xdd); + rt2800_rfcsr_write(rt2x00dev, 62, 0x00); + rt2800_rfcsr_write(rt2x00dev, 63, 0x00); ++ } else if (rt2x00_rt(rt2x00dev, RT5392)) { ++ rt2800_rfcsr_write(rt2x00dev, 1, 0x17); ++ rt2800_rfcsr_write(rt2x00dev, 2, 0x80); ++ rt2800_rfcsr_write(rt2x00dev, 3, 0x88); ++ rt2800_rfcsr_write(rt2x00dev, 5, 0x10); ++ rt2800_rfcsr_write(rt2x00dev, 6, 0xe0); ++ rt2800_rfcsr_write(rt2x00dev, 7, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 10, 0x53); ++ rt2800_rfcsr_write(rt2x00dev, 11, 0x4a); ++ rt2800_rfcsr_write(rt2x00dev, 12, 0x46); ++ rt2800_rfcsr_write(rt2x00dev, 13, 0x9f); ++ rt2800_rfcsr_write(rt2x00dev, 14, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 15, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 16, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 18, 0x03); ++ rt2800_rfcsr_write(rt2x00dev, 19, 0x4d); ++ rt2800_rfcsr_write(rt2x00dev, 20, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 21, 0x8d); ++ rt2800_rfcsr_write(rt2x00dev, 22, 0x20); ++ rt2800_rfcsr_write(rt2x00dev, 23, 0x0b); ++ rt2800_rfcsr_write(rt2x00dev, 24, 0x44); ++ rt2800_rfcsr_write(rt2x00dev, 25, 0x80); ++ rt2800_rfcsr_write(rt2x00dev, 26, 0x82); ++ rt2800_rfcsr_write(rt2x00dev, 27, 0x09); ++ rt2800_rfcsr_write(rt2x00dev, 28, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 29, 0x10); ++ rt2800_rfcsr_write(rt2x00dev, 30, 0x10); ++ rt2800_rfcsr_write(rt2x00dev, 31, 0x80); ++ rt2800_rfcsr_write(rt2x00dev, 32, 0x20); ++ rt2800_rfcsr_write(rt2x00dev, 33, 0xC0); ++ rt2800_rfcsr_write(rt2x00dev, 34, 0x07); ++ rt2800_rfcsr_write(rt2x00dev, 35, 0x12); ++ rt2800_rfcsr_write(rt2x00dev, 36, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 37, 0x08); ++ rt2800_rfcsr_write(rt2x00dev, 38, 0x89); ++ rt2800_rfcsr_write(rt2x00dev, 39, 0x1b); ++ rt2800_rfcsr_write(rt2x00dev, 40, 0x0f); ++ rt2800_rfcsr_write(rt2x00dev, 41, 0xbb); ++ rt2800_rfcsr_write(rt2x00dev, 42, 0xd5); ++ rt2800_rfcsr_write(rt2x00dev, 43, 0x9b); ++ rt2800_rfcsr_write(rt2x00dev, 44, 0x0e); ++ rt2800_rfcsr_write(rt2x00dev, 45, 0xa2); ++ rt2800_rfcsr_write(rt2x00dev, 46, 0x73); ++ rt2800_rfcsr_write(rt2x00dev, 47, 0x0c); ++ rt2800_rfcsr_write(rt2x00dev, 48, 0x10); ++ rt2800_rfcsr_write(rt2x00dev, 49, 0x94); ++ rt2800_rfcsr_write(rt2x00dev, 50, 0x94); ++ rt2800_rfcsr_write(rt2x00dev, 51, 0x3a); ++ rt2800_rfcsr_write(rt2x00dev, 52, 0x48); ++ rt2800_rfcsr_write(rt2x00dev, 53, 0x44); ++ rt2800_rfcsr_write(rt2x00dev, 54, 0x38); ++ rt2800_rfcsr_write(rt2x00dev, 55, 0x43); ++ rt2800_rfcsr_write(rt2x00dev, 56, 0xa1); ++ rt2800_rfcsr_write(rt2x00dev, 57, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 58, 0x39); ++ rt2800_rfcsr_write(rt2x00dev, 59, 0x07); ++ rt2800_rfcsr_write(rt2x00dev, 60, 0x45); ++ rt2800_rfcsr_write(rt2x00dev, 61, 0x91); ++ rt2800_rfcsr_write(rt2x00dev, 62, 0x39); ++ rt2800_rfcsr_write(rt2x00dev, 63, 0x07); + } + + if (rt2x00_rt_rev_lt(rt2x00dev, RT3070, REV_RT3070F)) { +@@ -3549,7 +3646,8 @@ + rt2800_init_rx_filter(rt2x00dev, true, 0x27, 0x15); + } + +- if (!rt2x00_rt(rt2x00dev, RT5390)) { ++ if (!rt2x00_rt(rt2x00dev, RT5390) && ++ !rt2x00_rt(rt2x00dev, RT5392)) { + /* + * Set back to initial state + */ +@@ -3577,7 +3675,8 @@ + rt2x00_set_field32(®, OPT_14_CSR_BIT0, 1); + rt2800_register_write(rt2x00dev, OPT_14_CSR, reg); + +- if (!rt2x00_rt(rt2x00dev, RT5390)) { ++ if (!rt2x00_rt(rt2x00dev, RT5390) && ++ !rt2x00_rt(rt2x00dev, RT5392)) { + rt2800_rfcsr_read(rt2x00dev, 17, &rfcsr); + rt2x00_set_field8(&rfcsr, RFCSR17_TX_LO1_EN, 0); + if (rt2x00_rt(rt2x00dev, RT3070) || +@@ -3645,7 +3744,8 @@ + rt2800_rfcsr_write(rt2x00dev, 27, rfcsr); + } + +- if (rt2x00_rt(rt2x00dev, RT5390)) { ++ if (rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) { + rt2800_rfcsr_read(rt2x00dev, 38, &rfcsr); + rt2x00_set_field8(&rfcsr, RFCSR38_RX_LO1_EN, 0); + rt2800_rfcsr_write(rt2x00dev, 38, rfcsr); +@@ -3929,7 +4029,8 @@ + * RT53xx: defined in "EEPROM_CHIP_ID" field + */ + rt2800_register_read(rt2x00dev, MAC_CSR0, ®); +- if (rt2x00_get_field32(reg, MAC_CSR0_CHIPSET) == RT5390) ++ if (rt2x00_get_field32(reg, MAC_CSR0_CHIPSET) == RT5390 || ++ rt2x00_get_field32(reg, MAC_CSR0_CHIPSET) == RT5392) + rt2x00_eeprom_read(rt2x00dev, EEPROM_CHIP_ID, &value); + else + value = rt2x00_get_field16(eeprom, EEPROM_NIC_CONF0_RF_TYPE); +@@ -3947,6 +4048,7 @@ + case RT3390: + case RT3572: + case RT5390: ++ case RT5392: + break; + default: + ERROR(rt2x00dev, "Invalid RT chipset detected.\n"); +@@ -3965,6 +4067,7 @@ + case RF3052: + case RF3320: + case RF5370: ++ case RF5372: + case RF5390: + break; + default: +@@ -4271,6 +4374,7 @@ + rt2x00_rf(rt2x00dev, RF3022) || + rt2x00_rf(rt2x00dev, RF3320) || + rt2x00_rf(rt2x00dev, RF5370) || ++ rt2x00_rf(rt2x00dev, RF5372) || + rt2x00_rf(rt2x00dev, RF5390)) { + spec->num_channels = 14; + spec->channels = rf_vals_3x; +diff -Naur linux.orig/drivers/net/wireless/rt2x00/rt2800pci.c linux/drivers/net/wireless/rt2x00/rt2800pci.c +--- linux.orig/drivers/net/wireless/rt2x00/rt2800pci.c 2012-10-27 06:39:33.000000000 +0200 ++++ linux/drivers/net/wireless/rt2x00/rt2800pci.c 2014-02-24 22:56:12.744488448 +0100 +@@ -480,7 +480,8 @@ + + if (rt2x00_is_pcie(rt2x00dev) && + (rt2x00_rt(rt2x00dev, RT3572) || +- rt2x00_rt(rt2x00dev, RT5390))) { ++ rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392))) { + rt2x00pci_register_read(rt2x00dev, AUX_CTRL, ®); + rt2x00_set_field32(®, AUX_CTRL_FORCE_PCIE_CLK, 1); + rt2x00_set_field32(®, AUX_CTRL_WAKE_PCIE_EN, 1); +diff -Naur linux.orig/drivers/net/wireless/rt2x00/rt2x00.h linux/drivers/net/wireless/rt2x00/rt2x00.h +--- linux.orig/drivers/net/wireless/rt2x00/rt2x00.h 2012-10-27 06:39:33.000000000 +0200 ++++ linux/drivers/net/wireless/rt2x00/rt2x00.h 2014-02-23 17:59:23.000000000 +0100 +@@ -192,6 +192,7 @@ + #define RT3593 0x3593 + #define RT3883 0x3883 /* WSOC */ + #define RT5390 0x5390 /* 2.4GHz */ ++#define RT5392 0x5392 /* 2.4GHz */ + + u16 rf; + u16 rev; diff --git a/recipes/linux/linux-vusolo2_3.3.8.bb b/recipes/linux/linux-vusolo2_3.3.8.bb index d3e5969..4af2782 100644 --- a/recipes/linux/linux-vusolo2_3.3.8.bb +++ b/recipes/linux/linux-vusolo2_3.3.8.bb @@ -1,3 +1,3 @@ require linux-vuplus-3.3.8.inc -PR = "r1" +PR = "r2" diff --git a/recipes/linux/linux-vusolo_3.1.1.bb b/recipes/linux/linux-vusolo_3.1.1.bb index 78f1a45..809828a 100644 --- a/recipes/linux/linux-vusolo_3.1.1.bb +++ b/recipes/linux/linux-vusolo_3.1.1.bb @@ -1,6 +1,6 @@ require linux-vuplus-3.1.1.inc -PR = "r11" +PR = "r12" SRC_URI += "\ file://linux_3.1.1_vusolo.patch;patch=1;pnum=1 \ diff --git a/recipes/linux/linux-vuultimo-3.1.1/rt5372_kernel_3.1.1.patch b/recipes/linux/linux-vuultimo-3.1.1/rt5372_kernel_3.1.1.patch new file mode 100644 index 0000000..d70c5c6 --- /dev/null +++ b/recipes/linux/linux-vuultimo-3.1.1/rt5372_kernel_3.1.1.patch @@ -0,0 +1,437 @@ +diff -Naur linux.orig/drivers/net/wireless/rt2x00/rt2800.h linux/drivers/net/wireless/rt2x00/rt2800.h +--- linux.orig/drivers/net/wireless/rt2x00/rt2800.h 2011-11-11 21:19:27.000000000 +0100 ++++ linux/drivers/net/wireless/rt2x00/rt2800.h 2014-02-23 20:21:13.000000000 +0100 +@@ -68,6 +68,7 @@ + #define RF3322 0x000c + #define RF3853 0x000d + #define RF5370 0x5370 ++#define RF5372 0x5372 + #define RF5390 0x5390 + + /* +diff -Naur linux.orig/drivers/net/wireless/rt2x00/rt2800lib.c linux/drivers/net/wireless/rt2x00/rt2800lib.c +--- linux.orig/drivers/net/wireless/rt2x00/rt2800lib.c 2011-11-11 21:19:27.000000000 +0100 ++++ linux/drivers/net/wireless/rt2x00/rt2800lib.c 2014-02-23 20:25:27.000000000 +0100 +@@ -402,7 +402,8 @@ + + if (rt2x00_is_pci(rt2x00dev)) { + if (rt2x00_rt(rt2x00dev, RT3572) || +- rt2x00_rt(rt2x00dev, RT5390)) { ++ rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) { + rt2800_register_read(rt2x00dev, AUX_CTRL, ®); + rt2x00_set_field32(®, AUX_CTRL_FORCE_PCIE_CLK, 1); + rt2x00_set_field32(®, AUX_CTRL_WAKE_PCIE_EN, 1); +@@ -1128,8 +1129,10 @@ + !(filter_flags & FIF_CONTROL)); + rt2x00_set_field32(®, RX_FILTER_CFG_DROP_PSPOLL, + !(filter_flags & FIF_PSPOLL)); +- rt2x00_set_field32(®, RX_FILTER_CFG_DROP_BA, 1); +- rt2x00_set_field32(®, RX_FILTER_CFG_DROP_BAR, 0); ++ rt2x00_set_field32(®, RX_FILTER_CFG_DROP_BA, ++ !(filter_flags & FIF_CONTROL)); ++ rt2x00_set_field32(®, RX_FILTER_CFG_DROP_BAR, ++ !(filter_flags & FIF_CONTROL)); + rt2x00_set_field32(®, RX_FILTER_CFG_DROP_CNTL, + !(filter_flags & FIF_CONTROL)); + rt2800_register_write(rt2x00dev, RX_FILTER_CFG, reg); +@@ -1867,19 +1870,25 @@ + info->default_power2 = TXPOWER_A_TO_DEV(info->default_power2); + } + +- if (rt2x00_rf(rt2x00dev, RF2020) || +- rt2x00_rf(rt2x00dev, RF3020) || +- rt2x00_rf(rt2x00dev, RF3021) || +- rt2x00_rf(rt2x00dev, RF3022) || +- rt2x00_rf(rt2x00dev, RF3320)) ++ switch (rt2x00dev->chip.rf) { ++ case RF2020: ++ case RF3020: ++ case RF3021: ++ case RF3022: ++ case RF3320: + rt2800_config_channel_rf3xxx(rt2x00dev, conf, rf, info); +- else if (rt2x00_rf(rt2x00dev, RF3052)) ++ break; ++ case RF3052: + rt2800_config_channel_rf3052(rt2x00dev, conf, rf, info); +- else if (rt2x00_rf(rt2x00dev, RF5370) || +- rt2x00_rf(rt2x00dev, RF5390)) ++ break; ++ case RF5370: ++ case RF5372: ++ case RF5390: + rt2800_config_channel_rf53xx(rt2x00dev, conf, rf, info); +- else ++ break; ++ default: + rt2800_config_channel_rf2xxx(rt2x00dev, conf, rf, info); ++ } + + /* + * Change BBP settings +@@ -1890,7 +1899,8 @@ + rt2800_bbp_write(rt2x00dev, 86, 0); + + if (rf->channel <= 14) { +- if (!rt2x00_rt(rt2x00dev, RT5390)) { ++ if (!rt2x00_rt(rt2x00dev, RT5390) && ++ !rt2x00_rt(rt2x00dev, RT5392)) { + if (test_bit(CAPABILITY_EXTERNAL_LNA_BG, + &rt2x00dev->cap_flags)) { + rt2800_bbp_write(rt2x00dev, 82, 0x62); +@@ -2420,7 +2430,8 @@ + rt2x00_rt(rt2x00dev, RT3071) || + rt2x00_rt(rt2x00dev, RT3090) || + rt2x00_rt(rt2x00dev, RT3390) || +- rt2x00_rt(rt2x00dev, RT5390)) ++ rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) + return 0x1c + (2 * rt2x00dev->lna_gain); + else + return 0x2e + rt2x00dev->lna_gain; +@@ -2555,7 +2566,8 @@ + } else if (rt2x00_rt(rt2x00dev, RT3572)) { + rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000400); + rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00080606); +- } else if (rt2x00_rt(rt2x00dev, RT5390)) { ++ } else if (rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) { + rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000404); + rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00080606); + rt2800_register_write(rt2x00dev, TX_SW_CFG2, 0x00000000); +@@ -2934,7 +2946,8 @@ + rt2800_wait_bbp_ready(rt2x00dev))) + return -EACCES; + +- if (rt2x00_rt(rt2x00dev, RT5390)) { ++ if (rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) { + rt2800_bbp_read(rt2x00dev, 4, &value); + rt2x00_set_field8(&value, BBP4_MAC_IF_CTRL, 1); + rt2800_bbp_write(rt2x00dev, 4, value); +@@ -2942,19 +2955,22 @@ + + if (rt2800_is_305x_soc(rt2x00dev) || + rt2x00_rt(rt2x00dev, RT3572) || +- rt2x00_rt(rt2x00dev, RT5390)) ++ rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) + rt2800_bbp_write(rt2x00dev, 31, 0x08); + + rt2800_bbp_write(rt2x00dev, 65, 0x2c); + rt2800_bbp_write(rt2x00dev, 66, 0x38); + +- if (rt2x00_rt(rt2x00dev, RT5390)) ++ if (rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) + rt2800_bbp_write(rt2x00dev, 68, 0x0b); + + if (rt2x00_rt_rev(rt2x00dev, RT2860, REV_RT2860C)) { + rt2800_bbp_write(rt2x00dev, 69, 0x16); + rt2800_bbp_write(rt2x00dev, 73, 0x12); +- } else if (rt2x00_rt(rt2x00dev, RT5390)) { ++ } else if (rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) { + rt2800_bbp_write(rt2x00dev, 69, 0x12); + rt2800_bbp_write(rt2x00dev, 73, 0x13); + rt2800_bbp_write(rt2x00dev, 75, 0x46); +@@ -2972,7 +2988,8 @@ + rt2x00_rt(rt2x00dev, RT3090) || + rt2x00_rt(rt2x00dev, RT3390) || + rt2x00_rt(rt2x00dev, RT3572) || +- rt2x00_rt(rt2x00dev, RT5390)) { ++ rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) { + rt2800_bbp_write(rt2x00dev, 79, 0x13); + rt2800_bbp_write(rt2x00dev, 80, 0x05); + rt2800_bbp_write(rt2x00dev, 81, 0x33); +@@ -2984,64 +3001,88 @@ + } + + rt2800_bbp_write(rt2x00dev, 82, 0x62); +- if (rt2x00_rt(rt2x00dev, RT5390)) ++ if (rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) + rt2800_bbp_write(rt2x00dev, 83, 0x7a); + else + rt2800_bbp_write(rt2x00dev, 83, 0x6a); + + if (rt2x00_rt_rev(rt2x00dev, RT2860, REV_RT2860D)) + rt2800_bbp_write(rt2x00dev, 84, 0x19); +- else if (rt2x00_rt(rt2x00dev, RT5390)) ++ else if (rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) + rt2800_bbp_write(rt2x00dev, 84, 0x9a); + else + rt2800_bbp_write(rt2x00dev, 84, 0x99); + +- if (rt2x00_rt(rt2x00dev, RT5390)) ++ if (rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) + rt2800_bbp_write(rt2x00dev, 86, 0x38); + else + rt2800_bbp_write(rt2x00dev, 86, 0x00); + ++ if (rt2x00_rt(rt2x00dev, RT5392)) ++ rt2800_bbp_write(rt2x00dev, 88, 0x90); ++ + rt2800_bbp_write(rt2x00dev, 91, 0x04); + +- if (rt2x00_rt(rt2x00dev, RT5390)) ++ if (rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) + rt2800_bbp_write(rt2x00dev, 92, 0x02); + else + rt2800_bbp_write(rt2x00dev, 92, 0x00); + ++ if (rt2x00_rt(rt2x00dev, RT5392)) { ++ rt2800_bbp_write(rt2x00dev, 95, 0x9a); ++ rt2800_bbp_write(rt2x00dev, 98, 0x12); ++ } ++ + if (rt2x00_rt_rev_gte(rt2x00dev, RT3070, REV_RT3070F) || + rt2x00_rt_rev_gte(rt2x00dev, RT3071, REV_RT3071E) || + rt2x00_rt_rev_gte(rt2x00dev, RT3090, REV_RT3090E) || + rt2x00_rt_rev_gte(rt2x00dev, RT3390, REV_RT3390E) || + rt2x00_rt(rt2x00dev, RT3572) || + rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392) || + rt2800_is_305x_soc(rt2x00dev)) + rt2800_bbp_write(rt2x00dev, 103, 0xc0); + else + rt2800_bbp_write(rt2x00dev, 103, 0x00); + +- if (rt2x00_rt(rt2x00dev, RT5390)) ++ if (rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) + rt2800_bbp_write(rt2x00dev, 104, 0x92); + + if (rt2800_is_305x_soc(rt2x00dev)) + rt2800_bbp_write(rt2x00dev, 105, 0x01); +- else if (rt2x00_rt(rt2x00dev, RT5390)) ++ else if (rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) + rt2800_bbp_write(rt2x00dev, 105, 0x3c); + else + rt2800_bbp_write(rt2x00dev, 105, 0x05); + + if (rt2x00_rt(rt2x00dev, RT5390)) + rt2800_bbp_write(rt2x00dev, 106, 0x03); ++ else if (rt2x00_rt(rt2x00dev, RT5392)) ++ rt2800_bbp_write(rt2x00dev, 106, 0x12); + else + rt2800_bbp_write(rt2x00dev, 106, 0x35); + +- if (rt2x00_rt(rt2x00dev, RT5390)) ++ if (rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) + rt2800_bbp_write(rt2x00dev, 128, 0x12); + ++ if (rt2x00_rt(rt2x00dev, RT5392)) { ++ rt2800_bbp_write(rt2x00dev, 134, 0xd0); ++ rt2800_bbp_write(rt2x00dev, 135, 0xf6); ++ } ++ + if (rt2x00_rt(rt2x00dev, RT3071) || + rt2x00_rt(rt2x00dev, RT3090) || + rt2x00_rt(rt2x00dev, RT3390) || + rt2x00_rt(rt2x00dev, RT3572) || +- rt2x00_rt(rt2x00dev, RT5390)) { ++ rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) { + rt2800_bbp_read(rt2x00dev, 138, &value); + + rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC_CONF0, &eeprom); +@@ -3053,7 +3094,8 @@ + rt2800_bbp_write(rt2x00dev, 138, value); + } + +- if (rt2x00_rt(rt2x00dev, RT5390)) { ++ if (rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) { + int ant, div_mode; + + rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC_CONF1, &eeprom); +@@ -3179,13 +3221,15 @@ + !rt2x00_rt(rt2x00dev, RT3390) && + !rt2x00_rt(rt2x00dev, RT3572) && + !rt2x00_rt(rt2x00dev, RT5390) && ++ !rt2x00_rt(rt2x00dev, RT5392) && + !rt2800_is_305x_soc(rt2x00dev)) + return 0; + + /* + * Init RF calibration. + */ +- if (rt2x00_rt(rt2x00dev, RT5390)) { ++ if (rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) { + rt2800_rfcsr_read(rt2x00dev, 2, &rfcsr); + rt2x00_set_field8(&rfcsr, RFCSR2_RESCAL_EN, 1); + rt2800_rfcsr_write(rt2x00dev, 2, rfcsr); +@@ -3403,6 +3447,66 @@ + rt2800_rfcsr_write(rt2x00dev, 61, 0xdd); + rt2800_rfcsr_write(rt2x00dev, 62, 0x00); + rt2800_rfcsr_write(rt2x00dev, 63, 0x00); ++ } else if (rt2x00_rt(rt2x00dev, RT5392)) { ++ rt2800_rfcsr_write(rt2x00dev, 1, 0x17); ++ rt2800_rfcsr_write(rt2x00dev, 2, 0x80); ++ rt2800_rfcsr_write(rt2x00dev, 3, 0x88); ++ rt2800_rfcsr_write(rt2x00dev, 5, 0x10); ++ rt2800_rfcsr_write(rt2x00dev, 6, 0xe0); ++ rt2800_rfcsr_write(rt2x00dev, 7, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 10, 0x53); ++ rt2800_rfcsr_write(rt2x00dev, 11, 0x4a); ++ rt2800_rfcsr_write(rt2x00dev, 12, 0x46); ++ rt2800_rfcsr_write(rt2x00dev, 13, 0x9f); ++ rt2800_rfcsr_write(rt2x00dev, 14, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 15, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 16, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 18, 0x03); ++ rt2800_rfcsr_write(rt2x00dev, 19, 0x4d); ++ rt2800_rfcsr_write(rt2x00dev, 20, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 21, 0x8d); ++ rt2800_rfcsr_write(rt2x00dev, 22, 0x20); ++ rt2800_rfcsr_write(rt2x00dev, 23, 0x0b); ++ rt2800_rfcsr_write(rt2x00dev, 24, 0x44); ++ rt2800_rfcsr_write(rt2x00dev, 25, 0x80); ++ rt2800_rfcsr_write(rt2x00dev, 26, 0x82); ++ rt2800_rfcsr_write(rt2x00dev, 27, 0x09); ++ rt2800_rfcsr_write(rt2x00dev, 28, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 29, 0x10); ++ rt2800_rfcsr_write(rt2x00dev, 30, 0x10); ++ rt2800_rfcsr_write(rt2x00dev, 31, 0x80); ++ rt2800_rfcsr_write(rt2x00dev, 32, 0x20); ++ rt2800_rfcsr_write(rt2x00dev, 33, 0xC0); ++ rt2800_rfcsr_write(rt2x00dev, 34, 0x07); ++ rt2800_rfcsr_write(rt2x00dev, 35, 0x12); ++ rt2800_rfcsr_write(rt2x00dev, 36, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 37, 0x08); ++ rt2800_rfcsr_write(rt2x00dev, 38, 0x89); ++ rt2800_rfcsr_write(rt2x00dev, 39, 0x1b); ++ rt2800_rfcsr_write(rt2x00dev, 40, 0x0f); ++ rt2800_rfcsr_write(rt2x00dev, 41, 0xbb); ++ rt2800_rfcsr_write(rt2x00dev, 42, 0xd5); ++ rt2800_rfcsr_write(rt2x00dev, 43, 0x9b); ++ rt2800_rfcsr_write(rt2x00dev, 44, 0x0e); ++ rt2800_rfcsr_write(rt2x00dev, 45, 0xa2); ++ rt2800_rfcsr_write(rt2x00dev, 46, 0x73); ++ rt2800_rfcsr_write(rt2x00dev, 47, 0x0c); ++ rt2800_rfcsr_write(rt2x00dev, 48, 0x10); ++ rt2800_rfcsr_write(rt2x00dev, 49, 0x94); ++ rt2800_rfcsr_write(rt2x00dev, 50, 0x94); ++ rt2800_rfcsr_write(rt2x00dev, 51, 0x3a); ++ rt2800_rfcsr_write(rt2x00dev, 52, 0x48); ++ rt2800_rfcsr_write(rt2x00dev, 53, 0x44); ++ rt2800_rfcsr_write(rt2x00dev, 54, 0x38); ++ rt2800_rfcsr_write(rt2x00dev, 55, 0x43); ++ rt2800_rfcsr_write(rt2x00dev, 56, 0xa1); ++ rt2800_rfcsr_write(rt2x00dev, 57, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 58, 0x39); ++ rt2800_rfcsr_write(rt2x00dev, 59, 0x07); ++ rt2800_rfcsr_write(rt2x00dev, 60, 0x45); ++ rt2800_rfcsr_write(rt2x00dev, 61, 0x91); ++ rt2800_rfcsr_write(rt2x00dev, 62, 0x39); ++ rt2800_rfcsr_write(rt2x00dev, 63, 0x07); + } + + if (rt2x00_rt_rev_lt(rt2x00dev, RT3070, REV_RT3070F)) { +@@ -3470,7 +3574,8 @@ + rt2800_init_rx_filter(rt2x00dev, true, 0x27, 0x15); + } + +- if (!rt2x00_rt(rt2x00dev, RT5390)) { ++ if (!rt2x00_rt(rt2x00dev, RT5390) && ++ !rt2x00_rt(rt2x00dev, RT5392)) { + /* + * Set back to initial state + */ +@@ -3498,7 +3603,8 @@ + rt2x00_set_field32(®, OPT_14_CSR_BIT0, 1); + rt2800_register_write(rt2x00dev, OPT_14_CSR, reg); + +- if (!rt2x00_rt(rt2x00dev, RT5390)) { ++ if (!rt2x00_rt(rt2x00dev, RT5390) && ++ !rt2x00_rt(rt2x00dev, RT5392)) { + rt2800_rfcsr_read(rt2x00dev, 17, &rfcsr); + rt2x00_set_field8(&rfcsr, RFCSR17_TX_LO1_EN, 0); + if (rt2x00_rt(rt2x00dev, RT3070) || +@@ -3566,7 +3672,8 @@ + rt2800_rfcsr_write(rt2x00dev, 27, rfcsr); + } + +- if (rt2x00_rt(rt2x00dev, RT5390)) { ++ if (rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) { + rt2800_rfcsr_read(rt2x00dev, 38, &rfcsr); + rt2x00_set_field8(&rfcsr, RFCSR38_RX_LO1_EN, 0); + rt2800_rfcsr_write(rt2x00dev, 38, rfcsr); +@@ -3850,7 +3957,8 @@ + * RT53xx: defined in "EEPROM_CHIP_ID" field + */ + rt2800_register_read(rt2x00dev, MAC_CSR0, ®); +- if (rt2x00_get_field32(reg, MAC_CSR0_CHIPSET) == RT5390) ++ if (rt2x00_get_field32(reg, MAC_CSR0_CHIPSET) == RT5390 || ++ rt2x00_get_field32(reg, MAC_CSR0_CHIPSET) == RT5392) + rt2x00_eeprom_read(rt2x00dev, EEPROM_CHIP_ID, &value); + else + value = rt2x00_get_field16(eeprom, EEPROM_NIC_CONF0_RF_TYPE); +@@ -3858,15 +3966,19 @@ + rt2x00_set_chip(rt2x00dev, rt2x00_get_field32(reg, MAC_CSR0_CHIPSET), + value, rt2x00_get_field32(reg, MAC_CSR0_REVISION)); + +- if (!rt2x00_rt(rt2x00dev, RT2860) && +- !rt2x00_rt(rt2x00dev, RT2872) && +- !rt2x00_rt(rt2x00dev, RT2883) && +- !rt2x00_rt(rt2x00dev, RT3070) && +- !rt2x00_rt(rt2x00dev, RT3071) && +- !rt2x00_rt(rt2x00dev, RT3090) && +- !rt2x00_rt(rt2x00dev, RT3390) && +- !rt2x00_rt(rt2x00dev, RT3572) && +- !rt2x00_rt(rt2x00dev, RT5390)) { ++ switch (rt2x00dev->chip.rt) { ++ case RT2860: ++ case RT2872: ++ case RT2883: ++ case RT3070: ++ case RT3071: ++ case RT3090: ++ case RT3390: ++ case RT3572: ++ case RT5390: ++ case RT5392: ++ break; ++ default: + ERROR(rt2x00dev, "Invalid RT chipset detected.\n"); + return -ENODEV; + } +@@ -3883,6 +3995,7 @@ + case RF3052: + case RF3320: + case RF5370: ++ case RF5372: + case RF5390: + break; + default: +@@ -4189,6 +4302,7 @@ + rt2x00_rf(rt2x00dev, RF3022) || + rt2x00_rf(rt2x00dev, RF3320) || + rt2x00_rf(rt2x00dev, RF5370) || ++ rt2x00_rf(rt2x00dev, RF5372) || + rt2x00_rf(rt2x00dev, RF5390)) { + spec->num_channels = 14; + spec->channels = rf_vals_3x; +diff -Naur linux.orig/drivers/net/wireless/rt2x00/rt2x00.h linux/drivers/net/wireless/rt2x00/rt2x00.h +--- linux.orig/drivers/net/wireless/rt2x00/rt2x00.h 2011-11-11 21:19:27.000000000 +0100 ++++ linux/drivers/net/wireless/rt2x00/rt2x00.h 2014-02-23 20:20:33.000000000 +0100 +@@ -191,7 +191,8 @@ + #define RT3572 0x3572 + #define RT3593 0x3593 /* PCIe */ + #define RT3883 0x3883 /* WSOC */ +-#define RT5390 0x5390 /* 2.4GHz */ ++#define RT5390 0x5390 /* 2.4GHz */ ++#define RT5392 0x5392 /* 2.4GHz */ + + u16 rf; + u16 rev; diff --git a/recipes/linux/linux-vuultimo_3.1.1.bb b/recipes/linux/linux-vuultimo_3.1.1.bb index e3c7460..121c92c 100644 --- a/recipes/linux/linux-vuultimo_3.1.1.bb +++ b/recipes/linux/linux-vuultimo_3.1.1.bb @@ -1,6 +1,6 @@ require linux-vuplus-3.1.1.inc -PR = "r11" +PR = "r12" SRC_URI += "\ file://linux-sata_brcm.patch;patch=1;pnum=1 \ diff --git a/recipes/linux/linux-vuuno-3.1.1/rt5372_kernel_3.1.1.patch b/recipes/linux/linux-vuuno-3.1.1/rt5372_kernel_3.1.1.patch new file mode 100644 index 0000000..d70c5c6 --- /dev/null +++ b/recipes/linux/linux-vuuno-3.1.1/rt5372_kernel_3.1.1.patch @@ -0,0 +1,437 @@ +diff -Naur linux.orig/drivers/net/wireless/rt2x00/rt2800.h linux/drivers/net/wireless/rt2x00/rt2800.h +--- linux.orig/drivers/net/wireless/rt2x00/rt2800.h 2011-11-11 21:19:27.000000000 +0100 ++++ linux/drivers/net/wireless/rt2x00/rt2800.h 2014-02-23 20:21:13.000000000 +0100 +@@ -68,6 +68,7 @@ + #define RF3322 0x000c + #define RF3853 0x000d + #define RF5370 0x5370 ++#define RF5372 0x5372 + #define RF5390 0x5390 + + /* +diff -Naur linux.orig/drivers/net/wireless/rt2x00/rt2800lib.c linux/drivers/net/wireless/rt2x00/rt2800lib.c +--- linux.orig/drivers/net/wireless/rt2x00/rt2800lib.c 2011-11-11 21:19:27.000000000 +0100 ++++ linux/drivers/net/wireless/rt2x00/rt2800lib.c 2014-02-23 20:25:27.000000000 +0100 +@@ -402,7 +402,8 @@ + + if (rt2x00_is_pci(rt2x00dev)) { + if (rt2x00_rt(rt2x00dev, RT3572) || +- rt2x00_rt(rt2x00dev, RT5390)) { ++ rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) { + rt2800_register_read(rt2x00dev, AUX_CTRL, ®); + rt2x00_set_field32(®, AUX_CTRL_FORCE_PCIE_CLK, 1); + rt2x00_set_field32(®, AUX_CTRL_WAKE_PCIE_EN, 1); +@@ -1128,8 +1129,10 @@ + !(filter_flags & FIF_CONTROL)); + rt2x00_set_field32(®, RX_FILTER_CFG_DROP_PSPOLL, + !(filter_flags & FIF_PSPOLL)); +- rt2x00_set_field32(®, RX_FILTER_CFG_DROP_BA, 1); +- rt2x00_set_field32(®, RX_FILTER_CFG_DROP_BAR, 0); ++ rt2x00_set_field32(®, RX_FILTER_CFG_DROP_BA, ++ !(filter_flags & FIF_CONTROL)); ++ rt2x00_set_field32(®, RX_FILTER_CFG_DROP_BAR, ++ !(filter_flags & FIF_CONTROL)); + rt2x00_set_field32(®, RX_FILTER_CFG_DROP_CNTL, + !(filter_flags & FIF_CONTROL)); + rt2800_register_write(rt2x00dev, RX_FILTER_CFG, reg); +@@ -1867,19 +1870,25 @@ + info->default_power2 = TXPOWER_A_TO_DEV(info->default_power2); + } + +- if (rt2x00_rf(rt2x00dev, RF2020) || +- rt2x00_rf(rt2x00dev, RF3020) || +- rt2x00_rf(rt2x00dev, RF3021) || +- rt2x00_rf(rt2x00dev, RF3022) || +- rt2x00_rf(rt2x00dev, RF3320)) ++ switch (rt2x00dev->chip.rf) { ++ case RF2020: ++ case RF3020: ++ case RF3021: ++ case RF3022: ++ case RF3320: + rt2800_config_channel_rf3xxx(rt2x00dev, conf, rf, info); +- else if (rt2x00_rf(rt2x00dev, RF3052)) ++ break; ++ case RF3052: + rt2800_config_channel_rf3052(rt2x00dev, conf, rf, info); +- else if (rt2x00_rf(rt2x00dev, RF5370) || +- rt2x00_rf(rt2x00dev, RF5390)) ++ break; ++ case RF5370: ++ case RF5372: ++ case RF5390: + rt2800_config_channel_rf53xx(rt2x00dev, conf, rf, info); +- else ++ break; ++ default: + rt2800_config_channel_rf2xxx(rt2x00dev, conf, rf, info); ++ } + + /* + * Change BBP settings +@@ -1890,7 +1899,8 @@ + rt2800_bbp_write(rt2x00dev, 86, 0); + + if (rf->channel <= 14) { +- if (!rt2x00_rt(rt2x00dev, RT5390)) { ++ if (!rt2x00_rt(rt2x00dev, RT5390) && ++ !rt2x00_rt(rt2x00dev, RT5392)) { + if (test_bit(CAPABILITY_EXTERNAL_LNA_BG, + &rt2x00dev->cap_flags)) { + rt2800_bbp_write(rt2x00dev, 82, 0x62); +@@ -2420,7 +2430,8 @@ + rt2x00_rt(rt2x00dev, RT3071) || + rt2x00_rt(rt2x00dev, RT3090) || + rt2x00_rt(rt2x00dev, RT3390) || +- rt2x00_rt(rt2x00dev, RT5390)) ++ rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) + return 0x1c + (2 * rt2x00dev->lna_gain); + else + return 0x2e + rt2x00dev->lna_gain; +@@ -2555,7 +2566,8 @@ + } else if (rt2x00_rt(rt2x00dev, RT3572)) { + rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000400); + rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00080606); +- } else if (rt2x00_rt(rt2x00dev, RT5390)) { ++ } else if (rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) { + rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000404); + rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00080606); + rt2800_register_write(rt2x00dev, TX_SW_CFG2, 0x00000000); +@@ -2934,7 +2946,8 @@ + rt2800_wait_bbp_ready(rt2x00dev))) + return -EACCES; + +- if (rt2x00_rt(rt2x00dev, RT5390)) { ++ if (rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) { + rt2800_bbp_read(rt2x00dev, 4, &value); + rt2x00_set_field8(&value, BBP4_MAC_IF_CTRL, 1); + rt2800_bbp_write(rt2x00dev, 4, value); +@@ -2942,19 +2955,22 @@ + + if (rt2800_is_305x_soc(rt2x00dev) || + rt2x00_rt(rt2x00dev, RT3572) || +- rt2x00_rt(rt2x00dev, RT5390)) ++ rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) + rt2800_bbp_write(rt2x00dev, 31, 0x08); + + rt2800_bbp_write(rt2x00dev, 65, 0x2c); + rt2800_bbp_write(rt2x00dev, 66, 0x38); + +- if (rt2x00_rt(rt2x00dev, RT5390)) ++ if (rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) + rt2800_bbp_write(rt2x00dev, 68, 0x0b); + + if (rt2x00_rt_rev(rt2x00dev, RT2860, REV_RT2860C)) { + rt2800_bbp_write(rt2x00dev, 69, 0x16); + rt2800_bbp_write(rt2x00dev, 73, 0x12); +- } else if (rt2x00_rt(rt2x00dev, RT5390)) { ++ } else if (rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) { + rt2800_bbp_write(rt2x00dev, 69, 0x12); + rt2800_bbp_write(rt2x00dev, 73, 0x13); + rt2800_bbp_write(rt2x00dev, 75, 0x46); +@@ -2972,7 +2988,8 @@ + rt2x00_rt(rt2x00dev, RT3090) || + rt2x00_rt(rt2x00dev, RT3390) || + rt2x00_rt(rt2x00dev, RT3572) || +- rt2x00_rt(rt2x00dev, RT5390)) { ++ rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) { + rt2800_bbp_write(rt2x00dev, 79, 0x13); + rt2800_bbp_write(rt2x00dev, 80, 0x05); + rt2800_bbp_write(rt2x00dev, 81, 0x33); +@@ -2984,64 +3001,88 @@ + } + + rt2800_bbp_write(rt2x00dev, 82, 0x62); +- if (rt2x00_rt(rt2x00dev, RT5390)) ++ if (rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) + rt2800_bbp_write(rt2x00dev, 83, 0x7a); + else + rt2800_bbp_write(rt2x00dev, 83, 0x6a); + + if (rt2x00_rt_rev(rt2x00dev, RT2860, REV_RT2860D)) + rt2800_bbp_write(rt2x00dev, 84, 0x19); +- else if (rt2x00_rt(rt2x00dev, RT5390)) ++ else if (rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) + rt2800_bbp_write(rt2x00dev, 84, 0x9a); + else + rt2800_bbp_write(rt2x00dev, 84, 0x99); + +- if (rt2x00_rt(rt2x00dev, RT5390)) ++ if (rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) + rt2800_bbp_write(rt2x00dev, 86, 0x38); + else + rt2800_bbp_write(rt2x00dev, 86, 0x00); + ++ if (rt2x00_rt(rt2x00dev, RT5392)) ++ rt2800_bbp_write(rt2x00dev, 88, 0x90); ++ + rt2800_bbp_write(rt2x00dev, 91, 0x04); + +- if (rt2x00_rt(rt2x00dev, RT5390)) ++ if (rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) + rt2800_bbp_write(rt2x00dev, 92, 0x02); + else + rt2800_bbp_write(rt2x00dev, 92, 0x00); + ++ if (rt2x00_rt(rt2x00dev, RT5392)) { ++ rt2800_bbp_write(rt2x00dev, 95, 0x9a); ++ rt2800_bbp_write(rt2x00dev, 98, 0x12); ++ } ++ + if (rt2x00_rt_rev_gte(rt2x00dev, RT3070, REV_RT3070F) || + rt2x00_rt_rev_gte(rt2x00dev, RT3071, REV_RT3071E) || + rt2x00_rt_rev_gte(rt2x00dev, RT3090, REV_RT3090E) || + rt2x00_rt_rev_gte(rt2x00dev, RT3390, REV_RT3390E) || + rt2x00_rt(rt2x00dev, RT3572) || + rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392) || + rt2800_is_305x_soc(rt2x00dev)) + rt2800_bbp_write(rt2x00dev, 103, 0xc0); + else + rt2800_bbp_write(rt2x00dev, 103, 0x00); + +- if (rt2x00_rt(rt2x00dev, RT5390)) ++ if (rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) + rt2800_bbp_write(rt2x00dev, 104, 0x92); + + if (rt2800_is_305x_soc(rt2x00dev)) + rt2800_bbp_write(rt2x00dev, 105, 0x01); +- else if (rt2x00_rt(rt2x00dev, RT5390)) ++ else if (rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) + rt2800_bbp_write(rt2x00dev, 105, 0x3c); + else + rt2800_bbp_write(rt2x00dev, 105, 0x05); + + if (rt2x00_rt(rt2x00dev, RT5390)) + rt2800_bbp_write(rt2x00dev, 106, 0x03); ++ else if (rt2x00_rt(rt2x00dev, RT5392)) ++ rt2800_bbp_write(rt2x00dev, 106, 0x12); + else + rt2800_bbp_write(rt2x00dev, 106, 0x35); + +- if (rt2x00_rt(rt2x00dev, RT5390)) ++ if (rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) + rt2800_bbp_write(rt2x00dev, 128, 0x12); + ++ if (rt2x00_rt(rt2x00dev, RT5392)) { ++ rt2800_bbp_write(rt2x00dev, 134, 0xd0); ++ rt2800_bbp_write(rt2x00dev, 135, 0xf6); ++ } ++ + if (rt2x00_rt(rt2x00dev, RT3071) || + rt2x00_rt(rt2x00dev, RT3090) || + rt2x00_rt(rt2x00dev, RT3390) || + rt2x00_rt(rt2x00dev, RT3572) || +- rt2x00_rt(rt2x00dev, RT5390)) { ++ rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) { + rt2800_bbp_read(rt2x00dev, 138, &value); + + rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC_CONF0, &eeprom); +@@ -3053,7 +3094,8 @@ + rt2800_bbp_write(rt2x00dev, 138, value); + } + +- if (rt2x00_rt(rt2x00dev, RT5390)) { ++ if (rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) { + int ant, div_mode; + + rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC_CONF1, &eeprom); +@@ -3179,13 +3221,15 @@ + !rt2x00_rt(rt2x00dev, RT3390) && + !rt2x00_rt(rt2x00dev, RT3572) && + !rt2x00_rt(rt2x00dev, RT5390) && ++ !rt2x00_rt(rt2x00dev, RT5392) && + !rt2800_is_305x_soc(rt2x00dev)) + return 0; + + /* + * Init RF calibration. + */ +- if (rt2x00_rt(rt2x00dev, RT5390)) { ++ if (rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) { + rt2800_rfcsr_read(rt2x00dev, 2, &rfcsr); + rt2x00_set_field8(&rfcsr, RFCSR2_RESCAL_EN, 1); + rt2800_rfcsr_write(rt2x00dev, 2, rfcsr); +@@ -3403,6 +3447,66 @@ + rt2800_rfcsr_write(rt2x00dev, 61, 0xdd); + rt2800_rfcsr_write(rt2x00dev, 62, 0x00); + rt2800_rfcsr_write(rt2x00dev, 63, 0x00); ++ } else if (rt2x00_rt(rt2x00dev, RT5392)) { ++ rt2800_rfcsr_write(rt2x00dev, 1, 0x17); ++ rt2800_rfcsr_write(rt2x00dev, 2, 0x80); ++ rt2800_rfcsr_write(rt2x00dev, 3, 0x88); ++ rt2800_rfcsr_write(rt2x00dev, 5, 0x10); ++ rt2800_rfcsr_write(rt2x00dev, 6, 0xe0); ++ rt2800_rfcsr_write(rt2x00dev, 7, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 10, 0x53); ++ rt2800_rfcsr_write(rt2x00dev, 11, 0x4a); ++ rt2800_rfcsr_write(rt2x00dev, 12, 0x46); ++ rt2800_rfcsr_write(rt2x00dev, 13, 0x9f); ++ rt2800_rfcsr_write(rt2x00dev, 14, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 15, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 16, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 18, 0x03); ++ rt2800_rfcsr_write(rt2x00dev, 19, 0x4d); ++ rt2800_rfcsr_write(rt2x00dev, 20, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 21, 0x8d); ++ rt2800_rfcsr_write(rt2x00dev, 22, 0x20); ++ rt2800_rfcsr_write(rt2x00dev, 23, 0x0b); ++ rt2800_rfcsr_write(rt2x00dev, 24, 0x44); ++ rt2800_rfcsr_write(rt2x00dev, 25, 0x80); ++ rt2800_rfcsr_write(rt2x00dev, 26, 0x82); ++ rt2800_rfcsr_write(rt2x00dev, 27, 0x09); ++ rt2800_rfcsr_write(rt2x00dev, 28, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 29, 0x10); ++ rt2800_rfcsr_write(rt2x00dev, 30, 0x10); ++ rt2800_rfcsr_write(rt2x00dev, 31, 0x80); ++ rt2800_rfcsr_write(rt2x00dev, 32, 0x20); ++ rt2800_rfcsr_write(rt2x00dev, 33, 0xC0); ++ rt2800_rfcsr_write(rt2x00dev, 34, 0x07); ++ rt2800_rfcsr_write(rt2x00dev, 35, 0x12); ++ rt2800_rfcsr_write(rt2x00dev, 36, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 37, 0x08); ++ rt2800_rfcsr_write(rt2x00dev, 38, 0x89); ++ rt2800_rfcsr_write(rt2x00dev, 39, 0x1b); ++ rt2800_rfcsr_write(rt2x00dev, 40, 0x0f); ++ rt2800_rfcsr_write(rt2x00dev, 41, 0xbb); ++ rt2800_rfcsr_write(rt2x00dev, 42, 0xd5); ++ rt2800_rfcsr_write(rt2x00dev, 43, 0x9b); ++ rt2800_rfcsr_write(rt2x00dev, 44, 0x0e); ++ rt2800_rfcsr_write(rt2x00dev, 45, 0xa2); ++ rt2800_rfcsr_write(rt2x00dev, 46, 0x73); ++ rt2800_rfcsr_write(rt2x00dev, 47, 0x0c); ++ rt2800_rfcsr_write(rt2x00dev, 48, 0x10); ++ rt2800_rfcsr_write(rt2x00dev, 49, 0x94); ++ rt2800_rfcsr_write(rt2x00dev, 50, 0x94); ++ rt2800_rfcsr_write(rt2x00dev, 51, 0x3a); ++ rt2800_rfcsr_write(rt2x00dev, 52, 0x48); ++ rt2800_rfcsr_write(rt2x00dev, 53, 0x44); ++ rt2800_rfcsr_write(rt2x00dev, 54, 0x38); ++ rt2800_rfcsr_write(rt2x00dev, 55, 0x43); ++ rt2800_rfcsr_write(rt2x00dev, 56, 0xa1); ++ rt2800_rfcsr_write(rt2x00dev, 57, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 58, 0x39); ++ rt2800_rfcsr_write(rt2x00dev, 59, 0x07); ++ rt2800_rfcsr_write(rt2x00dev, 60, 0x45); ++ rt2800_rfcsr_write(rt2x00dev, 61, 0x91); ++ rt2800_rfcsr_write(rt2x00dev, 62, 0x39); ++ rt2800_rfcsr_write(rt2x00dev, 63, 0x07); + } + + if (rt2x00_rt_rev_lt(rt2x00dev, RT3070, REV_RT3070F)) { +@@ -3470,7 +3574,8 @@ + rt2800_init_rx_filter(rt2x00dev, true, 0x27, 0x15); + } + +- if (!rt2x00_rt(rt2x00dev, RT5390)) { ++ if (!rt2x00_rt(rt2x00dev, RT5390) && ++ !rt2x00_rt(rt2x00dev, RT5392)) { + /* + * Set back to initial state + */ +@@ -3498,7 +3603,8 @@ + rt2x00_set_field32(®, OPT_14_CSR_BIT0, 1); + rt2800_register_write(rt2x00dev, OPT_14_CSR, reg); + +- if (!rt2x00_rt(rt2x00dev, RT5390)) { ++ if (!rt2x00_rt(rt2x00dev, RT5390) && ++ !rt2x00_rt(rt2x00dev, RT5392)) { + rt2800_rfcsr_read(rt2x00dev, 17, &rfcsr); + rt2x00_set_field8(&rfcsr, RFCSR17_TX_LO1_EN, 0); + if (rt2x00_rt(rt2x00dev, RT3070) || +@@ -3566,7 +3672,8 @@ + rt2800_rfcsr_write(rt2x00dev, 27, rfcsr); + } + +- if (rt2x00_rt(rt2x00dev, RT5390)) { ++ if (rt2x00_rt(rt2x00dev, RT5390) || ++ rt2x00_rt(rt2x00dev, RT5392)) { + rt2800_rfcsr_read(rt2x00dev, 38, &rfcsr); + rt2x00_set_field8(&rfcsr, RFCSR38_RX_LO1_EN, 0); + rt2800_rfcsr_write(rt2x00dev, 38, rfcsr); +@@ -3850,7 +3957,8 @@ + * RT53xx: defined in "EEPROM_CHIP_ID" field + */ + rt2800_register_read(rt2x00dev, MAC_CSR0, ®); +- if (rt2x00_get_field32(reg, MAC_CSR0_CHIPSET) == RT5390) ++ if (rt2x00_get_field32(reg, MAC_CSR0_CHIPSET) == RT5390 || ++ rt2x00_get_field32(reg, MAC_CSR0_CHIPSET) == RT5392) + rt2x00_eeprom_read(rt2x00dev, EEPROM_CHIP_ID, &value); + else + value = rt2x00_get_field16(eeprom, EEPROM_NIC_CONF0_RF_TYPE); +@@ -3858,15 +3966,19 @@ + rt2x00_set_chip(rt2x00dev, rt2x00_get_field32(reg, MAC_CSR0_CHIPSET), + value, rt2x00_get_field32(reg, MAC_CSR0_REVISION)); + +- if (!rt2x00_rt(rt2x00dev, RT2860) && +- !rt2x00_rt(rt2x00dev, RT2872) && +- !rt2x00_rt(rt2x00dev, RT2883) && +- !rt2x00_rt(rt2x00dev, RT3070) && +- !rt2x00_rt(rt2x00dev, RT3071) && +- !rt2x00_rt(rt2x00dev, RT3090) && +- !rt2x00_rt(rt2x00dev, RT3390) && +- !rt2x00_rt(rt2x00dev, RT3572) && +- !rt2x00_rt(rt2x00dev, RT5390)) { ++ switch (rt2x00dev->chip.rt) { ++ case RT2860: ++ case RT2872: ++ case RT2883: ++ case RT3070: ++ case RT3071: ++ case RT3090: ++ case RT3390: ++ case RT3572: ++ case RT5390: ++ case RT5392: ++ break; ++ default: + ERROR(rt2x00dev, "Invalid RT chipset detected.\n"); + return -ENODEV; + } +@@ -3883,6 +3995,7 @@ + case RF3052: + case RF3320: + case RF5370: ++ case RF5372: + case RF5390: + break; + default: +@@ -4189,6 +4302,7 @@ + rt2x00_rf(rt2x00dev, RF3022) || + rt2x00_rf(rt2x00dev, RF3320) || + rt2x00_rf(rt2x00dev, RF5370) || ++ rt2x00_rf(rt2x00dev, RF5372) || + rt2x00_rf(rt2x00dev, RF5390)) { + spec->num_channels = 14; + spec->channels = rf_vals_3x; +diff -Naur linux.orig/drivers/net/wireless/rt2x00/rt2x00.h linux/drivers/net/wireless/rt2x00/rt2x00.h +--- linux.orig/drivers/net/wireless/rt2x00/rt2x00.h 2011-11-11 21:19:27.000000000 +0100 ++++ linux/drivers/net/wireless/rt2x00/rt2x00.h 2014-02-23 20:20:33.000000000 +0100 +@@ -191,7 +191,8 @@ + #define RT3572 0x3572 + #define RT3593 0x3593 /* PCIe */ + #define RT3883 0x3883 /* WSOC */ +-#define RT5390 0x5390 /* 2.4GHz */ ++#define RT5390 0x5390 /* 2.4GHz */ ++#define RT5392 0x5392 /* 2.4GHz */ + + u16 rf; + u16 rev; diff --git a/recipes/linux/linux-vuuno_3.1.1.bb b/recipes/linux/linux-vuuno_3.1.1.bb index e15e0c8..cac9608 100644 --- a/recipes/linux/linux-vuuno_3.1.1.bb +++ b/recipes/linux/linux-vuuno_3.1.1.bb @@ -1,6 +1,6 @@ require linux-vuplus-3.1.1.inc -PR = "r13" +PR = "r14" SRC_URI += "\ file://linux_3.1.1_vuuno.patch;patch=1;pnum=1 \ diff --git a/recipes/ralink/files/change_device_name_wlan_from_ra.patch b/recipes/ralink/files/change_device_name_wlan_from_ra.patch new file mode 100644 index 0000000..2e39f98 --- /dev/null +++ b/recipes/ralink/files/change_device_name_wlan_from_ra.patch @@ -0,0 +1,68 @@ +diff --git a/common/cmm_wpa.c b/common/cmm_wpa.c +index f5692dc..4670ffa 100644 +--- a/common/cmm_wpa.c ++++ b/common/cmm_wpa.c +@@ -4050,7 +4050,7 @@ VOID WPAInstallSharedKey( + pSharedKey->CipherAlg = CIPHER_AES; + else + { +- DBGPRINT(RT_DEBUG_ERROR, ("%s : fails (IF/ra%d) \n", ++ DBGPRINT(RT_DEBUG_ERROR, ("%s : fails (IF/wlan%d) \n", + __FUNCTION__, BssIdx)); + return; + } +@@ -4062,7 +4062,7 @@ VOID WPAInstallSharedKey( + /* Sanity check the length */ + if ((GtkLen != LEN_WEP64) && (GtkLen != LEN_WEP128)) + { +- DBGPRINT(RT_DEBUG_ERROR, ("%s : (IF/ra%d) WEP key invlaid(%d) \n", ++ DBGPRINT(RT_DEBUG_ERROR, ("%s : (IF/wlan%d) WEP key invlaid(%d) \n", + __FUNCTION__, BssIdx, GtkLen)); + return; + } +@@ -4075,7 +4075,7 @@ VOID WPAInstallSharedKey( + /* Sanity check the length */ + if (GtkLen < LEN_TK) + { +- DBGPRINT(RT_DEBUG_ERROR, ("%s : (IF/ra%d) WPA key invlaid(%d) \n", ++ DBGPRINT(RT_DEBUG_ERROR, ("%s : (IF/wlan%d) WPA key invlaid(%d) \n", + __FUNCTION__, BssIdx, GtkLen)); + return; + } +diff --git a/include/rtmp_def.h b/include/rtmp_def.h +index 9025630..81518f7 100644 +--- a/include/rtmp_def.h ++++ b/include/rtmp_def.h +@@ -1473,8 +1473,8 @@ + #define IS_OPMODE_AP(_x) ((_x)->OpMode == OPMODE_AP) + #define IS_OPMODE_STA(_x) ((_x)->OpMode == OPMODE_STA) + +-#define INF_MAIN_DEV_NAME "ra" +-#define INF_MBSSID_DEV_NAME "ra" ++#define INF_MAIN_DEV_NAME "wlan" ++#define INF_MBSSID_DEV_NAME "wlan" + #define INF_WDS_DEV_NAME "wds" + #define INF_APCLI_DEV_NAME "apcli" + #define INF_MESH_DEV_NAME "mesh" +diff --git a/os/linux/rt_profile.c b/os/linux/rt_profile.c +index f3e45dc..4e8eb3d 100644 +--- a/os/linux/rt_profile.c ++++ b/os/linux/rt_profile.c +@@ -162,7 +162,7 @@ NDIS_STATUS RTMPReadParametersHook( + for (i = 0; i < pAd->ApCfg.BssidNum; i++) + { + pAd->ApCfg.MBSSID[i].Hostapd=FALSE; +- DBGPRINT(RT_DEBUG_TRACE, ("Reset ra%d hostapd support=FLASE", i)); ++ DBGPRINT(RT_DEBUG_TRACE, ("Reset wlan%d hostapd support=FLASE", i)); + + } + #endif /*HOSTAPD_SUPPORT */ +@@ -255,7 +255,7 @@ VOID RtmpDrvSendWirelessEvent( + if (pAddr) + pBufPtr += sprintf(pBufPtr, "(RT2860) STA(%02x:%02x:%02x:%02x:%02x:%02x) ", PRINT_MAC(pAddr)); + else if (BssIdx < MAX_MBSSID_NUM(pAd)) +- pBufPtr += sprintf(pBufPtr, "(RT2860) BSS(ra%d) ", BssIdx); ++ pBufPtr += sprintf(pBufPtr, "(RT2860) BSS(wlan%d) ", BssIdx); + else + pBufPtr += sprintf(pBufPtr, "(RT2860) "); + diff --git a/recipes/ralink/rt3070_2.5.0.3.bb b/recipes/ralink/rt3070_2.5.0.3.bb index 88fb158..58a2098 100644 --- a/recipes/ralink/rt3070_2.5.0.3.bb +++ b/recipes/ralink/rt3070_2.5.0.3.bb @@ -5,26 +5,27 @@ SRCNAME = "rt3070" inherit module -PR = "r1" +PR = "r2" SRC_URI = "file://2011_0719_RT3070_RT3370_RT5370_RT5372_Linux_STA_V2.5.0.3_DPO.tar.bz2 \ file://makefile_2.5.0.3.patch;patch=1 \ file://config_2.5.0.3.patch;patch=1 \ + file://change_device_name_wlan_from_ra.patch;patch=1 \ " -FILES_${PN} += " /lib/firmware/rt2870.bin" - S = "${WORKDIR}/2011_0719_RT3070_RT3370_RT5370_RT5372_Linux_STA_V${PV}_DPO" EXTRA_OEMAKE = "LINUX_SRC=${STAGING_KERNEL_DIR}" do_install() { install -d ${D}${base_libdir}/modules/${KERNEL_VERSION}/drivers/net/wireless - install -d ${D}${sysconfdir}/Wireless/RT2870STA + install -d ${D}${sysconfdir}/modprobe.d install -m 0644 ${S}/*sta${KERNEL_OBJECT_SUFFIX} ${D}${base_libdir}/modules/${KERNEL_VERSION}/drivers/net/wireless - install -m 0644 ${S}/RT2870STA.dat ${D}${sysconfdir}/Wireless/RT2870STA/ - install -d ${D}/lib/firmware - install -m 0644 ${S}/common/rt2870.bin ${D}/lib/firmware/ + touch ${D}${sysconfdir}/modprobe.d/blacklist-wlan.conf + echo "blacklist rt2800usb" >> ${D}${sysconfdir}/modprobe.d/blacklist-wlan.conf + echo "blacklist rt2800lib" >> ${D}${sysconfdir}/modprobe.d/blacklist-wlan.conf + } PACKAGE_ARCH = "${MACHINE_ARCH}" + diff --git a/recipes/tasks/task-boot.bb b/recipes/tasks/task-boot.bb index c4ece9b..04bbcab 100644 --- a/recipes/tasks/task-boot.bb +++ b/recipes/tasks/task-boot.bb @@ -1,5 +1,5 @@ DESCRIPTION = "Basic task to get a device booting" -PR = "r74" +PR = "r75" inherit task diff --git a/recipes/tasks/task-vuplus-wlan.bb b/recipes/tasks/task-vuplus-wlan.bb index 3fc6571..7782727 100644 --- a/recipes/tasks/task-vuplus-wlan.bb +++ b/recipes/tasks/task-vuplus-wlan.bb @@ -1,7 +1,7 @@ DESCRIPTION = "Vuplus: W-LAN Task for the Vuplus Distribution" SECTION = "vuplus/base" LICENSE = "MIT" -PR = "r11" +PR = "r12" inherit task @@ -32,7 +32,9 @@ WLAN_USB_MODULES = "\ firmware-htc9271 \ firmware-rt2561 \ firmware-rtl8721u \ - ${@base_contains("MACHINE_FEATURES", "rt3070-legacy", "rt3070", "rt2870sta firmware-rt3070 ", d)} \ + firmware-rt3070 \ + rt2870sta \ + ${@base_contains("MACHINE_FEATURES", "ralink-legacy", "rt3070", " ", d)} \ " WLAN_USB_MODULES_LEGACY = "\ -- 2.7.4