--- /dev/null
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.12.6
+# Thu Jun 8 14:36:36 2006
+#
+CONFIG_MMU=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_RWSEM_XCHGADD_ALGORITHM=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_HAVE_DEC_LOCK=y
+CONFIG_PPC=y
+CONFIG_PPC32=y
+CONFIG_GENERIC_NVRAM=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_CLEAN_COMPILE=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_POSIX_MQUEUE=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+CONFIG_SYSCTL=y
+# CONFIG_AUDIT is not set
+CONFIG_HOTPLUG=y
+CONFIG_KOBJECT_UEVENT=y
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_EMBEDDED=y
+CONFIG_KALLSYMS=y
+CONFIG_KALLSYMS_EXTRA_PASS=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+# CONFIG_EPOLL is not set
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SHMEM=y
+CONFIG_CC_ALIGN_FUNCTIONS=0
+CONFIG_CC_ALIGN_LABELS=0
+CONFIG_CC_ALIGN_LOOPS=0
+CONFIG_CC_ALIGN_JUMPS=0
+# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=0
+
+#
+# Loadable module support
+#
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+CONFIG_OBSOLETE_MODPARM=y
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_KMOD=y
+
+#
+# Processor
+#
+# CONFIG_6xx is not set
+CONFIG_40x=y
+# CONFIG_44x is not set
+# CONFIG_POWER3 is not set
+# CONFIG_POWER4 is not set
+# CONFIG_8xx is not set
+# CONFIG_E500 is not set
+CONFIG_MATH_EMULATION=y
+# CONFIG_CPU_FREQ is not set
+CONFIG_4xx=y
+
+#
+# IBM 4xx options
+#
+# CONFIG_ASH is not set
+# CONFIG_BUBINGA is not set
+# CONFIG_CPCI405 is not set
+# CONFIG_EP405 is not set
+# CONFIG_OAK is not set
+# CONFIG_REDWOOD_5 is not set
+# CONFIG_REDWOOD_6 is not set
+# CONFIG_SYCAMORE is not set
+CONFIG_WALNUT=y
+# CONFIG_XILINX_ML300 is not set
+CONFIG_IBM405_ERR77=y
+CONFIG_IBM405_ERR51=y
+CONFIG_IBM_OCP=y
+CONFIG_BIOS_FIXUP=y
+CONFIG_405GP=y
+# CONFIG_PPC4xx_DMA is not set
+CONFIG_PPC_GEN550=y
+# CONFIG_PM is not set
+CONFIG_UART0_TTYS0=y
+# CONFIG_UART0_TTYS1 is not set
+CONFIG_NOT_COHERENT_CACHE=y
+
+#
+# Platform options
+#
+# CONFIG_PC_KEYBOARD is not set
+# CONFIG_SMP is not set
+# CONFIG_PREEMPT is not set
+# CONFIG_HIGHMEM is not set
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+CONFIG_CMDLINE_BOOL=y
+CONFIG_CMDLINE="ip=on"
+CONFIG_ISA_DMA_API=y
+
+#
+# Bus options
+#
+CONFIG_PCI=y
+CONFIG_PCI_DOMAINS=y
+CONFIG_PCI_LEGACY_PROC=y
+# CONFIG_PCI_NAMES is not set
+
+#
+# PCCARD (PCMCIA/CardBus) support
+#
+CONFIG_PCCARD=y
+# CONFIG_PCMCIA_DEBUG is not set
+CONFIG_PCMCIA=y
+CONFIG_CARDBUS=y
+
+#
+# PC-card bridges
+#
+CONFIG_YENTA=m
+CONFIG_PD6729=m
+CONFIG_I82092=m
+CONFIG_TCIC=m
+CONFIG_PCCARD_NONSTATIC=m
+
+#
+# Advanced setup
+#
+# CONFIG_ADVANCED_OPTIONS is not set
+
+#
+# Default settings for advanced configuration options are used
+#
+CONFIG_HIGHMEM_START=0xfe000000
+CONFIG_LOWMEM_SIZE=0x30000000
+CONFIG_KERNEL_START=0xc0000000
+CONFIG_TASK_SIZE=0x80000000
+CONFIG_CONSISTENT_START=0xff100000
+CONFIG_CONSISTENT_SIZE=0x00200000
+CONFIG_BOOT_LOAD=0x00400000
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+# CONFIG_STANDALONE is not set
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=m
+
+#
+# Memory Technology Devices (MTD)
+#
+CONFIG_MTD=m
+# CONFIG_MTD_DEBUG is not set
+CONFIG_MTD_CONCAT=m
+CONFIG_MTD_PARTITIONS=y
+CONFIG_MTD_REDBOOT_PARTS=m
+CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1
+# CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED is not set
+# CONFIG_MTD_REDBOOT_PARTS_READONLY is not set
+# CONFIG_MTD_CMDLINE_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=m
+CONFIG_MTD_BLOCK=m
+CONFIG_MTD_BLOCK_RO=m
+CONFIG_FTL=m
+CONFIG_NFTL=m
+# CONFIG_NFTL_RW is not set
+CONFIG_INFTL=m
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=m
+CONFIG_MTD_JEDECPROBE=m
+CONFIG_MTD_GEN_PROBE=m
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+CONFIG_MTD_CFI_INTELEXT=m
+CONFIG_MTD_CFI_AMDSTD=m
+CONFIG_MTD_CFI_AMDSTD_RETRY=0
+CONFIG_MTD_CFI_STAA=m
+CONFIG_MTD_CFI_UTIL=m
+CONFIG_MTD_RAM=m
+CONFIG_MTD_ROM=m
+CONFIG_MTD_ABSENT=m
+# CONFIG_MTD_XIP is not set
+
+#
+# Mapping drivers for chip access
+#
+CONFIG_MTD_COMPLEX_MAPPINGS=y
+CONFIG_MTD_PHYSMAP=m
+CONFIG_MTD_PHYSMAP_START=0x8000000
+CONFIG_MTD_PHYSMAP_LEN=0x4000000
+CONFIG_MTD_PHYSMAP_BANKWIDTH=2
+CONFIG_MTD_WALNUT=m
+CONFIG_MTD_PCI=m
+
+#
+# Self-contained MTD device drivers
+#
+CONFIG_MTD_PMC551=m
+CONFIG_MTD_PMC551_BUGFIX=y
+# CONFIG_MTD_PMC551_DEBUG is not set
+CONFIG_MTD_SLRAM=m
+CONFIG_MTD_PHRAM=m
+# CONFIG_MTD_MTDRAM is not set
+CONFIG_MTD_BLKMTD=m
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+CONFIG_MTD_DOC2000=m
+CONFIG_MTD_DOC2001=m
+CONFIG_MTD_DOC2001PLUS=m
+CONFIG_MTD_DOCPROBE=m
+CONFIG_MTD_DOCECC=m
+# CONFIG_MTD_DOCPROBE_ADVANCED is not set
+CONFIG_MTD_DOCPROBE_ADDRESS=0
+
+#
+# NAND Flash Device Drivers
+#
+CONFIG_MTD_NAND=m
+# CONFIG_MTD_NAND_VERIFY_WRITE is not set
+CONFIG_MTD_NAND_IDS=m
+CONFIG_MTD_NAND_DISKONCHIP=m
+# CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADVANCED is not set
+CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADDRESS=0
+# CONFIG_MTD_NAND_DISKONCHIP_BBTWRITE is not set
+# CONFIG_MTD_NAND_NANDSIM is not set
+
+#
+# Parallel port support
+#
+CONFIG_PARPORT=m
+CONFIG_PARPORT_PC=m
+# CONFIG_PARPORT_SERIAL is not set
+# CONFIG_PARPORT_PC_FIFO is not set
+# CONFIG_PARPORT_PC_SUPERIO is not set
+# CONFIG_PARPORT_PC_PCMCIA is not set
+CONFIG_PARPORT_NOT_PC=y
+# CONFIG_PARPORT_GSC is not set
+# CONFIG_PARPORT_1284 is not set
+
+#
+# Plug and Play support
+#
+
+#
+# Block devices
+#
+CONFIG_BLK_DEV_FD=m
+CONFIG_PARIDE=m
+CONFIG_PARIDE_PARPORT=m
+
+#
+# Parallel IDE high-level drivers
+#
+CONFIG_PARIDE_PD=m
+CONFIG_PARIDE_PCD=m
+CONFIG_PARIDE_PF=m
+CONFIG_PARIDE_PT=m
+CONFIG_PARIDE_PG=m
+
+#
+# Parallel IDE protocol modules
+#
+CONFIG_PARIDE_ATEN=m
+CONFIG_PARIDE_BPCK=m
+CONFIG_PARIDE_BPCK6=m
+CONFIG_PARIDE_COMM=m
+CONFIG_PARIDE_DSTR=m
+CONFIG_PARIDE_FIT2=m
+CONFIG_PARIDE_FIT3=m
+CONFIG_PARIDE_EPAT=m
+# CONFIG_PARIDE_EPATC8 is not set
+CONFIG_PARIDE_EPIA=m
+CONFIG_PARIDE_FRIQ=m
+CONFIG_PARIDE_FRPW=m
+CONFIG_PARIDE_KBIC=m
+CONFIG_PARIDE_KTTI=m
+CONFIG_PARIDE_ON20=m
+CONFIG_PARIDE_ON26=m
+CONFIG_BLK_CPQ_DA=m
+CONFIG_BLK_CPQ_CISS_DA=m
+# CONFIG_CISS_SCSI_TAPE is not set
+CONFIG_BLK_DEV_DAC960=m
+CONFIG_BLK_DEV_UMEM=m
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_BLK_DEV_CRYPTOLOOP=m
+CONFIG_BLK_DEV_NBD=m
+CONFIG_BLK_DEV_SX8=m
+CONFIG_BLK_DEV_UB=m
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=4096
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+# CONFIG_LBD is not set
+CONFIG_CDROM_PKTCDVD=m
+CONFIG_CDROM_PKTCDVD_BUFFERS=8
+# CONFIG_CDROM_PKTCDVD_WCACHE is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+CONFIG_ATA_OVER_ETH=m
+
+#
+# ATA/ATAPI/MFM/RLL support
+#
+CONFIG_IDE=y
+CONFIG_BLK_DEV_IDE=y
+
+#
+# Please see Documentation/ide.txt for help/info on IDE drives
+#
+# CONFIG_BLK_DEV_IDE_SATA is not set
+CONFIG_BLK_DEV_IDEDISK=y
+# CONFIG_IDEDISK_MULTI_MODE is not set
+CONFIG_BLK_DEV_IDECS=m
+CONFIG_BLK_DEV_IDECD=y
+CONFIG_BLK_DEV_IDETAPE=m
+CONFIG_BLK_DEV_IDEFLOPPY=m
+CONFIG_BLK_DEV_IDESCSI=m
+# CONFIG_IDE_TASK_IOCTL is not set
+
+#
+# IDE chipset support/bugfixes
+#
+CONFIG_IDE_GENERIC=y
+CONFIG_BLK_DEV_IDEPCI=y
+# CONFIG_IDEPCI_SHARE_IRQ is not set
+CONFIG_BLK_DEV_OFFBOARD=y
+CONFIG_BLK_DEV_GENERIC=y
+CONFIG_BLK_DEV_OPTI621=m
+CONFIG_BLK_DEV_SL82C105=m
+CONFIG_BLK_DEV_IDEDMA_PCI=y
+# CONFIG_BLK_DEV_IDEDMA_FORCED is not set
+CONFIG_IDEDMA_PCI_AUTO=y
+# CONFIG_IDEDMA_ONLYDISK is not set
+CONFIG_BLK_DEV_AEC62XX=m
+CONFIG_BLK_DEV_ALI15X3=m
+# CONFIG_WDC_ALI15X3 is not set
+CONFIG_BLK_DEV_AMD74XX=m
+CONFIG_BLK_DEV_CMD64X=m
+CONFIG_BLK_DEV_TRIFLEX=m
+CONFIG_BLK_DEV_CY82C693=m
+CONFIG_BLK_DEV_CS5520=m
+CONFIG_BLK_DEV_CS5530=m
+CONFIG_BLK_DEV_HPT34X=m
+# CONFIG_HPT34X_AUTODMA is not set
+CONFIG_BLK_DEV_HPT366=m
+CONFIG_BLK_DEV_SC1200=m
+CONFIG_BLK_DEV_PIIX=m
+CONFIG_BLK_DEV_NS87415=m
+CONFIG_BLK_DEV_PDC202XX_OLD=y
+# CONFIG_PDC202XX_BURST is not set
+CONFIG_BLK_DEV_PDC202XX_NEW=m
+# CONFIG_PDC202XX_FORCE is not set
+CONFIG_BLK_DEV_SVWKS=m
+CONFIG_BLK_DEV_SIIMAGE=m
+CONFIG_BLK_DEV_SLC90E66=m
+CONFIG_BLK_DEV_TRM290=m
+CONFIG_BLK_DEV_VIA82CXXX=m
+# CONFIG_IDE_ARM is not set
+CONFIG_BLK_DEV_IDEDMA=y
+# CONFIG_IDEDMA_IVB is not set
+CONFIG_IDEDMA_AUTO=y
+# CONFIG_BLK_DEV_HD is not set
+
+#
+# SCSI device support
+#
+CONFIG_SCSI=y
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+CONFIG_BLK_DEV_SR=y
+# CONFIG_BLK_DEV_SR_VENDOR is not set
+CONFIG_CHR_DEV_SG=y
+
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+CONFIG_SCSI_MULTI_LUN=y
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+
+#
+# SCSI Transport Attributes
+#
+CONFIG_SCSI_SPI_ATTRS=m
+CONFIG_SCSI_FC_ATTRS=m
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+
+#
+# SCSI low-level drivers
+#
+CONFIG_BLK_DEV_3W_XXXX_RAID=m
+CONFIG_SCSI_3W_9XXX=m
+CONFIG_SCSI_ACARD=m
+CONFIG_SCSI_AACRAID=m
+CONFIG_SCSI_AIC7XXX=m
+CONFIG_AIC7XXX_CMDS_PER_DEVICE=32
+CONFIG_AIC7XXX_RESET_DELAY_MS=15000
+CONFIG_AIC7XXX_DEBUG_ENABLE=y
+CONFIG_AIC7XXX_DEBUG_MASK=0
+CONFIG_AIC7XXX_REG_PRETTY_PRINT=y
+CONFIG_SCSI_AIC7XXX_OLD=m
+CONFIG_SCSI_AIC79XX=m
+CONFIG_AIC79XX_CMDS_PER_DEVICE=32
+CONFIG_AIC79XX_RESET_DELAY_MS=15000
+# CONFIG_AIC79XX_ENABLE_RD_STRM is not set
+CONFIG_AIC79XX_DEBUG_ENABLE=y
+CONFIG_AIC79XX_DEBUG_MASK=0
+CONFIG_AIC79XX_REG_PRETTY_PRINT=y
+CONFIG_SCSI_DPT_I2O=m
+# CONFIG_MEGARAID_NEWGEN is not set
+CONFIG_MEGARAID_LEGACY=m
+# CONFIG_SCSI_SATA is not set
+CONFIG_SCSI_BUSLOGIC=m
+# CONFIG_SCSI_OMIT_FLASHPOINT is not set
+CONFIG_SCSI_DMX3191D=m
+CONFIG_SCSI_EATA=m
+# CONFIG_SCSI_EATA_TAGGED_QUEUE is not set
+# CONFIG_SCSI_EATA_LINKED_COMMANDS is not set
+CONFIG_SCSI_EATA_MAX_TAGS=16
+# CONFIG_SCSI_FUTURE_DOMAIN is not set
+CONFIG_SCSI_GDTH=m
+CONFIG_SCSI_IPS=m
+CONFIG_SCSI_INITIO=m
+CONFIG_SCSI_INIA100=m
+CONFIG_SCSI_PPA=m
+CONFIG_SCSI_IMM=m
+# CONFIG_SCSI_IZIP_EPP16 is not set
+# CONFIG_SCSI_IZIP_SLOW_CTR is not set
+CONFIG_SCSI_SYM53C8XX_2=m
+CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE=1
+CONFIG_SCSI_SYM53C8XX_DEFAULT_TAGS=16
+CONFIG_SCSI_SYM53C8XX_MAX_TAGS=64
+# CONFIG_SCSI_SYM53C8XX_IOMAPPED is not set
+CONFIG_SCSI_IPR=m
+# CONFIG_SCSI_IPR_TRACE is not set
+# CONFIG_SCSI_IPR_DUMP is not set
+CONFIG_SCSI_QLOGIC_FC=m
+# CONFIG_SCSI_QLOGIC_FC_FIRMWARE is not set
+CONFIG_SCSI_QLOGIC_1280=m
+# CONFIG_SCSI_QLOGIC_1280_1040 is not set
+CONFIG_SCSI_QLA2XXX=y
+CONFIG_SCSI_QLA21XX=m
+CONFIG_SCSI_QLA22XX=m
+CONFIG_SCSI_QLA2300=m
+CONFIG_SCSI_QLA2322=m
+CONFIG_SCSI_QLA6312=m
+CONFIG_SCSI_LPFC=m
+CONFIG_SCSI_DC395x=m
+CONFIG_SCSI_DC390T=m
+CONFIG_SCSI_NSP32=m
+CONFIG_SCSI_DEBUG=m
+
+#
+# PCMCIA SCSI adapter support
+#
+CONFIG_PCMCIA_AHA152X=m
+CONFIG_PCMCIA_FDOMAIN=m
+CONFIG_PCMCIA_NINJA_SCSI=m
+CONFIG_PCMCIA_QLOGIC=m
+CONFIG_PCMCIA_SYM53C500=m
+
+#
+# Multi-device support (RAID and LVM)
+#
+CONFIG_MD=y
+CONFIG_BLK_DEV_MD=m
+CONFIG_MD_LINEAR=m
+CONFIG_MD_RAID0=m
+CONFIG_MD_RAID1=m
+CONFIG_MD_RAID10=m
+CONFIG_MD_RAID5=m
+CONFIG_MD_RAID6=m
+CONFIG_MD_MULTIPATH=m
+CONFIG_MD_FAULTY=m
+CONFIG_BLK_DEV_DM=m
+CONFIG_DM_CRYPT=m
+CONFIG_DM_SNAPSHOT=m
+CONFIG_DM_MIRROR=m
+CONFIG_DM_ZERO=m
+CONFIG_DM_MULTIPATH=m
+CONFIG_DM_MULTIPATH_EMC=m
+
+#
+# Fusion MPT device support
+#
+CONFIG_FUSION=m
+CONFIG_FUSION_MAX_SGE=40
+CONFIG_FUSION_CTL=m
+
+#
+# IEEE 1394 (FireWire) support
+#
+CONFIG_IEEE1394=m
+
+#
+# Subsystem Options
+#
+# CONFIG_IEEE1394_VERBOSEDEBUG is not set
+# CONFIG_IEEE1394_OUI_DB is not set
+CONFIG_IEEE1394_EXTRA_CONFIG_ROMS=y
+CONFIG_IEEE1394_CONFIG_ROM_IP1394=y
+
+#
+# Device Drivers
+#
+CONFIG_IEEE1394_PCILYNX=m
+CONFIG_IEEE1394_OHCI1394=m
+
+#
+# Protocol Drivers
+#
+CONFIG_IEEE1394_VIDEO1394=m
+CONFIG_IEEE1394_SBP2=m
+CONFIG_IEEE1394_SBP2_PHYS_DMA=y
+CONFIG_IEEE1394_ETH1394=m
+CONFIG_IEEE1394_DV1394=m
+CONFIG_IEEE1394_RAWIO=m
+CONFIG_IEEE1394_CMP=m
+CONFIG_IEEE1394_AMDTP=m
+
+#
+# I2O device support
+#
+# CONFIG_I2O is not set
+
+#
+# Macintosh device drivers
+#
+
+#
+# Networking support
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_UNIX=y
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_ADVANCED_ROUTER=y
+CONFIG_IP_MULTIPLE_TABLES=y
+# CONFIG_IP_ROUTE_FWMARK is not set
+CONFIG_IP_ROUTE_MULTIPATH=y
+# CONFIG_IP_ROUTE_MULTIPATH_CACHED is not set
+CONFIG_IP_ROUTE_VERBOSE=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+CONFIG_IP_PNP_RARP=y
+CONFIG_NET_IPIP=m
+CONFIG_NET_IPGRE=m
+CONFIG_NET_IPGRE_BROADCAST=y
+CONFIG_IP_MROUTE=y
+# CONFIG_IP_PIMSM_V1 is not set
+# CONFIG_IP_PIMSM_V2 is not set
+# CONFIG_ARPD is not set
+CONFIG_SYN_COOKIES=y
+CONFIG_INET_AH=m
+CONFIG_INET_ESP=m
+CONFIG_INET_IPCOMP=m
+CONFIG_INET_TUNNEL=m
+CONFIG_IP_TCPDIAG=y
+# CONFIG_IP_TCPDIAG_IPV6 is not set
+
+#
+# IP: Virtual Server Configuration
+#
+# CONFIG_IP_VS is not set
+CONFIG_IPV6=m
+# CONFIG_IPV6_PRIVACY is not set
+CONFIG_INET6_AH=m
+CONFIG_INET6_ESP=m
+CONFIG_INET6_IPCOMP=m
+CONFIG_INET6_TUNNEL=m
+CONFIG_IPV6_TUNNEL=m
+CONFIG_NETFILTER=y
+# CONFIG_NETFILTER_DEBUG is not set
+CONFIG_BRIDGE_NETFILTER=y
+
+#
+# IP: Netfilter Configuration
+#
+CONFIG_IP_NF_CONNTRACK=m
+CONFIG_IP_NF_CT_ACCT=y
+CONFIG_IP_NF_CONNTRACK_MARK=y
+CONFIG_IP_NF_CT_PROTO_SCTP=m
+CONFIG_IP_NF_FTP=m
+CONFIG_IP_NF_IRC=m
+CONFIG_IP_NF_TFTP=m
+CONFIG_IP_NF_AMANDA=m
+CONFIG_IP_NF_QUEUE=m
+CONFIG_IP_NF_IPTABLES=m
+CONFIG_IP_NF_MATCH_LIMIT=m
+CONFIG_IP_NF_MATCH_IPRANGE=m
+CONFIG_IP_NF_MATCH_MAC=m
+CONFIG_IP_NF_MATCH_PKTTYPE=m
+CONFIG_IP_NF_MATCH_MARK=m
+CONFIG_IP_NF_MATCH_MULTIPORT=m
+CONFIG_IP_NF_MATCH_TOS=m
+CONFIG_IP_NF_MATCH_RECENT=m
+CONFIG_IP_NF_MATCH_ECN=m
+CONFIG_IP_NF_MATCH_DSCP=m
+CONFIG_IP_NF_MATCH_AH_ESP=m
+CONFIG_IP_NF_MATCH_LENGTH=m
+CONFIG_IP_NF_MATCH_TTL=m
+CONFIG_IP_NF_MATCH_TCPMSS=m
+CONFIG_IP_NF_MATCH_HELPER=m
+CONFIG_IP_NF_MATCH_STATE=m
+CONFIG_IP_NF_MATCH_CONNTRACK=m
+CONFIG_IP_NF_MATCH_OWNER=m
+CONFIG_IP_NF_MATCH_PHYSDEV=m
+CONFIG_IP_NF_MATCH_ADDRTYPE=m
+CONFIG_IP_NF_MATCH_REALM=m
+CONFIG_IP_NF_MATCH_SCTP=m
+CONFIG_IP_NF_MATCH_COMMENT=m
+CONFIG_IP_NF_MATCH_CONNMARK=m
+CONFIG_IP_NF_MATCH_HASHLIMIT=m
+CONFIG_IP_NF_FILTER=m
+CONFIG_IP_NF_TARGET_REJECT=m
+CONFIG_IP_NF_TARGET_LOG=m
+CONFIG_IP_NF_TARGET_ULOG=m
+CONFIG_IP_NF_TARGET_TCPMSS=m
+CONFIG_IP_NF_NAT=m
+CONFIG_IP_NF_NAT_NEEDED=y
+CONFIG_IP_NF_TARGET_MASQUERADE=m
+CONFIG_IP_NF_TARGET_REDIRECT=m
+CONFIG_IP_NF_TARGET_NETMAP=m
+CONFIG_IP_NF_TARGET_SAME=m
+CONFIG_IP_NF_NAT_SNMP_BASIC=m
+CONFIG_IP_NF_NAT_IRC=m
+CONFIG_IP_NF_NAT_FTP=m
+CONFIG_IP_NF_NAT_TFTP=m
+CONFIG_IP_NF_NAT_AMANDA=m
+CONFIG_IP_NF_MANGLE=m
+CONFIG_IP_NF_TARGET_TOS=m
+CONFIG_IP_NF_TARGET_ECN=m
+CONFIG_IP_NF_TARGET_DSCP=m
+CONFIG_IP_NF_TARGET_MARK=m
+CONFIG_IP_NF_TARGET_CLASSIFY=m
+CONFIG_IP_NF_TARGET_CONNMARK=m
+CONFIG_IP_NF_TARGET_CLUSTERIP=m
+CONFIG_IP_NF_RAW=m
+CONFIG_IP_NF_TARGET_NOTRACK=m
+CONFIG_IP_NF_ARPTABLES=m
+CONFIG_IP_NF_ARPFILTER=m
+CONFIG_IP_NF_ARP_MANGLE=m
+
+#
+# IPv6: Netfilter Configuration (EXPERIMENTAL)
+#
+CONFIG_IP6_NF_QUEUE=m
+CONFIG_IP6_NF_IPTABLES=m
+CONFIG_IP6_NF_MATCH_LIMIT=m
+CONFIG_IP6_NF_MATCH_MAC=m
+CONFIG_IP6_NF_MATCH_RT=m
+CONFIG_IP6_NF_MATCH_OPTS=m
+CONFIG_IP6_NF_MATCH_FRAG=m
+CONFIG_IP6_NF_MATCH_HL=m
+CONFIG_IP6_NF_MATCH_MULTIPORT=m
+CONFIG_IP6_NF_MATCH_OWNER=m
+CONFIG_IP6_NF_MATCH_MARK=m
+CONFIG_IP6_NF_MATCH_IPV6HEADER=m
+CONFIG_IP6_NF_MATCH_AHESP=m
+CONFIG_IP6_NF_MATCH_LENGTH=m
+CONFIG_IP6_NF_MATCH_EUI64=m
+# CONFIG_IP6_NF_MATCH_PHYSDEV is not set
+CONFIG_IP6_NF_FILTER=m
+CONFIG_IP6_NF_TARGET_LOG=m
+CONFIG_IP6_NF_MANGLE=m
+CONFIG_IP6_NF_TARGET_MARK=m
+CONFIG_IP6_NF_RAW=m
+
+#
+# DECnet: Netfilter Configuration
+#
+# CONFIG_DECNET_NF_GRABULATOR is not set
+
+#
+# Bridge: Netfilter Configuration
+#
+CONFIG_BRIDGE_NF_EBTABLES=m
+CONFIG_BRIDGE_EBT_BROUTE=m
+CONFIG_BRIDGE_EBT_T_FILTER=m
+CONFIG_BRIDGE_EBT_T_NAT=m
+CONFIG_BRIDGE_EBT_802_3=m
+CONFIG_BRIDGE_EBT_AMONG=m
+CONFIG_BRIDGE_EBT_ARP=m
+CONFIG_BRIDGE_EBT_IP=m
+CONFIG_BRIDGE_EBT_LIMIT=m
+CONFIG_BRIDGE_EBT_MARK=m
+CONFIG_BRIDGE_EBT_PKTTYPE=m
+CONFIG_BRIDGE_EBT_STP=m
+CONFIG_BRIDGE_EBT_VLAN=m
+CONFIG_BRIDGE_EBT_ARPREPLY=m
+CONFIG_BRIDGE_EBT_DNAT=m
+CONFIG_BRIDGE_EBT_MARK_T=m
+CONFIG_BRIDGE_EBT_REDIRECT=m
+CONFIG_BRIDGE_EBT_SNAT=m
+CONFIG_BRIDGE_EBT_LOG=m
+CONFIG_BRIDGE_EBT_ULOG=m
+CONFIG_XFRM=y
+CONFIG_XFRM_USER=m
+
+#
+# SCTP Configuration (EXPERIMENTAL)
+#
+CONFIG_IP_SCTP=m
+# CONFIG_SCTP_DBG_MSG is not set
+# CONFIG_SCTP_DBG_OBJCNT is not set
+# CONFIG_SCTP_HMAC_NONE is not set
+# CONFIG_SCTP_HMAC_SHA1 is not set
+CONFIG_SCTP_HMAC_MD5=y
+CONFIG_ATM=m
+CONFIG_ATM_CLIP=m
+# CONFIG_ATM_CLIP_NO_ICMP is not set
+CONFIG_ATM_LANE=m
+CONFIG_ATM_MPOA=m
+CONFIG_ATM_BR2684=m
+# CONFIG_ATM_BR2684_IPFILTER is not set
+CONFIG_BRIDGE=m
+CONFIG_VLAN_8021Q=m
+CONFIG_DECNET=m
+# CONFIG_DECNET_ROUTER is not set
+CONFIG_LLC=m
+CONFIG_LLC2=m
+CONFIG_IPX=m
+# CONFIG_IPX_INTERN is not set
+CONFIG_ATALK=m
+# CONFIG_DEV_APPLETALK is not set
+CONFIG_X25=m
+CONFIG_LAPB=m
+# CONFIG_NET_DIVERT is not set
+CONFIG_ECONET=m
+# CONFIG_ECONET_AUNUDP is not set
+# CONFIG_ECONET_NATIVE is not set
+CONFIG_WAN_ROUTER=m
+
+#
+# QoS and/or fair queueing
+#
+CONFIG_NET_SCHED=y
+CONFIG_NET_SCH_CLK_JIFFIES=y
+# CONFIG_NET_SCH_CLK_GETTIMEOFDAY is not set
+# CONFIG_NET_SCH_CLK_CPU is not set
+CONFIG_NET_SCH_CBQ=m
+CONFIG_NET_SCH_HTB=m
+CONFIG_NET_SCH_HFSC=m
+CONFIG_NET_SCH_ATM=m
+CONFIG_NET_SCH_PRIO=m
+CONFIG_NET_SCH_RED=m
+CONFIG_NET_SCH_SFQ=m
+CONFIG_NET_SCH_TEQL=m
+CONFIG_NET_SCH_TBF=m
+CONFIG_NET_SCH_GRED=m
+CONFIG_NET_SCH_DSMARK=m
+CONFIG_NET_SCH_NETEM=m
+CONFIG_NET_SCH_INGRESS=m
+CONFIG_NET_QOS=y
+CONFIG_NET_ESTIMATOR=y
+CONFIG_NET_CLS=y
+CONFIG_NET_CLS_BASIC=m
+CONFIG_NET_CLS_TCINDEX=m
+CONFIG_NET_CLS_ROUTE4=m
+CONFIG_NET_CLS_ROUTE=y
+CONFIG_NET_CLS_FW=m
+CONFIG_NET_CLS_U32=m
+# CONFIG_CLS_U32_PERF is not set
+# CONFIG_NET_CLS_IND is not set
+# CONFIG_CLS_U32_MARK is not set
+CONFIG_NET_CLS_RSVP=m
+CONFIG_NET_CLS_RSVP6=m
+# CONFIG_NET_EMATCH is not set
+# CONFIG_NET_CLS_ACT is not set
+CONFIG_NET_CLS_POLICE=y
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+CONFIG_NETPOLL=y
+# CONFIG_NETPOLL_RX is not set
+# CONFIG_NETPOLL_TRAP is not set
+CONFIG_NET_POLL_CONTROLLER=y
+# CONFIG_HAMRADIO is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+CONFIG_BONDING=m
+CONFIG_EQUALIZER=m
+CONFIG_TUN=m
+
+#
+# ARCnet devices
+#
+# CONFIG_ARCNET is not set
+
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+# CONFIG_HAPPYMEAL is not set
+# CONFIG_SUNGEM is not set
+CONFIG_NET_VENDOR_3COM=y
+CONFIG_VORTEX=m
+CONFIG_TYPHOON=m
+
+#
+# Tulip family network device support
+#
+CONFIG_NET_TULIP=y
+CONFIG_DE2104X=m
+CONFIG_TULIP=m
+# CONFIG_TULIP_MWI is not set
+# CONFIG_TULIP_MMIO is not set
+# CONFIG_TULIP_NAPI is not set
+CONFIG_DE4X5=m
+CONFIG_WINBOND_840=m
+CONFIG_DM9102=m
+CONFIG_PCMCIA_XIRCOM=m
+CONFIG_PCMCIA_XIRTULIP=m
+CONFIG_HP100=m
+CONFIG_IBM_EMAC=y
+# CONFIG_IBM_EMAC_ERRMSG is not set
+CONFIG_IBM_EMAC_RXB=128
+CONFIG_IBM_EMAC_TXB=64
+CONFIG_IBM_EMAC_FGAP=8
+CONFIG_IBM_EMAC_SKBRES=0
+CONFIG_NET_PCI=y
+CONFIG_PCNET32=m
+CONFIG_AMD8111_ETH=m
+# CONFIG_AMD8111E_NAPI is not set
+CONFIG_ADAPTEC_STARFIRE=m
+# CONFIG_ADAPTEC_STARFIRE_NAPI is not set
+CONFIG_B44=m
+CONFIG_FORCEDETH=m
+CONFIG_DGRS=m
+CONFIG_EEPRO100=m
+CONFIG_E100=m
+CONFIG_FEALNX=m
+CONFIG_NATSEMI=m
+CONFIG_NE2K_PCI=m
+CONFIG_8139CP=m
+CONFIG_8139TOO=m
+# CONFIG_8139TOO_PIO is not set
+# CONFIG_8139TOO_TUNE_TWISTER is not set
+# CONFIG_8139TOO_8129 is not set
+# CONFIG_8139_OLD_RX_RESET is not set
+CONFIG_SIS900=m
+CONFIG_EPIC100=m
+CONFIG_SUNDANCE=m
+# CONFIG_SUNDANCE_MMIO is not set
+CONFIG_TLAN=m
+CONFIG_VIA_RHINE=m
+# CONFIG_VIA_RHINE_MMIO is not set
+
+#
+# Ethernet (1000 Mbit)
+#
+CONFIG_ACENIC=m
+# CONFIG_ACENIC_OMIT_TIGON_I is not set
+CONFIG_DL2K=m
+CONFIG_E1000=m
+# CONFIG_E1000_NAPI is not set
+CONFIG_NS83820=m
+CONFIG_HAMACHI=m
+CONFIG_YELLOWFIN=m
+CONFIG_R8169=m
+# CONFIG_R8169_NAPI is not set
+# CONFIG_R8169_VLAN is not set
+CONFIG_SK98LIN=m
+CONFIG_VIA_VELOCITY=m
+CONFIG_TIGON3=m
+CONFIG_BNX2=m
+
+#
+# Ethernet (10000 Mbit)
+#
+# CONFIG_IXGB is not set
+# CONFIG_S2IO is not set
+
+#
+# Token Ring devices
+#
+# CONFIG_TR is not set
+
+#
+# Wireless LAN (non-hamradio)
+#
+CONFIG_NET_RADIO=y
+
+#
+# Obsolete Wireless cards support (pre-802.11)
+#
+CONFIG_STRIP=m
+CONFIG_PCMCIA_WAVELAN=m
+CONFIG_PCMCIA_NETWAVE=m
+
+#
+# Wireless 802.11 Frequency Hopping cards support
+#
+CONFIG_PCMCIA_RAYCS=m
+
+#
+# Wireless 802.11b ISA/PCI cards support
+#
+CONFIG_HERMES=m
+CONFIG_PLX_HERMES=m
+CONFIG_TMD_HERMES=m
+CONFIG_PCI_HERMES=m
+CONFIG_ATMEL=m
+CONFIG_PCI_ATMEL=m
+
+#
+# Wireless 802.11b Pcmcia/Cardbus cards support
+#
+CONFIG_PCMCIA_HERMES=m
+CONFIG_AIRO_CS=m
+CONFIG_PCMCIA_ATMEL=m
+CONFIG_PCMCIA_WL3501=m
+
+#
+# Prism GT/Duette 802.11(a/b/g) PCI/Cardbus support
+#
+CONFIG_PRISM54=m
+CONFIG_NET_WIRELESS=y
+
+#
+# PCMCIA network device support
+#
+CONFIG_NET_PCMCIA=y
+CONFIG_PCMCIA_3C589=m
+CONFIG_PCMCIA_3C574=m
+CONFIG_PCMCIA_FMVJ18X=m
+CONFIG_PCMCIA_PCNET=m
+CONFIG_PCMCIA_NMCLAN=m
+CONFIG_PCMCIA_SMC91C92=m
+CONFIG_PCMCIA_XIRC2PS=m
+CONFIG_PCMCIA_AXNET=m
+
+#
+# Wan interfaces
+#
+CONFIG_WAN=y
+CONFIG_DSCC4=m
+# CONFIG_DSCC4_PCISYNC is not set
+# CONFIG_DSCC4_PCI_RST is not set
+CONFIG_LANMEDIA=m
+CONFIG_SYNCLINK_SYNCPPP=m
+CONFIG_HDLC=m
+# CONFIG_HDLC_RAW is not set
+# CONFIG_HDLC_RAW_ETH is not set
+# CONFIG_HDLC_CISCO is not set
+# CONFIG_HDLC_FR is not set
+# CONFIG_HDLC_PPP is not set
+# CONFIG_HDLC_X25 is not set
+CONFIG_PCI200SYN=m
+CONFIG_WANXL=m
+CONFIG_PC300=m
+
+#
+# Cyclades-PC300 MLPPP support is disabled.
+#
+
+#
+# Refer to the file README.mlppp, provided by PC300 package.
+#
+CONFIG_FARSYNC=m
+CONFIG_DLCI=m
+CONFIG_DLCI_COUNT=24
+CONFIG_DLCI_MAX=8
+# CONFIG_WAN_ROUTER_DRIVERS is not set
+CONFIG_LAPBETHER=m
+CONFIG_X25_ASY=m
+
+#
+# ATM drivers
+#
+# CONFIG_ATM_TCP is not set
+# CONFIG_ATM_LANAI is not set
+# CONFIG_ATM_ENI is not set
+# CONFIG_ATM_FIRESTREAM is not set
+# CONFIG_ATM_ZATM is not set
+# CONFIG_ATM_NICSTAR is not set
+# CONFIG_ATM_IDT77252 is not set
+# CONFIG_ATM_AMBASSADOR is not set
+# CONFIG_ATM_HORIZON is not set
+# CONFIG_ATM_IA is not set
+# CONFIG_ATM_FORE200E_MAYBE is not set
+# CONFIG_ATM_HE is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+# CONFIG_PLIP is not set
+CONFIG_PPP=m
+CONFIG_PPP_MULTILINK=y
+CONFIG_PPP_FILTER=y
+CONFIG_PPP_ASYNC=m
+CONFIG_PPP_SYNC_TTY=m
+CONFIG_PPP_DEFLATE=m
+CONFIG_PPP_BSDCOMP=m
+CONFIG_PPP_MPPE_MPPC=m
+CONFIG_PPPOE=m
+CONFIG_PPPOATM=m
+CONFIG_SLIP=m
+CONFIG_SLIP_COMPRESSED=y
+CONFIG_SLIP_SMART=y
+# CONFIG_SLIP_MODE_SLIP6 is not set
+# CONFIG_NET_FC is not set
+CONFIG_SHAPER=m
+CONFIG_NETCONSOLE=m
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN is not set
+
+#
+# Telephony Support
+#
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+CONFIG_INPUT_JOYDEV=y
+# CONFIG_INPUT_TSDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+CONFIG_INPUT_KEYBOARD=y
+# CONFIG_KEYBOARD_ATKBD is not set
+# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_LKKBD is not set
+# CONFIG_KEYBOARD_XTKBD is not set
+# CONFIG_KEYBOARD_NEWTON is not set
+CONFIG_INPUT_MOUSE=y
+# CONFIG_MOUSE_PS2 is not set
+# CONFIG_MOUSE_SERIAL is not set
+# CONFIG_MOUSE_VSXXXAA is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+CONFIG_SERIO=y
+# CONFIG_SERIO_I8042 is not set
+# CONFIG_SERIO_SERPORT is not set
+# CONFIG_SERIO_PARKBD is not set
+# CONFIG_SERIO_PCIPS2 is not set
+# CONFIG_SERIO_LIBPS2 is not set
+# CONFIG_SERIO_RAW is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+# CONFIG_SERIAL_8250_CS is not set
+CONFIG_SERIAL_8250_NR_UARTS=4
+# CONFIG_SERIAL_8250_EXTENDED is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_JSM is not set
+CONFIG_UNIX98_PTYS=y
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+CONFIG_PRINTER=m
+# CONFIG_LP_CONSOLE is not set
+CONFIG_PPDEV=m
+CONFIG_TIPAR=m
+
+#
+# IPMI
+#
+# CONFIG_IPMI_HANDLER is not set
+
+#
+# Watchdog Cards
+#
+CONFIG_WATCHDOG=y
+# CONFIG_WATCHDOG_NOWAYOUT is not set
+
+#
+# Watchdog Device Drivers
+#
+CONFIG_SOFT_WATCHDOG=m
+
+#
+# PCI-based Watchdog Cards
+#
+CONFIG_PCIPCWATCHDOG=m
+CONFIG_WDTPCI=m
+# CONFIG_WDT_501_PCI is not set
+
+#
+# USB-based Watchdog Cards
+#
+CONFIG_USBPCWATCHDOG=m
+CONFIG_NVRAM=m
+CONFIG_GEN_RTC=m
+# CONFIG_GEN_RTC_X is not set
+CONFIG_DTLK=m
+CONFIG_R3964=m
+CONFIG_APPLICOM=m
+
+#
+# Ftape, the floppy tape device driver
+#
+CONFIG_AGP=m
+CONFIG_DRM=m
+CONFIG_DRM_TDFX=m
+CONFIG_DRM_R128=m
+CONFIG_DRM_RADEON=m
+CONFIG_DRM_MGA=m
+CONFIG_DRM_SIS=m
+
+#
+# PCMCIA character devices
+#
+CONFIG_SYNCLINK_CS=m
+CONFIG_RAW_DRIVER=m
+CONFIG_MAX_RAW_DEVS=256
+
+#
+# TPM devices
+#
+CONFIG_TCG_TPM=m
+CONFIG_TCG_NSC=m
+CONFIG_TCG_ATMEL=m
+
+#
+# I2C support
+#
+CONFIG_I2C=y
+CONFIG_I2C_CHARDEV=y
+
+#
+# I2C Algorithms
+#
+CONFIG_I2C_ALGOBIT=y
+CONFIG_I2C_ALGOPCF=m
+CONFIG_I2C_ALGOPCA=m
+
+#
+# I2C Hardware Bus support
+#
+# CONFIG_I2C_ALI1535 is not set
+# CONFIG_I2C_ALI1563 is not set
+# CONFIG_I2C_ALI15X3 is not set
+# CONFIG_I2C_AMD756 is not set
+# CONFIG_I2C_AMD8111 is not set
+# CONFIG_I2C_I801 is not set
+# CONFIG_I2C_I810 is not set
+# CONFIG_I2C_PIIX4 is not set
+CONFIG_I2C_IBM_IIC=y
+CONFIG_I2C_ISA=m
+# CONFIG_I2C_MPC is not set
+# CONFIG_I2C_NFORCE2 is not set
+# CONFIG_I2C_PARPORT is not set
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_PROSAVAGE is not set
+# CONFIG_I2C_SAVAGE4 is not set
+# CONFIG_SCx200_ACB is not set
+# CONFIG_I2C_SIS5595 is not set
+# CONFIG_I2C_SIS630 is not set
+# CONFIG_I2C_SIS96X is not set
+# CONFIG_I2C_STUB is not set
+# CONFIG_I2C_VIA is not set
+# CONFIG_I2C_VIAPRO is not set
+# CONFIG_I2C_VOODOO3 is not set
+# CONFIG_I2C_PCA_ISA is not set
+
+#
+# Hardware Sensors Chip support
+#
+CONFIG_I2C_SENSOR=m
+CONFIG_SENSORS_ADM1021=m
+CONFIG_SENSORS_ADM1025=m
+CONFIG_SENSORS_ADM1026=m
+CONFIG_SENSORS_ADM1031=m
+CONFIG_SENSORS_ASB100=m
+CONFIG_SENSORS_DS1621=m
+CONFIG_SENSORS_FSCHER=m
+CONFIG_SENSORS_FSCPOS=m
+CONFIG_SENSORS_GL518SM=m
+CONFIG_SENSORS_GL520SM=m
+CONFIG_SENSORS_IT87=m
+CONFIG_SENSORS_LM63=m
+CONFIG_SENSORS_LM75=m
+CONFIG_SENSORS_LM77=m
+CONFIG_SENSORS_LM78=m
+CONFIG_SENSORS_LM80=m
+CONFIG_SENSORS_LM83=m
+CONFIG_SENSORS_LM85=m
+CONFIG_SENSORS_LM87=m
+CONFIG_SENSORS_LM90=m
+CONFIG_SENSORS_LM92=m
+CONFIG_SENSORS_MAX1619=m
+CONFIG_SENSORS_PC87360=m
+CONFIG_SENSORS_SMSC47B397=m
+CONFIG_SENSORS_SIS5595=m
+CONFIG_SENSORS_SMSC47M1=m
+CONFIG_SENSORS_VIA686A=m
+CONFIG_SENSORS_W83781D=m
+CONFIG_SENSORS_W83L785TS=m
+CONFIG_SENSORS_W83627HF=m
+
+#
+# Other I2C Chip support
+#
+CONFIG_SENSORS_DS1337=m
+CONFIG_SENSORS_EEPROM=m
+CONFIG_SENSORS_PCF8574=m
+CONFIG_SENSORS_PCF8591=m
+CONFIG_SENSORS_RTC8564=m
+CONFIG_SENSORS_M41T00=m
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+
+#
+# Dallas's 1-wire bus
+#
+# CONFIG_W1 is not set
+
+#
+# Misc devices
+#
+
+#
+# Multimedia devices
+#
+CONFIG_VIDEO_DEV=m
+
+#
+# Video For Linux
+#
+
+#
+# Video Adapters
+#
+CONFIG_VIDEO_BT848=m
+CONFIG_VIDEO_BWQCAM=m
+CONFIG_VIDEO_CQCAM=m
+CONFIG_VIDEO_CPIA=m
+CONFIG_VIDEO_CPIA_USB=m
+CONFIG_VIDEO_SAA5246A=m
+CONFIG_VIDEO_SAA5249=m
+CONFIG_TUNER_3036=m
+CONFIG_VIDEO_STRADIS=m
+CONFIG_VIDEO_ZORAN=m
+CONFIG_VIDEO_ZORAN_BUZ=m
+CONFIG_VIDEO_ZORAN_DC10=m
+CONFIG_VIDEO_ZORAN_DC30=m
+CONFIG_VIDEO_ZORAN_LML33=m
+CONFIG_VIDEO_ZORAN_LML33R10=m
+CONFIG_VIDEO_SAA7134=m
+# CONFIG_VIDEO_SAA7134_DVB is not set
+CONFIG_VIDEO_MXB=m
+CONFIG_VIDEO_DPC=m
+CONFIG_VIDEO_HEXIUM_ORION=m
+CONFIG_VIDEO_HEXIUM_GEMINI=m
+CONFIG_VIDEO_CX88=m
+# CONFIG_VIDEO_CX88_DVB is not set
+CONFIG_VIDEO_OVCAMCHIP=m
+
+#
+# Radio Adapters
+#
+CONFIG_RADIO_GEMTEK_PCI=m
+CONFIG_RADIO_MAXIRADIO=m
+CONFIG_RADIO_MAESTRO=m
+
+#
+# Digital Video Broadcasting Devices
+#
+CONFIG_DVB=y
+CONFIG_DVB_CORE=m
+
+#
+# Supported SAA7146 based PCI Adapters
+#
+CONFIG_DVB_AV7110=m
+# CONFIG_DVB_AV7110_FIRMWARE is not set
+CONFIG_DVB_AV7110_OSD=y
+CONFIG_DVB_BUDGET=m
+CONFIG_DVB_BUDGET_CI=m
+CONFIG_DVB_BUDGET_AV=m
+CONFIG_DVB_BUDGET_PATCH=m
+
+#
+# Supported USB Adapters
+#
+CONFIG_DVB_TTUSB_BUDGET=m
+CONFIG_DVB_TTUSB_DEC=m
+CONFIG_DVB_DIBUSB=m
+# CONFIG_DVB_DIBUSB_MISDESIGNED_DEVICES is not set
+# CONFIG_DVB_DIBCOM_DEBUG is not set
+CONFIG_DVB_CINERGYT2=m
+# CONFIG_DVB_CINERGYT2_TUNING is not set
+
+#
+# Supported FlexCopII (B2C2) Adapters
+#
+CONFIG_DVB_B2C2_FLEXCOP=m
+CONFIG_DVB_B2C2_FLEXCOP_PCI=m
+CONFIG_DVB_B2C2_FLEXCOP_USB=m
+# CONFIG_DVB_B2C2_FLEXCOP_DEBUG is not set
+CONFIG_DVB_B2C2_SKYSTAR=m
+
+#
+# Supported BT878 Adapters
+#
+CONFIG_DVB_BT8XX=m
+
+#
+# Supported DVB Frontends
+#
+
+#
+# Customise DVB Frontends
+#
+
+#
+# DVB-S (satellite) frontends
+#
+CONFIG_DVB_STV0299=m
+CONFIG_DVB_CX24110=m
+CONFIG_DVB_TDA8083=m
+CONFIG_DVB_TDA80XX=m
+CONFIG_DVB_MT312=m
+CONFIG_DVB_VES1X93=m
+
+#
+# DVB-T (terrestrial) frontends
+#
+CONFIG_DVB_SP8870=m
+CONFIG_DVB_SP887X=m
+CONFIG_DVB_CX22700=m
+CONFIG_DVB_CX22702=m
+CONFIG_DVB_L64781=m
+CONFIG_DVB_TDA1004X=m
+CONFIG_DVB_NXT6000=m
+CONFIG_DVB_MT352=m
+CONFIG_DVB_DIB3000MB=m
+CONFIG_DVB_DIB3000MC=m
+
+#
+# DVB-C (cable) frontends
+#
+CONFIG_DVB_ATMEL_AT76C651=m
+CONFIG_DVB_VES1820=m
+CONFIG_DVB_TDA10021=m
+CONFIG_DVB_STV0297=m
+
+#
+# ATSC (North American/Korean Terresterial DTV) frontends
+#
+CONFIG_DVB_NXT2002=m
+CONFIG_DVB_OR51211=m
+CONFIG_DVB_OR51132=m
+CONFIG_VIDEO_SAA7146=m
+CONFIG_VIDEO_SAA7146_VV=m
+CONFIG_VIDEO_VIDEOBUF=m
+CONFIG_VIDEO_TUNER=m
+CONFIG_VIDEO_BUF=m
+CONFIG_VIDEO_BTCX=m
+CONFIG_VIDEO_IR=m
+CONFIG_VIDEO_TVEEPROM=m
+
+#
+# Graphics support
+#
+CONFIG_FB=y
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+CONFIG_FB_SOFT_CURSOR=y
+# CONFIG_FB_MACMODES is not set
+# CONFIG_FB_MODE_HELPERS is not set
+CONFIG_FB_TILEBLITTING=y
+# CONFIG_FB_CIRRUS is not set
+# CONFIG_FB_PM2 is not set
+# CONFIG_FB_CYBER2000 is not set
+# CONFIG_FB_CT65550 is not set
+# CONFIG_FB_ASILIANT is not set
+# CONFIG_FB_IMSTT is not set
+# CONFIG_FB_VGA16 is not set
+# CONFIG_FB_NVIDIA is not set
+# CONFIG_FB_RIVA is not set
+CONFIG_FB_MATROX=y
+CONFIG_FB_MATROX_MILLENIUM=y
+CONFIG_FB_MATROX_MYSTIQUE=y
+CONFIG_FB_MATROX_G=y
+# CONFIG_FB_MATROX_I2C is not set
+# CONFIG_FB_MATROX_MULTIHEAD is not set
+# CONFIG_FB_RADEON_OLD is not set
+# CONFIG_FB_RADEON is not set
+# CONFIG_FB_ATY128 is not set
+# CONFIG_FB_ATY is not set
+# CONFIG_FB_SAVAGE is not set
+# CONFIG_FB_SIS is not set
+# CONFIG_FB_NEOMAGIC is not set
+# CONFIG_FB_KYRO is not set
+# CONFIG_FB_3DFX is not set
+# CONFIG_FB_VOODOO1 is not set
+# CONFIG_FB_TRIDENT is not set
+# CONFIG_FB_S1D13XXX is not set
+# CONFIG_FB_VIRTUAL is not set
+
+#
+# Console display driver support
+#
+CONFIG_DUMMY_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+# CONFIG_FONTS is not set
+CONFIG_FONT_8x8=y
+CONFIG_FONT_8x16=y
+
+#
+# Logo configuration
+#
+CONFIG_LOGO=y
+CONFIG_LOGO_LINUX_MONO=y
+CONFIG_LOGO_LINUX_VGA16=y
+CONFIG_LOGO_LINUX_CLUT224=y
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+
+#
+# USB support
+#
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+CONFIG_USB=y
+# CONFIG_USB_DEBUG is not set
+
+#
+# Miscellaneous USB options
+#
+CONFIG_USB_DEVICEFS=y
+# CONFIG_USB_BANDWIDTH is not set
+# CONFIG_USB_DYNAMIC_MINORS is not set
+# CONFIG_USB_OTG is not set
+
+#
+# USB Host Controller Drivers
+#
+CONFIG_USB_EHCI_HCD=y
+# CONFIG_USB_EHCI_SPLIT_ISO is not set
+# CONFIG_USB_EHCI_ROOT_HUB_TT is not set
+CONFIG_USB_OHCI_HCD=y
+# CONFIG_USB_OHCI_BIG_ENDIAN is not set
+CONFIG_USB_OHCI_LITTLE_ENDIAN=y
+CONFIG_USB_UHCI_HCD=y
+CONFIG_USB_SL811_HCD=m
+# CONFIG_USB_SL811_CS is not set
+
+#
+# USB Device Class drivers
+#
+CONFIG_USB_BLUETOOTH_TTY=m
+CONFIG_USB_ACM=m
+CONFIG_USB_PRINTER=y
+
+#
+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information
+#
+CONFIG_USB_STORAGE=y
+# CONFIG_USB_STORAGE_DEBUG is not set
+CONFIG_USB_STORAGE_DATAFAB=y
+CONFIG_USB_STORAGE_FREECOM=y
+CONFIG_USB_STORAGE_ISD200=y
+CONFIG_USB_STORAGE_DPCM=y
+CONFIG_USB_STORAGE_USBAT=y
+CONFIG_USB_STORAGE_SDDR09=y
+CONFIG_USB_STORAGE_SDDR55=y
+CONFIG_USB_STORAGE_JUMPSHOT=y
+
+#
+# USB Input Devices
+#
+CONFIG_USB_HID=y
+CONFIG_USB_HIDINPUT=y
+# CONFIG_HID_FF is not set
+CONFIG_USB_HIDDEV=y
+CONFIG_USB_AIPTEK=m
+CONFIG_USB_WACOM=m
+CONFIG_USB_KBTAB=m
+CONFIG_USB_POWERMATE=m
+# CONFIG_USB_MTOUCH is not set
+CONFIG_USB_EGALAX=m
+CONFIG_USB_XPAD=m
+CONFIG_USB_ATI_REMOTE=m
+
+#
+# USB Imaging devices
+#
+CONFIG_USB_MDC800=m
+CONFIG_USB_MICROTEK=m
+
+#
+# USB Multimedia devices
+#
+CONFIG_USB_DABUSB=m
+CONFIG_USB_VICAM=m
+CONFIG_USB_DSBR=m
+CONFIG_USB_IBMCAM=m
+CONFIG_USB_KONICAWC=m
+CONFIG_USB_OV511=m
+CONFIG_USB_SE401=m
+CONFIG_USB_SN9C102=m
+CONFIG_USB_STV680=m
+CONFIG_USB_W9968CF=m
+CONFIG_USB_PWC=m
+
+#
+# USB Network Adapters
+#
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_KAWETH is not set
+CONFIG_USB_PEGASUS=y
+# CONFIG_USB_RTL8150 is not set
+CONFIG_USB_USBNET=y
+
+#
+# USB Host-to-Host Cables
+#
+CONFIG_USB_ALI_M5632=y
+CONFIG_USB_AN2720=y
+CONFIG_USB_BELKIN=y
+CONFIG_USB_GENESYS=y
+CONFIG_USB_NET1080=y
+CONFIG_USB_PL2301=y
+CONFIG_USB_KC2190=y
+
+#
+# Intelligent USB Devices/Gadgets
+#
+CONFIG_USB_ARMLINUX=y
+CONFIG_USB_EPSON2888=y
+CONFIG_USB_ZAURUS=y
+CONFIG_USB_CDCETHER=y
+
+#
+# USB Network Adapters
+#
+CONFIG_USB_AX8817X=y
+# CONFIG_USB_ZD1201 is not set
+CONFIG_USB_MON=y
+
+#
+# USB port drivers
+#
+CONFIG_USB_USS720=m
+
+#
+# USB Serial Converter support
+#
+CONFIG_USB_SERIAL=m
+CONFIG_USB_SERIAL_GENERIC=y
+CONFIG_USB_SERIAL_AIRPRIME=m
+CONFIG_USB_SERIAL_BELKIN=m
+CONFIG_USB_SERIAL_WHITEHEAT=m
+CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m
+CONFIG_USB_SERIAL_CP2101=m
+CONFIG_USB_SERIAL_CYPRESS_M8=m
+CONFIG_USB_SERIAL_EMPEG=m
+CONFIG_USB_SERIAL_FTDI_SIO=m
+CONFIG_USB_SERIAL_VISOR=m
+CONFIG_USB_SERIAL_IPAQ=m
+CONFIG_USB_SERIAL_IR=m
+CONFIG_USB_SERIAL_EDGEPORT=m
+CONFIG_USB_SERIAL_EDGEPORT_TI=m
+CONFIG_USB_SERIAL_GARMIN=m
+CONFIG_USB_SERIAL_IPW=m
+CONFIG_USB_SERIAL_KEYSPAN_PDA=m
+CONFIG_USB_SERIAL_KEYSPAN=m
+CONFIG_USB_SERIAL_KEYSPAN_MPR=y
+CONFIG_USB_SERIAL_KEYSPAN_USA28=y
+CONFIG_USB_SERIAL_KEYSPAN_USA28X=y
+CONFIG_USB_SERIAL_KEYSPAN_USA28XA=y
+CONFIG_USB_SERIAL_KEYSPAN_USA28XB=y
+CONFIG_USB_SERIAL_KEYSPAN_USA19=y
+CONFIG_USB_SERIAL_KEYSPAN_USA18X=y
+CONFIG_USB_SERIAL_KEYSPAN_USA19W=y
+CONFIG_USB_SERIAL_KEYSPAN_USA19QW=y
+CONFIG_USB_SERIAL_KEYSPAN_USA19QI=y
+CONFIG_USB_SERIAL_KEYSPAN_USA49W=y
+CONFIG_USB_SERIAL_KEYSPAN_USA49WLC=y
+CONFIG_USB_SERIAL_KLSI=m
+CONFIG_USB_SERIAL_KOBIL_SCT=m
+CONFIG_USB_SERIAL_MCT_U232=m
+CONFIG_USB_SERIAL_PL2303=m
+CONFIG_USB_SERIAL_HP4X=m
+CONFIG_USB_SERIAL_SAFE=m
+# CONFIG_USB_SERIAL_SAFE_PADDED is not set
+CONFIG_USB_SERIAL_TI=m
+CONFIG_USB_SERIAL_CYBERJACK=m
+CONFIG_USB_SERIAL_XIRCOM=m
+CONFIG_USB_SERIAL_OPTION=m
+CONFIG_USB_SERIAL_OMNINET=m
+CONFIG_USB_EZUSB=y
+
+#
+# USB Miscellaneous drivers
+#
+CONFIG_USB_EMI62=m
+CONFIG_USB_EMI26=m
+CONFIG_USB_AUERSWALD=m
+CONFIG_USB_RIO500=m
+CONFIG_USB_LEGOTOWER=m
+CONFIG_USB_LCD=m
+CONFIG_USB_LED=m
+CONFIG_USB_CYTHERM=m
+CONFIG_USB_PHIDGETKIT=m
+CONFIG_USB_PHIDGETSERVO=m
+CONFIG_USB_IDMOUSE=m
+CONFIG_USB_SISUSBVGA=m
+# CONFIG_USB_TEST is not set
+
+#
+# USB ATM/DSL drivers
+#
+CONFIG_USB_ATM=m
+# CONFIG_USB_SPEEDTOUCH is not set
+
+#
+# USB Gadget Support
+#
+CONFIG_USB_GADGET=m
+# CONFIG_USB_GADGET_DEBUG_FILES is not set
+CONFIG_USB_GADGET_NET2280=y
+CONFIG_USB_NET2280=m
+# CONFIG_USB_GADGET_PXA2XX is not set
+# CONFIG_USB_GADGET_GOKU is not set
+# CONFIG_USB_GADGET_LH7A40X is not set
+# CONFIG_USB_GADGET_OMAP is not set
+# CONFIG_USB_GADGET_DUMMY_HCD is not set
+CONFIG_USB_GADGET_DUALSPEED=y
+CONFIG_USB_ZERO=m
+CONFIG_USB_ETH=m
+CONFIG_USB_ETH_RNDIS=y
+CONFIG_USB_GADGETFS=m
+CONFIG_USB_FILE_STORAGE=m
+# CONFIG_USB_FILE_STORAGE_TEST is not set
+CONFIG_USB_G_SERIAL=m
+
+#
+# MMC/SD Card support
+#
+# CONFIG_MMC is not set
+
+#
+# InfiniBand support
+#
+# CONFIG_INFINIBAND is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+CONFIG_EXT3_FS=y
+# CONFIG_EXT3_FS_XATTR is not set
+CONFIG_JBD=y
+# CONFIG_JBD_DEBUG is not set
+CONFIG_REISERFS_FS=m
+# CONFIG_REISERFS_CHECK is not set
+# CONFIG_REISERFS_PROC_INFO is not set
+# CONFIG_REISERFS_FS_XATTR is not set
+CONFIG_JFS_FS=m
+# CONFIG_JFS_POSIX_ACL is not set
+# CONFIG_JFS_SECURITY is not set
+# CONFIG_JFS_DEBUG is not set
+# CONFIG_JFS_STATISTICS is not set
+
+#
+# XFS support
+#
+# CONFIG_XFS_FS is not set
+CONFIG_MINIX_FS=m
+CONFIG_ROMFS_FS=m
+CONFIG_QUOTA=y
+CONFIG_QFMT_V1=m
+CONFIG_QFMT_V2=m
+CONFIG_QUOTACTL=y
+CONFIG_DNOTIFY=y
+CONFIG_AUTOFS_FS=m
+CONFIG_AUTOFS4_FS=m
+
+#
+# CD-ROM/DVD Filesystems
+#
+CONFIG_ISO9660_FS=y
+CONFIG_JOLIET=y
+CONFIG_ZISOFS=y
+CONFIG_ZISOFS_FS=y
+CONFIG_UDF_FS=y
+CONFIG_UDF_NLS=y
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=m
+CONFIG_MSDOS_FS=m
+CONFIG_VFAT_FS=m
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+CONFIG_NTFS_FS=m
+# CONFIG_NTFS_DEBUG is not set
+CONFIG_NTFS_RW=y
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_SYSFS=y
+CONFIG_DEVFS_FS=y
+# CONFIG_DEVFS_MOUNT is not set
+# CONFIG_DEVFS_DEBUG is not set
+# CONFIG_DEVPTS_FS_XATTR is not set
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_XATTR is not set
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+
+#
+# Miscellaneous filesystems
+#
+CONFIG_ADFS_FS=m
+# CONFIG_ADFS_FS_RW is not set
+CONFIG_AFFS_FS=m
+CONFIG_HFS_FS=m
+CONFIG_HFSPLUS_FS=m
+CONFIG_BEFS_FS=m
+# CONFIG_BEFS_DEBUG is not set
+CONFIG_BFS_FS=m
+CONFIG_EFS_FS=m
+CONFIG_JFFS_FS=m
+CONFIG_JFFS_FS_VERBOSE=0
+# CONFIG_JFFS_PROC_FS is not set
+CONFIG_JFFS2_FS=m
+CONFIG_JFFS2_FS_DEBUG=0
+# CONFIG_JFFS2_FS_NAND is not set
+# CONFIG_JFFS2_FS_NOR_ECC is not set
+# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
+CONFIG_JFFS2_ZLIB=y
+CONFIG_JFFS2_RTIME=y
+# CONFIG_JFFS2_RUBIN is not set
+CONFIG_CRAMFS=y
+CONFIG_VXFS_FS=m
+CONFIG_HPFS_FS=m
+CONFIG_QNX4FS_FS=m
+CONFIG_SYSV_FS=m
+CONFIG_UFS_FS=m
+# CONFIG_UFS_FS_WRITE is not set
+
+#
+# Network File Systems
+#
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFS_DIRECTIO is not set
+CONFIG_NFSD=m
+# CONFIG_NFSD_V3 is not set
+CONFIG_NFSD_TCP=y
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_EXPORTFS=m
+CONFIG_SUNRPC=y
+CONFIG_SUNRPC_GSS=m
+CONFIG_RPCSEC_GSS_KRB5=m
+CONFIG_RPCSEC_GSS_SPKM3=m
+CONFIG_SMB_FS=m
+# CONFIG_SMB_NLS_DEFAULT is not set
+CONFIG_CIFS=m
+# CONFIG_CIFS_STATS is not set
+# CONFIG_CIFS_XATTR is not set
+# CONFIG_CIFS_EXPERIMENTAL is not set
+CONFIG_NCP_FS=m
+# CONFIG_NCPFS_PACKET_SIGNING is not set
+# CONFIG_NCPFS_IOCTL_LOCKING is not set
+# CONFIG_NCPFS_STRONG is not set
+# CONFIG_NCPFS_NFS_NS is not set
+# CONFIG_NCPFS_OS2_NS is not set
+# CONFIG_NCPFS_SMALLDOS is not set
+# CONFIG_NCPFS_NLS is not set
+# CONFIG_NCPFS_EXTRAS is not set
+CONFIG_CODA_FS=m
+# CONFIG_CODA_FS_OLD_API is not set
+CONFIG_AFS_FS=m
+CONFIG_RXRPC=m
+
+#
+# Partition Types
+#
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_ACORN_PARTITION is not set
+# CONFIG_OSF_PARTITION is not set
+# CONFIG_AMIGA_PARTITION is not set
+# CONFIG_ATARI_PARTITION is not set
+CONFIG_MAC_PARTITION=y
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_BSD_DISKLABEL is not set
+# CONFIG_MINIX_SUBPARTITION is not set
+# CONFIG_SOLARIS_X86_PARTITION is not set
+# CONFIG_UNIXWARE_DISKLABEL is not set
+# CONFIG_LDM_PARTITION is not set
+# CONFIG_SGI_PARTITION is not set
+# CONFIG_ULTRIX_PARTITION is not set
+# CONFIG_SUN_PARTITION is not set
+# CONFIG_EFI_PARTITION is not set
+
+#
+# Native Language Support
+#
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_CODEPAGE_737=m
+CONFIG_NLS_CODEPAGE_775=m
+CONFIG_NLS_CODEPAGE_850=m
+CONFIG_NLS_CODEPAGE_852=m
+CONFIG_NLS_CODEPAGE_855=m
+CONFIG_NLS_CODEPAGE_857=m
+CONFIG_NLS_CODEPAGE_860=m
+CONFIG_NLS_CODEPAGE_861=m
+CONFIG_NLS_CODEPAGE_862=m
+CONFIG_NLS_CODEPAGE_863=m
+CONFIG_NLS_CODEPAGE_864=m
+CONFIG_NLS_CODEPAGE_865=m
+CONFIG_NLS_CODEPAGE_866=m
+CONFIG_NLS_CODEPAGE_869=m
+CONFIG_NLS_CODEPAGE_936=m
+CONFIG_NLS_CODEPAGE_950=m
+CONFIG_NLS_CODEPAGE_932=m
+CONFIG_NLS_CODEPAGE_949=m
+CONFIG_NLS_CODEPAGE_874=m
+CONFIG_NLS_ISO8859_8=m
+CONFIG_NLS_CODEPAGE_1250=m
+CONFIG_NLS_CODEPAGE_1251=m
+CONFIG_NLS_ASCII=m
+CONFIG_NLS_ISO8859_1=y
+CONFIG_NLS_ISO8859_2=m
+CONFIG_NLS_ISO8859_3=m
+CONFIG_NLS_ISO8859_4=m
+CONFIG_NLS_ISO8859_5=m
+CONFIG_NLS_ISO8859_6=m
+CONFIG_NLS_ISO8859_7=m
+CONFIG_NLS_ISO8859_9=m
+CONFIG_NLS_ISO8859_13=m
+CONFIG_NLS_ISO8859_14=m
+CONFIG_NLS_ISO8859_15=m
+CONFIG_NLS_KOI8_R=m
+CONFIG_NLS_KOI8_U=m
+CONFIG_NLS_UTF8=m
+
+#
+# IBM 40x options
+#
+
+#
+# Library routines
+#
+CONFIG_CRC_CCITT=m
+CONFIG_CRC32=y
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=m
+CONFIG_REED_SOLOMON=m
+CONFIG_REED_SOLOMON_DEC16=y
+
+#
+# Profiling support
+#
+# CONFIG_PROFILING is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+# CONFIG_DEBUG_KERNEL is not set
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_SERIAL_TEXT_DEBUG is not set
+CONFIG_PPC_OCP=y
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+CONFIG_SECURITY=y
+CONFIG_SECURITY_NETWORK=y
+CONFIG_SECURITY_CAPABILITIES=m
+CONFIG_SECURITY_ROOTPLUG=m
+CONFIG_SECURITY_SECLVL=m
+# CONFIG_SECURITY_SELINUX is not set
+
+#
+# Cryptographic options
+#
+CONFIG_CRYPTO=y
+CONFIG_CRYPTO_HMAC=y
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_MD4 is not set
+CONFIG_CRYPTO_MD5=m
+CONFIG_CRYPTO_SHA1=m
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_WP512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+CONFIG_CRYPTO_DES=m
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_TEA is not set
+CONFIG_CRYPTO_ARC4=m
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+CONFIG_CRYPTO_DEFLATE=m
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Hardware crypto devices
+#
--- /dev/null
+diff -upr linux-2.6.11/include/linux/wireless.h linux-2.6.11-WE18/include/linux/wireless.h
+--- linux-2.6.11/include/linux/wireless.h 2004-12-24 13:35:01.000000000 -0800
++++ linux-2.6.11-WE18/include/linux/wireless.h 2005-03-12 09:53:02.000000000 -0800
+@@ -1,10 +1,10 @@
+ /*
+ * This file define a set of standard wireless extensions
+ *
+- * Version : 17 21.6.04
++ * Version : 18 12.3.05
+ *
+ * Authors : Jean Tourrilhes - HPL - <jt@hpl.hp.com>
+- * Copyright (c) 1997-2004 Jean Tourrilhes, All Rights Reserved.
++ * Copyright (c) 1997-2005 Jean Tourrilhes, All Rights Reserved.
+ */
+
+ #ifndef _LINUX_WIRELESS_H
+@@ -82,7 +82,7 @@
+ * (there is some stuff that will be added in the future...)
+ * I just plan to increment with each new version.
+ */
+-#define WIRELESS_EXT 17
++#define WIRELESS_EXT 18
+
+ /*
+ * Changes :
+@@ -182,6 +182,21 @@
+ * - Document (struct iw_quality *)->updated, add new flags (INVALID)
+ * - Wireless Event capability in struct iw_range
+ * - Add support for relative TxPower (yick !)
++ *
++ * V17 to V18 (From Jouni Malinen <jkmaline@cc.hut.fi>)
++ * ----------
++ * - Add support for WPA/WPA2
++ * - Add extended encoding configuration (SIOCSIWENCODEEXT and
++ * SIOCGIWENCODEEXT)
++ * - Add SIOCSIWGENIE/SIOCGIWGENIE
++ * - Add SIOCSIWMLME
++ * - Add SIOCSIWPMKSA
++ * - Add struct iw_range bit field for supported encoding capabilities
++ * - Add optional scan request parameters for SIOCSIWSCAN
++ * - Add SIOCSIWAUTH/SIOCGIWAUTH for setting authentication and WPA
++ * related parameters (extensible up to 4096 parameter values)
++ * - Add wireless events: IWEVGENIE, IWEVMICHAELMICFAILURE,
++ * IWEVASSOCREQIE, IWEVASSOCRESPIE, IWEVPMKIDCAND
+ */
+
+ /**************************** CONSTANTS ****************************/
+@@ -256,6 +271,30 @@
+ #define SIOCSIWPOWER 0x8B2C /* set Power Management settings */
+ #define SIOCGIWPOWER 0x8B2D /* get Power Management settings */
+
++/* WPA : Generic IEEE 802.11 informatiom element (e.g., for WPA/RSN/WMM).
++ * This ioctl uses struct iw_point and data buffer that includes IE id and len
++ * fields. More than one IE may be included in the request. Setting the generic
++ * IE to empty buffer (len=0) removes the generic IE from the driver. Drivers
++ * are allowed to generate their own WPA/RSN IEs, but in these cases, drivers
++ * are required to report the used IE as a wireless event, e.g., when
++ * associating with an AP. */
++#define SIOCSIWGENIE 0x8B30 /* set generic IE */
++#define SIOCGIWGENIE 0x8B31 /* get generic IE */
++
++/* WPA : IEEE 802.11 MLME requests */
++#define SIOCSIWMLME 0x8B16 /* request MLME operation; uses
++ * struct iw_mlme */
++/* WPA : Authentication mode parameters */
++#define SIOCSIWAUTH 0x8B32 /* set authentication mode params */
++#define SIOCGIWAUTH 0x8B33 /* get authentication mode params */
++
++/* WPA : Extended version of encoding configuration */
++#define SIOCSIWENCODEEXT 0x8B34 /* set encoding token & mode */
++#define SIOCGIWENCODEEXT 0x8B35 /* get encoding token & mode */
++
++/* WPA2 : PMKSA cache management */
++#define SIOCSIWPMKSA 0x8B36 /* PMKSA cache operation */
++
+ /* -------------------- DEV PRIVATE IOCTL LIST -------------------- */
+
+ /* These 32 ioctl are wireless device private, for 16 commands.
+@@ -297,6 +336,34 @@
+ #define IWEVCUSTOM 0x8C02 /* Driver specific ascii string */
+ #define IWEVREGISTERED 0x8C03 /* Discovered a new node (AP mode) */
+ #define IWEVEXPIRED 0x8C04 /* Expired a node (AP mode) */
++#define IWEVGENIE 0x8C05 /* Generic IE (WPA, RSN, WMM, ..)
++ * (scan results); This includes id and
++ * length fields. One IWEVGENIE may
++ * contain more than one IE. Scan
++ * results may contain one or more
++ * IWEVGENIE events. */
++#define IWEVMICHAELMICFAILURE 0x8C06 /* Michael MIC failure
++ * (struct iw_michaelmicfailure)
++ */
++#define IWEVASSOCREQIE 0x8C07 /* IEs used in (Re)Association Request.
++ * The data includes id and length
++ * fields and may contain more than one
++ * IE. This event is required in
++ * Managed mode if the driver
++ * generates its own WPA/RSN IE. This
++ * should be sent just before
++ * IWEVREGISTERED event for the
++ * association. */
++#define IWEVASSOCRESPIE 0x8C08 /* IEs used in (Re)Association
++ * Response. The data includes id and
++ * length fields and may contain more
++ * than one IE. This may be sent
++ * between IWEVASSOCREQIE and
++ * IWEVREGISTERED events for the
++ * association. */
++#define IWEVPMKIDCAND 0x8C09 /* PMKID candidate for RSN
++ * pre-authentication
++ * (struct iw_pmkid_cand) */
+
+ #define IWEVFIRST 0x8C00
+
+@@ -432,12 +499,94 @@
+ #define IW_SCAN_THIS_MODE 0x0020 /* Scan only this Mode */
+ #define IW_SCAN_ALL_RATE 0x0040 /* Scan all Bit-Rates */
+ #define IW_SCAN_THIS_RATE 0x0080 /* Scan only this Bit-Rate */
++/* struct iw_scan_req scan_type */
++#define IW_SCAN_TYPE_ACTIVE 0
++#define IW_SCAN_TYPE_PASSIVE 1
+ /* Maximum size of returned data */
+ #define IW_SCAN_MAX_DATA 4096 /* In bytes */
+
+ /* Max number of char in custom event - use multiple of them if needed */
+ #define IW_CUSTOM_MAX 256 /* In bytes */
+
++/* Generic information element */
++#define IW_GENERIC_IE_MAX 1024
++
++/* MLME requests (SIOCSIWMLME / struct iw_mlme) */
++#define IW_MLME_DEAUTH 0
++#define IW_MLME_DISASSOC 1
++
++/* SIOCSIWAUTH/SIOCGIWAUTH struct iw_param flags */
++#define IW_AUTH_INDEX 0x0FFF
++#define IW_AUTH_FLAGS 0xF000
++/* SIOCSIWAUTH/SIOCGIWAUTH parameters (0 .. 4095)
++ * (IW_AUTH_INDEX mask in struct iw_param flags; this is the index of the
++ * parameter that is being set/get to; value will be read/written to
++ * struct iw_param value field) */
++#define IW_AUTH_WPA_VERSION 0
++#define IW_AUTH_CIPHER_PAIRWISE 1
++#define IW_AUTH_CIPHER_GROUP 2
++#define IW_AUTH_KEY_MGMT 3
++#define IW_AUTH_TKIP_COUNTERMEASURES 4
++#define IW_AUTH_DROP_UNENCRYPTED 5
++#define IW_AUTH_80211_AUTH_ALG 6
++#define IW_AUTH_WPA_ENABLED 7
++#define IW_AUTH_RX_UNENCRYPTED_EAPOL 8
++#define IW_AUTH_ROAMING_CONTROL 9
++#define IW_AUTH_PRIVACY_INVOKED 10
++
++/* IW_AUTH_WPA_VERSION values (bit field) */
++#define IW_AUTH_WPA_VERSION_DISABLED 0x00000001
++#define IW_AUTH_WPA_VERSION_WPA 0x00000002
++#define IW_AUTH_WPA_VERSION_WPA2 0x00000004
++
++/* IW_AUTH_PAIRWISE_CIPHER and IW_AUTH_GROUP_CIPHER values (bit field) */
++#define IW_AUTH_CIPHER_NONE 0x00000001
++#define IW_AUTH_CIPHER_WEP40 0x00000002
++#define IW_AUTH_CIPHER_TKIP 0x00000004
++#define IW_AUTH_CIPHER_CCMP 0x00000008
++#define IW_AUTH_CIPHER_WEP104 0x00000010
++
++/* IW_AUTH_KEY_MGMT values (bit field) */
++#define IW_AUTH_KEY_MGMT_802_1X 1
++#define IW_AUTH_KEY_MGMT_PSK 2
++
++/* IW_AUTH_80211_AUTH_ALG values (bit field) */
++#define IW_AUTH_ALG_OPEN_SYSTEM 0x00000001
++#define IW_AUTH_ALG_SHARED_KEY 0x00000002
++#define IW_AUTH_ALG_LEAP 0x00000004
++
++/* IW_AUTH_ROAMING_CONTROL values */
++#define IW_AUTH_ROAMING_ENABLE 0 /* driver/firmware based roaming */
++#define IW_AUTH_ROAMING_DISABLE 1 /* user space program used for roaming
++ * control */
++
++/* SIOCSIWENCODEEXT definitions */
++#define IW_ENCODE_SEQ_MAX_SIZE 8
++/* struct iw_encode_ext ->alg */
++#define IW_ENCODE_ALG_NONE 0
++#define IW_ENCODE_ALG_WEP 1
++#define IW_ENCODE_ALG_TKIP 2
++#define IW_ENCODE_ALG_CCMP 3
++/* struct iw_encode_ext ->ext_flags */
++#define IW_ENCODE_EXT_TX_SEQ_VALID 0x00000001
++#define IW_ENCODE_EXT_RX_SEQ_VALID 0x00000002
++#define IW_ENCODE_EXT_GROUP_KEY 0x00000004
++#define IW_ENCODE_EXT_SET_TX_KEY 0x00000008
++
++/* IWEVMICHAELMICFAILURE : struct iw_michaelmicfailure ->flags */
++#define IW_MICFAILURE_KEY_ID 0x00000003 /* Key ID 0..3 */
++#define IW_MICFAILURE_GROUP 0x00000004
++#define IW_MICFAILURE_PAIRWISE 0x00000008
++#define IW_MICFAILURE_STAKEY 0x00000010
++#define IW_MICFAILURE_COUNT 0x00000060 /* 1 or 2 (0 = count not supported)
++ */
++
++/* Bit field values for enc_capa in struct iw_range */
++#define IW_ENC_CAPA_WPA 0x00000001
++#define IW_ENC_CAPA_WPA2 0x00000002
++#define IW_ENC_CAPA_CIPHER_TKIP 0x00000004
++#define IW_ENC_CAPA_CIPHER_CCMP 0x00000008
++
+ /* Event capability macros - in (struct iw_range *)->event_capa
+ * Because we have more than 32 possible events, we use an array of
+ * 32 bit bitmasks. Note : 32 bits = 0x20 = 2^5. */
+@@ -546,6 +695,132 @@ struct iw_thrspy
+ struct iw_quality high; /* High threshold */
+ };
+
++/*
++ * Optional data for scan request
++ *
++ * Note: these optional parameters are controlling parameters for the
++ * scanning behavior, these do not apply to getting scan results
++ * (SIOCGIWSCAN). Drivers are expected to keep a local BSS table and
++ * provide a merged results with all BSSes even if the previous scan
++ * request limited scanning to a subset, e.g., by specifying an SSID.
++ * Especially, scan results are required to include an entry for the
++ * current BSS if the driver is in Managed mode and associated with an AP.
++ */
++struct iw_scan_req
++{
++ __u8 scan_type; /* IW_SCAN_TYPE_{ACTIVE,PASSIVE} */
++ __u8 essid_len;
++ __u8 num_channels; /* num entries in channel_list;
++ * 0 = scan all allowed channels */
++ __u8 flags; /* reserved as padding; use zero, this may
++ * be used in the future for adding flags
++ * to request different scan behavior */
++ struct sockaddr bssid; /* ff:ff:ff:ff:ff:ff for broadcast BSSID or
++ * individual address of a specific BSS */
++
++ /*
++ * Use this ESSID if IW_SCAN_THIS_ESSID flag is used instead of using
++ * the current ESSID. This allows scan requests for specific ESSID
++ * without having to change the current ESSID and potentially breaking
++ * the current association.
++ */
++ __u8 essid[IW_ESSID_MAX_SIZE];
++
++ /*
++ * Optional parameters for changing the default scanning behavior.
++ * These are based on the MLME-SCAN.request from IEEE Std 802.11.
++ * TU is 1.024 ms. If these are set to 0, driver is expected to use
++ * reasonable default values. min_channel_time defines the time that
++ * will be used to wait for the first reply on each channel. If no
++ * replies are received, next channel will be scanned after this. If
++ * replies are received, total time waited on the channel is defined by
++ * max_channel_time.
++ */
++ __u32 min_channel_time; /* in TU */
++ __u32 max_channel_time; /* in TU */
++
++ struct iw_freq channel_list[IW_MAX_FREQUENCIES];
++};
++
++/* ------------------------- WPA SUPPORT ------------------------- */
++
++/*
++ * Extended data structure for get/set encoding (this is used with
++ * SIOCSIWENCODEEXT/SIOCGIWENCODEEXT. struct iw_point and IW_ENCODE_*
++ * flags are used in the same way as with SIOCSIWENCODE/SIOCGIWENCODE and
++ * only the data contents changes (key data -> this structure, including
++ * key data).
++ *
++ * If the new key is the first group key, it will be set as the default
++ * TX key. Otherwise, default TX key index is only changed if
++ * IW_ENCODE_EXT_SET_TX_KEY flag is set.
++ *
++ * Key will be changed with SIOCSIWENCODEEXT in all cases except for
++ * special "change TX key index" operation which is indicated by setting
++ * key_len = 0 and ext_flags |= IW_ENCODE_EXT_SET_TX_KEY.
++ *
++ * tx_seq/rx_seq are only used when respective
++ * IW_ENCODE_EXT_{TX,RX}_SEQ_VALID flag is set in ext_flags. Normal
++ * TKIP/CCMP operation is to set RX seq with SIOCSIWENCODEEXT and start
++ * TX seq from zero whenever key is changed. SIOCGIWENCODEEXT is normally
++ * used only by an Authenticator (AP or an IBSS station) to get the
++ * current TX sequence number. Using TX_SEQ_VALID for SIOCSIWENCODEEXT and
++ * RX_SEQ_VALID for SIOCGIWENCODEEXT are optional, but can be useful for
++ * debugging/testing.
++ */
++struct iw_encode_ext
++{
++ __u32 ext_flags; /* IW_ENCODE_EXT_* */
++ __u8 tx_seq[IW_ENCODE_SEQ_MAX_SIZE]; /* LSB first */
++ __u8 rx_seq[IW_ENCODE_SEQ_MAX_SIZE]; /* LSB first */
++ struct sockaddr addr; /* ff:ff:ff:ff:ff:ff for broadcast/multicast
++ * (group) keys or unicast address for
++ * individual keys */
++ __u16 alg; /* IW_ENCODE_ALG_* */
++ __u16 key_len;
++ __u8 key[0];
++};
++
++/* SIOCSIWMLME data */
++struct iw_mlme
++{
++ __u16 cmd; /* IW_MLME_* */
++ __u16 reason_code;
++ struct sockaddr addr;
++};
++
++/* SIOCSIWPMKSA data */
++#define IW_PMKSA_ADD 1
++#define IW_PMKSA_REMOVE 2
++#define IW_PMKSA_FLUSH 3
++
++#define IW_PMKID_LEN 16
++
++struct iw_pmksa
++{
++ __u32 cmd; /* IW_PMKSA_* */
++ struct sockaddr bssid;
++ __u8 pmkid[IW_PMKID_LEN];
++};
++
++/* IWEVMICHAELMICFAILURE data */
++struct iw_michaelmicfailure
++{
++ __u32 flags;
++ struct sockaddr src_addr;
++ __u8 tsc[IW_ENCODE_SEQ_MAX_SIZE]; /* LSB first */
++};
++
++/* IWEVPMKIDCAND data */
++#define IW_PMKID_CAND_PREAUTH 0x00000001 /* RNS pre-authentication enabled */
++struct iw_pmkid_cand
++{
++ __u32 flags; /* IW_PMKID_CAND_* */
++ __u32 index; /* the smaller the index, the higher the
++ * priority */
++ struct sockaddr bssid;
++};
++
+ /* ------------------------ WIRELESS STATS ------------------------ */
+ /*
+ * Wireless statistics (used for /proc/net/wireless)
+@@ -725,6 +1000,8 @@ struct iw_range
+ struct iw_freq freq[IW_MAX_FREQUENCIES]; /* list */
+ /* Note : this frequency list doesn't need to fit channel numbers,
+ * because each entry contain its channel index */
++
++ __u32 enc_capa; /* IW_ENC_CAPA_* bit field */
+ };
+
+ /*
+diff -upr linux-2.6.11/net/core/wireless.c linux-2.6.11-WE18/net/core/wireless.c
+--- linux-2.6.11/net/core/wireless.c 2005-03-04 15:55:29.000000000 -0800
++++ linux-2.6.11-WE18/net/core/wireless.c 2005-03-12 09:11:24.000000000 -0800
+@@ -2,7 +2,7 @@
+ * This file implement the Wireless Extensions APIs.
+ *
+ * Authors : Jean Tourrilhes - HPL - <jt@hpl.hp.com>
+- * Copyright (c) 1997-2004 Jean Tourrilhes, All Rights Reserved.
++ * Copyright (c) 1997-2005 Jean Tourrilhes, All Rights Reserved.
+ *
+ * (As all part of the Linux kernel, this file is GPL)
+ */
+@@ -187,6 +187,12 @@ static const struct iw_ioctl_description
+ .header_type = IW_HEADER_TYPE_ADDR,
+ .flags = IW_DESCR_FLAG_DUMP,
+ },
++ [SIOCSIWMLME - SIOCIWFIRST] = {
++ .header_type = IW_HEADER_TYPE_POINT,
++ .token_size = 1,
++ .min_tokens = sizeof(struct iw_mlme),
++ .max_tokens = sizeof(struct iw_mlme),
++ },
+ [SIOCGIWAPLIST - SIOCIWFIRST] = {
+ .header_type = IW_HEADER_TYPE_POINT,
+ .token_size = sizeof(struct sockaddr) +
+@@ -195,7 +201,10 @@ static const struct iw_ioctl_description
+ .flags = IW_DESCR_FLAG_NOMAX,
+ },
+ [SIOCSIWSCAN - SIOCIWFIRST] = {
+- .header_type = IW_HEADER_TYPE_PARAM,
++ .header_type = IW_HEADER_TYPE_POINT,
++ .token_size = 1,
++ .min_tokens = 0,
++ .max_tokens = sizeof(struct iw_scan_req),
+ },
+ [SIOCGIWSCAN - SIOCIWFIRST] = {
+ .header_type = IW_HEADER_TYPE_POINT,
+@@ -273,6 +282,42 @@ static const struct iw_ioctl_description
+ [SIOCGIWPOWER - SIOCIWFIRST] = {
+ .header_type = IW_HEADER_TYPE_PARAM,
+ },
++ [SIOCSIWGENIE - SIOCIWFIRST] = {
++ .header_type = IW_HEADER_TYPE_POINT,
++ .token_size = 1,
++ .max_tokens = IW_GENERIC_IE_MAX,
++ },
++ [SIOCGIWGENIE - SIOCIWFIRST] = {
++ .header_type = IW_HEADER_TYPE_POINT,
++ .token_size = 1,
++ .max_tokens = IW_GENERIC_IE_MAX,
++ },
++ [SIOCSIWAUTH - SIOCIWFIRST] = {
++ .header_type = IW_HEADER_TYPE_PARAM,
++ },
++ [SIOCGIWAUTH - SIOCIWFIRST] = {
++ .header_type = IW_HEADER_TYPE_PARAM,
++ },
++ [SIOCSIWENCODEEXT - SIOCIWFIRST] = {
++ .header_type = IW_HEADER_TYPE_POINT,
++ .token_size = 1,
++ .min_tokens = sizeof(struct iw_encode_ext),
++ .max_tokens = sizeof(struct iw_encode_ext) +
++ IW_ENCODING_TOKEN_MAX,
++ },
++ [SIOCGIWENCODEEXT - SIOCIWFIRST] = {
++ .header_type = IW_HEADER_TYPE_POINT,
++ .token_size = 1,
++ .min_tokens = sizeof(struct iw_encode_ext),
++ .max_tokens = sizeof(struct iw_encode_ext) +
++ IW_ENCODING_TOKEN_MAX,
++ },
++ [SIOCSIWPMKSA - SIOCIWFIRST] = {
++ .header_type = IW_HEADER_TYPE_POINT,
++ .token_size = 1,
++ .min_tokens = sizeof(struct iw_pmksa),
++ .max_tokens = sizeof(struct iw_pmksa),
++ },
+ };
+ static const int standard_ioctl_num = (sizeof(standard_ioctl) /
+ sizeof(struct iw_ioctl_description));
+@@ -299,6 +344,31 @@ static const struct iw_ioctl_description
+ [IWEVEXPIRED - IWEVFIRST] = {
+ .header_type = IW_HEADER_TYPE_ADDR,
+ },
++ [IWEVGENIE - IWEVFIRST] = {
++ .header_type = IW_HEADER_TYPE_POINT,
++ .token_size = 1,
++ .max_tokens = IW_GENERIC_IE_MAX,
++ },
++ [IWEVMICHAELMICFAILURE - IWEVFIRST] = {
++ .header_type = IW_HEADER_TYPE_POINT,
++ .token_size = 1,
++ .max_tokens = sizeof(struct iw_michaelmicfailure),
++ },
++ [IWEVASSOCREQIE - IWEVFIRST] = {
++ .header_type = IW_HEADER_TYPE_POINT,
++ .token_size = 1,
++ .max_tokens = IW_GENERIC_IE_MAX,
++ },
++ [IWEVASSOCRESPIE - IWEVFIRST] = {
++ .header_type = IW_HEADER_TYPE_POINT,
++ .token_size = 1,
++ .max_tokens = IW_GENERIC_IE_MAX,
++ },
++ [IWEVPMKIDCAND - IWEVFIRST] = {
++ .header_type = IW_HEADER_TYPE_POINT,
++ .token_size = 1,
++ .max_tokens = sizeof(struct iw_pmkid_cand),
++ },
+ };
+ static const int standard_event_num = (sizeof(standard_event) /
+ sizeof(struct iw_ioctl_description));
--- /dev/null
+diff -ruN linux-2.6.12.orig/drivers/net/Kconfig linux-2.6.12/drivers/net/Kconfig
+--- linux-2.6.12.orig/drivers/net/Kconfig 2005-06-28 19:57:16.000000000 +0200
++++ linux-2.6.12/drivers/net/Kconfig 2005-06-28 20:07:01.000000000 +0200
+@@ -2417,6 +2417,32 @@
+ module; it is called bsd_comp and will show up in the directory
+ modules once you have said "make modules". If unsure, say N.
+
++config PPP_MPPE_MPPC
++ tristate "Microsoft PPP compression/encryption (MPPC/MPPE)"
++ depends on PPP
++ select CRYPTO_SHA1
++ select CRYPTO_ARC4
++ ---help---
++ Support for the Microsoft Point-To-Point Compression (RFC2118) and
++ Microsoft Point-To-Point Encryption (RFC3078). These protocols are
++ supported by Microsoft Windows and wide range of "hardware" access
++ servers. MPPE is common protocol in Virtual Private Networks. According
++ to RFC3078, MPPE supports 40, 56 and 128-bit key lengths. Depending on
++ PPP daemon configuration on both ends of the link, following scenarios
++ are possible:
++ - only compression (MPPC) is used,
++ - only encryption (MPPE) is used,
++ - compression and encryption (MPPC+MPPE) are used.
++
++ Please note that Hi/Fn (http://www.hifn.com) holds patent on MPPC so
++ you should check if this patent is valid in your country in order to
++ avoid legal problems.
++
++ For more information please visit http://free.polbox.pl/h/hs001
++
++ To compile this driver as a module, choose M here. The module will
++ be called ppp_mppe_mppc.ko.
++
+ config PPPOE
+ tristate "PPP over Ethernet (EXPERIMENTAL)"
+ depends on EXPERIMENTAL && PPP
+diff -ruN linux-2.6.12.orig/drivers/net/Makefile linux-2.6.12/drivers/net/Makefile
+--- linux-2.6.12.orig/drivers/net/Makefile 2005-06-28 19:57:16.000000000 +0200
++++ linux-2.6.12/drivers/net/Makefile 2005-06-28 20:07:01.000000000 +0200
+@@ -105,6 +105,7 @@
+ obj-$(CONFIG_PPP_SYNC_TTY) += ppp_synctty.o
+ obj-$(CONFIG_PPP_DEFLATE) += ppp_deflate.o
+ obj-$(CONFIG_PPP_BSDCOMP) += bsd_comp.o
++obj-$(CONFIG_PPP_MPPE_MPPC) += ppp_mppe_mppc.o
+ obj-$(CONFIG_PPPOE) += pppox.o pppoe.o
+
+ obj-$(CONFIG_SLIP) += slip.o
+diff -ruN linux-2.6.12.orig/drivers/net/ppp_generic.c linux-2.6.12/drivers/net/ppp_generic.c
+--- linux-2.6.12.orig/drivers/net/ppp_generic.c 2005-06-28 19:57:20.000000000 +0200
++++ linux-2.6.12/drivers/net/ppp_generic.c 2005-06-28 20:07:01.000000000 +0200
+@@ -19,7 +19,7 @@
+ * PPP driver, written by Michael Callahan and Al Longyear, and
+ * subsequently hacked by Paul Mackerras.
+ *
+- * ==FILEVERSION 20041108==
++ * ==FILEVERSION 20050110==
+ */
+
+ #include <linux/config.h>
+@@ -105,6 +105,7 @@
+ spinlock_t rlock; /* lock for receive side 58 */
+ spinlock_t wlock; /* lock for transmit side 5c */
+ int mru; /* max receive unit 60 */
++ int mru_alloc; /* MAX(1500,MRU) for dev_alloc_skb() */
+ unsigned int flags; /* control bits 64 */
+ unsigned int xstate; /* transmit state bits 68 */
+ unsigned int rstate; /* receive state bits 6c */
+@@ -632,7 +633,9 @@
+ case PPPIOCSMRU:
+ if (get_user(val, p))
+ break;
+- ppp->mru = val;
++ ppp->mru_alloc = ppp->mru = val;
++ if (ppp->mru_alloc < PPP_MRU)
++ ppp->mru_alloc = PPP_MRU; /* increase for broken peers */
+ err = 0;
+ break;
+
+@@ -1107,14 +1110,37 @@
+ case PPP_CCP:
+ /* peek at outbound CCP frames */
+ ppp_ccp_peek(ppp, skb, 0);
++ /*
++ * When LZS or MPPE/MPPC has been negotiated we don't send
++ * CCP_RESETACK after receiving CCP_RESETREQ; in fact pppd
++ * sends such a packet but we silently discard it here
++ */
++ if (CCP_CODE(skb->data+2) == CCP_RESETACK
++ && (ppp->xcomp->compress_proto == CI_MPPE
++ || ppp->xcomp->compress_proto == CI_LZS)) {
++ --ppp->stats.tx_packets;
++ ppp->stats.tx_bytes -= skb->len - 2;
++ kfree_skb(skb);
++ return;
++ }
+ break;
+ }
+
+ /* try to do packet compression */
+ if ((ppp->xstate & SC_COMP_RUN) && ppp->xc_state != 0
+ && proto != PPP_LCP && proto != PPP_CCP) {
+- new_skb = alloc_skb(ppp->dev->mtu + ppp->dev->hard_header_len,
+- GFP_ATOMIC);
++ int comp_ovhd = 0;
++ /*
++ * because of possible data expansion when MPPC or LZS
++ * is used, allocate compressor's buffer 12.5% bigger
++ * than MTU
++ */
++ if (ppp->xcomp->compress_proto == CI_MPPE)
++ comp_ovhd = ((ppp->dev->mtu * 9) / 8) + 1 + MPPE_OVHD;
++ else if (ppp->xcomp->compress_proto == CI_LZS)
++ comp_ovhd = ((ppp->dev->mtu * 9) / 8) + 1 + LZS_OVHD;
++ new_skb = alloc_skb(ppp->dev->mtu + ppp->dev->hard_header_len
++ + comp_ovhd, GFP_ATOMIC);
+ if (new_skb == 0) {
+ printk(KERN_ERR "PPP: no memory (comp pkt)\n");
+ goto drop;
+@@ -1132,9 +1158,21 @@
+ skb = new_skb;
+ skb_put(skb, len);
+ skb_pull(skb, 2); /* pull off A/C bytes */
+- } else {
++ } else if (len == 0) {
+ /* didn't compress, or CCP not up yet */
+ kfree_skb(new_skb);
++ } else {
++ /*
++ * (len < 0)
++ * MPPE requires that we do not send unencrypted
++ * frames. The compressor will return -1 if we
++ * should drop the frame. We cannot simply test
++ * the compress_proto because MPPE and MPPC share
++ * the same number.
++ */
++ printk(KERN_ERR "ppp: compressor dropped pkt\n");
++ kfree_skb(new_skb);
++ goto drop;
+ }
+ }
+
+@@ -1640,14 +1678,15 @@
+ goto err;
+
+ if (proto == PPP_COMP) {
+- ns = dev_alloc_skb(ppp->mru + PPP_HDRLEN);
++ ns = dev_alloc_skb(ppp->mru_alloc + PPP_HDRLEN);
+ if (ns == 0) {
+ printk(KERN_ERR "ppp_decompress_frame: no memory\n");
+ goto err;
+ }
+ /* the decompressor still expects the A/C bytes in the hdr */
+ len = ppp->rcomp->decompress(ppp->rc_state, skb->data - 2,
+- skb->len + 2, ns->data, ppp->mru + PPP_HDRLEN);
++ skb->len + 2, ns->data,
++ ppp->mru_alloc + PPP_HDRLEN);
+ if (len < 0) {
+ /* Pass the compressed frame to pppd as an
+ error indication. */
+@@ -1673,7 +1712,14 @@
+ return skb;
+
+ err:
+- ppp->rstate |= SC_DC_ERROR;
++ if (ppp->rcomp->compress_proto != CI_MPPE
++ && ppp->rcomp->compress_proto != CI_LZS) {
++ /*
++ * If decompression protocol isn't MPPE/MPPC or LZS, we set
++ * SC_DC_ERROR flag and wait for CCP_RESETACK
++ */
++ ppp->rstate |= SC_DC_ERROR;
++ }
+ ppp_receive_error(ppp);
+ return skb;
+ }
+@@ -2349,6 +2395,7 @@
+ memset(ppp, 0, sizeof(struct ppp));
+
+ ppp->mru = PPP_MRU;
++ ppp->mru_alloc = PPP_MRU;
+ init_ppp_file(&ppp->file, INTERFACE);
+ ppp->file.hdrlen = PPP_HDRLEN - 2; /* don't count proto bytes */
+ for (i = 0; i < NUM_NP; ++i)
+diff -ruN linux-2.6.12.orig/drivers/net/ppp_mppe_mppc.c linux-2.6.12/drivers/net/ppp_mppe_mppc.c
+--- linux-2.6.12.orig/drivers/net/ppp_mppe_mppc.c 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.12/drivers/net/ppp_mppe_mppc.c 2005-06-28 20:07:01.000000000 +0200
+@@ -0,0 +1,1299 @@
++/*
++ * ppp_mppe_mppc.c - MPPC/MPPE "compressor/decompressor" module.
++ *
++ * Copyright (c) 1994 Árpád Magosányi <mag@bunuel.tii.matav.hu>
++ * Copyright (c) 1999 Tim Hockin, Cobalt Networks Inc. <thockin@cobaltnet.com>
++ * Copyright (c) 2002-2004 Jan Dubiec <jdx@slackware.pl>
++ *
++ * Permission to use, copy, modify, and distribute this software and its
++ * documentation is hereby granted, provided that the above copyright
++ * notice appears in all copies. This software is provided without any
++ * warranty, express or implied.
++ *
++ * The code is based on MPPE kernel module written by Árpád Magosányi and
++ * Tim Hockin which can be found on http://planetmirror.com/pub/mppe/.
++ * I have added MPPC and 56 bit session keys support in MPPE.
++ *
++ * WARNING! Although this is open source code, its usage in some countries
++ * (in particular in the USA) may violate Stac Inc. patent for MPPC.
++ *
++ * ==FILEVERSION 20041123==
++ *
++ */
++
++#include <linux/init.h>
++#include <linux/module.h>
++#include <linux/mm.h>
++#include <linux/slab.h>
++#include <asm/scatterlist.h>
++#include <linux/vmalloc.h>
++#include <linux/crypto.h>
++
++#include <linux/ppp_defs.h>
++#include <linux/ppp-comp.h>
++
++/*
++ * State for a mppc/mppe "(de)compressor".
++ */
++struct ppp_mppe_state {
++ struct crypto_tfm *arc4_tfm;
++ struct crypto_tfm *sha1_tfm;
++ u8 *sha1_digest;
++ u8 master_key[MPPE_MAX_KEY_LEN];
++ u8 session_key[MPPE_MAX_KEY_LEN];
++ u8 mppc; /* do we use compression (MPPC)? */
++ u8 mppe; /* do we use encryption (MPPE)? */
++ u8 keylen; /* key length in bytes */
++ u8 bitkeylen; /* key length in bits */
++ u16 ccount; /* coherency counter */
++ u16 bits; /* MPPC/MPPE control bits */
++ u8 stateless; /* do we use stateless mode? */
++ u8 nextflushed; /* set A bit in the next outgoing packet;
++ used only by compressor*/
++ u8 flushexpected; /* drop packets until A bit is received;
++ used only by decompressor*/
++ u8 *hist; /* MPPC history */
++ u16 *hash; /* Hash table; used only by compressor */
++ u16 histptr; /* history "cursor" */
++ int unit;
++ int debug;
++ int mru;
++ struct compstat stats;
++};
++
++#define MPPE_HIST_LEN 8192 /* MPPC history size */
++#define MPPE_MAX_CCOUNT 0x0FFF /* max. coherency counter value */
++
++#define MPPE_BIT_FLUSHED 0x80 /* bit A */
++#define MPPE_BIT_RESET 0x40 /* bit B */
++#define MPPE_BIT_COMP 0x20 /* bit C */
++#define MPPE_BIT_ENCRYPTED 0x10 /* bit D */
++
++#define MPPE_SALT0 0xD1 /* values used in MPPE key derivation */
++#define MPPE_SALT1 0x26 /* according to RFC3079 */
++#define MPPE_SALT2 0x9E
++
++#define MPPE_CCOUNT(x) ((((x)[4] & 0x0f) << 8) + (x)[5])
++#define MPPE_BITS(x) ((x)[4] & 0xf0)
++#define MPPE_CTRLHI(x) ((((x)->ccount & 0xf00)>>8)|((x)->bits))
++#define MPPE_CTRLLO(x) ((x)->ccount & 0xff)
++
++/*
++ * Kernel Crypto API needs its arguments to be in kmalloc'd memory, not in the
++ * module static data area. That means sha_pad needs to be kmalloc'd. It is done
++ * in mppe_module_init(). This has been pointed out on 30th July 2004 by Oleg
++ * Makarenko on pptpclient-devel mailing list.
++ */
++#define SHA1_PAD_SIZE 40
++struct sha_pad {
++ unsigned char sha_pad1[SHA1_PAD_SIZE];
++ unsigned char sha_pad2[SHA1_PAD_SIZE];
++};
++static struct sha_pad *sha_pad;
++
++static inline void
++setup_sg(struct scatterlist *sg, const void *address, unsigned int length)
++{
++ sg[0].page = virt_to_page(address);
++ sg[0].offset = offset_in_page(address);
++ sg[0].length = length;
++}
++
++static inline void
++arc4_setkey(struct ppp_mppe_state *state, const unsigned char *key,
++ const unsigned int keylen)
++{
++ crypto_cipher_setkey(state->arc4_tfm, key, keylen);
++}
++
++static inline void
++arc4_encrypt(struct ppp_mppe_state *state, const unsigned char *in,
++ const unsigned int len, unsigned char *out)
++{
++ struct scatterlist sgin[4], sgout[4];
++
++ setup_sg(sgin, in, len);
++ setup_sg(sgout, out, len);
++ crypto_cipher_encrypt(state->arc4_tfm, sgout, sgin, len);
++}
++
++#define arc4_decrypt arc4_encrypt
++
++/*
++ * Key Derivation, from RFC 3078, RFC 3079.
++ * Equivalent to Get_Key() for MS-CHAP as described in RFC 3079.
++ */
++static void
++get_new_key_from_sha(struct ppp_mppe_state *state, unsigned char *interim_key)
++{
++ struct scatterlist sg[4];
++
++ setup_sg(&sg[0], state->master_key, state->keylen);
++ setup_sg(&sg[1], sha_pad->sha_pad1, sizeof(sha_pad->sha_pad1));
++ setup_sg(&sg[2], state->session_key, state->keylen);
++ setup_sg(&sg[3], sha_pad->sha_pad2, sizeof(sha_pad->sha_pad2));
++
++ crypto_digest_digest (state->sha1_tfm, sg, 4, state->sha1_digest);
++
++ memcpy(interim_key, state->sha1_digest, state->keylen);
++}
++
++static void
++mppe_change_key(struct ppp_mppe_state *state, int initialize)
++{
++ unsigned char interim_key[MPPE_MAX_KEY_LEN];
++
++ get_new_key_from_sha(state, interim_key);
++ if (initialize) {
++ memcpy(state->session_key, interim_key, state->keylen);
++ } else {
++ arc4_setkey(state, interim_key, state->keylen);
++ arc4_encrypt(state, interim_key, state->keylen, state->session_key);
++ }
++ if (state->keylen == 8) {
++ if (state->bitkeylen == 40) {
++ state->session_key[0] = MPPE_SALT0;
++ state->session_key[1] = MPPE_SALT1;
++ state->session_key[2] = MPPE_SALT2;
++ } else {
++ state->session_key[0] = MPPE_SALT0;
++ }
++ }
++ arc4_setkey(state, state->session_key, state->keylen);
++}
++
++/* increase 12-bit coherency counter */
++static inline void
++mppe_increase_ccount(struct ppp_mppe_state *state)
++{
++ state->ccount = (state->ccount + 1) & MPPE_MAX_CCOUNT;
++ if (state->mppe) {
++ if (state->stateless) {
++ mppe_change_key(state, 0);
++ state->nextflushed = 1;
++ } else {
++ if ((state->ccount & 0xff) == 0xff) {
++ mppe_change_key(state, 0);
++ }
++ }
++ }
++}
++
++/* allocate space for a MPPE/MPPC (de)compressor. */
++/* comp != 0 -> init compressor */
++/* comp = 0 -> init decompressor */
++static void *
++mppe_alloc(unsigned char *options, int opt_len, int comp)
++{
++ struct ppp_mppe_state *state;
++ unsigned int digestsize;
++ u8* fname;
++
++ fname = comp ? "mppe_comp_alloc" : "mppe_decomp_alloc";
++
++ /*
++ * Hack warning - additionally to the standard MPPC/MPPE configuration
++ * options, pppd passes to the (de)copressor 8 or 16 byte session key.
++ * Therefore options[1] contains MPPC/MPPE configuration option length
++ * (CILEN_MPPE = 6), but the real options length, depending on the key
++ * length, is 6+8 or 6+16.
++ */
++ if (opt_len < CILEN_MPPE) {
++ printk(KERN_WARNING "%s: wrong options length: %u\n", fname, opt_len);
++ return NULL;
++ }
++
++ if (options[0] != CI_MPPE || options[1] != CILEN_MPPE ||
++ (options[2] & ~MPPE_STATELESS) != 0 ||
++ options[3] != 0 || options[4] != 0 ||
++ (options[5] & ~(MPPE_128BIT|MPPE_56BIT|MPPE_40BIT|MPPE_MPPC)) != 0 ||
++ (options[5] & (MPPE_128BIT|MPPE_56BIT|MPPE_40BIT|MPPE_MPPC)) == 0) {
++ printk(KERN_WARNING "%s: options rejected: o[0]=%02x, o[1]=%02x, "
++ "o[2]=%02x, o[3]=%02x, o[4]=%02x, o[5]=%02x\n", fname, options[0],
++ options[1], options[2], options[3], options[4], options[5]);
++ return NULL;
++ }
++
++ state = (struct ppp_mppe_state *)kmalloc(sizeof(*state), GFP_KERNEL);
++ if (state == NULL) {
++ printk(KERN_ERR "%s: cannot allocate space for %scompressor\n", fname,
++ comp ? "" : "de");
++ return NULL;
++ }
++ memset(state, 0, sizeof(struct ppp_mppe_state));
++
++ state->mppc = options[5] & MPPE_MPPC; /* Do we use MPPC? */
++ state->mppe = options[5] & (MPPE_128BIT | MPPE_56BIT |
++ MPPE_40BIT); /* Do we use MPPE? */
++
++ if (state->mppc) {
++ /* allocate MPPC history */
++ state->hist = (u8*)vmalloc(2*MPPE_HIST_LEN*sizeof(u8));
++ if (state->hist == NULL) {
++ kfree(state);
++ printk(KERN_ERR "%s: cannot allocate space for MPPC history\n",
++ fname);
++ return NULL;
++ }
++
++ /* allocate hashtable for MPPC compressor */
++ if (comp) {
++ state->hash = (u16*)vmalloc(MPPE_HIST_LEN*sizeof(u16));
++ if (state->hash == NULL) {
++ vfree(state->hist);
++ kfree(state);
++ printk(KERN_ERR "%s: cannot allocate space for MPPC history\n",
++ fname);
++ return NULL;
++ }
++ }
++ }
++
++ if (state->mppe) { /* specific for MPPE */
++ /* Load ARC4 algorithm */
++ state->arc4_tfm = crypto_alloc_tfm("arc4", 0);
++ if (state->arc4_tfm == NULL) {
++ if (state->mppc) {
++ vfree(state->hash);
++ if (comp)
++ vfree(state->hist);
++ }
++ kfree(state);
++ printk(KERN_ERR "%s: cannot load ARC4 module\n", fname);
++ return NULL;
++ }
++
++ /* Load SHA1 algorithm */
++ state->sha1_tfm = crypto_alloc_tfm("sha1", 0);
++ if (state->sha1_tfm == NULL) {
++ crypto_free_tfm(state->arc4_tfm);
++ if (state->mppc) {
++ vfree(state->hash);
++ if (comp)
++ vfree(state->hist);
++ }
++ kfree(state);
++ printk(KERN_ERR "%s: cannot load SHA1 module\n", fname);
++ return NULL;
++ }
++
++ digestsize = crypto_tfm_alg_digestsize(state->sha1_tfm);
++ if (digestsize < MPPE_MAX_KEY_LEN) {
++ crypto_free_tfm(state->sha1_tfm);
++ crypto_free_tfm(state->arc4_tfm);
++ if (state->mppc) {
++ vfree(state->hash);
++ if (comp)
++ vfree(state->hist);
++ }
++ kfree(state);
++ printk(KERN_ERR "%s: CryptoAPI SHA1 digest size too small\n", fname);
++ }
++
++ state->sha1_digest = kmalloc(digestsize, GFP_KERNEL);
++ if (!state->sha1_digest) {
++ crypto_free_tfm(state->sha1_tfm);
++ crypto_free_tfm(state->arc4_tfm);
++ if (state->mppc) {
++ vfree(state->hash);
++ if (comp)
++ vfree(state->hist);
++ }
++ kfree(state);
++ printk(KERN_ERR "%s: cannot allocate space for SHA1 digest\n", fname);
++ }
++
++ memcpy(state->master_key, options+CILEN_MPPE, MPPE_MAX_KEY_LEN);
++ memcpy(state->session_key, state->master_key, MPPE_MAX_KEY_LEN);
++ /* initial key generation is done in mppe_init() */
++ }
++
++ return (void *) state;
++}
++
++static void *
++mppe_comp_alloc(unsigned char *options, int opt_len)
++{
++ return mppe_alloc(options, opt_len, 1);
++}
++
++static void *
++mppe_decomp_alloc(unsigned char *options, int opt_len)
++{
++ return mppe_alloc(options, opt_len, 0);
++}
++
++/* cleanup the (de)compressor */
++static void
++mppe_comp_free(void *arg)
++{
++ struct ppp_mppe_state *state = (struct ppp_mppe_state *) arg;
++
++ if (state != NULL) {
++ if (state->mppe) {
++ if (state->sha1_digest != NULL)
++ kfree(state->sha1_digest);
++ if (state->sha1_tfm != NULL)
++ crypto_free_tfm(state->sha1_tfm);
++ if (state->arc4_tfm != NULL)
++ crypto_free_tfm(state->arc4_tfm);
++ }
++ if (state->hist != NULL)
++ vfree(state->hist);
++ if (state->hash != NULL)
++ vfree(state->hash);
++ kfree(state);
++ }
++}
++
++/* init MPPC/MPPE (de)compresor */
++/* comp != 0 -> init compressor */
++/* comp = 0 -> init decompressor */
++static int
++mppe_init(void *arg, unsigned char *options, int opt_len, int unit,
++ int hdrlen, int mru, int debug, int comp)
++{
++ struct ppp_mppe_state *state = (struct ppp_mppe_state *) arg;
++ u8* fname;
++
++ fname = comp ? "mppe_comp_init" : "mppe_decomp_init";
++
++ if (opt_len < CILEN_MPPE) {
++ if (debug)
++ printk(KERN_WARNING "%s: wrong options length: %u\n",
++ fname, opt_len);
++ return 0;
++ }
++
++ if (options[0] != CI_MPPE || options[1] != CILEN_MPPE ||
++ (options[2] & ~MPPE_STATELESS) != 0 ||
++ options[3] != 0 || options[4] != 0 ||
++ (options[5] & ~(MPPE_56BIT|MPPE_128BIT|MPPE_40BIT|MPPE_MPPC)) != 0 ||
++ (options[5] & (MPPE_56BIT|MPPE_128BIT|MPPE_40BIT|MPPE_MPPC)) == 0) {
++ if (debug)
++ printk(KERN_WARNING "%s: options rejected: o[0]=%02x, o[1]=%02x, "
++ "o[2]=%02x, o[3]=%02x, o[4]=%02x, o[5]=%02x\n", fname,
++ options[0], options[1], options[2], options[3], options[4],
++ options[5]);
++ return 0;
++ }
++
++ if ((options[5] & ~MPPE_MPPC) != MPPE_128BIT &&
++ (options[5] & ~MPPE_MPPC) != MPPE_56BIT &&
++ (options[5] & ~MPPE_MPPC) != MPPE_40BIT &&
++ (options[5] & MPPE_MPPC) != MPPE_MPPC) {
++ if (debug)
++ printk(KERN_WARNING "%s: don't know what to do: o[5]=%02x\n",
++ fname, options[5]);
++ return 0;
++ }
++
++ state->mppc = options[5] & MPPE_MPPC; /* Do we use MPPC? */
++ state->mppe = options[5] & (MPPE_128BIT | MPPE_56BIT |
++ MPPE_40BIT); /* Do we use MPPE? */
++ state->stateless = options[2] & MPPE_STATELESS; /* Do we use stateless mode? */
++
++ switch (state->mppe) {
++ case MPPE_40BIT: /* 40 bit key */
++ state->keylen = 8;
++ state->bitkeylen = 40;
++ break;
++ case MPPE_56BIT: /* 56 bit key */
++ state->keylen = 8;
++ state->bitkeylen = 56;
++ break;
++ case MPPE_128BIT: /* 128 bit key */
++ state->keylen = 16;
++ state->bitkeylen = 128;
++ break;
++ default:
++ state->keylen = 0;
++ state->bitkeylen = 0;
++ }
++
++ state->ccount = MPPE_MAX_CCOUNT;
++ state->bits = 0;
++ state->unit = unit;
++ state->debug = debug;
++ state->histptr = MPPE_HIST_LEN;
++ if (state->mppc) { /* reset history if MPPC was negotiated */
++ memset(state->hist, 0, 2*MPPE_HIST_LEN*sizeof(u8));
++ }
++
++ if (state->mppe) { /* generate initial session keys */
++ mppe_change_key(state, 1);
++ }
++
++ if (comp) { /* specific for compressor */
++ state->nextflushed = 1;
++ } else { /* specific for decompressor */
++ state->mru = mru;
++ state->flushexpected = 1;
++ }
++
++ return 1;
++}
++
++static int
++mppe_comp_init(void *arg, unsigned char *options, int opt_len, int unit,
++ int hdrlen, int debug)
++{
++ return mppe_init(arg, options, opt_len, unit, hdrlen, 0, debug, 1);
++}
++
++
++static int
++mppe_decomp_init(void *arg, unsigned char *options, int opt_len, int unit,
++ int hdrlen, int mru, int debug)
++{
++ return mppe_init(arg, options, opt_len, unit, hdrlen, mru, debug, 0);
++}
++
++static void
++mppe_comp_reset(void *arg)
++{
++ struct ppp_mppe_state *state = (struct ppp_mppe_state *)arg;
++
++ if (state->debug)
++ printk(KERN_DEBUG "%s%d: resetting MPPC/MPPE compressor\n",
++ __FUNCTION__, state->unit);
++
++ state->nextflushed = 1;
++ if (state->mppe)
++ arc4_setkey(state, state->session_key, state->keylen);
++}
++
++static void
++mppe_decomp_reset(void *arg)
++{
++ /* When MPPC/MPPE is in use, we shouldn't receive any CCP Reset-Ack.
++ But when we receive such a packet, we just ignore it. */
++ return;
++}
++
++static void
++mppe_stats(void *arg, struct compstat *stats)
++{
++ struct ppp_mppe_state *state = (struct ppp_mppe_state *)arg;
++
++ *stats = state->stats;
++}
++
++/***************************/
++/**** Compression stuff ****/
++/***************************/
++/* inserts 1 to 8 bits into the output buffer */
++static inline void putbits8(u8 *buf, u32 val, const u32 n, u32 *i, u32 *l)
++{
++ buf += *i;
++ if (*l >= n) {
++ *l = (*l) - n;
++ val <<= *l;
++ *buf = *buf | (val & 0xff);
++ if (*l == 0) {
++ *l = 8;
++ (*i)++;
++ *(++buf) = 0;
++ }
++ } else {
++ (*i)++;
++ *l = 8 - n + (*l);
++ val <<= *l;
++ *buf = *buf | ((val >> 8) & 0xff);
++ *(++buf) = val & 0xff;
++ }
++}
++
++/* inserts 9 to 16 bits into the output buffer */
++static inline void putbits16(u8 *buf, u32 val, const u32 n, u32 *i, u32 *l)
++{
++ buf += *i;
++ if (*l >= n - 8) {
++ (*i)++;
++ *l = 8 - n + (*l);
++ val <<= *l;
++ *buf = *buf | ((val >> 8) & 0xff);
++ *(++buf) = val & 0xff;
++ if (*l == 0) {
++ *l = 8;
++ (*i)++;
++ *(++buf) = 0;
++ }
++ } else {
++ (*i)++; (*i)++;
++ *l = 16 - n + (*l);
++ val <<= *l;
++ *buf = *buf | ((val >> 16) & 0xff);
++ *(++buf) = (val >> 8) & 0xff;
++ *(++buf) = val & 0xff;
++ }
++}
++
++/* inserts 17 to 24 bits into the output buffer */
++static inline void putbits24(u8 *buf, u32 val, const u32 n, u32 *i, u32 *l)
++{
++ buf += *i;
++ if (*l >= n - 16) {
++ (*i)++; (*i)++;
++ *l = 16 - n + (*l);
++ val <<= *l;
++ *buf = *buf | ((val >> 16) & 0xff);
++ *(++buf) = (val >> 8) & 0xff;
++ *(++buf) = val & 0xff;
++ if (*l == 0) {
++ *l = 8;
++ (*i)++;
++ *(++buf) = 0;
++ }
++ } else {
++ (*i)++; (*i)++; (*i)++;
++ *l = 24 - n + (*l);
++ val <<= *l;
++ *buf = *buf | ((val >> 24) & 0xff);
++ *(++buf) = (val >> 16) & 0xff;
++ *(++buf) = (val >> 8) & 0xff;
++ *(++buf) = val & 0xff;
++ }
++}
++
++static int
++mppc_compress(struct ppp_mppe_state *state, unsigned char *ibuf,
++ unsigned char *obuf, int isize, int osize)
++{
++ u32 olen, off, len, idx, i, l;
++ u8 *hist, *sbuf, *p, *q, *r, *s;
++
++ /*
++ At this point, to avoid possible buffer overflow caused by packet
++ expansion during/after compression, we should make sure that
++ osize >= (((isize*9)/8)+1)+2, but we don't do that because in
++ ppp_generic.c we simply allocate bigger obuf.
++
++ Maximum MPPC packet expansion is 12.5%. This is the worst case when
++ all octets in the input buffer are >= 0x80 and we cannot find any
++ repeated tokens. Additionally we have to reserve 2 bytes for MPPE/MPPC
++ status bits and coherency counter.
++ */
++
++ hist = state->hist + MPPE_HIST_LEN;
++ /* check if there is enough room at the end of the history */
++ if (state->histptr + isize >= 2*MPPE_HIST_LEN) {
++ state->bits |= MPPE_BIT_RESET;
++ state->histptr = MPPE_HIST_LEN;
++ memcpy(state->hist, hist, MPPE_HIST_LEN);
++ }
++ /* add packet to the history; isize must be <= MPPE_HIST_LEN */
++ sbuf = state->hist + state->histptr;
++ memcpy(sbuf, ibuf, isize);
++ state->histptr += isize;
++
++ /* compress data */
++ r = sbuf + isize;
++ *obuf = olen = i = 0;
++ l = 8;
++ while (i < isize - 2) {
++ s = q = sbuf + i;
++ idx = ((40543*((((s[0]<<4)^s[1])<<4)^s[2]))>>4) & 0x1fff;
++ p = hist + state->hash[idx];
++ state->hash[idx] = (u16) (s - hist);
++ off = s - p;
++ if (off > MPPE_HIST_LEN - 1 || off < 1 || *p++ != *s++ || *p++ != *s++ ||
++ *p++ != *s++) {
++ /* no match found; encode literal byte */
++ if (ibuf[i] < 0x80) { /* literal byte < 0x80 */
++ putbits8(obuf, (u32) ibuf[i], 8, &olen, &l);
++ } else { /* literal byte >= 0x80 */
++ putbits16(obuf, (u32) (0x100|(ibuf[i]&0x7f)), 9, &olen, &l);
++ }
++ ++i;
++ continue;
++ }
++ if (r - q >= 64) {
++ *p++ != *s++ || *p++ != *s++ || *p++ != *s++ || *p++ != *s++ ||
++ *p++ != *s++ || *p++ != *s++ || *p++ != *s++ || *p++ != *s++ ||
++ *p++ != *s++ || *p++ != *s++ || *p++ != *s++ || *p++ != *s++ ||
++ *p++ != *s++ || *p++ != *s++ || *p++ != *s++ || *p++ != *s++ ||
++ *p++ != *s++ || *p++ != *s++ || *p++ != *s++ || *p++ != *s++ ||
++ *p++ != *s++ || *p++ != *s++ || *p++ != *s++ || *p++ != *s++ ||
++ *p++ != *s++ || *p++ != *s++ || *p++ != *s++ || *p++ != *s++ ||
++ *p++ != *s++ || *p++ != *s++ || *p++ != *s++ || *p++ != *s++ ||
++ *p++ != *s++ || *p++ != *s++ || *p++ != *s++ || *p++ != *s++ ||
++ *p++ != *s++ || *p++ != *s++ || *p++ != *s++ || *p++ != *s++ ||
++ *p++ != *s++ || *p++ != *s++ || *p++ != *s++ || *p++ != *s++ ||
++ *p++ != *s++ || *p++ != *s++ || *p++ != *s++ || *p++ != *s++ ||
++ *p++ != *s++ || *p++ != *s++ || *p++ != *s++ || *p++ != *s++ ||
++ *p++ != *s++ || *p++ != *s++ || *p++ != *s++ || *p++ != *s++ ||
++ *p++ != *s++ || *p++ != *s++ || *p++ != *s++ || *p++ != *s++ ||
++ *p++ != *s++;
++ if (s - q == 64) {
++ p--; s--;
++ while((*p++ == *s++) && (s < r) && (p < q));
++ }
++ } else {
++ while((*p++ == *s++) && (s < r) && (p < q));
++ }
++ len = s - q - 1;
++ i += len;
++
++ /* at least 3 character match found; code data */
++ /* encode offset */
++ if (off < 64) { /* 10-bit offset; 0 <= offset < 64 */
++ putbits16(obuf, 0x3c0|off, 10, &olen, &l);
++ } else if (off < 320) { /* 12-bit offset; 64 <= offset < 320 */
++ putbits16(obuf, 0xe00|(off-64), 12, &olen, &l);
++ } else if (off < 8192) { /* 16-bit offset; 320 <= offset < 8192 */
++ putbits16(obuf, 0xc000|(off-320), 16, &olen, &l);
++ } else {
++ /* This shouldn't happen; we return 0 what means "packet expands",
++ and we send packet uncompressed. */
++ if (state->debug)
++ printk(KERN_DEBUG "%s%d: wrong offset value: %d\n",
++ __FUNCTION__, state->unit, off);
++ return 0;
++ }
++ /* encode length of match */
++ if (len < 4) { /* length = 3 */
++ putbits8(obuf, 0, 1, &olen, &l);
++ } else if (len < 8) { /* 4 <= length < 8 */
++ putbits8(obuf, 0x08|(len&0x03), 4, &olen, &l);
++ } else if (len < 16) { /* 8 <= length < 16 */
++ putbits8(obuf, 0x30|(len&0x07), 6, &olen, &l);
++ } else if (len < 32) { /* 16 <= length < 32 */
++ putbits8(obuf, 0xe0|(len&0x0f), 8, &olen, &l);
++ } else if (len < 64) { /* 32 <= length < 64 */
++ putbits16(obuf, 0x3c0|(len&0x1f), 10, &olen, &l);
++ } else if (len < 128) { /* 64 <= length < 128 */
++ putbits16(obuf, 0xf80|(len&0x3f), 12, &olen, &l);
++ } else if (len < 256) { /* 128 <= length < 256 */
++ putbits16(obuf, 0x3f00|(len&0x7f), 14, &olen, &l);
++ } else if (len < 512) { /* 256 <= length < 512 */
++ putbits16(obuf, 0xfe00|(len&0xff), 16, &olen, &l);
++ } else if (len < 1024) { /* 512 <= length < 1024 */
++ putbits24(obuf, 0x3fc00|(len&0x1ff), 18, &olen, &l);
++ } else if (len < 2048) { /* 1024 <= length < 2048 */
++ putbits24(obuf, 0xff800|(len&0x3ff), 20, &olen, &l);
++ } else if (len < 4096) { /* 2048 <= length < 4096 */
++ putbits24(obuf, 0x3ff000|(len&0x7ff), 22, &olen, &l);
++ } else if (len < 8192) { /* 4096 <= length < 8192 */
++ putbits24(obuf, 0xffe000|(len&0xfff), 24, &olen, &l);
++ } else {
++ /* This shouldn't happen; we return 0 what means "packet expands",
++ and send packet uncompressed. */
++ if (state->debug)
++ printk(KERN_DEBUG "%s%d: wrong length of match value: %d\n",
++ __FUNCTION__, state->unit, len);
++ return 0;
++ }
++ }
++
++ /* Add remaining octets to the output */
++ while(isize - i > 0) {
++ if (ibuf[i] < 0x80) { /* literal byte < 0x80 */
++ putbits8(obuf, (u32) ibuf[i++], 8, &olen, &l);
++ } else { /* literal byte >= 0x80 */
++ putbits16(obuf, (u32) (0x100|(ibuf[i++]&0x7f)), 9, &olen, &l);
++ }
++ }
++ /* Reset unused bits of the last output octet */
++ if ((l != 0) && (l != 8)) {
++ putbits8(obuf, 0, l, &olen, &l);
++ }
++
++ return (int) olen;
++}
++
++int
++mppe_compress(void *arg, unsigned char *ibuf, unsigned char *obuf,
++ int isize, int osize)
++{
++ struct ppp_mppe_state *state = (struct ppp_mppe_state *) arg;
++ int proto, olen, complen, off;
++ unsigned char *wptr;
++
++ /* Check that the protocol is in the range we handle. */
++ proto = PPP_PROTOCOL(ibuf);
++ if (proto < 0x0021 || proto > 0x00fa)
++ return 0;
++
++ wptr = obuf;
++ /* Copy over the PPP header */
++ wptr[0] = PPP_ADDRESS(ibuf);
++ wptr[1] = PPP_CONTROL(ibuf);
++ wptr[2] = PPP_COMP >> 8;
++ wptr[3] = PPP_COMP;
++ wptr += PPP_HDRLEN + (MPPE_OVHD / 2); /* Leave two octets for MPPE/MPPC bits */
++
++ /*
++ * In ver. 0.99 protocol field was compressed. Deflate and BSD compress
++ * do PFC before actual compression, RCF2118 and RFC3078 are not precise
++ * on this topic so I decided to do PFC. Unfortunately this change caused
++ * incompatibility with older/other MPPE/MPPC modules. I have received
++ * a lot of complaints from unexperienced users so I have decided to revert
++ * to previous state, i.e. the protocol field is sent uncompressed now.
++ * Although this may be changed in the future.
++ *
++ * Receiving side (mppe_decompress()) still accepts packets with compressed
++ * and uncompressed protocol field so you shouldn't get "Unsupported protocol
++ * 0x2145 received" messages anymore.
++ */
++ //off = (proto > 0xff) ? 2 : 3; /* PFC - skip first protocol byte if 0 */
++ off = 2;
++
++ ibuf += off;
++
++ mppe_increase_ccount(state);
++
++ if (state->nextflushed) {
++ state->bits |= MPPE_BIT_FLUSHED;
++ state->nextflushed = 0;
++ if (state->mppe && !state->stateless) {
++ /*
++ * If this is the flag packet, the key has been already changed in
++ * mppe_increase_ccount() so we dont't do it once again.
++ */
++ if ((state->ccount & 0xff) != 0xff) {
++ arc4_setkey(state, state->session_key, state->keylen);
++ }
++ }
++ if (state->mppc) { /* reset history */
++ state->bits |= MPPE_BIT_RESET;
++ state->histptr = MPPE_HIST_LEN;
++ memset(state->hist + MPPE_HIST_LEN, 0, MPPE_HIST_LEN*sizeof(u8));
++ }
++ }
++
++ if (state->mppc && !state->mppe) { /* Do only compression */
++ complen = mppc_compress(state, ibuf, wptr, isize - off,
++ osize - PPP_HDRLEN - (MPPE_OVHD / 2));
++ /*
++ * TODO: Implement an heuristics to handle packet expansion in a smart
++ * way. Now, when a packet expands, we send it as uncompressed and
++ * when next packet is sent we have to reset compressor's history.
++ * Maybe it would be better to send such packet as compressed in order
++ * to keep history's continuity.
++ */
++ if ((complen > isize) || (complen > osize - PPP_HDRLEN) ||
++ (complen == 0)) {
++ /* packet expands */
++ state->nextflushed = 1;
++ memcpy(wptr, ibuf, isize - off);
++ olen = isize - (off - 2) + MPPE_OVHD;
++ (state->stats).inc_bytes += olen;
++ (state->stats).inc_packets++;
++ } else {
++ state->bits |= MPPE_BIT_COMP;
++ olen = complen + PPP_HDRLEN + (MPPE_OVHD / 2);
++ (state->stats).comp_bytes += olen;
++ (state->stats).comp_packets++;
++ }
++ } else { /* Do encryption with or without compression */
++ state->bits |= MPPE_BIT_ENCRYPTED;
++ if (!state->mppc && state->mppe) { /* Do only encryption */
++ /* read from ibuf, write to wptr, adjust for PPP_HDRLEN */
++ arc4_encrypt(state, ibuf, isize - off, wptr);
++ olen = isize - (off - 2) + MPPE_OVHD;
++ (state->stats).inc_bytes += olen;
++ (state->stats).inc_packets++;
++ } else { /* Do compression and then encryption - RFC3078 */
++ complen = mppc_compress(state, ibuf, wptr, isize - off,
++ osize - PPP_HDRLEN - (MPPE_OVHD / 2));
++ /*
++ * TODO: Implement an heuristics to handle packet expansion in a smart
++ * way. Now, when a packet expands, we send it as uncompressed and
++ * when next packet is sent we have to reset compressor's history.
++ * Maybe it would be good to send such packet as compressed in order
++ * to keep history's continuity.
++ */
++ if ((complen > isize) || (complen > osize - PPP_HDRLEN) ||
++ (complen == 0)) {
++ /* packet expands */
++ state->nextflushed = 1;
++ arc4_encrypt(state, ibuf, isize - off, wptr);
++ olen = isize - (off - 2) + MPPE_OVHD;
++ (state->stats).inc_bytes += olen;
++ (state->stats).inc_packets++;
++ } else {
++ state->bits |= MPPE_BIT_COMP;
++ /* Hack warning !!! RC4 implementation which we use does
++ encryption "in place" - it means that input and output
++ buffers can be *the same* memory area. Therefore we don't
++ need to use a temporary buffer. But be careful - other
++ implementations don't have to be so nice.
++ I used to use ibuf as temporary buffer here, but it led
++ packet sniffers into error. Thanks to Wilfried Weissmann
++ for pointing that. */
++ arc4_encrypt(state, wptr, complen, wptr);
++ olen = complen + PPP_HDRLEN + (MPPE_OVHD / 2);
++ (state->stats).comp_bytes += olen;
++ (state->stats).comp_packets++;
++ }
++ }
++ }
++
++ /* write status bits and coherency counter into the output buffer */
++ wptr = obuf + PPP_HDRLEN;
++ wptr[0] = MPPE_CTRLHI(state);
++ wptr[1] = MPPE_CTRLLO(state);
++
++ state->bits = 0;
++
++ (state->stats).unc_bytes += isize;
++ (state->stats).unc_packets++;
++
++ return olen;
++}
++
++/***************************/
++/*** Decompression stuff ***/
++/***************************/
++static inline u32 getbits(const u8 *buf, const u32 n, u32 *i, u32 *l)
++{
++ static const u32 m[] = {0x00, 0x01, 0x03, 0x07, 0x0f, 0x1f, 0x3f, 0x7f, 0xff};
++ u32 res, ol;
++
++ ol = *l;
++ if (*l >= n) {
++ *l = (*l) - n;
++ res = (buf[*i] & m[ol]) >> (*l);
++ if (*l == 0) {
++ *l = 8;
++ (*i)++;
++ }
++ } else {
++ *l = 8 - n + (*l);
++ res = (buf[(*i)++] & m[ol]) << 8;
++ res = (res | buf[*i]) >> (*l);
++ }
++
++ return res;
++}
++
++static inline u32 getbyte(const u8 *buf, const u32 i, const u32 l)
++{
++ if (l == 8) {
++ return buf[i];
++ } else {
++ return (((buf[i] << 8) | buf[i+1]) >> l) & 0xff;
++ }
++}
++
++static inline void lamecopy(u8 *dst, u8 *src, u32 len)
++{
++ while (len--)
++ *dst++ = *src++;
++}
++
++static int
++mppc_decompress(struct ppp_mppe_state *state, unsigned char *ibuf,
++ unsigned char *obuf, int isize, int osize)
++{
++ u32 olen, off, len, bits, val, sig, i, l;
++ u8 *history, *s;
++
++ history = state->hist + state->histptr;
++ olen = len = i = 0;
++ l = 8;
++ bits = isize * 8;
++ while (bits >= 8) {
++ val = getbyte(ibuf, i++, l);
++ if (val < 0x80) { /* literal byte < 0x80 */
++ if (state->histptr < 2*MPPE_HIST_LEN) {
++ /* copy uncompressed byte to the history */
++ (state->hist)[(state->histptr)++] = (u8) val;
++ } else {
++ /* buffer overflow; drop packet */
++ if (state->debug)
++ printk(KERN_ERR "%s%d: trying to write outside history "
++ "buffer\n", __FUNCTION__, state->unit);
++ return DECOMP_ERROR;
++ }
++ olen++;
++ bits -= 8;
++ continue;
++ }
++
++ sig = val & 0xc0;
++ if (sig == 0x80) { /* literal byte >= 0x80 */
++ if (state->histptr < 2*MPPE_HIST_LEN) {
++ /* copy uncompressed byte to the history */
++ (state->hist)[(state->histptr)++] =
++ (u8) (0x80|((val&0x3f)<<1)|getbits(ibuf, 1 , &i ,&l));
++ } else {
++ /* buffer overflow; drop packet */
++ if (state->debug)
++ printk(KERN_ERR "%s%d: trying to write outside history "
++ "buffer\n", __FUNCTION__, state->unit);
++ return DECOMP_ERROR;
++ }
++ olen++;
++ bits -= 9;
++ continue;
++ }
++
++ /* Not a literal byte so it must be an (offset,length) pair */
++ /* decode offset */
++ sig = val & 0xf0;
++ if (sig == 0xf0) { /* 10-bit offset; 0 <= offset < 64 */
++ off = (((val&0x0f)<<2)|getbits(ibuf, 2 , &i ,&l));
++ bits -= 10;
++ } else {
++ if (sig == 0xe0) { /* 12-bit offset; 64 <= offset < 320 */
++ off = ((((val&0x0f)<<4)|getbits(ibuf, 4 , &i ,&l))+64);
++ bits -= 12;
++ } else {
++ if ((sig&0xe0) == 0xc0) {/* 16-bit offset; 320 <= offset < 8192 */
++ off = ((((val&0x1f)<<8)|getbyte(ibuf, i++, l))+320);
++ bits -= 16;
++ if (off > MPPE_HIST_LEN - 1) {
++ if (state->debug)
++ printk(KERN_DEBUG "%s%d: too big offset value: %d\n",
++ __FUNCTION__, state->unit, off);
++ return DECOMP_ERROR;
++ }
++ } else { /* this shouldn't happen */
++ if (state->debug)
++ printk(KERN_DEBUG "%s%d: cannot decode offset value\n",
++ __FUNCTION__, state->unit);
++ return DECOMP_ERROR;
++ }
++ }
++ }
++ /* decode length of match */
++ val = getbyte(ibuf, i, l);
++ if ((val & 0x80) == 0x00) { /* len = 3 */
++ len = 3;
++ bits--;
++ getbits(ibuf, 1 , &i ,&l);
++ } else if ((val & 0xc0) == 0x80) { /* 4 <= len < 8 */
++ len = 0x04 | ((val>>4) & 0x03);
++ bits -= 4;
++ getbits(ibuf, 4 , &i ,&l);
++ } else if ((val & 0xe0) == 0xc0) { /* 8 <= len < 16 */
++ len = 0x08 | ((val>>2) & 0x07);
++ bits -= 6;
++ getbits(ibuf, 6 , &i ,&l);
++ } else if ((val & 0xf0) == 0xe0) { /* 16 <= len < 32 */
++ len = 0x10 | (val & 0x0f);
++ bits -= 8;
++ i++;
++ } else {
++ bits -= 8;
++ val = (val << 8) | getbyte(ibuf, ++i, l);
++ if ((val & 0xf800) == 0xf000) { /* 32 <= len < 64 */
++ len = 0x0020 | ((val >> 6) & 0x001f);
++ bits -= 2;
++ getbits(ibuf, 2 , &i ,&l);
++ } else if ((val & 0xfc00) == 0xf800) { /* 64 <= len < 128 */
++ len = 0x0040 | ((val >> 4) & 0x003f);
++ bits -= 4;
++ getbits(ibuf, 4 , &i ,&l);
++ } else if ((val & 0xfe00) == 0xfc00) { /* 128 <= len < 256 */
++ len = 0x0080 | ((val >> 2) & 0x007f);
++ bits -= 6;
++ getbits(ibuf, 6 , &i ,&l);
++ } else if ((val & 0xff00) == 0xfe00) { /* 256 <= len < 512 */
++ len = 0x0100 | (val & 0x00ff);
++ bits -= 8;
++ i++;
++ } else {
++ bits -= 8;
++ val = (val << 8) | getbyte(ibuf, ++i, l);
++ if ((val & 0xff8000) == 0xff0000) { /* 512 <= len < 1024 */
++ len = 0x000200 | ((val >> 6) & 0x0001ff);
++ bits -= 2;
++ getbits(ibuf, 2 , &i ,&l);
++ } else if ((val & 0xffc000) == 0xff8000) {/* 1024 <= len < 2048 */
++ len = 0x000400 | ((val >> 4) & 0x0003ff);
++ bits -= 4;
++ getbits(ibuf, 4 , &i ,&l);
++ } else if ((val & 0xffe000) == 0xffc000) {/* 2048 <= len < 4096 */
++ len = 0x000800 | ((val >> 2) & 0x0007ff);
++ bits -= 6;
++ getbits(ibuf, 6 , &i ,&l);
++ } else if ((val & 0xfff000) == 0xffe000) {/* 4096 <= len < 8192 */
++ len = 0x001000 | (val & 0x000fff);
++ bits -= 8;
++ i++;
++ } else { /* this shouldn't happen */
++ if (state->debug)
++ printk(KERN_DEBUG "%s%d: wrong length code: 0x%X\n",
++ __FUNCTION__, state->unit, val);
++ return DECOMP_ERROR;
++ }
++ }
++ }
++ s = state->hist + state->histptr;
++ state->histptr += len;
++ olen += len;
++ if (state->histptr < 2*MPPE_HIST_LEN) {
++ /* copy uncompressed bytes to the history */
++
++ /* In some cases len may be greater than off. It means that memory
++ * areas pointed by s and s-off overlap. I had used memmove() here
++ * because I thought that it acts as libc's version. Unfortunately,
++ * I was wrong. :-) I got strange errors sometimes. Wilfried suggested
++ * using of byte by byte copying here and strange errors disappeared.
++ */
++ lamecopy(s, s - off, len);
++ } else {
++ /* buffer overflow; drop packet */
++ if (state->debug)
++ printk(KERN_ERR "%s%d: trying to write outside history "
++ "buffer\n", __FUNCTION__, state->unit);
++ return DECOMP_ERROR;
++ }
++ }
++
++ /* Do PFC decompression */
++ len = olen;
++ if ((history[0] & 0x01) != 0) {
++ obuf[0] = 0;
++ obuf++;
++ len++;
++ }
++
++ if (len <= osize) {
++ /* copy uncompressed packet to the output buffer */
++ memcpy(obuf, history, olen);
++ } else {
++ /* buffer overflow; drop packet */
++ if (state->debug)
++ printk(KERN_ERR "%s%d: too big uncompressed packet: %d\n",
++ __FUNCTION__, state->unit, len + (PPP_HDRLEN / 2));
++ return DECOMP_ERROR;
++ }
++
++ return (int) len;
++}
++
++int
++mppe_decompress(void *arg, unsigned char *ibuf, int isize,
++ unsigned char *obuf, int osize)
++{
++ struct ppp_mppe_state *state = (struct ppp_mppe_state *)arg;
++ int seq, bits, uncomplen;
++
++ if (isize <= PPP_HDRLEN + MPPE_OVHD) {
++ if (state->debug) {
++ printk(KERN_DEBUG "%s%d: short packet (len=%d)\n", __FUNCTION__,
++ state->unit, isize);
++ }
++ return DECOMP_ERROR;
++ }
++
++ /* Get coherency counter and control bits from input buffer */
++ seq = MPPE_CCOUNT(ibuf);
++ bits = MPPE_BITS(ibuf);
++
++ if (state->stateless) {
++ /* RFC 3078, sec 8.1. */
++ mppe_increase_ccount(state);
++ if ((seq != state->ccount) && state->debug)
++ printk(KERN_DEBUG "%s%d: bad sequence number: %d, expected: %d\n",
++ __FUNCTION__, state->unit, seq, state->ccount);
++ while (seq != state->ccount)
++ mppe_increase_ccount(state);
++ } else {
++ /* RFC 3078, sec 8.2. */
++ if (state->flushexpected) { /* discard state */
++ if ((bits & MPPE_BIT_FLUSHED)) { /* we received expected FLUSH bit */
++ while (seq != state->ccount)
++ mppe_increase_ccount(state);
++ state->flushexpected = 0;
++ } else /* drop packet*/
++ return DECOMP_ERROR;
++ } else { /* normal state */
++ mppe_increase_ccount(state);
++ if (seq != state->ccount) {
++ /* Packet loss detected, enter the discard state. */
++ if (state->debug)
++ printk(KERN_DEBUG "%s%d: bad sequence number: %d, expected: %d\n",
++ __FUNCTION__, state->unit, seq, state->ccount);
++ state->flushexpected = 1;
++ return DECOMP_ERROR;
++ }
++ }
++ if (state->mppe && (bits & MPPE_BIT_FLUSHED)) {
++ arc4_setkey(state, state->session_key, state->keylen);
++ }
++ }
++
++ if (state->mppc && (bits & (MPPE_BIT_FLUSHED | MPPE_BIT_RESET))) {
++ state->histptr = MPPE_HIST_LEN;
++ if ((bits & MPPE_BIT_FLUSHED)) {
++ memset(state->hist + MPPE_HIST_LEN, 0, MPPE_HIST_LEN*sizeof(u8));
++ } else
++ if ((bits & MPPE_BIT_RESET)) {
++ memcpy(state->hist, state->hist + MPPE_HIST_LEN, MPPE_HIST_LEN);
++ }
++ }
++
++ /* Fill in the first part of the PPP header. The protocol field
++ comes from the decompressed data. */
++ obuf[0] = PPP_ADDRESS(ibuf);
++ obuf[1] = PPP_CONTROL(ibuf);
++ obuf += PPP_HDRLEN / 2;
++
++ if (state->mppe) { /* process encrypted packet */
++ if ((bits & MPPE_BIT_ENCRYPTED)) {
++ /* OK, packet encrypted, so decrypt it */
++ if (state->mppc && (bits & MPPE_BIT_COMP)) {
++ /* Hack warning !!! RC4 implementation which we use does
++ decryption "in place" - it means that input and output
++ buffers can be *the same* memory area. Therefore we don't
++ need to use a temporary buffer. But be careful - other
++ implementations don't have to be so nice. */
++ arc4_decrypt(state, ibuf + PPP_HDRLEN + (MPPE_OVHD / 2), isize -
++ PPP_HDRLEN - (MPPE_OVHD / 2), ibuf + PPP_HDRLEN +
++ (MPPE_OVHD / 2));
++ uncomplen = mppc_decompress(state, ibuf + PPP_HDRLEN +
++ (MPPE_OVHD / 2), obuf, isize -
++ PPP_HDRLEN - (MPPE_OVHD / 2),
++ osize - (PPP_HDRLEN / 2));
++ if (uncomplen == DECOMP_ERROR) {
++ state->flushexpected = 1;
++ return DECOMP_ERROR;
++ }
++ uncomplen += PPP_HDRLEN / 2;
++ (state->stats).comp_bytes += isize;
++ (state->stats).comp_packets++;
++ } else {
++ uncomplen = isize - MPPE_OVHD;
++ /* Decrypt the first byte in order to check if it is
++ compressed or uncompressed protocol field */
++ arc4_decrypt(state, ibuf + PPP_HDRLEN + (MPPE_OVHD / 2), 1, obuf);
++ /* Do PFC decompression */
++ if ((obuf[0] & 0x01) != 0) {
++ obuf[1] = obuf[0];
++ obuf[0] = 0;
++ obuf++;
++ uncomplen++;
++ }
++ /* And finally, decrypt the rest of the frame. */
++ arc4_decrypt(state, ibuf + PPP_HDRLEN + (MPPE_OVHD / 2) + 1,
++ isize - PPP_HDRLEN - (MPPE_OVHD / 2) - 1, obuf + 1);
++ (state->stats).inc_bytes += isize;
++ (state->stats).inc_packets++;
++ }
++ } else { /* this shouldn't happen */
++ if (state->debug)
++ printk(KERN_ERR "%s%d: encryption negotiated but not an "
++ "encrypted packet received\n", __FUNCTION__, state->unit);
++ mppe_change_key(state, 0);
++ state->flushexpected = 1;
++ return DECOMP_ERROR;
++ }
++ } else {
++ if (state->mppc) { /* no MPPE, only MPPC */
++ if ((bits & MPPE_BIT_COMP)) {
++ uncomplen = mppc_decompress(state, ibuf + PPP_HDRLEN +
++ (MPPE_OVHD / 2), obuf, isize -
++ PPP_HDRLEN - (MPPE_OVHD / 2),
++ osize - (PPP_HDRLEN / 2));
++ if (uncomplen == DECOMP_ERROR) {
++ state->flushexpected = 1;
++ return DECOMP_ERROR;
++ }
++ uncomplen += PPP_HDRLEN / 2;
++ (state->stats).comp_bytes += isize;
++ (state->stats).comp_packets++;
++ } else {
++ memcpy(obuf, ibuf + PPP_HDRLEN + (MPPE_OVHD / 2), isize -
++ PPP_HDRLEN - (MPPE_OVHD / 2));
++ uncomplen = isize - MPPE_OVHD;
++ (state->stats).inc_bytes += isize;
++ (state->stats).inc_packets++;
++ }
++ } else { /* this shouldn't happen */
++ if (state->debug)
++ printk(KERN_ERR "%s%d: error - not an MPPC or MPPE frame "
++ "received\n", __FUNCTION__, state->unit);
++ state->flushexpected = 1;
++ return DECOMP_ERROR;
++ }
++ }
++
++ (state->stats).unc_bytes += uncomplen;
++ (state->stats).unc_packets++;
++
++ return uncomplen;
++}
++
++
++/************************************************************
++ * Module interface table
++ ************************************************************/
++
++/* These are in ppp_generic.c */
++extern int ppp_register_compressor (struct compressor *cp);
++extern void ppp_unregister_compressor (struct compressor *cp);
++
++/*
++ * Functions exported to ppp_generic.c.
++ *
++ * In case of MPPC/MPPE there is no need to process incompressible data
++ * because such a data is sent in MPPC/MPPE frame. Therefore the (*incomp)
++ * callback function isn't needed.
++ */
++struct compressor ppp_mppe = {
++ .compress_proto = CI_MPPE,
++ .comp_alloc = mppe_comp_alloc,
++ .comp_free = mppe_comp_free,
++ .comp_init = mppe_comp_init,
++ .comp_reset = mppe_comp_reset,
++ .compress = mppe_compress,
++ .comp_stat = mppe_stats,
++ .decomp_alloc = mppe_decomp_alloc,
++ .decomp_free = mppe_comp_free,
++ .decomp_init = mppe_decomp_init,
++ .decomp_reset = mppe_decomp_reset,
++ .decompress = mppe_decompress,
++ .incomp = NULL,
++ .decomp_stat = mppe_stats,
++ .owner = THIS_MODULE
++};
++
++/************************************************************
++ * Module support routines
++ ************************************************************/
++
++int __init mppe_module_init(void)
++{
++ int answer;
++
++ if (!(crypto_alg_available("arc4", 0) && crypto_alg_available("sha1", 0))) {
++ printk(KERN_ERR "Kernel doesn't provide ARC4 and/or SHA1 algorithms "
++ "required by MPPE/MPPC. Check CryptoAPI configuration.\n");
++ return -ENODEV;
++ }
++
++ /* Allocate space for SHAPad1, SHAPad2 and ... */
++ sha_pad = kmalloc(sizeof(struct sha_pad), GFP_KERNEL);
++ if (sha_pad == NULL)
++ return -ENOMEM;
++ /* ... initialize them */
++ memset(sha_pad->sha_pad1, 0x00, sizeof(sha_pad->sha_pad1));
++ memset(sha_pad->sha_pad2, 0xf2, sizeof(sha_pad->sha_pad2));
++
++ answer = ppp_register_compressor(&ppp_mppe);
++ if (answer == 0) {
++ printk(KERN_INFO "MPPE/MPPC encryption/compression module registered\n");
++ }
++ return answer;
++}
++
++void __exit mppe_module_cleanup(void)
++{
++ kfree(sha_pad);
++ ppp_unregister_compressor(&ppp_mppe);
++ printk(KERN_INFO "MPPE/MPPC encryption/compression module unregistered\n");
++}
++
++module_init(mppe_module_init);
++module_exit(mppe_module_cleanup);
++
++MODULE_AUTHOR("Jan Dubiec <jdx@slackware.pl>");
++MODULE_DESCRIPTION("MPPE/MPPC encryption/compression module for Linux");
++MODULE_VERSION("1.2");
++MODULE_LICENSE("Dual BSD/GPL");
++MODULE_ALIAS("ppp-compress-" __stringify(CI_MPPE));
+diff -ruN linux-2.6.12.orig/include/linux/ppp-comp.h linux-2.6.12/include/linux/ppp-comp.h
+--- linux-2.6.12.orig/include/linux/ppp-comp.h 2004-12-24 22:33:47.000000000 +0100
++++ linux-2.6.12/include/linux/ppp-comp.h 2005-06-28 20:07:01.000000000 +0200
+@@ -28,7 +28,7 @@
+ */
+
+ /*
+- * ==FILEVERSION 980319==
++ * ==FILEVERSION 20040509==
+ *
+ * NOTE TO MAINTAINERS:
+ * If you modify this file at all, please set the above date.
+@@ -80,7 +80,7 @@
+
+ /* Compress a packet */
+ int (*compress) (void *state, unsigned char *rptr,
+- unsigned char *obuf, int isize, int osize);
++ unsigned char *obuf, int isize, int osize);
+
+ /* Return compression statistics */
+ void (*comp_stat) (void *state, struct compstat *stats);
+@@ -101,7 +101,7 @@
+
+ /* Decompress a packet. */
+ int (*decompress) (void *state, unsigned char *ibuf, int isize,
+- unsigned char *obuf, int osize);
++ unsigned char *obuf, int osize);
+
+ /* Update state for an incompressible packet received */
+ void (*incomp) (void *state, unsigned char *ibuf, int icnt);
+@@ -191,6 +191,42 @@
+ #define DEFLATE_CHK_SEQUENCE 0
+
+ /*
++ * Definitions for MPPE/MPPC.
++ */
++
++#define CI_MPPE 18 /* config option for MPPE */
++#define CILEN_MPPE 6 /* length of config option */
++
++#define MPPE_OVHD 4 /* MPPE overhead */
++#define MPPE_MAX_KEY_LEN 16 /* largest key length (128-bit) */
++
++#define MPPE_STATELESS 0x01 /* configuration bit H */
++#define MPPE_40BIT 0x20 /* configuration bit L */
++#define MPPE_56BIT 0x80 /* configuration bit M */
++#define MPPE_128BIT 0x40 /* configuration bit S */
++#define MPPE_MPPC 0x01 /* configuration bit C */
++
++/*
++ * Definitions for Stac LZS.
++ */
++
++#define CI_LZS 17 /* config option for Stac LZS */
++#define CILEN_LZS 5 /* length of config option */
++
++#define LZS_OVHD 4 /* max. LZS overhead */
++#define LZS_HIST_LEN 2048 /* LZS history size */
++#define LZS_MAX_CCOUNT 0x0FFF /* max. coherency counter value */
++
++#define LZS_MODE_NONE 0
++#define LZS_MODE_LCB 1
++#define LZS_MODE_CRC 2
++#define LZS_MODE_SEQ 3
++#define LZS_MODE_EXT 4
++
++#define LZS_EXT_BIT_FLUSHED 0x80 /* bit A */
++#define LZS_EXT_BIT_COMP 0x20 /* bit C */
++
++/*
+ * Definitions for other, as yet unsupported, compression methods.
+ */
+
--- /dev/null
+diff-tree 3e9e7c1d0b7a36fb8affb973a054c5098e27baa8 (from 90eb2665841d7b444602736e2141a01c948f75b1)\r
+Author: Matt Porter <mporter@kernel.crashing.org>\r
+Date: Mon Nov 7 00:58:15 2005 -0800\r
+\r
+ [PATCH] ppc32: cleanup AMCC PPC40x eval boards to support U-Boot\r
+ \r
+ Cleanup PPC40x eval boards (bubinga, walnut and sycamore) to support U-Boot\r
+ as bootloader. The OpenBIOS bd_info struct is not used in the kernel\r
+ anymore (only U-Boot now).\r
+ \r
+ uImage (U-Boot) tested on walnut, sycamore and bubinga\r
+ zImage (OpenBIOS) tested on sycamore, bubinga and ebony\r
+ \r
+ Signed-off-by: Stefan Roese <sr@denx.de>\r
+ Signed-off-by: Matt Porter <mporter@kernel.crashing.org>\r
+ Signed-off-by: Andrew Morton <akpm@osdl.org>\r
+ Signed-off-by: Linus Torvalds <torvalds@osdl.org>\r
+\r
+diff --git a/arch/ppc/boot/simple/Makefile b/arch/ppc/boot/simple/Makefile\r
+index ff0904e..82df88b 100644\r
+--- a/arch/ppc/boot/simple/Makefile\r
++++ b/arch/ppc/boot/simple/Makefile\r
+@@ -67,6 +67,12 @@ zimageinitrd-$(CONFIG_BAMBOO) := zImage\r
+ entrypoint-$(CONFIG_BAMBOO) := 0x01000000\r
+ extra.o-$(CONFIG_BAMBOO) := pibs.o\r
+ \r
++ zimage-$(CONFIG_BUBINGA) := zImage-TREE\r
++zimageinitrd-$(CONFIG_BUBINGA) := zImage.initrd-TREE\r
++ end-$(CONFIG_BUBINGA) := bubinga\r
++ entrypoint-$(CONFIG_BUBINGA) := 0x01000000\r
++ extra.o-$(CONFIG_BUBINGA) := openbios.o\r
++\r
+ zimage-$(CONFIG_EBONY) := zImage-TREE\r
+ zimageinitrd-$(CONFIG_EBONY) := zImage.initrd-TREE\r
+ end-$(CONFIG_EBONY) := ebony\r
+@@ -91,6 +97,18 @@ zimageinitrd-$(CONFIG_OCOTEA) := zImage\r
+ entrypoint-$(CONFIG_OCOTEA) := 0x01000000\r
+ extra.o-$(CONFIG_OCOTEA) := pibs.o\r
+ \r
++ zimage-$(CONFIG_SYCAMORE) := zImage-TREE\r
++zimageinitrd-$(CONFIG_SYCAMORE) := zImage.initrd-TREE\r
++ end-$(CONFIG_SYCAMORE) := sycamore\r
++ entrypoint-$(CONFIG_SYCAMORE) := 0x01000000\r
++ extra.o-$(CONFIG_SYCAMORE) := openbios.o\r
++\r
++ zimage-$(CONFIG_WALNUT) := zImage-TREE\r
++zimageinitrd-$(CONFIG_WALNUT) := zImage.initrd-TREE\r
++ end-$(CONFIG_WALNUT) := walnut\r
++ entrypoint-$(CONFIG_WALNUT) := 0x01000000\r
++ extra.o-$(CONFIG_WALNUT) := openbios.o\r
++\r
+ extra.o-$(CONFIG_EV64260) := misc-ev64260.o\r
+ end-$(CONFIG_EV64260) := ev64260\r
+ cacheflag-$(CONFIG_EV64260) := -include $(clear_L2_L3)\r
+@@ -168,7 +186,8 @@ OBJCOPY_ARGS := -O elf32-powerpc\r
+ \r
+ # head.o and relocate.o must be at the start.\r
+ boot-y := head.o relocate.o $(extra.o-y) $(misc-y)\r
+-boot-$(CONFIG_40x) += embed_config.o\r
++boot-$(CONFIG_REDWOOD_5) += embed_config.o\r
++boot-$(CONFIG_REDWOOD_6) += embed_config.o\r
+ boot-$(CONFIG_8xx) += embed_config.o\r
+ boot-$(CONFIG_8260) += embed_config.o\r
+ boot-$(CONFIG_BSEIP) += iic.o\r
+diff --git a/arch/ppc/boot/simple/misc.c b/arch/ppc/boot/simple/misc.c\r
+index e02de5b..f415d6c 100644\r
+--- a/arch/ppc/boot/simple/misc.c\r
++++ b/arch/ppc/boot/simple/misc.c\r
+@@ -23,7 +23,7 @@\r
+ #include <asm/page.h>\r
+ #include <asm/mmu.h>\r
+ #include <asm/bootinfo.h>\r
+-#ifdef CONFIG_44x\r
++#ifdef CONFIG_4xx\r
+ #include <asm/ibm4xx.h>\r
+ #endif\r
+ #include <asm/reg.h>\r
+@@ -88,6 +88,14 @@ get_mem_size(void)\r
+ return 0;\r
+ }\r
+ \r
++#if defined(CONFIG_40x)\r
++#define PPC4xx_EMAC0_MR0 EMAC0_BASE\r
++#endif\r
++\r
++#if defined(CONFIG_44x) && defined(PPC44x_EMAC0_MR0)\r
++#define PPC4xx_EMAC0_MR0 PPC44x_EMAC0_MR0\r
++#endif\r
++\r
+ struct bi_record *\r
+ decompress_kernel(unsigned long load_addr, int num_words, unsigned long cksum)\r
+ {\r
+@@ -103,13 +111,13 @@ decompress_kernel(unsigned long load_add\r
+ com_port = serial_init(0, NULL);\r
+ #endif\r
+ \r
+-#if defined(CONFIG_44x) && defined(PPC44x_EMAC0_MR0)\r
++#if defined(PPC4xx_EMAC0_MR0)\r
+ /* Reset MAL */\r
+ mtdcr(DCRN_MALCR(DCRN_MAL_BASE), MALCR_MMSR);\r
+ /* Wait for reset */\r
+ while (mfdcr(DCRN_MALCR(DCRN_MAL_BASE)) & MALCR_MMSR) {};\r
+ /* Reset EMAC */\r
+- *(volatile unsigned long *)PPC44x_EMAC0_MR0 = 0x20000000;\r
++ *(volatile unsigned long *)PPC4xx_EMAC0_MR0 = 0x20000000;\r
+ __asm__ __volatile__("eieio");\r
+ #endif\r
+ \r
+@@ -164,7 +172,9 @@ decompress_kernel(unsigned long load_add\r
+ puts(" "); puthex((unsigned long)(&__ramdisk_end));puts("\n");\r
+ }\r
+ \r
++#ifndef CONFIG_40x /* don't overwrite the 40x image located at 0x00400000! */\r
+ avail_ram = (char *)0x00400000;\r
++#endif\r
+ end_avail = (char *)0x00800000;\r
+ puts("avail ram: "); puthex((unsigned long)avail_ram); puts(" ");\r
+ puthex((unsigned long)end_avail); puts("\n");\r
+diff --git a/arch/ppc/boot/simple/openbios.c b/arch/ppc/boot/simple/openbios.c\r
+index c732b6d..81f11d8 100644\r
+--- a/arch/ppc/boot/simple/openbios.c\r
++++ b/arch/ppc/boot/simple/openbios.c\r
+@@ -1,19 +1,43 @@\r
+ /*\r
+ * arch/ppc/boot/simple/openbios.c\r
+ *\r
+- * 2005 (c) SYSGO AG - g.jaeger@sysgo.com\r
++ * Copyright (c) 2005 DENX Software Engineering\r
++ * Stefan Roese <sr@denx.de>\r
++ *\r
++ * Based on original work by\r
++ * 2005 (c) SYSGO AG - g.jaeger@sysgo.com\r
++ *\r
+ * This file is licensed under the terms of the GNU General Public\r
+ * License version 2. This program is licensed "as is" without\r
+ * any warranty of any kind, whether express or implied.\r
+ *\r
+- * Derived from arch/ppc/boot/simple/pibs.c (from MontaVista)\r
+ */\r
+ \r
+ #include <linux/types.h>\r
+ #include <linux/config.h>\r
+ #include <linux/string.h>\r
+ #include <asm/ppcboot.h>\r
+-#include <platforms/4xx/ebony.h>\r
++#include <asm/ibm4xx.h>\r
++#include <asm/reg.h>\r
++#ifdef CONFIG_40x\r
++#include <asm/io.h>\r
++#endif\r
++\r
++#if defined(CONFIG_BUBINGA)\r
++#define BOARD_INFO_VECTOR 0xFFF80B50 /* openbios 1.19 moved this vector down - armin */\r
++#else\r
++#define BOARD_INFO_VECTOR 0xFFFE0B50\r
++#endif\r
++\r
++#ifdef CONFIG_40x\r
++/* Supply a default Ethernet address for those eval boards that don't\r
++ * ship with one. This is an address from the MBX board I have, so\r
++ * it is unlikely you will find it on your network.\r
++ */\r
++static ushort def_enet_addr[] = { 0x0800, 0x3e26, 0x1559 };\r
++\r
++extern unsigned long timebase_period_ns;\r
++#endif /* CONFIG_40x */\r
+ \r
+ extern unsigned long decompress_kernel(unsigned long load_addr, int num_words,\r
+ unsigned long cksum);\r
+@@ -23,15 +47,85 @@ extern unsigned long decompress_kernel(u\r
+ bd_t hold_resid_buf __attribute__ ((__section__ (".data.boot")));\r
+ bd_t *hold_residual = &hold_resid_buf;\r
+ \r
++typedef struct openbios_board_info {\r
++ unsigned char bi_s_version[4]; /* Version of this structure */\r
++ unsigned char bi_r_version[30]; /* Version of the IBM ROM */\r
++ unsigned int bi_memsize; /* DRAM installed, in bytes */\r
++#ifdef CONFIG_405EP\r
++ unsigned char bi_enetaddr[2][6]; /* Local Ethernet MAC address */\r
++#else /* CONFIG_405EP */\r
++ unsigned char bi_enetaddr[6]; /* Local Ethernet MAC address */\r
++#endif /* CONFIG_405EP */\r
++ unsigned char bi_pci_enetaddr[6]; /* PCI Ethernet MAC address */\r
++ unsigned int bi_intfreq; /* Processor speed, in Hz */\r
++ unsigned int bi_busfreq; /* PLB Bus speed, in Hz */\r
++ unsigned int bi_pci_busfreq; /* PCI Bus speed, in Hz */\r
++#ifdef CONFIG_405EP\r
++ unsigned int bi_opb_busfreq; /* OPB Bus speed, in Hz */\r
++ unsigned int bi_pllouta_freq; /* PLL OUTA speed, in Hz */\r
++#endif /* CONFIG_405EP */\r
++} openbios_bd_t;\r
++\r
+ void *\r
+ load_kernel(unsigned long load_addr, int num_words, unsigned long cksum,\r
+ void *ign1, void *ign2)\r
+ {\r
+- decompress_kernel(load_addr, num_words, cksum);\r
++#ifdef CONFIG_40x\r
++ openbios_bd_t *openbios_bd = NULL;\r
++ openbios_bd_t *(*get_board_info)(void) =\r
++ (openbios_bd_t *(*)(void))(*(unsigned long *)BOARD_INFO_VECTOR);\r
++\r
++ /*\r
++ * On 40x platforms we not only need the MAC-addresses, but also the\r
++ * clocks and memsize. Now try to get all values using the OpenBIOS\r
++ * "get_board_info()" callback.\r
++ */\r
++ if ((openbios_bd = get_board_info()) != NULL) {\r
++ /*\r
++ * Copy bd_info from OpenBIOS struct into U-Boot struct\r
++ * used by kernel\r
++ */\r
++ hold_residual->bi_memsize = openbios_bd->bi_memsize;\r
++ hold_residual->bi_intfreq = openbios_bd->bi_intfreq;\r
++ hold_residual->bi_busfreq = openbios_bd->bi_busfreq;\r
++ hold_residual->bi_pci_busfreq = openbios_bd->bi_pci_busfreq;\r
++ memcpy(hold_residual->bi_pci_enetaddr, openbios_bd->bi_pci_enetaddr, 6);\r
++#ifdef CONFIG_405EP\r
++ memcpy(hold_residual->bi_enetaddr, openbios_bd->bi_enetaddr[0], 6);\r
++ memcpy(hold_residual->bi_enet1addr, openbios_bd->bi_enetaddr[1], 6);\r
++ hold_residual->bi_opbfreq = openbios_bd->bi_opb_busfreq;\r
++ hold_residual->bi_procfreq = openbios_bd->bi_pllouta_freq;\r
++#else /* CONFIG_405EP */\r
++ memcpy(hold_residual->bi_enetaddr, openbios_bd->bi_enetaddr, 6);\r
++#endif /* CONFIG_405EP */\r
++ } else {\r
++ /* Hmmm...better try to stuff some defaults.\r
++ */\r
++ hold_residual->bi_memsize = 16 * 1024 * 1024;\r
++ hold_residual->bi_intfreq = 200000000;\r
++ hold_residual->bi_busfreq = 100000000;\r
++ hold_residual->bi_pci_busfreq = 66666666;\r
++\r
++ /*\r
++ * Only supply one mac-address in this fallback\r
++ */\r
++ memcpy(hold_residual->bi_enetaddr, (void *)def_enet_addr, 6);\r
++#ifdef CONFIG_405EP\r
++ hold_residual->bi_opbfreq = 50000000;\r
++ hold_residual->bi_procfreq = 200000000;\r
++#endif /* CONFIG_405EP */\r
++ }\r
++\r
++ timebase_period_ns = 1000000000 / hold_residual->bi_intfreq;\r
++#endif /* CONFIG_40x */\r
+ \r
++#ifdef CONFIG_440GP\r
+ /* simply copy the MAC addresses */\r
+- memcpy(hold_residual->bi_enetaddr, (char *)EBONY_OPENBIOS_MAC_BASE, 6);\r
+- memcpy(hold_residual->bi_enet1addr, (char *)(EBONY_OPENBIOS_MAC_BASE+EBONY_OPENBIOS_MAC_OFFSET), 6);\r
++ memcpy(hold_residual->bi_enetaddr, (char *)OPENBIOS_MAC_BASE, 6);\r
++ memcpy(hold_residual->bi_enet1addr, (char *)(OPENBIOS_MAC_BASE+OPENBIOS_MAC_OFFSET), 6);\r
++#endif /* CONFIG_440GP */\r
++\r
++ decompress_kernel(load_addr, num_words, cksum);\r
+ \r
+ return (void *)hold_residual;\r
+ }\r
+diff --git a/arch/ppc/platforms/4xx/Kconfig b/arch/ppc/platforms/4xx/Kconfig\r
+index e70e4c6..d883791 100644\r
+--- a/arch/ppc/platforms/4xx/Kconfig\r
++++ b/arch/ppc/platforms/4xx/Kconfig\r
+@@ -225,7 +225,7 @@ config EMBEDDEDBOOT\r
+ \r
+ config IBM_OPENBIOS\r
+ bool\r
+- depends on ASH || BUBINGA || REDWOOD_5 || REDWOOD_6 || SYCAMORE || WALNUT\r
++ depends on ASH || REDWOOD_5 || REDWOOD_6\r
+ default y\r
+ \r
+ config PPC4xx_DMA\r
+diff --git a/arch/ppc/platforms/4xx/bubinga.c b/arch/ppc/platforms/4xx/bubinga.c\r
+index 3678abf..8110f55 100644\r
+--- a/arch/ppc/platforms/4xx/bubinga.c\r
++++ b/arch/ppc/platforms/4xx/bubinga.c\r
+@@ -89,7 +89,7 @@ bubinga_early_serial_map(void)\r
+ * by 16.\r
+ */\r
+ uart_div = (mfdcr(DCRN_CPC0_UCR_BASE) & DCRN_CPC0_UCR_U0DIV);\r
+- uart_clock = __res.bi_pllouta_freq / uart_div;\r
++ uart_clock = __res.bi_procfreq / uart_div;\r
+ \r
+ /* Setup serial port access */\r
+ memset(&port, 0, sizeof(port));\r
+diff --git a/arch/ppc/platforms/4xx/bubinga.h b/arch/ppc/platforms/4xx/bubinga.h\r
+index b1df856..b5380cf 100644\r
+--- a/arch/ppc/platforms/4xx/bubinga.h\r
++++ b/arch/ppc/platforms/4xx/bubinga.h\r
+@@ -1,52 +1,34 @@\r
+ /*\r
+- * Support for IBM PPC 405EP evaluation board (Bubinga).\r
++ * arch/ppc/platforms/4xx/bubinga.h\r
+ *\r
+- * Author: SAW (IBM), derived from walnut.h.\r
+- * Maintained by MontaVista Software <source@mvista.com>\r
++ * Bubinga board definitions\r
++ *\r
++ * Copyright (c) 2005 DENX Software Engineering\r
++ * Stefan Roese <sr@denx.de>\r
++ *\r
++ * Based on original work by\r
++ * SAW (IBM)\r
++ * 2003 (c) MontaVista Softare Inc.\r
++ *\r
++ * This program is free software; you can redistribute it and/or modify it\r
++ * under the terms of the GNU General Public License as published by the\r
++ * Free Software Foundation; either version 2 of the License, or (at your\r
++ * option) any later version.\r
+ *\r
+- * 2003 (c) MontaVista Softare Inc. This file is licensed under the\r
+- * terms of the GNU General Public License version 2. This program is\r
+- * licensed "as is" without any warranty of any kind, whether express\r
+- * or implied.\r
+ */\r
+ \r
+ #ifdef __KERNEL__\r
+ #ifndef __BUBINGA_H__\r
+ #define __BUBINGA_H__\r
+ \r
+-/* 405EP */\r
++#include <linux/config.h>\r
+ #include <platforms/4xx/ibm405ep.h>\r
+-\r
+-#ifndef __ASSEMBLY__\r
+-/*\r
+- * Data structure defining board information maintained by the boot\r
+- * ROM on IBM's evaluation board. An effort has been made to\r
+- * keep the field names consistent with the 8xx 'bd_t' board info\r
+- * structures.\r
+- */\r
+-\r
+-typedef struct board_info {\r
+- unsigned char bi_s_version[4]; /* Version of this structure */\r
+- unsigned char bi_r_version[30]; /* Version of the IBM ROM */\r
+- unsigned int bi_memsize; /* DRAM installed, in bytes */\r
+- unsigned char bi_enetaddr[2][6]; /* Local Ethernet MAC address */ unsigned char bi_pci_enetaddr[6]; /* PCI Ethernet MAC address */\r
+- unsigned int bi_intfreq; /* Processor speed, in Hz */\r
+- unsigned int bi_busfreq; /* PLB Bus speed, in Hz */\r
+- unsigned int bi_pci_busfreq; /* PCI Bus speed, in Hz */\r
+- unsigned int bi_opb_busfreq; /* OPB Bus speed, in Hz */\r
+- unsigned int bi_pllouta_freq; /* PLL OUTA speed, in Hz */\r
+-} bd_t;\r
+-\r
+-/* Some 4xx parts use a different timebase frequency from the internal clock.\r
+-*/\r
+-#define bi_tbfreq bi_intfreq\r
+-\r
++#include <asm/ppcboot.h>\r
+ \r
+ /* Memory map for the Bubinga board.\r
+ * Generic 4xx plus RTC.\r
+ */\r
+ \r
+-extern void *bubinga_rtc_base;\r
+ #define BUBINGA_RTC_PADDR ((uint)0xf0000000)\r
+ #define BUBINGA_RTC_VADDR BUBINGA_RTC_PADDR\r
+ #define BUBINGA_RTC_SIZE ((uint)8*1024)\r
+@@ -58,12 +40,18 @@ extern void *bubinga_rtc_base;\r
+ * for typical configurations at various CPU speeds.\r
+ * The base baud is calculated as (FWDA / EXT UART DIV / 16)\r
+ */\r
+-#define BASE_BAUD 0\r
++#define BASE_BAUD 0\r
+ \r
+-#define BUBINGA_FPGA_BASE 0xF0300000\r
++/* Flash */\r
++#define PPC40x_FPGA_BASE 0xF0300000\r
++#define PPC40x_FPGA_REG_OFFS 1 /* offset to flash map reg */\r
++#define PPC40x_FLASH_ONBD_N(x) (x & 0x02)\r
++#define PPC40x_FLASH_SRAM_SEL(x) (x & 0x01)\r
++#define PPC40x_FLASH_LOW 0xFFF00000\r
++#define PPC40x_FLASH_HIGH 0xFFF80000\r
++#define PPC40x_FLASH_SIZE 0x80000\r
+ \r
+-#define PPC4xx_MACHINE_NAME "IBM Bubinga"\r
++#define PPC4xx_MACHINE_NAME "IBM Bubinga"\r
+ \r
+-#endif /* !__ASSEMBLY__ */\r
+ #endif /* __BUBINGA_H__ */\r
+ #endif /* __KERNEL__ */\r
+diff --git a/arch/ppc/platforms/4xx/ebony.h b/arch/ppc/platforms/4xx/ebony.h\r
+index d08faa4..b91ad42 100644\r
+--- a/arch/ppc/platforms/4xx/ebony.h\r
++++ b/arch/ppc/platforms/4xx/ebony.h\r
+@@ -24,8 +24,8 @@\r
+ #define PPC44x_EMAC0_MR0 0xE0000800\r
+ \r
+ /* Where to find the MAC info */\r
+-#define EBONY_OPENBIOS_MAC_BASE 0xfffffe0c\r
+-#define EBONY_OPENBIOS_MAC_OFFSET 0x0c\r
++#define OPENBIOS_MAC_BASE 0xfffffe0c\r
++#define OPENBIOS_MAC_OFFSET 0x0c\r
+ \r
+ /* Default clock rates for Rev. B and Rev. C silicon */\r
+ #define EBONY_440GP_RB_SYSCLK 33000000\r
+diff --git a/arch/ppc/platforms/4xx/sycamore.c b/arch/ppc/platforms/4xx/sycamore.c\r
+index d8019ee..281b4a2 100644\r
+--- a/arch/ppc/platforms/4xx/sycamore.c\r
++++ b/arch/ppc/platforms/4xx/sycamore.c\r
+@@ -88,9 +88,6 @@ ppc405_map_irq(struct pci_dev *dev, unsi\r
+ void __init\r
+ sycamore_setup_arch(void)\r
+ {\r
+-#define SYCAMORE_PS2_BASE 0xF0100000\r
+-#define SYCAMORE_FPGA_BASE 0xF0300000\r
+-\r
+ void *fpga_brdc;\r
+ unsigned char fpga_brdc_data;\r
+ void *fpga_enable;\r
+@@ -100,7 +97,7 @@ sycamore_setup_arch(void)\r
+ \r
+ ppc4xx_setup_arch();\r
+ \r
+- ibm_ocp_set_emac(0, 1);\r
++ ibm_ocp_set_emac(0, 0);\r
+ \r
+ kb_data = ioremap(SYCAMORE_PS2_BASE, 8);\r
+ if (!kb_data) {\r
+@@ -111,7 +108,7 @@ sycamore_setup_arch(void)\r
+ \r
+ kb_cs = kb_data + 1;\r
+ \r
+- fpga_status = ioremap(SYCAMORE_FPGA_BASE, 8);\r
++ fpga_status = ioremap(PPC40x_FPGA_BASE, 8);\r
+ if (!fpga_status) {\r
+ printk(KERN_CRIT\r
+ "sycamore_setup_arch() fpga_status ioremap failed\n");\r
+diff --git a/arch/ppc/platforms/4xx/sycamore.h b/arch/ppc/platforms/4xx/sycamore.h\r
+index 3e7b4e2..1cd6c82 100644\r
+--- a/arch/ppc/platforms/4xx/sycamore.h\r
++++ b/arch/ppc/platforms/4xx/sycamore.h\r
+@@ -1,67 +1,52 @@\r
+ /*\r
+ * arch/ppc/platforms/4xx/sycamore.h\r
+ *\r
+- * Macros, definitions, and data structures specific to the IBM PowerPC\r
+- * 405GPr "Sycamore" evaluation board.\r
++ * Sycamore board definitions\r
+ *\r
+- * Author: Armin Kuster <akuster@mvista.com>\r
++ * Copyright (c) 2005 DENX Software Engineering\r
++ * Stefan Roese <sr@denx.de>\r
++ *\r
++ * Based on original work by\r
++ * Armin Kuster <akuster@mvista.com>\r
++ * 2000 (c) MontaVista, Software, Inc.\r
++ *\r
++ * This program is free software; you can redistribute it and/or modify it\r
++ * under the terms of the GNU General Public License as published by the\r
++ * Free Software Foundation; either version 2 of the License, or (at your\r
++ * option) any later version.\r
+ *\r
+- * 2000 (c) MontaVista, Software, Inc. This file is licensed under\r
+- * the terms of the GNU General Public License version 2. This program\r
+- * is licensed "as is" without any warranty of any kind, whether express\r
+- * or implied.\r
+ */\r
+ \r
+ #ifdef __KERNEL__\r
+ #ifndef __ASM_SYCAMORE_H__\r
+ #define __ASM_SYCAMORE_H__\r
+ \r
++#include <linux/config.h>\r
+ #include <platforms/4xx/ibm405gpr.h>\r
++#include <asm/ppcboot.h>\r
+ \r
+-#ifndef __ASSEMBLY__\r
+-/*\r
+- * Data structure defining board information maintained by the boot\r
+- * ROM on IBM's "Sycamore" evaluation board. An effort has been made to\r
+- * keep the field names consistent with the 8xx 'bd_t' board info\r
+- * structures.\r
+- */\r
+-\r
+-typedef struct board_info {\r
+- unsigned char bi_s_version[4]; /* Version of this structure */\r
+- unsigned char bi_r_version[30]; /* Version of the IBM ROM */\r
+- unsigned int bi_memsize; /* DRAM installed, in bytes */\r
+- unsigned char bi_enetaddr[6]; /* Local Ethernet MAC address */\r
+- unsigned char bi_pci_enetaddr[6]; /* PCI Ethernet MAC address */\r
+- unsigned int bi_intfreq; /* Processor speed, in Hz */\r
+- unsigned int bi_busfreq; /* PLB Bus speed, in Hz */\r
+- unsigned int bi_pci_busfreq; /* PCI Bus speed, in Hz */\r
+-} bd_t;\r
+-\r
+-/* Some 4xx parts use a different timebase frequency from the internal clock.\r
+-*/\r
+-#define bi_tbfreq bi_intfreq\r
+-\r
+-\r
+-/* Memory map for the IBM "Sycamore" 405GP evaluation board.\r
++/* Memory map for the IBM "Sycamore" 405GPr evaluation board.\r
+ * Generic 4xx plus RTC.\r
+ */\r
+ \r
+-extern void *sycamore_rtc_base;\r
+ #define SYCAMORE_RTC_PADDR ((uint)0xf0000000)\r
+ #define SYCAMORE_RTC_VADDR SYCAMORE_RTC_PADDR\r
+-#define SYCAMORE_RTC_SIZE ((uint)8*1024)\r
++#define SYCAMORE_RTC_SIZE ((uint)8*1024)\r
+ \r
+-#ifdef CONFIG_PPC405GP_INTERNAL_CLOCK\r
+-#define BASE_BAUD 201600\r
+-#else\r
+ #define BASE_BAUD 691200\r
+-#endif\r
+ \r
+-#define SYCAMORE_PS2_BASE 0xF0100000\r
+-#define SYCAMORE_FPGA_BASE 0xF0300000\r
++#define SYCAMORE_PS2_BASE 0xF0100000\r
++\r
++/* Flash */\r
++#define PPC40x_FPGA_BASE 0xF0300000\r
++#define PPC40x_FPGA_REG_OFFS 5 /* offset to flash map reg */\r
++#define PPC40x_FLASH_ONBD_N(x) (x & 0x02)\r
++#define PPC40x_FLASH_SRAM_SEL(x) (x & 0x01)\r
++#define PPC40x_FLASH_LOW 0xFFF00000\r
++#define PPC40x_FLASH_HIGH 0xFFF80000\r
++#define PPC40x_FLASH_SIZE 0x80000\r
+ \r
+ #define PPC4xx_MACHINE_NAME "IBM Sycamore"\r
+ \r
+-#endif /* !__ASSEMBLY__ */\r
+ #endif /* __ASM_SYCAMORE_H__ */\r
+ #endif /* __KERNEL__ */\r
+diff --git a/arch/ppc/platforms/4xx/walnut.c b/arch/ppc/platforms/4xx/walnut.c\r
+index a33eda4..74cb331 100644\r
+--- a/arch/ppc/platforms/4xx/walnut.c\r
++++ b/arch/ppc/platforms/4xx/walnut.c\r
+@@ -90,7 +90,7 @@ walnut_setup_arch(void)\r
+ \r
+ kb_cs = kb_data + 1;\r
+ \r
+- fpga_status = ioremap(WALNUT_FPGA_BASE, 8);\r
++ fpga_status = ioremap(PPC40x_FPGA_BASE, 8);\r
+ if (!fpga_status) {\r
+ printk(KERN_CRIT\r
+ "walnut_setup_arch() fpga_status ioremap failed\n");\r
+diff --git a/arch/ppc/platforms/4xx/walnut.h b/arch/ppc/platforms/4xx/walnut.h\r
+index 04cfbf3..dcf2691 100644\r
+--- a/arch/ppc/platforms/4xx/walnut.h\r
++++ b/arch/ppc/platforms/4xx/walnut.h\r
+@@ -1,72 +1,55 @@\r
+ /*\r
+ * arch/ppc/platforms/4xx/walnut.h\r
+ *\r
+- * Macros, definitions, and data structures specific to the IBM PowerPC\r
+- * 405GP "Walnut" evaluation board.\r
++ * Walnut board definitions\r
+ *\r
+- * Authors: Grant Erickson <grant@lcse.umn.edu>, Frank Rowand\r
+- * <frank_rowand@mvista.com>, Debbie Chu <debbie_chu@mvista.com> or\r
+- * source@mvista.com\r
++ * Copyright (c) 2005 DENX Software Engineering\r
++ * Stefan Roese <sr@denx.de>\r
+ *\r
+- * Copyright (c) 1999 Grant Erickson <grant@lcse.umn.edu>\r
++ * Based on original work by\r
++ * Copyright (c) 1999 Grant Erickson <grant@lcse.umn.edu>\r
++ * Frank Rowand <frank_rowand@mvista.com>\r
++ * Debbie Chu <debbie_chu@mvista.com>\r
++ * 2000 (c) MontaVista, Software, Inc.\r
++ *\r
++ * This program is free software; you can redistribute it and/or modify it\r
++ * under the terms of the GNU General Public License as published by the\r
++ * Free Software Foundation; either version 2 of the License, or (at your\r
++ * option) any later version.\r
+ *\r
+- * 2000 (c) MontaVista, Software, Inc. This file is licensed under\r
+- * the terms of the GNU General Public License version 2. This program\r
+- * is licensed "as is" without any warranty of any kind, whether express\r
+- * or implied.\r
+ */\r
+ \r
+ #ifdef __KERNEL__\r
+ #ifndef __ASM_WALNUT_H__\r
+ #define __ASM_WALNUT_H__\r
+ \r
+-/* We have a 405GP core */\r
++#include <linux/config.h>\r
+ #include <platforms/4xx/ibm405gp.h>\r
+-\r
+-#ifndef __ASSEMBLY__\r
+-/*\r
+- * Data structure defining board information maintained by the boot\r
+- * ROM on IBM's "Walnut" evaluation board. An effort has been made to\r
+- * keep the field names consistent with the 8xx 'bd_t' board info\r
+- * structures.\r
+- */\r
+-\r
+-typedef struct board_info {\r
+- unsigned char bi_s_version[4]; /* Version of this structure */\r
+- unsigned char bi_r_version[30]; /* Version of the IBM ROM */\r
+- unsigned int bi_memsize; /* DRAM installed, in bytes */\r
+- unsigned char bi_enetaddr[6]; /* Local Ethernet MAC address */\r
+- unsigned char bi_pci_enetaddr[6]; /* PCI Ethernet MAC address */\r
+- unsigned int bi_intfreq; /* Processor speed, in Hz */\r
+- unsigned int bi_busfreq; /* PLB Bus speed, in Hz */\r
+- unsigned int bi_pci_busfreq; /* PCI Bus speed, in Hz */\r
+-} bd_t;\r
+-\r
+-/* Some 4xx parts use a different timebase frequency from the internal clock.\r
+-*/\r
+-#define bi_tbfreq bi_intfreq\r
+-\r
++#include <asm/ppcboot.h>\r
+ \r
+ /* Memory map for the IBM "Walnut" 405GP evaluation board.\r
+ * Generic 4xx plus RTC.\r
+ */\r
+ \r
+-extern void *walnut_rtc_base;\r
+ #define WALNUT_RTC_PADDR ((uint)0xf0000000)\r
+ #define WALNUT_RTC_VADDR WALNUT_RTC_PADDR\r
+ #define WALNUT_RTC_SIZE ((uint)8*1024)\r
+ \r
+-#ifdef CONFIG_PPC405GP_INTERNAL_CLOCK\r
+-#define BASE_BAUD 201600\r
+-#else\r
+ #define BASE_BAUD 691200\r
+-#endif\r
+ \r
+ #define WALNUT_PS2_BASE 0xF0100000\r
+-#define WALNUT_FPGA_BASE 0xF0300000\r
++\r
++/* Flash */\r
++#define PPC40x_FPGA_BASE 0xF0300000\r
++#define PPC40x_FPGA_REG_OFFS 5 /* offset to flash map reg */\r
++#define PPC40x_FLASH_ONBD_N(x) (x & 0x02)\r
++#define PPC40x_FLASH_SRAM_SEL(x) (x & 0x01)\r
++#define PPC40x_FLASH_LOW 0xFFF00000\r
++#define PPC40x_FLASH_HIGH 0xFFF80000\r
++#define PPC40x_FLASH_SIZE 0x80000\r
++#define WALNUT_FPGA_BASE PPC40x_FPGA_BASE\r
+ \r
+ #define PPC4xx_MACHINE_NAME "IBM Walnut"\r
+ \r
+-#endif /* !__ASSEMBLY__ */\r
+ #endif /* __ASM_WALNUT_H__ */\r
+ #endif /* __KERNEL__ */\r
+diff --git a/include/asm-ppc/ibm_ocp.h b/include/asm-ppc/ibm_ocp.h\r
+index 6f10a25..9c21de1 100644\r
+--- a/include/asm-ppc/ibm_ocp.h\r
++++ b/include/asm-ppc/ibm_ocp.h\r
+@@ -131,9 +131,22 @@ static inline void ibm_ocp_set_emac(int \r
+ /* Copy MAC addresses to EMAC additions */\r
+ for (i=start; i<=end; i++) {\r
+ def = ocp_get_one_device(OCP_VENDOR_IBM, OCP_FUNC_EMAC, i);\r
+- memcpy(((struct ocp_func_emac_data *)def->additions)->mac_addr,\r
+- &__res.bi_enetaddr[i],\r
+- 6);\r
++ if (i == 0)\r
++ memcpy(((struct ocp_func_emac_data *)def->additions)->mac_addr,\r
++ __res.bi_enetaddr, 6);\r
++#if defined(CONFIG_405EP) || defined(CONFIG_44x)\r
++ else if (i == 1)\r
++ memcpy(((struct ocp_func_emac_data *)def->additions)->mac_addr,\r
++ __res.bi_enet1addr, 6);\r
++#endif\r
++#if defined(CONFIG_440GX)\r
++ else if (i == 2)\r
++ memcpy(((struct ocp_func_emac_data *)def->additions)->mac_addr,\r
++ __res.bi_enet2addr, 6);\r
++ else if (i == 3)\r
++ memcpy(((struct ocp_func_emac_data *)def->additions)->mac_addr,\r
++ __res.bi_enet3addr, 6);\r
++#endif\r
+ }\r
+ }\r
+ #endif\r
+diff --git a/include/asm-ppc/ppcboot.h b/include/asm-ppc/ppcboot.h\r
+index fe24e45..6b7b63f 100644\r
+--- a/include/asm-ppc/ppcboot.h\r
++++ b/include/asm-ppc/ppcboot.h\r
+@@ -73,8 +73,8 @@ typedef struct bd_info {\r
+ #if defined(CONFIG_HYMOD)\r
+ hymod_conf_t bi_hymod_conf; /* hymod configuration information */\r
+ #endif\r
+-#if defined(CONFIG_EVB64260) || defined(CONFIG_44x) || defined(CONFIG_85xx) ||\\r
+- defined(CONFIG_83xx)\r
++#if defined(CONFIG_EVB64260) || defined(CONFIG_405EP) || defined(CONFIG_44x) || \\r
++ defined(CONFIG_85xx) || defined(CONFIG_83xx)\r
+ /* second onboard ethernet port */\r
+ unsigned char bi_enet1addr[6];\r
+ #endif\r
+@@ -96,5 +96,7 @@ typedef struct bd_info {\r
+ #endif\r
+ } bd_t;\r
+ \r
++#define bi_tbfreq bi_intfreq\r
++\r
+ #endif /* __ASSEMBLY__ */\r
+ #endif /* __ASM_PPCBOOT_H__ */\r
--- /dev/null
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.12
+# Sat May 13 19:38:16 2006
+#
+CONFIG_MMU=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_RWSEM_XCHGADD_ALGORITHM=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_HAVE_DEC_LOCK=y
+CONFIG_PPC=y
+CONFIG_PPC32=y
+CONFIG_GENERIC_NVRAM=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_CLEAN_COMPILE=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_POSIX_MQUEUE=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+CONFIG_SYSCTL=y
+# CONFIG_AUDIT is not set
+CONFIG_HOTPLUG=y
+CONFIG_KOBJECT_UEVENT=y
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_EMBEDDED=y
+CONFIG_KALLSYMS=y
+CONFIG_KALLSYMS_EXTRA_PASS=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+# CONFIG_EPOLL is not set
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SHMEM=y
+CONFIG_CC_ALIGN_FUNCTIONS=0
+CONFIG_CC_ALIGN_LABELS=0
+CONFIG_CC_ALIGN_LOOPS=0
+CONFIG_CC_ALIGN_JUMPS=0
+# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=0
+
+#
+# Loadable module support
+#
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+CONFIG_OBSOLETE_MODPARM=y
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_KMOD=y
+
+#
+# Processor
+#
+# CONFIG_6xx is not set
+CONFIG_40x=y
+# CONFIG_44x is not set
+# CONFIG_POWER3 is not set
+# CONFIG_POWER4 is not set
+# CONFIG_8xx is not set
+# CONFIG_E500 is not set
+CONFIG_MATH_EMULATION=y
+# CONFIG_CPU_FREQ is not set
+CONFIG_4xx=y
+
+#
+# IBM 4xx options
+#
+# CONFIG_ASH is not set
+# CONFIG_BUBINGA is not set
+# CONFIG_CPCI405 is not set
+# CONFIG_EP405 is not set
+# CONFIG_OAK is not set
+# CONFIG_REDWOOD_5 is not set
+# CONFIG_REDWOOD_6 is not set
+# CONFIG_SYCAMORE is not set
+CONFIG_WALNUT=y
+# CONFIG_XILINX_ML300 is not set
+CONFIG_IBM405_ERR77=y
+CONFIG_IBM405_ERR51=y
+CONFIG_IBM_OCP=y
+CONFIG_BIOS_FIXUP=y
+CONFIG_405GP=y
+# CONFIG_PPC4xx_DMA is not set
+CONFIG_PPC_GEN550=y
+# CONFIG_PM is not set
+CONFIG_UART0_TTYS0=y
+# CONFIG_UART0_TTYS1 is not set
+CONFIG_NOT_COHERENT_CACHE=y
+
+#
+# Platform options
+#
+# CONFIG_PC_KEYBOARD is not set
+# CONFIG_SMP is not set
+# CONFIG_PREEMPT is not set
+# CONFIG_HIGHMEM is not set
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+CONFIG_CMDLINE_BOOL=y
+CONFIG_CMDLINE="ip=on"
+CONFIG_ISA_DMA_API=y
+
+#
+# Bus options
+#
+CONFIG_PCI=y
+CONFIG_PCI_DOMAINS=y
+CONFIG_PCI_LEGACY_PROC=y
+# CONFIG_PCI_NAMES is not set
+
+#
+# PCCARD (PCMCIA/CardBus) support
+#
+CONFIG_PCCARD=y
+# CONFIG_PCMCIA_DEBUG is not set
+CONFIG_PCMCIA=y
+CONFIG_CARDBUS=y
+
+#
+# PC-card bridges
+#
+CONFIG_YENTA=m
+CONFIG_PD6729=m
+CONFIG_I82092=m
+CONFIG_TCIC=m
+CONFIG_PCCARD_NONSTATIC=m
+
+#
+# Advanced setup
+#
+# CONFIG_ADVANCED_OPTIONS is not set
+
+#
+# Default settings for advanced configuration options are used
+#
+CONFIG_HIGHMEM_START=0xfe000000
+CONFIG_LOWMEM_SIZE=0x30000000
+CONFIG_KERNEL_START=0xc0000000
+CONFIG_TASK_SIZE=0x80000000
+CONFIG_CONSISTENT_START=0xff100000
+CONFIG_CONSISTENT_SIZE=0x00200000
+CONFIG_BOOT_LOAD=0x00400000
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+# CONFIG_STANDALONE is not set
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=m
+
+#
+# Memory Technology Devices (MTD)
+#
+CONFIG_MTD=m
+# CONFIG_MTD_DEBUG is not set
+CONFIG_MTD_CONCAT=m
+CONFIG_MTD_PARTITIONS=y
+CONFIG_MTD_REDBOOT_PARTS=m
+CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1
+# CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED is not set
+# CONFIG_MTD_REDBOOT_PARTS_READONLY is not set
+# CONFIG_MTD_CMDLINE_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=m
+CONFIG_MTD_BLOCK=m
+CONFIG_MTD_BLOCK_RO=m
+CONFIG_FTL=m
+CONFIG_NFTL=m
+# CONFIG_NFTL_RW is not set
+CONFIG_INFTL=m
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=m
+CONFIG_MTD_JEDECPROBE=m
+CONFIG_MTD_GEN_PROBE=m
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+CONFIG_MTD_CFI_INTELEXT=m
+CONFIG_MTD_CFI_AMDSTD=m
+CONFIG_MTD_CFI_AMDSTD_RETRY=0
+CONFIG_MTD_CFI_STAA=m
+CONFIG_MTD_CFI_UTIL=m
+CONFIG_MTD_RAM=m
+CONFIG_MTD_ROM=m
+CONFIG_MTD_ABSENT=m
+# CONFIG_MTD_XIP is not set
+
+#
+# Mapping drivers for chip access
+#
+CONFIG_MTD_COMPLEX_MAPPINGS=y
+CONFIG_MTD_PHYSMAP=m
+CONFIG_MTD_PHYSMAP_START=0x8000000
+CONFIG_MTD_PHYSMAP_LEN=0x4000000
+CONFIG_MTD_PHYSMAP_BANKWIDTH=2
+CONFIG_MTD_WALNUT=m
+CONFIG_MTD_PCI=m
+
+#
+# Self-contained MTD device drivers
+#
+CONFIG_MTD_PMC551=m
+CONFIG_MTD_PMC551_BUGFIX=y
+# CONFIG_MTD_PMC551_DEBUG is not set
+CONFIG_MTD_SLRAM=m
+CONFIG_MTD_PHRAM=m
+# CONFIG_MTD_MTDRAM is not set
+CONFIG_MTD_BLKMTD=m
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+CONFIG_MTD_DOC2000=m
+CONFIG_MTD_DOC2001=m
+CONFIG_MTD_DOC2001PLUS=m
+CONFIG_MTD_DOCPROBE=m
+CONFIG_MTD_DOCECC=m
+# CONFIG_MTD_DOCPROBE_ADVANCED is not set
+CONFIG_MTD_DOCPROBE_ADDRESS=0
+
+#
+# NAND Flash Device Drivers
+#
+CONFIG_MTD_NAND=m
+# CONFIG_MTD_NAND_VERIFY_WRITE is not set
+CONFIG_MTD_NAND_IDS=m
+CONFIG_MTD_NAND_DISKONCHIP=m
+# CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADVANCED is not set
+CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADDRESS=0
+# CONFIG_MTD_NAND_DISKONCHIP_BBTWRITE is not set
+# CONFIG_MTD_NAND_NANDSIM is not set
+
+#
+# Parallel port support
+#
+CONFIG_PARPORT=m
+CONFIG_PARPORT_PC=m
+# CONFIG_PARPORT_SERIAL is not set
+# CONFIG_PARPORT_PC_FIFO is not set
+# CONFIG_PARPORT_PC_SUPERIO is not set
+# CONFIG_PARPORT_PC_PCMCIA is not set
+# CONFIG_PARPORT_GSC is not set
+# CONFIG_PARPORT_1284 is not set
+
+#
+# Plug and Play support
+#
+
+#
+# Block devices
+#
+CONFIG_BLK_DEV_FD=m
+CONFIG_PARIDE=m
+CONFIG_PARIDE_PARPORT=m
+
+#
+# Parallel IDE high-level drivers
+#
+CONFIG_PARIDE_PD=m
+CONFIG_PARIDE_PCD=m
+CONFIG_PARIDE_PF=m
+CONFIG_PARIDE_PT=m
+CONFIG_PARIDE_PG=m
+
+#
+# Parallel IDE protocol modules
+#
+CONFIG_PARIDE_ATEN=m
+CONFIG_PARIDE_BPCK=m
+CONFIG_PARIDE_BPCK6=m
+CONFIG_PARIDE_COMM=m
+CONFIG_PARIDE_DSTR=m
+CONFIG_PARIDE_FIT2=m
+CONFIG_PARIDE_FIT3=m
+CONFIG_PARIDE_EPAT=m
+# CONFIG_PARIDE_EPATC8 is not set
+CONFIG_PARIDE_EPIA=m
+CONFIG_PARIDE_FRIQ=m
+CONFIG_PARIDE_FRPW=m
+CONFIG_PARIDE_KBIC=m
+CONFIG_PARIDE_KTTI=m
+CONFIG_PARIDE_ON20=m
+CONFIG_PARIDE_ON26=m
+CONFIG_BLK_CPQ_DA=m
+CONFIG_BLK_CPQ_CISS_DA=m
+# CONFIG_CISS_SCSI_TAPE is not set
+CONFIG_BLK_DEV_DAC960=m
+CONFIG_BLK_DEV_UMEM=m
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_BLK_DEV_CRYPTOLOOP=m
+CONFIG_BLK_DEV_NBD=m
+CONFIG_BLK_DEV_SX8=m
+CONFIG_BLK_DEV_UB=m
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=4096
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+# CONFIG_LBD is not set
+CONFIG_CDROM_PKTCDVD=m
+CONFIG_CDROM_PKTCDVD_BUFFERS=8
+# CONFIG_CDROM_PKTCDVD_WCACHE is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+CONFIG_ATA_OVER_ETH=m
+
+#
+# ATA/ATAPI/MFM/RLL support
+#
+CONFIG_IDE=y
+CONFIG_BLK_DEV_IDE=y
+
+#
+# Please see Documentation/ide.txt for help/info on IDE drives
+#
+# CONFIG_BLK_DEV_IDE_SATA is not set
+CONFIG_BLK_DEV_IDEDISK=y
+# CONFIG_IDEDISK_MULTI_MODE is not set
+CONFIG_BLK_DEV_IDECS=m
+CONFIG_BLK_DEV_IDECD=y
+CONFIG_BLK_DEV_IDETAPE=m
+CONFIG_BLK_DEV_IDEFLOPPY=m
+CONFIG_BLK_DEV_IDESCSI=m
+# CONFIG_IDE_TASK_IOCTL is not set
+
+#
+# IDE chipset support/bugfixes
+#
+CONFIG_IDE_GENERIC=y
+CONFIG_BLK_DEV_IDEPCI=y
+# CONFIG_IDEPCI_SHARE_IRQ is not set
+CONFIG_BLK_DEV_OFFBOARD=y
+CONFIG_BLK_DEV_GENERIC=y
+CONFIG_BLK_DEV_OPTI621=m
+CONFIG_BLK_DEV_SL82C105=m
+CONFIG_BLK_DEV_IDEDMA_PCI=y
+# CONFIG_BLK_DEV_IDEDMA_FORCED is not set
+CONFIG_IDEDMA_PCI_AUTO=y
+# CONFIG_IDEDMA_ONLYDISK is not set
+CONFIG_BLK_DEV_AEC62XX=m
+CONFIG_BLK_DEV_ALI15X3=m
+# CONFIG_WDC_ALI15X3 is not set
+CONFIG_BLK_DEV_AMD74XX=m
+CONFIG_BLK_DEV_CMD64X=m
+CONFIG_BLK_DEV_TRIFLEX=m
+CONFIG_BLK_DEV_CY82C693=m
+CONFIG_BLK_DEV_CS5520=m
+CONFIG_BLK_DEV_CS5530=m
+CONFIG_BLK_DEV_HPT34X=m
+# CONFIG_HPT34X_AUTODMA is not set
+CONFIG_BLK_DEV_HPT366=m
+CONFIG_BLK_DEV_SC1200=m
+CONFIG_BLK_DEV_PIIX=m
+CONFIG_BLK_DEV_NS87415=m
+CONFIG_BLK_DEV_PDC202XX_OLD=y
+# CONFIG_PDC202XX_BURST is not set
+CONFIG_BLK_DEV_PDC202XX_NEW=m
+# CONFIG_PDC202XX_FORCE is not set
+CONFIG_BLK_DEV_SVWKS=m
+CONFIG_BLK_DEV_SIIMAGE=m
+CONFIG_BLK_DEV_SLC90E66=m
+CONFIG_BLK_DEV_TRM290=m
+CONFIG_BLK_DEV_VIA82CXXX=m
+# CONFIG_IDE_ARM is not set
+CONFIG_BLK_DEV_IDEDMA=y
+# CONFIG_IDEDMA_IVB is not set
+CONFIG_IDEDMA_AUTO=y
+# CONFIG_BLK_DEV_HD is not set
+
+#
+# SCSI device support
+#
+CONFIG_SCSI=y
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+CONFIG_BLK_DEV_SR=y
+# CONFIG_BLK_DEV_SR_VENDOR is not set
+CONFIG_CHR_DEV_SG=y
+
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+CONFIG_SCSI_MULTI_LUN=y
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+
+#
+# SCSI Transport Attributes
+#
+CONFIG_SCSI_SPI_ATTRS=m
+CONFIG_SCSI_FC_ATTRS=m
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+
+#
+# SCSI low-level drivers
+#
+CONFIG_BLK_DEV_3W_XXXX_RAID=m
+CONFIG_SCSI_3W_9XXX=m
+CONFIG_SCSI_ACARD=m
+CONFIG_SCSI_AACRAID=m
+CONFIG_SCSI_AIC7XXX=m
+CONFIG_AIC7XXX_CMDS_PER_DEVICE=32
+CONFIG_AIC7XXX_RESET_DELAY_MS=15000
+CONFIG_AIC7XXX_DEBUG_ENABLE=y
+CONFIG_AIC7XXX_DEBUG_MASK=0
+CONFIG_AIC7XXX_REG_PRETTY_PRINT=y
+CONFIG_SCSI_AIC7XXX_OLD=m
+CONFIG_SCSI_AIC79XX=m
+CONFIG_AIC79XX_CMDS_PER_DEVICE=32
+CONFIG_AIC79XX_RESET_DELAY_MS=15000
+# CONFIG_AIC79XX_ENABLE_RD_STRM is not set
+CONFIG_AIC79XX_DEBUG_ENABLE=y
+CONFIG_AIC79XX_DEBUG_MASK=0
+CONFIG_AIC79XX_REG_PRETTY_PRINT=y
+CONFIG_SCSI_DPT_I2O=m
+# CONFIG_MEGARAID_NEWGEN is not set
+CONFIG_MEGARAID_LEGACY=m
+# CONFIG_SCSI_SATA is not set
+CONFIG_SCSI_BUSLOGIC=m
+# CONFIG_SCSI_OMIT_FLASHPOINT is not set
+CONFIG_SCSI_DMX3191D=m
+CONFIG_SCSI_EATA=m
+# CONFIG_SCSI_EATA_TAGGED_QUEUE is not set
+# CONFIG_SCSI_EATA_LINKED_COMMANDS is not set
+CONFIG_SCSI_EATA_MAX_TAGS=16
+# CONFIG_SCSI_FUTURE_DOMAIN is not set
+CONFIG_SCSI_GDTH=m
+CONFIG_SCSI_IPS=m
+CONFIG_SCSI_INITIO=m
+CONFIG_SCSI_INIA100=m
+CONFIG_SCSI_PPA=m
+CONFIG_SCSI_IMM=m
+# CONFIG_SCSI_IZIP_EPP16 is not set
+# CONFIG_SCSI_IZIP_SLOW_CTR is not set
+CONFIG_SCSI_SYM53C8XX_2=m
+CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE=1
+CONFIG_SCSI_SYM53C8XX_DEFAULT_TAGS=16
+CONFIG_SCSI_SYM53C8XX_MAX_TAGS=64
+# CONFIG_SCSI_SYM53C8XX_IOMAPPED is not set
+CONFIG_SCSI_IPR=m
+# CONFIG_SCSI_IPR_TRACE is not set
+# CONFIG_SCSI_IPR_DUMP is not set
+CONFIG_SCSI_QLOGIC_FC=m
+# CONFIG_SCSI_QLOGIC_FC_FIRMWARE is not set
+CONFIG_SCSI_QLOGIC_1280=m
+# CONFIG_SCSI_QLOGIC_1280_1040 is not set
+CONFIG_SCSI_QLA2XXX=y
+CONFIG_SCSI_QLA21XX=m
+CONFIG_SCSI_QLA22XX=m
+CONFIG_SCSI_QLA2300=m
+CONFIG_SCSI_QLA2322=m
+CONFIG_SCSI_QLA6312=m
+CONFIG_SCSI_LPFC=m
+CONFIG_SCSI_DC395x=m
+CONFIG_SCSI_DC390T=m
+CONFIG_SCSI_NSP32=m
+CONFIG_SCSI_DEBUG=m
+
+#
+# PCMCIA SCSI adapter support
+#
+CONFIG_PCMCIA_AHA152X=m
+CONFIG_PCMCIA_FDOMAIN=m
+CONFIG_PCMCIA_NINJA_SCSI=m
+CONFIG_PCMCIA_QLOGIC=m
+CONFIG_PCMCIA_SYM53C500=m
+
+#
+# Multi-device support (RAID and LVM)
+#
+CONFIG_MD=y
+CONFIG_BLK_DEV_MD=m
+CONFIG_MD_LINEAR=m
+CONFIG_MD_RAID0=m
+CONFIG_MD_RAID1=m
+CONFIG_MD_RAID10=m
+CONFIG_MD_RAID5=m
+CONFIG_MD_RAID6=m
+CONFIG_MD_MULTIPATH=m
+CONFIG_MD_FAULTY=m
+CONFIG_BLK_DEV_DM=m
+CONFIG_DM_CRYPT=m
+CONFIG_DM_SNAPSHOT=m
+CONFIG_DM_MIRROR=m
+CONFIG_DM_ZERO=m
+CONFIG_DM_MULTIPATH=m
+CONFIG_DM_MULTIPATH_EMC=m
+
+#
+# Fusion MPT device support
+#
+CONFIG_FUSION=m
+CONFIG_FUSION_MAX_SGE=40
+CONFIG_FUSION_CTL=m
+
+#
+# IEEE 1394 (FireWire) support
+#
+CONFIG_IEEE1394=m
+
+#
+# Subsystem Options
+#
+# CONFIG_IEEE1394_VERBOSEDEBUG is not set
+# CONFIG_IEEE1394_OUI_DB is not set
+CONFIG_IEEE1394_EXTRA_CONFIG_ROMS=y
+CONFIG_IEEE1394_CONFIG_ROM_IP1394=y
+
+#
+# Device Drivers
+#
+CONFIG_IEEE1394_PCILYNX=m
+CONFIG_IEEE1394_OHCI1394=m
+
+#
+# Protocol Drivers
+#
+CONFIG_IEEE1394_VIDEO1394=m
+CONFIG_IEEE1394_SBP2=m
+CONFIG_IEEE1394_SBP2_PHYS_DMA=y
+CONFIG_IEEE1394_ETH1394=m
+CONFIG_IEEE1394_DV1394=m
+CONFIG_IEEE1394_RAWIO=m
+CONFIG_IEEE1394_CMP=m
+CONFIG_IEEE1394_AMDTP=m
+
+#
+# I2O device support
+#
+# CONFIG_I2O is not set
+
+#
+# Macintosh device drivers
+#
+
+#
+# Networking support
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_UNIX=y
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_ADVANCED_ROUTER=y
+CONFIG_IP_MULTIPLE_TABLES=y
+# CONFIG_IP_ROUTE_FWMARK is not set
+CONFIG_IP_ROUTE_MULTIPATH=y
+# CONFIG_IP_ROUTE_MULTIPATH_CACHED is not set
+CONFIG_IP_ROUTE_VERBOSE=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+CONFIG_IP_PNP_RARP=y
+CONFIG_NET_IPIP=m
+CONFIG_NET_IPGRE=m
+CONFIG_NET_IPGRE_BROADCAST=y
+CONFIG_IP_MROUTE=y
+# CONFIG_IP_PIMSM_V1 is not set
+# CONFIG_IP_PIMSM_V2 is not set
+# CONFIG_ARPD is not set
+CONFIG_SYN_COOKIES=y
+CONFIG_INET_AH=m
+CONFIG_INET_ESP=m
+CONFIG_INET_IPCOMP=m
+CONFIG_INET_TUNNEL=m
+CONFIG_IP_TCPDIAG=y
+# CONFIG_IP_TCPDIAG_IPV6 is not set
+
+#
+# IP: Virtual Server Configuration
+#
+# CONFIG_IP_VS is not set
+CONFIG_IPV6=m
+# CONFIG_IPV6_PRIVACY is not set
+CONFIG_INET6_AH=m
+CONFIG_INET6_ESP=m
+CONFIG_INET6_IPCOMP=m
+CONFIG_INET6_TUNNEL=m
+CONFIG_IPV6_TUNNEL=m
+CONFIG_NETFILTER=y
+# CONFIG_NETFILTER_DEBUG is not set
+CONFIG_BRIDGE_NETFILTER=y
+
+#
+# IP: Netfilter Configuration
+#
+CONFIG_IP_NF_CONNTRACK=m
+CONFIG_IP_NF_CT_ACCT=y
+CONFIG_IP_NF_CONNTRACK_MARK=y
+CONFIG_IP_NF_CT_PROTO_SCTP=m
+CONFIG_IP_NF_FTP=m
+CONFIG_IP_NF_IRC=m
+CONFIG_IP_NF_TFTP=m
+CONFIG_IP_NF_AMANDA=m
+CONFIG_IP_NF_QUEUE=m
+CONFIG_IP_NF_IPTABLES=m
+CONFIG_IP_NF_MATCH_LIMIT=m
+CONFIG_IP_NF_MATCH_IPRANGE=m
+CONFIG_IP_NF_MATCH_MAC=m
+CONFIG_IP_NF_MATCH_PKTTYPE=m
+CONFIG_IP_NF_MATCH_MARK=m
+CONFIG_IP_NF_MATCH_MULTIPORT=m
+CONFIG_IP_NF_MATCH_TOS=m
+CONFIG_IP_NF_MATCH_RECENT=m
+CONFIG_IP_NF_MATCH_ECN=m
+CONFIG_IP_NF_MATCH_DSCP=m
+CONFIG_IP_NF_MATCH_AH_ESP=m
+CONFIG_IP_NF_MATCH_LENGTH=m
+CONFIG_IP_NF_MATCH_TTL=m
+CONFIG_IP_NF_MATCH_TCPMSS=m
+CONFIG_IP_NF_MATCH_HELPER=m
+CONFIG_IP_NF_MATCH_STATE=m
+CONFIG_IP_NF_MATCH_CONNTRACK=m
+CONFIG_IP_NF_MATCH_OWNER=m
+CONFIG_IP_NF_MATCH_PHYSDEV=m
+CONFIG_IP_NF_MATCH_ADDRTYPE=m
+CONFIG_IP_NF_MATCH_REALM=m
+CONFIG_IP_NF_MATCH_SCTP=m
+CONFIG_IP_NF_MATCH_COMMENT=m
+CONFIG_IP_NF_MATCH_CONNMARK=m
+CONFIG_IP_NF_MATCH_HASHLIMIT=m
+CONFIG_IP_NF_FILTER=m
+CONFIG_IP_NF_TARGET_REJECT=m
+CONFIG_IP_NF_TARGET_LOG=m
+CONFIG_IP_NF_TARGET_ULOG=m
+CONFIG_IP_NF_TARGET_TCPMSS=m
+CONFIG_IP_NF_NAT=m
+CONFIG_IP_NF_NAT_NEEDED=y
+CONFIG_IP_NF_TARGET_MASQUERADE=m
+CONFIG_IP_NF_TARGET_REDIRECT=m
+CONFIG_IP_NF_TARGET_NETMAP=m
+CONFIG_IP_NF_TARGET_SAME=m
+CONFIG_IP_NF_NAT_SNMP_BASIC=m
+CONFIG_IP_NF_NAT_IRC=m
+CONFIG_IP_NF_NAT_FTP=m
+CONFIG_IP_NF_NAT_TFTP=m
+CONFIG_IP_NF_NAT_AMANDA=m
+CONFIG_IP_NF_MANGLE=m
+CONFIG_IP_NF_TARGET_TOS=m
+CONFIG_IP_NF_TARGET_ECN=m
+CONFIG_IP_NF_TARGET_DSCP=m
+CONFIG_IP_NF_TARGET_MARK=m
+CONFIG_IP_NF_TARGET_CLASSIFY=m
+CONFIG_IP_NF_TARGET_CONNMARK=m
+CONFIG_IP_NF_TARGET_CLUSTERIP=m
+CONFIG_IP_NF_RAW=m
+CONFIG_IP_NF_TARGET_NOTRACK=m
+CONFIG_IP_NF_ARPTABLES=m
+CONFIG_IP_NF_ARPFILTER=m
+CONFIG_IP_NF_ARP_MANGLE=m
+
+#
+# IPv6: Netfilter Configuration (EXPERIMENTAL)
+#
+CONFIG_IP6_NF_QUEUE=m
+CONFIG_IP6_NF_IPTABLES=m
+CONFIG_IP6_NF_MATCH_LIMIT=m
+CONFIG_IP6_NF_MATCH_MAC=m
+CONFIG_IP6_NF_MATCH_RT=m
+CONFIG_IP6_NF_MATCH_OPTS=m
+CONFIG_IP6_NF_MATCH_FRAG=m
+CONFIG_IP6_NF_MATCH_HL=m
+CONFIG_IP6_NF_MATCH_MULTIPORT=m
+CONFIG_IP6_NF_MATCH_OWNER=m
+CONFIG_IP6_NF_MATCH_MARK=m
+CONFIG_IP6_NF_MATCH_IPV6HEADER=m
+CONFIG_IP6_NF_MATCH_AHESP=m
+CONFIG_IP6_NF_MATCH_LENGTH=m
+CONFIG_IP6_NF_MATCH_EUI64=m
+# CONFIG_IP6_NF_MATCH_PHYSDEV is not set
+CONFIG_IP6_NF_FILTER=m
+CONFIG_IP6_NF_TARGET_LOG=m
+CONFIG_IP6_NF_MANGLE=m
+CONFIG_IP6_NF_TARGET_MARK=m
+CONFIG_IP6_NF_RAW=m
+
+#
+# DECnet: Netfilter Configuration
+#
+# CONFIG_DECNET_NF_GRABULATOR is not set
+
+#
+# Bridge: Netfilter Configuration
+#
+CONFIG_BRIDGE_NF_EBTABLES=m
+CONFIG_BRIDGE_EBT_BROUTE=m
+CONFIG_BRIDGE_EBT_T_FILTER=m
+CONFIG_BRIDGE_EBT_T_NAT=m
+CONFIG_BRIDGE_EBT_802_3=m
+CONFIG_BRIDGE_EBT_AMONG=m
+CONFIG_BRIDGE_EBT_ARP=m
+CONFIG_BRIDGE_EBT_IP=m
+CONFIG_BRIDGE_EBT_LIMIT=m
+CONFIG_BRIDGE_EBT_MARK=m
+CONFIG_BRIDGE_EBT_PKTTYPE=m
+CONFIG_BRIDGE_EBT_STP=m
+CONFIG_BRIDGE_EBT_VLAN=m
+CONFIG_BRIDGE_EBT_ARPREPLY=m
+CONFIG_BRIDGE_EBT_DNAT=m
+CONFIG_BRIDGE_EBT_MARK_T=m
+CONFIG_BRIDGE_EBT_REDIRECT=m
+CONFIG_BRIDGE_EBT_SNAT=m
+CONFIG_BRIDGE_EBT_LOG=m
+CONFIG_BRIDGE_EBT_ULOG=m
+CONFIG_XFRM=y
+CONFIG_XFRM_USER=m
+
+#
+# SCTP Configuration (EXPERIMENTAL)
+#
+CONFIG_IP_SCTP=m
+# CONFIG_SCTP_DBG_MSG is not set
+# CONFIG_SCTP_DBG_OBJCNT is not set
+# CONFIG_SCTP_HMAC_NONE is not set
+# CONFIG_SCTP_HMAC_SHA1 is not set
+CONFIG_SCTP_HMAC_MD5=y
+CONFIG_ATM=m
+CONFIG_ATM_CLIP=m
+# CONFIG_ATM_CLIP_NO_ICMP is not set
+CONFIG_ATM_LANE=m
+CONFIG_ATM_MPOA=m
+CONFIG_ATM_BR2684=m
+# CONFIG_ATM_BR2684_IPFILTER is not set
+CONFIG_BRIDGE=m
+CONFIG_VLAN_8021Q=m
+CONFIG_DECNET=m
+# CONFIG_DECNET_ROUTER is not set
+CONFIG_LLC=m
+CONFIG_LLC2=m
+CONFIG_IPX=m
+# CONFIG_IPX_INTERN is not set
+CONFIG_ATALK=m
+# CONFIG_DEV_APPLETALK is not set
+CONFIG_X25=m
+CONFIG_LAPB=m
+# CONFIG_NET_DIVERT is not set
+CONFIG_ECONET=m
+# CONFIG_ECONET_AUNUDP is not set
+# CONFIG_ECONET_NATIVE is not set
+CONFIG_WAN_ROUTER=m
+
+#
+# QoS and/or fair queueing
+#
+CONFIG_NET_SCHED=y
+CONFIG_NET_SCH_CLK_JIFFIES=y
+# CONFIG_NET_SCH_CLK_GETTIMEOFDAY is not set
+# CONFIG_NET_SCH_CLK_CPU is not set
+CONFIG_NET_SCH_CBQ=m
+CONFIG_NET_SCH_HTB=m
+CONFIG_NET_SCH_HFSC=m
+CONFIG_NET_SCH_ATM=m
+CONFIG_NET_SCH_PRIO=m
+CONFIG_NET_SCH_RED=m
+CONFIG_NET_SCH_SFQ=m
+CONFIG_NET_SCH_TEQL=m
+CONFIG_NET_SCH_TBF=m
+CONFIG_NET_SCH_GRED=m
+CONFIG_NET_SCH_DSMARK=m
+CONFIG_NET_SCH_NETEM=m
+CONFIG_NET_SCH_INGRESS=m
+CONFIG_NET_QOS=y
+CONFIG_NET_ESTIMATOR=y
+CONFIG_NET_CLS=y
+CONFIG_NET_CLS_BASIC=m
+CONFIG_NET_CLS_TCINDEX=m
+CONFIG_NET_CLS_ROUTE4=m
+CONFIG_NET_CLS_ROUTE=y
+CONFIG_NET_CLS_FW=m
+CONFIG_NET_CLS_U32=m
+# CONFIG_CLS_U32_PERF is not set
+# CONFIG_NET_CLS_IND is not set
+# CONFIG_CLS_U32_MARK is not set
+CONFIG_NET_CLS_RSVP=m
+CONFIG_NET_CLS_RSVP6=m
+# CONFIG_NET_EMATCH is not set
+# CONFIG_NET_CLS_ACT is not set
+CONFIG_NET_CLS_POLICE=y
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+CONFIG_NETPOLL=y
+# CONFIG_NETPOLL_RX is not set
+# CONFIG_NETPOLL_TRAP is not set
+CONFIG_NET_POLL_CONTROLLER=y
+# CONFIG_HAMRADIO is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+CONFIG_BONDING=m
+CONFIG_EQUALIZER=m
+CONFIG_TUN=m
+
+#
+# ARCnet devices
+#
+# CONFIG_ARCNET is not set
+
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+# CONFIG_HAPPYMEAL is not set
+# CONFIG_SUNGEM is not set
+CONFIG_NET_VENDOR_3COM=y
+CONFIG_VORTEX=m
+CONFIG_TYPHOON=m
+
+#
+# Tulip family network device support
+#
+CONFIG_NET_TULIP=y
+CONFIG_DE2104X=m
+CONFIG_TULIP=m
+# CONFIG_TULIP_MWI is not set
+# CONFIG_TULIP_MMIO is not set
+# CONFIG_TULIP_NAPI is not set
+CONFIG_DE4X5=m
+CONFIG_WINBOND_840=m
+CONFIG_DM9102=m
+CONFIG_PCMCIA_XIRCOM=m
+CONFIG_PCMCIA_XIRTULIP=m
+CONFIG_HP100=m
+CONFIG_IBM_EMAC=y
+# CONFIG_IBM_EMAC_ERRMSG is not set
+CONFIG_IBM_EMAC_RXB=128
+CONFIG_IBM_EMAC_TXB=64
+CONFIG_IBM_EMAC_FGAP=8
+CONFIG_IBM_EMAC_SKBRES=0
+CONFIG_NET_PCI=y
+CONFIG_PCNET32=m
+CONFIG_AMD8111_ETH=m
+# CONFIG_AMD8111E_NAPI is not set
+CONFIG_ADAPTEC_STARFIRE=m
+# CONFIG_ADAPTEC_STARFIRE_NAPI is not set
+CONFIG_B44=m
+CONFIG_FORCEDETH=m
+CONFIG_DGRS=m
+CONFIG_EEPRO100=m
+CONFIG_E100=m
+CONFIG_FEALNX=m
+CONFIG_NATSEMI=m
+CONFIG_NE2K_PCI=m
+CONFIG_8139CP=m
+CONFIG_8139TOO=m
+# CONFIG_8139TOO_PIO is not set
+# CONFIG_8139TOO_TUNE_TWISTER is not set
+# CONFIG_8139TOO_8129 is not set
+# CONFIG_8139_OLD_RX_RESET is not set
+CONFIG_SIS900=m
+CONFIG_EPIC100=m
+CONFIG_SUNDANCE=m
+# CONFIG_SUNDANCE_MMIO is not set
+CONFIG_TLAN=m
+CONFIG_VIA_RHINE=m
+# CONFIG_VIA_RHINE_MMIO is not set
+
+#
+# Ethernet (1000 Mbit)
+#
+CONFIG_ACENIC=m
+# CONFIG_ACENIC_OMIT_TIGON_I is not set
+CONFIG_DL2K=m
+CONFIG_E1000=m
+# CONFIG_E1000_NAPI is not set
+CONFIG_NS83820=m
+CONFIG_HAMACHI=m
+CONFIG_YELLOWFIN=m
+CONFIG_R8169=m
+# CONFIG_R8169_NAPI is not set
+# CONFIG_R8169_VLAN is not set
+CONFIG_SK98LIN=m
+CONFIG_VIA_VELOCITY=m
+CONFIG_TIGON3=m
+CONFIG_BNX2=m
+
+#
+# Ethernet (10000 Mbit)
+#
+# CONFIG_IXGB is not set
+# CONFIG_S2IO is not set
+
+#
+# Token Ring devices
+#
+# CONFIG_TR is not set
+
+#
+# Wireless LAN (non-hamradio)
+#
+CONFIG_NET_RADIO=y
+
+#
+# Obsolete Wireless cards support (pre-802.11)
+#
+CONFIG_STRIP=m
+CONFIG_PCMCIA_WAVELAN=m
+CONFIG_PCMCIA_NETWAVE=m
+
+#
+# Wireless 802.11 Frequency Hopping cards support
+#
+CONFIG_PCMCIA_RAYCS=m
+
+#
+# Wireless 802.11b ISA/PCI cards support
+#
+CONFIG_HERMES=m
+CONFIG_PLX_HERMES=m
+CONFIG_TMD_HERMES=m
+CONFIG_PCI_HERMES=m
+CONFIG_ATMEL=m
+CONFIG_PCI_ATMEL=m
+
+#
+# Wireless 802.11b Pcmcia/Cardbus cards support
+#
+CONFIG_PCMCIA_HERMES=m
+CONFIG_AIRO_CS=m
+CONFIG_PCMCIA_ATMEL=m
+CONFIG_PCMCIA_WL3501=m
+
+#
+# Prism GT/Duette 802.11(a/b/g) PCI/Cardbus support
+#
+CONFIG_PRISM54=m
+CONFIG_NET_WIRELESS=y
+
+#
+# PCMCIA network device support
+#
+CONFIG_NET_PCMCIA=y
+CONFIG_PCMCIA_3C589=m
+CONFIG_PCMCIA_3C574=m
+CONFIG_PCMCIA_FMVJ18X=m
+CONFIG_PCMCIA_PCNET=m
+CONFIG_PCMCIA_NMCLAN=m
+CONFIG_PCMCIA_SMC91C92=m
+CONFIG_PCMCIA_XIRC2PS=m
+CONFIG_PCMCIA_AXNET=m
+
+#
+# Wan interfaces
+#
+CONFIG_WAN=y
+CONFIG_DSCC4=m
+# CONFIG_DSCC4_PCISYNC is not set
+# CONFIG_DSCC4_PCI_RST is not set
+CONFIG_LANMEDIA=m
+CONFIG_SYNCLINK_SYNCPPP=m
+CONFIG_HDLC=m
+# CONFIG_HDLC_RAW is not set
+# CONFIG_HDLC_RAW_ETH is not set
+# CONFIG_HDLC_CISCO is not set
+# CONFIG_HDLC_FR is not set
+# CONFIG_HDLC_PPP is not set
+# CONFIG_HDLC_X25 is not set
+CONFIG_PCI200SYN=m
+CONFIG_WANXL=m
+CONFIG_PC300=m
+
+#
+# Cyclades-PC300 MLPPP support is disabled.
+#
+
+#
+# Refer to the file README.mlppp, provided by PC300 package.
+#
+CONFIG_FARSYNC=m
+CONFIG_DLCI=m
+CONFIG_DLCI_COUNT=24
+CONFIG_DLCI_MAX=8
+# CONFIG_WAN_ROUTER_DRIVERS is not set
+CONFIG_LAPBETHER=m
+CONFIG_X25_ASY=m
+
+#
+# ATM drivers
+#
+# CONFIG_ATM_TCP is not set
+# CONFIG_ATM_LANAI is not set
+# CONFIG_ATM_ENI is not set
+# CONFIG_ATM_FIRESTREAM is not set
+# CONFIG_ATM_ZATM is not set
+# CONFIG_ATM_NICSTAR is not set
+# CONFIG_ATM_IDT77252 is not set
+# CONFIG_ATM_AMBASSADOR is not set
+# CONFIG_ATM_HORIZON is not set
+# CONFIG_ATM_IA is not set
+# CONFIG_ATM_FORE200E_MAYBE is not set
+# CONFIG_ATM_HE is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+# CONFIG_PLIP is not set
+CONFIG_PPP=m
+CONFIG_PPP_MULTILINK=y
+CONFIG_PPP_FILTER=y
+CONFIG_PPP_ASYNC=m
+CONFIG_PPP_SYNC_TTY=m
+CONFIG_PPP_DEFLATE=m
+CONFIG_PPP_BSDCOMP=m
+CONFIG_PPP_MPPE_MPPC=m
+CONFIG_PPPOE=m
+CONFIG_PPPOATM=m
+CONFIG_SLIP=m
+CONFIG_SLIP_COMPRESSED=y
+CONFIG_SLIP_SMART=y
+# CONFIG_SLIP_MODE_SLIP6 is not set
+# CONFIG_NET_FC is not set
+CONFIG_SHAPER=m
+CONFIG_NETCONSOLE=m
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN is not set
+
+#
+# Telephony Support
+#
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+CONFIG_INPUT_JOYDEV=y
+# CONFIG_INPUT_TSDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+CONFIG_INPUT_KEYBOARD=y
+# CONFIG_KEYBOARD_ATKBD is not set
+# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_LKKBD is not set
+# CONFIG_KEYBOARD_XTKBD is not set
+# CONFIG_KEYBOARD_NEWTON is not set
+CONFIG_INPUT_MOUSE=y
+# CONFIG_MOUSE_PS2 is not set
+# CONFIG_MOUSE_SERIAL is not set
+# CONFIG_MOUSE_VSXXXAA is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+CONFIG_SERIO=y
+# CONFIG_SERIO_I8042 is not set
+# CONFIG_SERIO_SERPORT is not set
+# CONFIG_SERIO_PARKBD is not set
+# CONFIG_SERIO_PCIPS2 is not set
+# CONFIG_SERIO_LIBPS2 is not set
+# CONFIG_SERIO_RAW is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+# CONFIG_SERIAL_8250_CS is not set
+CONFIG_SERIAL_8250_NR_UARTS=4
+# CONFIG_SERIAL_8250_EXTENDED is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_JSM is not set
+CONFIG_UNIX98_PTYS=y
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+CONFIG_PRINTER=m
+# CONFIG_LP_CONSOLE is not set
+CONFIG_PPDEV=m
+CONFIG_TIPAR=m
+
+#
+# IPMI
+#
+# CONFIG_IPMI_HANDLER is not set
+
+#
+# Watchdog Cards
+#
+CONFIG_WATCHDOG=y
+# CONFIG_WATCHDOG_NOWAYOUT is not set
+
+#
+# Watchdog Device Drivers
+#
+CONFIG_SOFT_WATCHDOG=m
+
+#
+# PCI-based Watchdog Cards
+#
+CONFIG_PCIPCWATCHDOG=m
+CONFIG_WDTPCI=m
+# CONFIG_WDT_501_PCI is not set
+
+#
+# USB-based Watchdog Cards
+#
+CONFIG_USBPCWATCHDOG=m
+CONFIG_NVRAM=m
+CONFIG_GEN_RTC=m
+# CONFIG_GEN_RTC_X is not set
+CONFIG_DTLK=m
+CONFIG_R3964=m
+CONFIG_APPLICOM=m
+
+#
+# Ftape, the floppy tape device driver
+#
+CONFIG_AGP=m
+CONFIG_DRM=m
+CONFIG_DRM_TDFX=m
+CONFIG_DRM_R128=m
+CONFIG_DRM_RADEON=m
+CONFIG_DRM_MGA=m
+CONFIG_DRM_SIS=m
+
+#
+# PCMCIA character devices
+#
+CONFIG_SYNCLINK_CS=m
+CONFIG_RAW_DRIVER=m
+CONFIG_MAX_RAW_DEVS=256
+
+#
+# TPM devices
+#
+CONFIG_TCG_TPM=m
+CONFIG_TCG_NSC=m
+CONFIG_TCG_ATMEL=m
+
+#
+# I2C support
+#
+CONFIG_I2C=y
+CONFIG_I2C_CHARDEV=y
+
+#
+# I2C Algorithms
+#
+CONFIG_I2C_ALGOBIT=y
+CONFIG_I2C_ALGOPCF=m
+CONFIG_I2C_ALGOPCA=m
+
+#
+# I2C Hardware Bus support
+#
+# CONFIG_I2C_ALI1535 is not set
+# CONFIG_I2C_ALI1563 is not set
+# CONFIG_I2C_ALI15X3 is not set
+# CONFIG_I2C_AMD756 is not set
+# CONFIG_I2C_AMD8111 is not set
+# CONFIG_I2C_I801 is not set
+# CONFIG_I2C_I810 is not set
+# CONFIG_I2C_PIIX4 is not set
+CONFIG_I2C_IBM_IIC=y
+CONFIG_I2C_ISA=m
+# CONFIG_I2C_MPC is not set
+# CONFIG_I2C_NFORCE2 is not set
+# CONFIG_I2C_PARPORT is not set
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_PROSAVAGE is not set
+# CONFIG_I2C_SAVAGE4 is not set
+# CONFIG_SCx200_ACB is not set
+# CONFIG_I2C_SIS5595 is not set
+# CONFIG_I2C_SIS630 is not set
+# CONFIG_I2C_SIS96X is not set
+# CONFIG_I2C_STUB is not set
+# CONFIG_I2C_VIA is not set
+# CONFIG_I2C_VIAPRO is not set
+# CONFIG_I2C_VOODOO3 is not set
+# CONFIG_I2C_PCA_ISA is not set
+
+#
+# Hardware Sensors Chip support
+#
+CONFIG_I2C_SENSOR=m
+CONFIG_SENSORS_ADM1021=m
+CONFIG_SENSORS_ADM1025=m
+CONFIG_SENSORS_ADM1026=m
+CONFIG_SENSORS_ADM1031=m
+CONFIG_SENSORS_ASB100=m
+CONFIG_SENSORS_DS1621=m
+CONFIG_SENSORS_FSCHER=m
+CONFIG_SENSORS_FSCPOS=m
+CONFIG_SENSORS_GL518SM=m
+CONFIG_SENSORS_GL520SM=m
+CONFIG_SENSORS_IT87=m
+CONFIG_SENSORS_LM63=m
+CONFIG_SENSORS_LM75=m
+CONFIG_SENSORS_LM77=m
+CONFIG_SENSORS_LM78=m
+CONFIG_SENSORS_LM80=m
+CONFIG_SENSORS_LM83=m
+CONFIG_SENSORS_LM85=m
+CONFIG_SENSORS_LM87=m
+CONFIG_SENSORS_LM90=m
+CONFIG_SENSORS_LM92=m
+CONFIG_SENSORS_MAX1619=m
+CONFIG_SENSORS_PC87360=m
+CONFIG_SENSORS_SMSC47B397=m
+CONFIG_SENSORS_SIS5595=m
+CONFIG_SENSORS_SMSC47M1=m
+CONFIG_SENSORS_VIA686A=m
+CONFIG_SENSORS_W83781D=m
+CONFIG_SENSORS_W83L785TS=m
+CONFIG_SENSORS_W83627HF=m
+
+#
+# Other I2C Chip support
+#
+CONFIG_SENSORS_DS1337=m
+CONFIG_SENSORS_EEPROM=m
+CONFIG_SENSORS_PCF8574=m
+CONFIG_SENSORS_PCF8591=m
+CONFIG_SENSORS_RTC8564=m
+CONFIG_SENSORS_M41T00=m
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+
+#
+# Dallas's 1-wire bus
+#
+# CONFIG_W1 is not set
+
+#
+# Misc devices
+#
+
+#
+# Multimedia devices
+#
+CONFIG_VIDEO_DEV=m
+
+#
+# Video For Linux
+#
+
+#
+# Video Adapters
+#
+CONFIG_VIDEO_BT848=m
+CONFIG_VIDEO_BWQCAM=m
+CONFIG_VIDEO_CQCAM=m
+CONFIG_VIDEO_CPIA=m
+CONFIG_VIDEO_CPIA_USB=m
+CONFIG_VIDEO_SAA5246A=m
+CONFIG_VIDEO_SAA5249=m
+CONFIG_TUNER_3036=m
+CONFIG_VIDEO_STRADIS=m
+CONFIG_VIDEO_ZORAN=m
+CONFIG_VIDEO_ZORAN_BUZ=m
+CONFIG_VIDEO_ZORAN_DC10=m
+CONFIG_VIDEO_ZORAN_DC30=m
+CONFIG_VIDEO_ZORAN_LML33=m
+CONFIG_VIDEO_ZORAN_LML33R10=m
+CONFIG_VIDEO_SAA7134=m
+# CONFIG_VIDEO_SAA7134_DVB is not set
+CONFIG_VIDEO_MXB=m
+CONFIG_VIDEO_DPC=m
+CONFIG_VIDEO_HEXIUM_ORION=m
+CONFIG_VIDEO_HEXIUM_GEMINI=m
+CONFIG_VIDEO_CX88=m
+# CONFIG_VIDEO_CX88_DVB is not set
+CONFIG_VIDEO_OVCAMCHIP=m
+
+#
+# Radio Adapters
+#
+CONFIG_RADIO_GEMTEK_PCI=m
+CONFIG_RADIO_MAXIRADIO=m
+CONFIG_RADIO_MAESTRO=m
+
+#
+# Digital Video Broadcasting Devices
+#
+CONFIG_DVB=y
+CONFIG_DVB_CORE=m
+
+#
+# Supported SAA7146 based PCI Adapters
+#
+CONFIG_DVB_AV7110=m
+# CONFIG_DVB_AV7110_FIRMWARE is not set
+CONFIG_DVB_AV7110_OSD=y
+CONFIG_DVB_BUDGET=m
+CONFIG_DVB_BUDGET_CI=m
+CONFIG_DVB_BUDGET_AV=m
+CONFIG_DVB_BUDGET_PATCH=m
+
+#
+# Supported USB Adapters
+#
+CONFIG_DVB_TTUSB_BUDGET=m
+CONFIG_DVB_TTUSB_DEC=m
+CONFIG_DVB_DIBUSB=m
+# CONFIG_DVB_DIBUSB_MISDESIGNED_DEVICES is not set
+# CONFIG_DVB_DIBCOM_DEBUG is not set
+CONFIG_DVB_CINERGYT2=m
+# CONFIG_DVB_CINERGYT2_TUNING is not set
+
+#
+# Supported FlexCopII (B2C2) Adapters
+#
+CONFIG_DVB_B2C2_FLEXCOP=m
+CONFIG_DVB_B2C2_FLEXCOP_PCI=m
+CONFIG_DVB_B2C2_FLEXCOP_USB=m
+# CONFIG_DVB_B2C2_FLEXCOP_DEBUG is not set
+CONFIG_DVB_B2C2_SKYSTAR=m
+
+#
+# Supported BT878 Adapters
+#
+CONFIG_DVB_BT8XX=m
+
+#
+# Supported DVB Frontends
+#
+
+#
+# Customise DVB Frontends
+#
+
+#
+# DVB-S (satellite) frontends
+#
+CONFIG_DVB_STV0299=m
+CONFIG_DVB_CX24110=m
+CONFIG_DVB_TDA8083=m
+CONFIG_DVB_TDA80XX=m
+CONFIG_DVB_MT312=m
+CONFIG_DVB_VES1X93=m
+
+#
+# DVB-T (terrestrial) frontends
+#
+CONFIG_DVB_SP8870=m
+CONFIG_DVB_SP887X=m
+CONFIG_DVB_CX22700=m
+CONFIG_DVB_CX22702=m
+CONFIG_DVB_L64781=m
+CONFIG_DVB_TDA1004X=m
+CONFIG_DVB_NXT6000=m
+CONFIG_DVB_MT352=m
+CONFIG_DVB_DIB3000MB=m
+CONFIG_DVB_DIB3000MC=m
+
+#
+# DVB-C (cable) frontends
+#
+CONFIG_DVB_ATMEL_AT76C651=m
+CONFIG_DVB_VES1820=m
+CONFIG_DVB_TDA10021=m
+CONFIG_DVB_STV0297=m
+
+#
+# ATSC (North American/Korean Terresterial DTV) frontends
+#
+CONFIG_DVB_NXT2002=m
+CONFIG_DVB_OR51211=m
+CONFIG_DVB_OR51132=m
+CONFIG_VIDEO_SAA7146=m
+CONFIG_VIDEO_SAA7146_VV=m
+CONFIG_VIDEO_VIDEOBUF=m
+CONFIG_VIDEO_TUNER=m
+CONFIG_VIDEO_BUF=m
+CONFIG_VIDEO_BTCX=m
+CONFIG_VIDEO_IR=m
+CONFIG_VIDEO_TVEEPROM=m
+
+#
+# Graphics support
+#
+CONFIG_FB=y
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+CONFIG_FB_SOFT_CURSOR=y
+# CONFIG_FB_MACMODES is not set
+# CONFIG_FB_MODE_HELPERS is not set
+CONFIG_FB_TILEBLITTING=y
+# CONFIG_FB_CIRRUS is not set
+# CONFIG_FB_PM2 is not set
+# CONFIG_FB_CYBER2000 is not set
+# CONFIG_FB_CT65550 is not set
+# CONFIG_FB_ASILIANT is not set
+# CONFIG_FB_IMSTT is not set
+# CONFIG_FB_VGA16 is not set
+# CONFIG_FB_NVIDIA is not set
+# CONFIG_FB_RIVA is not set
+CONFIG_FB_MATROX=y
+CONFIG_FB_MATROX_MILLENIUM=y
+CONFIG_FB_MATROX_MYSTIQUE=y
+CONFIG_FB_MATROX_G=y
+# CONFIG_FB_MATROX_I2C is not set
+# CONFIG_FB_MATROX_MULTIHEAD is not set
+# CONFIG_FB_RADEON_OLD is not set
+# CONFIG_FB_RADEON is not set
+# CONFIG_FB_ATY128 is not set
+# CONFIG_FB_ATY is not set
+# CONFIG_FB_SAVAGE is not set
+# CONFIG_FB_SIS is not set
+# CONFIG_FB_NEOMAGIC is not set
+# CONFIG_FB_KYRO is not set
+# CONFIG_FB_3DFX is not set
+# CONFIG_FB_VOODOO1 is not set
+# CONFIG_FB_TRIDENT is not set
+# CONFIG_FB_S1D13XXX is not set
+# CONFIG_FB_VIRTUAL is not set
+
+#
+# Console display driver support
+#
+CONFIG_DUMMY_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+# CONFIG_FONTS is not set
+CONFIG_FONT_8x8=y
+CONFIG_FONT_8x16=y
+
+#
+# Logo configuration
+#
+CONFIG_LOGO=y
+CONFIG_LOGO_LINUX_MONO=y
+CONFIG_LOGO_LINUX_VGA16=y
+CONFIG_LOGO_LINUX_CLUT224=y
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+
+#
+# USB support
+#
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+CONFIG_USB=y
+# CONFIG_USB_DEBUG is not set
+
+#
+# Miscellaneous USB options
+#
+CONFIG_USB_DEVICEFS=y
+# CONFIG_USB_BANDWIDTH is not set
+# CONFIG_USB_DYNAMIC_MINORS is not set
+# CONFIG_USB_OTG is not set
+
+#
+# USB Host Controller Drivers
+#
+CONFIG_USB_EHCI_HCD=y
+# CONFIG_USB_EHCI_SPLIT_ISO is not set
+# CONFIG_USB_EHCI_ROOT_HUB_TT is not set
+CONFIG_USB_OHCI_HCD=y
+# CONFIG_USB_OHCI_BIG_ENDIAN is not set
+CONFIG_USB_OHCI_LITTLE_ENDIAN=y
+# CONFIG_USB_UHCI_HCD is not set
+# CONFIG_USB_SL811_HCD is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_BLUETOOTH_TTY is not set
+# CONFIG_USB_ACM is not set
+CONFIG_USB_PRINTER=y
+
+#
+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information
+#
+CONFIG_USB_STORAGE=y
+# CONFIG_USB_STORAGE_DEBUG is not set
+# CONFIG_USB_STORAGE_DATAFAB is not set
+# CONFIG_USB_STORAGE_FREECOM is not set
+# CONFIG_USB_STORAGE_ISD200 is not set
+# CONFIG_USB_STORAGE_DPCM is not set
+# CONFIG_USB_STORAGE_USBAT is not set
+# CONFIG_USB_STORAGE_SDDR09 is not set
+# CONFIG_USB_STORAGE_SDDR55 is not set
+# CONFIG_USB_STORAGE_JUMPSHOT is not set
+
+#
+# USB Input Devices
+#
+CONFIG_USB_HID=y
+CONFIG_USB_HIDINPUT=y
+# CONFIG_HID_FF is not set
+CONFIG_USB_HIDDEV=y
+# CONFIG_USB_AIPTEK is not set
+# CONFIG_USB_WACOM is not set
+# CONFIG_USB_KBTAB is not set
+# CONFIG_USB_POWERMATE is not set
+# CONFIG_USB_MTOUCH is not set
+# CONFIG_USB_EGALAX is not set
+# CONFIG_USB_XPAD is not set
+# CONFIG_USB_ATI_REMOTE is not set
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_MICROTEK is not set
+
+#
+# USB Multimedia devices
+#
+# CONFIG_USB_DABUSB is not set
+# CONFIG_USB_VICAM is not set
+# CONFIG_USB_DSBR is not set
+# CONFIG_USB_IBMCAM is not set
+# CONFIG_USB_KONICAWC is not set
+# CONFIG_USB_OV511 is not set
+# CONFIG_USB_SE401 is not set
+# CONFIG_USB_SN9C102 is not set
+# CONFIG_USB_STV680 is not set
+# CONFIG_USB_W9968CF is not set
+# CONFIG_USB_PWC is not set
+
+#
+# USB Network Adapters
+#
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_KAWETH is not set
+CONFIG_USB_PEGASUS=y
+# CONFIG_USB_RTL8150 is not set
+CONFIG_USB_USBNET=y
+
+#
+# USB Host-to-Host Cables
+#
+CONFIG_USB_ALI_M5632=y
+CONFIG_USB_AN2720=y
+CONFIG_USB_BELKIN=y
+CONFIG_USB_GENESYS=y
+CONFIG_USB_NET1080=y
+CONFIG_USB_PL2301=y
+CONFIG_USB_KC2190=y
+
+#
+# Intelligent USB Devices/Gadgets
+#
+CONFIG_USB_ARMLINUX=y
+CONFIG_USB_EPSON2888=y
+CONFIG_USB_ZAURUS=y
+CONFIG_USB_CDCETHER=y
+
+#
+# USB Network Adapters
+#
+CONFIG_USB_AX8817X=y
+# CONFIG_USB_ZD1201 is not set
+CONFIG_USB_MON=y
+
+#
+# USB port drivers
+#
+# CONFIG_USB_USS720 is not set
+
+#
+# USB Serial Converter support
+#
+# CONFIG_USB_SERIAL is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_AUERSWALD is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_PHIDGETKIT is not set
+# CONFIG_USB_PHIDGETSERVO is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_SISUSBVGA is not set
+# CONFIG_USB_TEST is not set
+
+#
+# USB ATM/DSL drivers
+#
+# CONFIG_USB_ATM is not set
+# CONFIG_USB_SPEEDTOUCH is not set
+
+#
+# USB Gadget Support
+#
+# CONFIG_USB_GADGET is not set
+
+#
+# MMC/SD Card support
+#
+# CONFIG_MMC is not set
+
+#
+# InfiniBand support
+#
+# CONFIG_INFINIBAND is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+CONFIG_EXT3_FS=y
+# CONFIG_EXT3_FS_XATTR is not set
+CONFIG_JBD=y
+# CONFIG_JBD_DEBUG is not set
+CONFIG_REISERFS_FS=m
+# CONFIG_REISERFS_CHECK is not set
+# CONFIG_REISERFS_PROC_INFO is not set
+# CONFIG_REISERFS_FS_XATTR is not set
+CONFIG_JFS_FS=m
+# CONFIG_JFS_POSIX_ACL is not set
+# CONFIG_JFS_SECURITY is not set
+# CONFIG_JFS_DEBUG is not set
+# CONFIG_JFS_STATISTICS is not set
+
+#
+# XFS support
+#
+# CONFIG_XFS_FS is not set
+CONFIG_MINIX_FS=m
+CONFIG_ROMFS_FS=m
+CONFIG_QUOTA=y
+CONFIG_QFMT_V1=m
+CONFIG_QFMT_V2=m
+CONFIG_QUOTACTL=y
+CONFIG_DNOTIFY=y
+CONFIG_AUTOFS_FS=m
+CONFIG_AUTOFS4_FS=m
+
+#
+# CD-ROM/DVD Filesystems
+#
+CONFIG_ISO9660_FS=y
+CONFIG_JOLIET=y
+CONFIG_ZISOFS=y
+CONFIG_ZISOFS_FS=y
+CONFIG_UDF_FS=y
+CONFIG_UDF_NLS=y
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=m
+CONFIG_MSDOS_FS=m
+CONFIG_VFAT_FS=m
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+CONFIG_NTFS_FS=m
+# CONFIG_NTFS_DEBUG is not set
+CONFIG_NTFS_RW=y
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_SYSFS=y
+CONFIG_DEVFS_FS=y
+# CONFIG_DEVFS_MOUNT is not set
+# CONFIG_DEVFS_DEBUG is not set
+# CONFIG_DEVPTS_FS_XATTR is not set
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_XATTR is not set
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+
+#
+# Miscellaneous filesystems
+#
+CONFIG_ADFS_FS=m
+# CONFIG_ADFS_FS_RW is not set
+CONFIG_AFFS_FS=m
+CONFIG_HFS_FS=m
+CONFIG_HFSPLUS_FS=m
+CONFIG_BEFS_FS=m
+# CONFIG_BEFS_DEBUG is not set
+CONFIG_BFS_FS=m
+CONFIG_EFS_FS=m
+CONFIG_JFFS_FS=m
+CONFIG_JFFS_FS_VERBOSE=0
+# CONFIG_JFFS_PROC_FS is not set
+CONFIG_JFFS2_FS=m
+CONFIG_JFFS2_FS_DEBUG=0
+# CONFIG_JFFS2_FS_NAND is not set
+# CONFIG_JFFS2_FS_NOR_ECC is not set
+# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
+CONFIG_JFFS2_ZLIB=y
+CONFIG_JFFS2_RTIME=y
+# CONFIG_JFFS2_RUBIN is not set
+CONFIG_CRAMFS=y
+CONFIG_VXFS_FS=m
+CONFIG_HPFS_FS=m
+CONFIG_QNX4FS_FS=m
+CONFIG_SYSV_FS=m
+CONFIG_UFS_FS=m
+# CONFIG_UFS_FS_WRITE is not set
+
+#
+# Network File Systems
+#
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFS_DIRECTIO is not set
+CONFIG_NFSD=m
+# CONFIG_NFSD_V3 is not set
+CONFIG_NFSD_TCP=y
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_EXPORTFS=m
+CONFIG_SUNRPC=y
+CONFIG_SUNRPC_GSS=m
+CONFIG_RPCSEC_GSS_KRB5=m
+CONFIG_RPCSEC_GSS_SPKM3=m
+CONFIG_SMB_FS=m
+# CONFIG_SMB_NLS_DEFAULT is not set
+CONFIG_CIFS=m
+# CONFIG_CIFS_STATS is not set
+# CONFIG_CIFS_XATTR is not set
+# CONFIG_CIFS_EXPERIMENTAL is not set
+CONFIG_NCP_FS=m
+# CONFIG_NCPFS_PACKET_SIGNING is not set
+# CONFIG_NCPFS_IOCTL_LOCKING is not set
+# CONFIG_NCPFS_STRONG is not set
+# CONFIG_NCPFS_NFS_NS is not set
+# CONFIG_NCPFS_OS2_NS is not set
+# CONFIG_NCPFS_SMALLDOS is not set
+# CONFIG_NCPFS_NLS is not set
+# CONFIG_NCPFS_EXTRAS is not set
+CONFIG_CODA_FS=m
+# CONFIG_CODA_FS_OLD_API is not set
+CONFIG_AFS_FS=m
+CONFIG_RXRPC=m
+
+#
+# Partition Types
+#
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_ACORN_PARTITION is not set
+# CONFIG_OSF_PARTITION is not set
+# CONFIG_AMIGA_PARTITION is not set
+# CONFIG_ATARI_PARTITION is not set
+CONFIG_MAC_PARTITION=y
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_BSD_DISKLABEL is not set
+# CONFIG_MINIX_SUBPARTITION is not set
+# CONFIG_SOLARIS_X86_PARTITION is not set
+# CONFIG_UNIXWARE_DISKLABEL is not set
+# CONFIG_LDM_PARTITION is not set
+# CONFIG_SGI_PARTITION is not set
+# CONFIG_ULTRIX_PARTITION is not set
+# CONFIG_SUN_PARTITION is not set
+# CONFIG_EFI_PARTITION is not set
+
+#
+# Native Language Support
+#
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_CODEPAGE_737=m
+CONFIG_NLS_CODEPAGE_775=m
+CONFIG_NLS_CODEPAGE_850=m
+CONFIG_NLS_CODEPAGE_852=m
+CONFIG_NLS_CODEPAGE_855=m
+CONFIG_NLS_CODEPAGE_857=m
+CONFIG_NLS_CODEPAGE_860=m
+CONFIG_NLS_CODEPAGE_861=m
+CONFIG_NLS_CODEPAGE_862=m
+CONFIG_NLS_CODEPAGE_863=m
+CONFIG_NLS_CODEPAGE_864=m
+CONFIG_NLS_CODEPAGE_865=m
+CONFIG_NLS_CODEPAGE_866=m
+CONFIG_NLS_CODEPAGE_869=m
+CONFIG_NLS_CODEPAGE_936=m
+CONFIG_NLS_CODEPAGE_950=m
+CONFIG_NLS_CODEPAGE_932=m
+CONFIG_NLS_CODEPAGE_949=m
+CONFIG_NLS_CODEPAGE_874=m
+CONFIG_NLS_ISO8859_8=m
+CONFIG_NLS_CODEPAGE_1250=m
+CONFIG_NLS_CODEPAGE_1251=m
+CONFIG_NLS_ASCII=m
+CONFIG_NLS_ISO8859_1=y
+CONFIG_NLS_ISO8859_2=m
+CONFIG_NLS_ISO8859_3=m
+CONFIG_NLS_ISO8859_4=m
+CONFIG_NLS_ISO8859_5=m
+CONFIG_NLS_ISO8859_6=m
+CONFIG_NLS_ISO8859_7=m
+CONFIG_NLS_ISO8859_9=m
+CONFIG_NLS_ISO8859_13=m
+CONFIG_NLS_ISO8859_14=m
+CONFIG_NLS_ISO8859_15=m
+CONFIG_NLS_KOI8_R=m
+CONFIG_NLS_KOI8_U=m
+CONFIG_NLS_UTF8=m
+
+#
+# IBM 40x options
+#
+
+#
+# Library routines
+#
+CONFIG_CRC_CCITT=m
+CONFIG_CRC32=y
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=m
+CONFIG_REED_SOLOMON=m
+CONFIG_REED_SOLOMON_DEC16=y
+
+#
+# Profiling support
+#
+# CONFIG_PROFILING is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+# CONFIG_DEBUG_KERNEL is not set
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_SERIAL_TEXT_DEBUG is not set
+CONFIG_PPC_OCP=y
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+CONFIG_SECURITY=y
+CONFIG_SECURITY_NETWORK=y
+CONFIG_SECURITY_CAPABILITIES=m
+CONFIG_SECURITY_ROOTPLUG=m
+CONFIG_SECURITY_SECLVL=m
+# CONFIG_SECURITY_SELINUX is not set
+
+#
+# Cryptographic options
+#
+CONFIG_CRYPTO=y
+CONFIG_CRYPTO_HMAC=y
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_MD4 is not set
+CONFIG_CRYPTO_MD5=m
+CONFIG_CRYPTO_SHA1=m
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_WP512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+CONFIG_CRYPTO_DES=m
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_TEA is not set
+CONFIG_CRYPTO_ARC4=m
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+CONFIG_CRYPTO_DEFLATE=m
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Hardware crypto devices
+#
--- /dev/null
+diff -upr linux-2.6.11/include/linux/wireless.h linux-2.6.11-WE18/include/linux/wireless.h
+--- linux-2.6.11/include/linux/wireless.h 2004-12-24 13:35:01.000000000 -0800
++++ linux-2.6.11-WE18/include/linux/wireless.h 2005-03-12 09:53:02.000000000 -0800
+@@ -1,10 +1,10 @@
+ /*
+ * This file define a set of standard wireless extensions
+ *
+- * Version : 17 21.6.04
++ * Version : 18 12.3.05
+ *
+ * Authors : Jean Tourrilhes - HPL - <jt@hpl.hp.com>
+- * Copyright (c) 1997-2004 Jean Tourrilhes, All Rights Reserved.
++ * Copyright (c) 1997-2005 Jean Tourrilhes, All Rights Reserved.
+ */
+
+ #ifndef _LINUX_WIRELESS_H
+@@ -82,7 +82,7 @@
+ * (there is some stuff that will be added in the future...)
+ * I just plan to increment with each new version.
+ */
+-#define WIRELESS_EXT 17
++#define WIRELESS_EXT 18
+
+ /*
+ * Changes :
+@@ -182,6 +182,21 @@
+ * - Document (struct iw_quality *)->updated, add new flags (INVALID)
+ * - Wireless Event capability in struct iw_range
+ * - Add support for relative TxPower (yick !)
++ *
++ * V17 to V18 (From Jouni Malinen <jkmaline@cc.hut.fi>)
++ * ----------
++ * - Add support for WPA/WPA2
++ * - Add extended encoding configuration (SIOCSIWENCODEEXT and
++ * SIOCGIWENCODEEXT)
++ * - Add SIOCSIWGENIE/SIOCGIWGENIE
++ * - Add SIOCSIWMLME
++ * - Add SIOCSIWPMKSA
++ * - Add struct iw_range bit field for supported encoding capabilities
++ * - Add optional scan request parameters for SIOCSIWSCAN
++ * - Add SIOCSIWAUTH/SIOCGIWAUTH for setting authentication and WPA
++ * related parameters (extensible up to 4096 parameter values)
++ * - Add wireless events: IWEVGENIE, IWEVMICHAELMICFAILURE,
++ * IWEVASSOCREQIE, IWEVASSOCRESPIE, IWEVPMKIDCAND
+ */
+
+ /**************************** CONSTANTS ****************************/
+@@ -256,6 +271,30 @@
+ #define SIOCSIWPOWER 0x8B2C /* set Power Management settings */
+ #define SIOCGIWPOWER 0x8B2D /* get Power Management settings */
+
++/* WPA : Generic IEEE 802.11 informatiom element (e.g., for WPA/RSN/WMM).
++ * This ioctl uses struct iw_point and data buffer that includes IE id and len
++ * fields. More than one IE may be included in the request. Setting the generic
++ * IE to empty buffer (len=0) removes the generic IE from the driver. Drivers
++ * are allowed to generate their own WPA/RSN IEs, but in these cases, drivers
++ * are required to report the used IE as a wireless event, e.g., when
++ * associating with an AP. */
++#define SIOCSIWGENIE 0x8B30 /* set generic IE */
++#define SIOCGIWGENIE 0x8B31 /* get generic IE */
++
++/* WPA : IEEE 802.11 MLME requests */
++#define SIOCSIWMLME 0x8B16 /* request MLME operation; uses
++ * struct iw_mlme */
++/* WPA : Authentication mode parameters */
++#define SIOCSIWAUTH 0x8B32 /* set authentication mode params */
++#define SIOCGIWAUTH 0x8B33 /* get authentication mode params */
++
++/* WPA : Extended version of encoding configuration */
++#define SIOCSIWENCODEEXT 0x8B34 /* set encoding token & mode */
++#define SIOCGIWENCODEEXT 0x8B35 /* get encoding token & mode */
++
++/* WPA2 : PMKSA cache management */
++#define SIOCSIWPMKSA 0x8B36 /* PMKSA cache operation */
++
+ /* -------------------- DEV PRIVATE IOCTL LIST -------------------- */
+
+ /* These 32 ioctl are wireless device private, for 16 commands.
+@@ -297,6 +336,34 @@
+ #define IWEVCUSTOM 0x8C02 /* Driver specific ascii string */
+ #define IWEVREGISTERED 0x8C03 /* Discovered a new node (AP mode) */
+ #define IWEVEXPIRED 0x8C04 /* Expired a node (AP mode) */
++#define IWEVGENIE 0x8C05 /* Generic IE (WPA, RSN, WMM, ..)
++ * (scan results); This includes id and
++ * length fields. One IWEVGENIE may
++ * contain more than one IE. Scan
++ * results may contain one or more
++ * IWEVGENIE events. */
++#define IWEVMICHAELMICFAILURE 0x8C06 /* Michael MIC failure
++ * (struct iw_michaelmicfailure)
++ */
++#define IWEVASSOCREQIE 0x8C07 /* IEs used in (Re)Association Request.
++ * The data includes id and length
++ * fields and may contain more than one
++ * IE. This event is required in
++ * Managed mode if the driver
++ * generates its own WPA/RSN IE. This
++ * should be sent just before
++ * IWEVREGISTERED event for the
++ * association. */
++#define IWEVASSOCRESPIE 0x8C08 /* IEs used in (Re)Association
++ * Response. The data includes id and
++ * length fields and may contain more
++ * than one IE. This may be sent
++ * between IWEVASSOCREQIE and
++ * IWEVREGISTERED events for the
++ * association. */
++#define IWEVPMKIDCAND 0x8C09 /* PMKID candidate for RSN
++ * pre-authentication
++ * (struct iw_pmkid_cand) */
+
+ #define IWEVFIRST 0x8C00
+
+@@ -432,12 +499,94 @@
+ #define IW_SCAN_THIS_MODE 0x0020 /* Scan only this Mode */
+ #define IW_SCAN_ALL_RATE 0x0040 /* Scan all Bit-Rates */
+ #define IW_SCAN_THIS_RATE 0x0080 /* Scan only this Bit-Rate */
++/* struct iw_scan_req scan_type */
++#define IW_SCAN_TYPE_ACTIVE 0
++#define IW_SCAN_TYPE_PASSIVE 1
+ /* Maximum size of returned data */
+ #define IW_SCAN_MAX_DATA 4096 /* In bytes */
+
+ /* Max number of char in custom event - use multiple of them if needed */
+ #define IW_CUSTOM_MAX 256 /* In bytes */
+
++/* Generic information element */
++#define IW_GENERIC_IE_MAX 1024
++
++/* MLME requests (SIOCSIWMLME / struct iw_mlme) */
++#define IW_MLME_DEAUTH 0
++#define IW_MLME_DISASSOC 1
++
++/* SIOCSIWAUTH/SIOCGIWAUTH struct iw_param flags */
++#define IW_AUTH_INDEX 0x0FFF
++#define IW_AUTH_FLAGS 0xF000
++/* SIOCSIWAUTH/SIOCGIWAUTH parameters (0 .. 4095)
++ * (IW_AUTH_INDEX mask in struct iw_param flags; this is the index of the
++ * parameter that is being set/get to; value will be read/written to
++ * struct iw_param value field) */
++#define IW_AUTH_WPA_VERSION 0
++#define IW_AUTH_CIPHER_PAIRWISE 1
++#define IW_AUTH_CIPHER_GROUP 2
++#define IW_AUTH_KEY_MGMT 3
++#define IW_AUTH_TKIP_COUNTERMEASURES 4
++#define IW_AUTH_DROP_UNENCRYPTED 5
++#define IW_AUTH_80211_AUTH_ALG 6
++#define IW_AUTH_WPA_ENABLED 7
++#define IW_AUTH_RX_UNENCRYPTED_EAPOL 8
++#define IW_AUTH_ROAMING_CONTROL 9
++#define IW_AUTH_PRIVACY_INVOKED 10
++
++/* IW_AUTH_WPA_VERSION values (bit field) */
++#define IW_AUTH_WPA_VERSION_DISABLED 0x00000001
++#define IW_AUTH_WPA_VERSION_WPA 0x00000002
++#define IW_AUTH_WPA_VERSION_WPA2 0x00000004
++
++/* IW_AUTH_PAIRWISE_CIPHER and IW_AUTH_GROUP_CIPHER values (bit field) */
++#define IW_AUTH_CIPHER_NONE 0x00000001
++#define IW_AUTH_CIPHER_WEP40 0x00000002
++#define IW_AUTH_CIPHER_TKIP 0x00000004
++#define IW_AUTH_CIPHER_CCMP 0x00000008
++#define IW_AUTH_CIPHER_WEP104 0x00000010
++
++/* IW_AUTH_KEY_MGMT values (bit field) */
++#define IW_AUTH_KEY_MGMT_802_1X 1
++#define IW_AUTH_KEY_MGMT_PSK 2
++
++/* IW_AUTH_80211_AUTH_ALG values (bit field) */
++#define IW_AUTH_ALG_OPEN_SYSTEM 0x00000001
++#define IW_AUTH_ALG_SHARED_KEY 0x00000002
++#define IW_AUTH_ALG_LEAP 0x00000004
++
++/* IW_AUTH_ROAMING_CONTROL values */
++#define IW_AUTH_ROAMING_ENABLE 0 /* driver/firmware based roaming */
++#define IW_AUTH_ROAMING_DISABLE 1 /* user space program used for roaming
++ * control */
++
++/* SIOCSIWENCODEEXT definitions */
++#define IW_ENCODE_SEQ_MAX_SIZE 8
++/* struct iw_encode_ext ->alg */
++#define IW_ENCODE_ALG_NONE 0
++#define IW_ENCODE_ALG_WEP 1
++#define IW_ENCODE_ALG_TKIP 2
++#define IW_ENCODE_ALG_CCMP 3
++/* struct iw_encode_ext ->ext_flags */
++#define IW_ENCODE_EXT_TX_SEQ_VALID 0x00000001
++#define IW_ENCODE_EXT_RX_SEQ_VALID 0x00000002
++#define IW_ENCODE_EXT_GROUP_KEY 0x00000004
++#define IW_ENCODE_EXT_SET_TX_KEY 0x00000008
++
++/* IWEVMICHAELMICFAILURE : struct iw_michaelmicfailure ->flags */
++#define IW_MICFAILURE_KEY_ID 0x00000003 /* Key ID 0..3 */
++#define IW_MICFAILURE_GROUP 0x00000004
++#define IW_MICFAILURE_PAIRWISE 0x00000008
++#define IW_MICFAILURE_STAKEY 0x00000010
++#define IW_MICFAILURE_COUNT 0x00000060 /* 1 or 2 (0 = count not supported)
++ */
++
++/* Bit field values for enc_capa in struct iw_range */
++#define IW_ENC_CAPA_WPA 0x00000001
++#define IW_ENC_CAPA_WPA2 0x00000002
++#define IW_ENC_CAPA_CIPHER_TKIP 0x00000004
++#define IW_ENC_CAPA_CIPHER_CCMP 0x00000008
++
+ /* Event capability macros - in (struct iw_range *)->event_capa
+ * Because we have more than 32 possible events, we use an array of
+ * 32 bit bitmasks. Note : 32 bits = 0x20 = 2^5. */
+@@ -546,6 +695,132 @@ struct iw_thrspy
+ struct iw_quality high; /* High threshold */
+ };
+
++/*
++ * Optional data for scan request
++ *
++ * Note: these optional parameters are controlling parameters for the
++ * scanning behavior, these do not apply to getting scan results
++ * (SIOCGIWSCAN). Drivers are expected to keep a local BSS table and
++ * provide a merged results with all BSSes even if the previous scan
++ * request limited scanning to a subset, e.g., by specifying an SSID.
++ * Especially, scan results are required to include an entry for the
++ * current BSS if the driver is in Managed mode and associated with an AP.
++ */
++struct iw_scan_req
++{
++ __u8 scan_type; /* IW_SCAN_TYPE_{ACTIVE,PASSIVE} */
++ __u8 essid_len;
++ __u8 num_channels; /* num entries in channel_list;
++ * 0 = scan all allowed channels */
++ __u8 flags; /* reserved as padding; use zero, this may
++ * be used in the future for adding flags
++ * to request different scan behavior */
++ struct sockaddr bssid; /* ff:ff:ff:ff:ff:ff for broadcast BSSID or
++ * individual address of a specific BSS */
++
++ /*
++ * Use this ESSID if IW_SCAN_THIS_ESSID flag is used instead of using
++ * the current ESSID. This allows scan requests for specific ESSID
++ * without having to change the current ESSID and potentially breaking
++ * the current association.
++ */
++ __u8 essid[IW_ESSID_MAX_SIZE];
++
++ /*
++ * Optional parameters for changing the default scanning behavior.
++ * These are based on the MLME-SCAN.request from IEEE Std 802.11.
++ * TU is 1.024 ms. If these are set to 0, driver is expected to use
++ * reasonable default values. min_channel_time defines the time that
++ * will be used to wait for the first reply on each channel. If no
++ * replies are received, next channel will be scanned after this. If
++ * replies are received, total time waited on the channel is defined by
++ * max_channel_time.
++ */
++ __u32 min_channel_time; /* in TU */
++ __u32 max_channel_time; /* in TU */
++
++ struct iw_freq channel_list[IW_MAX_FREQUENCIES];
++};
++
++/* ------------------------- WPA SUPPORT ------------------------- */
++
++/*
++ * Extended data structure for get/set encoding (this is used with
++ * SIOCSIWENCODEEXT/SIOCGIWENCODEEXT. struct iw_point and IW_ENCODE_*
++ * flags are used in the same way as with SIOCSIWENCODE/SIOCGIWENCODE and
++ * only the data contents changes (key data -> this structure, including
++ * key data).
++ *
++ * If the new key is the first group key, it will be set as the default
++ * TX key. Otherwise, default TX key index is only changed if
++ * IW_ENCODE_EXT_SET_TX_KEY flag is set.
++ *
++ * Key will be changed with SIOCSIWENCODEEXT in all cases except for
++ * special "change TX key index" operation which is indicated by setting
++ * key_len = 0 and ext_flags |= IW_ENCODE_EXT_SET_TX_KEY.
++ *
++ * tx_seq/rx_seq are only used when respective
++ * IW_ENCODE_EXT_{TX,RX}_SEQ_VALID flag is set in ext_flags. Normal
++ * TKIP/CCMP operation is to set RX seq with SIOCSIWENCODEEXT and start
++ * TX seq from zero whenever key is changed. SIOCGIWENCODEEXT is normally
++ * used only by an Authenticator (AP or an IBSS station) to get the
++ * current TX sequence number. Using TX_SEQ_VALID for SIOCSIWENCODEEXT and
++ * RX_SEQ_VALID for SIOCGIWENCODEEXT are optional, but can be useful for
++ * debugging/testing.
++ */
++struct iw_encode_ext
++{
++ __u32 ext_flags; /* IW_ENCODE_EXT_* */
++ __u8 tx_seq[IW_ENCODE_SEQ_MAX_SIZE]; /* LSB first */
++ __u8 rx_seq[IW_ENCODE_SEQ_MAX_SIZE]; /* LSB first */
++ struct sockaddr addr; /* ff:ff:ff:ff:ff:ff for broadcast/multicast
++ * (group) keys or unicast address for
++ * individual keys */
++ __u16 alg; /* IW_ENCODE_ALG_* */
++ __u16 key_len;
++ __u8 key[0];
++};
++
++/* SIOCSIWMLME data */
++struct iw_mlme
++{
++ __u16 cmd; /* IW_MLME_* */
++ __u16 reason_code;
++ struct sockaddr addr;
++};
++
++/* SIOCSIWPMKSA data */
++#define IW_PMKSA_ADD 1
++#define IW_PMKSA_REMOVE 2
++#define IW_PMKSA_FLUSH 3
++
++#define IW_PMKID_LEN 16
++
++struct iw_pmksa
++{
++ __u32 cmd; /* IW_PMKSA_* */
++ struct sockaddr bssid;
++ __u8 pmkid[IW_PMKID_LEN];
++};
++
++/* IWEVMICHAELMICFAILURE data */
++struct iw_michaelmicfailure
++{
++ __u32 flags;
++ struct sockaddr src_addr;
++ __u8 tsc[IW_ENCODE_SEQ_MAX_SIZE]; /* LSB first */
++};
++
++/* IWEVPMKIDCAND data */
++#define IW_PMKID_CAND_PREAUTH 0x00000001 /* RNS pre-authentication enabled */
++struct iw_pmkid_cand
++{
++ __u32 flags; /* IW_PMKID_CAND_* */
++ __u32 index; /* the smaller the index, the higher the
++ * priority */
++ struct sockaddr bssid;
++};
++
+ /* ------------------------ WIRELESS STATS ------------------------ */
+ /*
+ * Wireless statistics (used for /proc/net/wireless)
+@@ -725,6 +1000,8 @@ struct iw_range
+ struct iw_freq freq[IW_MAX_FREQUENCIES]; /* list */
+ /* Note : this frequency list doesn't need to fit channel numbers,
+ * because each entry contain its channel index */
++
++ __u32 enc_capa; /* IW_ENC_CAPA_* bit field */
+ };
+
+ /*
+diff -upr linux-2.6.11/net/core/wireless.c linux-2.6.11-WE18/net/core/wireless.c
+--- linux-2.6.11/net/core/wireless.c 2005-03-04 15:55:29.000000000 -0800
++++ linux-2.6.11-WE18/net/core/wireless.c 2005-03-12 09:11:24.000000000 -0800
+@@ -2,7 +2,7 @@
+ * This file implement the Wireless Extensions APIs.
+ *
+ * Authors : Jean Tourrilhes - HPL - <jt@hpl.hp.com>
+- * Copyright (c) 1997-2004 Jean Tourrilhes, All Rights Reserved.
++ * Copyright (c) 1997-2005 Jean Tourrilhes, All Rights Reserved.
+ *
+ * (As all part of the Linux kernel, this file is GPL)
+ */
+@@ -187,6 +187,12 @@ static const struct iw_ioctl_description
+ .header_type = IW_HEADER_TYPE_ADDR,
+ .flags = IW_DESCR_FLAG_DUMP,
+ },
++ [SIOCSIWMLME - SIOCIWFIRST] = {
++ .header_type = IW_HEADER_TYPE_POINT,
++ .token_size = 1,
++ .min_tokens = sizeof(struct iw_mlme),
++ .max_tokens = sizeof(struct iw_mlme),
++ },
+ [SIOCGIWAPLIST - SIOCIWFIRST] = {
+ .header_type = IW_HEADER_TYPE_POINT,
+ .token_size = sizeof(struct sockaddr) +
+@@ -195,7 +201,10 @@ static const struct iw_ioctl_description
+ .flags = IW_DESCR_FLAG_NOMAX,
+ },
+ [SIOCSIWSCAN - SIOCIWFIRST] = {
+- .header_type = IW_HEADER_TYPE_PARAM,
++ .header_type = IW_HEADER_TYPE_POINT,
++ .token_size = 1,
++ .min_tokens = 0,
++ .max_tokens = sizeof(struct iw_scan_req),
+ },
+ [SIOCGIWSCAN - SIOCIWFIRST] = {
+ .header_type = IW_HEADER_TYPE_POINT,
+@@ -273,6 +282,42 @@ static const struct iw_ioctl_description
+ [SIOCGIWPOWER - SIOCIWFIRST] = {
+ .header_type = IW_HEADER_TYPE_PARAM,
+ },
++ [SIOCSIWGENIE - SIOCIWFIRST] = {
++ .header_type = IW_HEADER_TYPE_POINT,
++ .token_size = 1,
++ .max_tokens = IW_GENERIC_IE_MAX,
++ },
++ [SIOCGIWGENIE - SIOCIWFIRST] = {
++ .header_type = IW_HEADER_TYPE_POINT,
++ .token_size = 1,
++ .max_tokens = IW_GENERIC_IE_MAX,
++ },
++ [SIOCSIWAUTH - SIOCIWFIRST] = {
++ .header_type = IW_HEADER_TYPE_PARAM,
++ },
++ [SIOCGIWAUTH - SIOCIWFIRST] = {
++ .header_type = IW_HEADER_TYPE_PARAM,
++ },
++ [SIOCSIWENCODEEXT - SIOCIWFIRST] = {
++ .header_type = IW_HEADER_TYPE_POINT,
++ .token_size = 1,
++ .min_tokens = sizeof(struct iw_encode_ext),
++ .max_tokens = sizeof(struct iw_encode_ext) +
++ IW_ENCODING_TOKEN_MAX,
++ },
++ [SIOCGIWENCODEEXT - SIOCIWFIRST] = {
++ .header_type = IW_HEADER_TYPE_POINT,
++ .token_size = 1,
++ .min_tokens = sizeof(struct iw_encode_ext),
++ .max_tokens = sizeof(struct iw_encode_ext) +
++ IW_ENCODING_TOKEN_MAX,
++ },
++ [SIOCSIWPMKSA - SIOCIWFIRST] = {
++ .header_type = IW_HEADER_TYPE_POINT,
++ .token_size = 1,
++ .min_tokens = sizeof(struct iw_pmksa),
++ .max_tokens = sizeof(struct iw_pmksa),
++ },
+ };
+ static const int standard_ioctl_num = (sizeof(standard_ioctl) /
+ sizeof(struct iw_ioctl_description));
+@@ -299,6 +344,31 @@ static const struct iw_ioctl_description
+ [IWEVEXPIRED - IWEVFIRST] = {
+ .header_type = IW_HEADER_TYPE_ADDR,
+ },
++ [IWEVGENIE - IWEVFIRST] = {
++ .header_type = IW_HEADER_TYPE_POINT,
++ .token_size = 1,
++ .max_tokens = IW_GENERIC_IE_MAX,
++ },
++ [IWEVMICHAELMICFAILURE - IWEVFIRST] = {
++ .header_type = IW_HEADER_TYPE_POINT,
++ .token_size = 1,
++ .max_tokens = sizeof(struct iw_michaelmicfailure),
++ },
++ [IWEVASSOCREQIE - IWEVFIRST] = {
++ .header_type = IW_HEADER_TYPE_POINT,
++ .token_size = 1,
++ .max_tokens = IW_GENERIC_IE_MAX,
++ },
++ [IWEVASSOCRESPIE - IWEVFIRST] = {
++ .header_type = IW_HEADER_TYPE_POINT,
++ .token_size = 1,
++ .max_tokens = IW_GENERIC_IE_MAX,
++ },
++ [IWEVPMKIDCAND - IWEVFIRST] = {
++ .header_type = IW_HEADER_TYPE_POINT,
++ .token_size = 1,
++ .max_tokens = sizeof(struct iw_pmkid_cand),
++ },
+ };
+ static const int standard_event_num = (sizeof(standard_event) /
+ sizeof(struct iw_ioctl_description));
--- /dev/null
+diff -ruN linux-2.6.12.orig/drivers/net/Kconfig linux-2.6.12/drivers/net/Kconfig
+--- linux-2.6.12.orig/drivers/net/Kconfig 2005-06-28 19:57:16.000000000 +0200
++++ linux-2.6.12/drivers/net/Kconfig 2005-06-28 20:07:01.000000000 +0200
+@@ -2417,6 +2417,32 @@
+ module; it is called bsd_comp and will show up in the directory
+ modules once you have said "make modules". If unsure, say N.
+
++config PPP_MPPE_MPPC
++ tristate "Microsoft PPP compression/encryption (MPPC/MPPE)"
++ depends on PPP
++ select CRYPTO_SHA1
++ select CRYPTO_ARC4
++ ---help---
++ Support for the Microsoft Point-To-Point Compression (RFC2118) and
++ Microsoft Point-To-Point Encryption (RFC3078). These protocols are
++ supported by Microsoft Windows and wide range of "hardware" access
++ servers. MPPE is common protocol in Virtual Private Networks. According
++ to RFC3078, MPPE supports 40, 56 and 128-bit key lengths. Depending on
++ PPP daemon configuration on both ends of the link, following scenarios
++ are possible:
++ - only compression (MPPC) is used,
++ - only encryption (MPPE) is used,
++ - compression and encryption (MPPC+MPPE) are used.
++
++ Please note that Hi/Fn (http://www.hifn.com) holds patent on MPPC so
++ you should check if this patent is valid in your country in order to
++ avoid legal problems.
++
++ For more information please visit http://free.polbox.pl/h/hs001
++
++ To compile this driver as a module, choose M here. The module will
++ be called ppp_mppe_mppc.ko.
++
+ config PPPOE
+ tristate "PPP over Ethernet (EXPERIMENTAL)"
+ depends on EXPERIMENTAL && PPP
+diff -ruN linux-2.6.12.orig/drivers/net/Makefile linux-2.6.12/drivers/net/Makefile
+--- linux-2.6.12.orig/drivers/net/Makefile 2005-06-28 19:57:16.000000000 +0200
++++ linux-2.6.12/drivers/net/Makefile 2005-06-28 20:07:01.000000000 +0200
+@@ -105,6 +105,7 @@
+ obj-$(CONFIG_PPP_SYNC_TTY) += ppp_synctty.o
+ obj-$(CONFIG_PPP_DEFLATE) += ppp_deflate.o
+ obj-$(CONFIG_PPP_BSDCOMP) += bsd_comp.o
++obj-$(CONFIG_PPP_MPPE_MPPC) += ppp_mppe_mppc.o
+ obj-$(CONFIG_PPPOE) += pppox.o pppoe.o
+
+ obj-$(CONFIG_SLIP) += slip.o
+diff -ruN linux-2.6.12.orig/drivers/net/ppp_generic.c linux-2.6.12/drivers/net/ppp_generic.c
+--- linux-2.6.12.orig/drivers/net/ppp_generic.c 2005-06-28 19:57:20.000000000 +0200
++++ linux-2.6.12/drivers/net/ppp_generic.c 2005-06-28 20:07:01.000000000 +0200
+@@ -19,7 +19,7 @@
+ * PPP driver, written by Michael Callahan and Al Longyear, and
+ * subsequently hacked by Paul Mackerras.
+ *
+- * ==FILEVERSION 20041108==
++ * ==FILEVERSION 20050110==
+ */
+
+ #include <linux/config.h>
+@@ -105,6 +105,7 @@
+ spinlock_t rlock; /* lock for receive side 58 */
+ spinlock_t wlock; /* lock for transmit side 5c */
+ int mru; /* max receive unit 60 */
++ int mru_alloc; /* MAX(1500,MRU) for dev_alloc_skb() */
+ unsigned int flags; /* control bits 64 */
+ unsigned int xstate; /* transmit state bits 68 */
+ unsigned int rstate; /* receive state bits 6c */
+@@ -632,7 +633,9 @@
+ case PPPIOCSMRU:
+ if (get_user(val, p))
+ break;
+- ppp->mru = val;
++ ppp->mru_alloc = ppp->mru = val;
++ if (ppp->mru_alloc < PPP_MRU)
++ ppp->mru_alloc = PPP_MRU; /* increase for broken peers */
+ err = 0;
+ break;
+
+@@ -1107,14 +1110,37 @@
+ case PPP_CCP:
+ /* peek at outbound CCP frames */
+ ppp_ccp_peek(ppp, skb, 0);
++ /*
++ * When LZS or MPPE/MPPC has been negotiated we don't send
++ * CCP_RESETACK after receiving CCP_RESETREQ; in fact pppd
++ * sends such a packet but we silently discard it here
++ */
++ if (CCP_CODE(skb->data+2) == CCP_RESETACK
++ && (ppp->xcomp->compress_proto == CI_MPPE
++ || ppp->xcomp->compress_proto == CI_LZS)) {
++ --ppp->stats.tx_packets;
++ ppp->stats.tx_bytes -= skb->len - 2;
++ kfree_skb(skb);
++ return;
++ }
+ break;
+ }
+
+ /* try to do packet compression */
+ if ((ppp->xstate & SC_COMP_RUN) && ppp->xc_state != 0
+ && proto != PPP_LCP && proto != PPP_CCP) {
+- new_skb = alloc_skb(ppp->dev->mtu + ppp->dev->hard_header_len,
+- GFP_ATOMIC);
++ int comp_ovhd = 0;
++ /*
++ * because of possible data expansion when MPPC or LZS
++ * is used, allocate compressor's buffer 12.5% bigger
++ * than MTU
++ */
++ if (ppp->xcomp->compress_proto == CI_MPPE)
++ comp_ovhd = ((ppp->dev->mtu * 9) / 8) + 1 + MPPE_OVHD;
++ else if (ppp->xcomp->compress_proto == CI_LZS)
++ comp_ovhd = ((ppp->dev->mtu * 9) / 8) + 1 + LZS_OVHD;
++ new_skb = alloc_skb(ppp->dev->mtu + ppp->dev->hard_header_len
++ + comp_ovhd, GFP_ATOMIC);
+ if (new_skb == 0) {
+ printk(KERN_ERR "PPP: no memory (comp pkt)\n");
+ goto drop;
+@@ -1132,9 +1158,21 @@
+ skb = new_skb;
+ skb_put(skb, len);
+ skb_pull(skb, 2); /* pull off A/C bytes */
+- } else {
++ } else if (len == 0) {
+ /* didn't compress, or CCP not up yet */
+ kfree_skb(new_skb);
++ } else {
++ /*
++ * (len < 0)
++ * MPPE requires that we do not send unencrypted
++ * frames. The compressor will return -1 if we
++ * should drop the frame. We cannot simply test
++ * the compress_proto because MPPE and MPPC share
++ * the same number.
++ */
++ printk(KERN_ERR "ppp: compressor dropped pkt\n");
++ kfree_skb(new_skb);
++ goto drop;
+ }
+ }
+
+@@ -1640,14 +1678,15 @@
+ goto err;
+
+ if (proto == PPP_COMP) {
+- ns = dev_alloc_skb(ppp->mru + PPP_HDRLEN);
++ ns = dev_alloc_skb(ppp->mru_alloc + PPP_HDRLEN);
+ if (ns == 0) {
+ printk(KERN_ERR "ppp_decompress_frame: no memory\n");
+ goto err;
+ }
+ /* the decompressor still expects the A/C bytes in the hdr */
+ len = ppp->rcomp->decompress(ppp->rc_state, skb->data - 2,
+- skb->len + 2, ns->data, ppp->mru + PPP_HDRLEN);
++ skb->len + 2, ns->data,
++ ppp->mru_alloc + PPP_HDRLEN);
+ if (len < 0) {
+ /* Pass the compressed frame to pppd as an
+ error indication. */
+@@ -1673,7 +1712,14 @@
+ return skb;
+
+ err:
+- ppp->rstate |= SC_DC_ERROR;
++ if (ppp->rcomp->compress_proto != CI_MPPE
++ && ppp->rcomp->compress_proto != CI_LZS) {
++ /*
++ * If decompression protocol isn't MPPE/MPPC or LZS, we set
++ * SC_DC_ERROR flag and wait for CCP_RESETACK
++ */
++ ppp->rstate |= SC_DC_ERROR;
++ }
+ ppp_receive_error(ppp);
+ return skb;
+ }
+@@ -2349,6 +2395,7 @@
+ memset(ppp, 0, sizeof(struct ppp));
+
+ ppp->mru = PPP_MRU;
++ ppp->mru_alloc = PPP_MRU;
+ init_ppp_file(&ppp->file, INTERFACE);
+ ppp->file.hdrlen = PPP_HDRLEN - 2; /* don't count proto bytes */
+ for (i = 0; i < NUM_NP; ++i)
+diff -ruN linux-2.6.12.orig/drivers/net/ppp_mppe_mppc.c linux-2.6.12/drivers/net/ppp_mppe_mppc.c
+--- linux-2.6.12.orig/drivers/net/ppp_mppe_mppc.c 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.12/drivers/net/ppp_mppe_mppc.c 2005-06-28 20:07:01.000000000 +0200
+@@ -0,0 +1,1299 @@
++/*
++ * ppp_mppe_mppc.c - MPPC/MPPE "compressor/decompressor" module.
++ *
++ * Copyright (c) 1994 Árpád Magosányi <mag@bunuel.tii.matav.hu>
++ * Copyright (c) 1999 Tim Hockin, Cobalt Networks Inc. <thockin@cobaltnet.com>
++ * Copyright (c) 2002-2004 Jan Dubiec <jdx@slackware.pl>
++ *
++ * Permission to use, copy, modify, and distribute this software and its
++ * documentation is hereby granted, provided that the above copyright
++ * notice appears in all copies. This software is provided without any
++ * warranty, express or implied.
++ *
++ * The code is based on MPPE kernel module written by Árpád Magosányi and
++ * Tim Hockin which can be found on http://planetmirror.com/pub/mppe/.
++ * I have added MPPC and 56 bit session keys support in MPPE.
++ *
++ * WARNING! Although this is open source code, its usage in some countries
++ * (in particular in the USA) may violate Stac Inc. patent for MPPC.
++ *
++ * ==FILEVERSION 20041123==
++ *
++ */
++
++#include <linux/init.h>
++#include <linux/module.h>
++#include <linux/mm.h>
++#include <linux/slab.h>
++#include <asm/scatterlist.h>
++#include <linux/vmalloc.h>
++#include <linux/crypto.h>
++
++#include <linux/ppp_defs.h>
++#include <linux/ppp-comp.h>
++
++/*
++ * State for a mppc/mppe "(de)compressor".
++ */
++struct ppp_mppe_state {
++ struct crypto_tfm *arc4_tfm;
++ struct crypto_tfm *sha1_tfm;
++ u8 *sha1_digest;
++ u8 master_key[MPPE_MAX_KEY_LEN];
++ u8 session_key[MPPE_MAX_KEY_LEN];
++ u8 mppc; /* do we use compression (MPPC)? */
++ u8 mppe; /* do we use encryption (MPPE)? */
++ u8 keylen; /* key length in bytes */
++ u8 bitkeylen; /* key length in bits */
++ u16 ccount; /* coherency counter */
++ u16 bits; /* MPPC/MPPE control bits */
++ u8 stateless; /* do we use stateless mode? */
++ u8 nextflushed; /* set A bit in the next outgoing packet;
++ used only by compressor*/
++ u8 flushexpected; /* drop packets until A bit is received;
++ used only by decompressor*/
++ u8 *hist; /* MPPC history */
++ u16 *hash; /* Hash table; used only by compressor */
++ u16 histptr; /* history "cursor" */
++ int unit;
++ int debug;
++ int mru;
++ struct compstat stats;
++};
++
++#define MPPE_HIST_LEN 8192 /* MPPC history size */
++#define MPPE_MAX_CCOUNT 0x0FFF /* max. coherency counter value */
++
++#define MPPE_BIT_FLUSHED 0x80 /* bit A */
++#define MPPE_BIT_RESET 0x40 /* bit B */
++#define MPPE_BIT_COMP 0x20 /* bit C */
++#define MPPE_BIT_ENCRYPTED 0x10 /* bit D */
++
++#define MPPE_SALT0 0xD1 /* values used in MPPE key derivation */
++#define MPPE_SALT1 0x26 /* according to RFC3079 */
++#define MPPE_SALT2 0x9E
++
++#define MPPE_CCOUNT(x) ((((x)[4] & 0x0f) << 8) + (x)[5])
++#define MPPE_BITS(x) ((x)[4] & 0xf0)
++#define MPPE_CTRLHI(x) ((((x)->ccount & 0xf00)>>8)|((x)->bits))
++#define MPPE_CTRLLO(x) ((x)->ccount & 0xff)
++
++/*
++ * Kernel Crypto API needs its arguments to be in kmalloc'd memory, not in the
++ * module static data area. That means sha_pad needs to be kmalloc'd. It is done
++ * in mppe_module_init(). This has been pointed out on 30th July 2004 by Oleg
++ * Makarenko on pptpclient-devel mailing list.
++ */
++#define SHA1_PAD_SIZE 40
++struct sha_pad {
++ unsigned char sha_pad1[SHA1_PAD_SIZE];
++ unsigned char sha_pad2[SHA1_PAD_SIZE];
++};
++static struct sha_pad *sha_pad;
++
++static inline void
++setup_sg(struct scatterlist *sg, const void *address, unsigned int length)
++{
++ sg[0].page = virt_to_page(address);
++ sg[0].offset = offset_in_page(address);
++ sg[0].length = length;
++}
++
++static inline void
++arc4_setkey(struct ppp_mppe_state *state, const unsigned char *key,
++ const unsigned int keylen)
++{
++ crypto_cipher_setkey(state->arc4_tfm, key, keylen);
++}
++
++static inline void
++arc4_encrypt(struct ppp_mppe_state *state, const unsigned char *in,
++ const unsigned int len, unsigned char *out)
++{
++ struct scatterlist sgin[4], sgout[4];
++
++ setup_sg(sgin, in, len);
++ setup_sg(sgout, out, len);
++ crypto_cipher_encrypt(state->arc4_tfm, sgout, sgin, len);
++}
++
++#define arc4_decrypt arc4_encrypt
++
++/*
++ * Key Derivation, from RFC 3078, RFC 3079.
++ * Equivalent to Get_Key() for MS-CHAP as described in RFC 3079.
++ */
++static void
++get_new_key_from_sha(struct ppp_mppe_state *state, unsigned char *interim_key)
++{
++ struct scatterlist sg[4];
++
++ setup_sg(&sg[0], state->master_key, state->keylen);
++ setup_sg(&sg[1], sha_pad->sha_pad1, sizeof(sha_pad->sha_pad1));
++ setup_sg(&sg[2], state->session_key, state->keylen);
++ setup_sg(&sg[3], sha_pad->sha_pad2, sizeof(sha_pad->sha_pad2));
++
++ crypto_digest_digest (state->sha1_tfm, sg, 4, state->sha1_digest);
++
++ memcpy(interim_key, state->sha1_digest, state->keylen);
++}
++
++static void
++mppe_change_key(struct ppp_mppe_state *state, int initialize)
++{
++ unsigned char interim_key[MPPE_MAX_KEY_LEN];
++
++ get_new_key_from_sha(state, interim_key);
++ if (initialize) {
++ memcpy(state->session_key, interim_key, state->keylen);
++ } else {
++ arc4_setkey(state, interim_key, state->keylen);
++ arc4_encrypt(state, interim_key, state->keylen, state->session_key);
++ }
++ if (state->keylen == 8) {
++ if (state->bitkeylen == 40) {
++ state->session_key[0] = MPPE_SALT0;
++ state->session_key[1] = MPPE_SALT1;
++ state->session_key[2] = MPPE_SALT2;
++ } else {
++ state->session_key[0] = MPPE_SALT0;
++ }
++ }
++ arc4_setkey(state, state->session_key, state->keylen);
++}
++
++/* increase 12-bit coherency counter */
++static inline void
++mppe_increase_ccount(struct ppp_mppe_state *state)
++{
++ state->ccount = (state->ccount + 1) & MPPE_MAX_CCOUNT;
++ if (state->mppe) {
++ if (state->stateless) {
++ mppe_change_key(state, 0);
++ state->nextflushed = 1;
++ } else {
++ if ((state->ccount & 0xff) == 0xff) {
++ mppe_change_key(state, 0);
++ }
++ }
++ }
++}
++
++/* allocate space for a MPPE/MPPC (de)compressor. */
++/* comp != 0 -> init compressor */
++/* comp = 0 -> init decompressor */
++static void *
++mppe_alloc(unsigned char *options, int opt_len, int comp)
++{
++ struct ppp_mppe_state *state;
++ unsigned int digestsize;
++ u8* fname;
++
++ fname = comp ? "mppe_comp_alloc" : "mppe_decomp_alloc";
++
++ /*
++ * Hack warning - additionally to the standard MPPC/MPPE configuration
++ * options, pppd passes to the (de)copressor 8 or 16 byte session key.
++ * Therefore options[1] contains MPPC/MPPE configuration option length
++ * (CILEN_MPPE = 6), but the real options length, depending on the key
++ * length, is 6+8 or 6+16.
++ */
++ if (opt_len < CILEN_MPPE) {
++ printk(KERN_WARNING "%s: wrong options length: %u\n", fname, opt_len);
++ return NULL;
++ }
++
++ if (options[0] != CI_MPPE || options[1] != CILEN_MPPE ||
++ (options[2] & ~MPPE_STATELESS) != 0 ||
++ options[3] != 0 || options[4] != 0 ||
++ (options[5] & ~(MPPE_128BIT|MPPE_56BIT|MPPE_40BIT|MPPE_MPPC)) != 0 ||
++ (options[5] & (MPPE_128BIT|MPPE_56BIT|MPPE_40BIT|MPPE_MPPC)) == 0) {
++ printk(KERN_WARNING "%s: options rejected: o[0]=%02x, o[1]=%02x, "
++ "o[2]=%02x, o[3]=%02x, o[4]=%02x, o[5]=%02x\n", fname, options[0],
++ options[1], options[2], options[3], options[4], options[5]);
++ return NULL;
++ }
++
++ state = (struct ppp_mppe_state *)kmalloc(sizeof(*state), GFP_KERNEL);
++ if (state == NULL) {
++ printk(KERN_ERR "%s: cannot allocate space for %scompressor\n", fname,
++ comp ? "" : "de");
++ return NULL;
++ }
++ memset(state, 0, sizeof(struct ppp_mppe_state));
++
++ state->mppc = options[5] & MPPE_MPPC; /* Do we use MPPC? */
++ state->mppe = options[5] & (MPPE_128BIT | MPPE_56BIT |
++ MPPE_40BIT); /* Do we use MPPE? */
++
++ if (state->mppc) {
++ /* allocate MPPC history */
++ state->hist = (u8*)vmalloc(2*MPPE_HIST_LEN*sizeof(u8));
++ if (state->hist == NULL) {
++ kfree(state);
++ printk(KERN_ERR "%s: cannot allocate space for MPPC history\n",
++ fname);
++ return NULL;
++ }
++
++ /* allocate hashtable for MPPC compressor */
++ if (comp) {
++ state->hash = (u16*)vmalloc(MPPE_HIST_LEN*sizeof(u16));
++ if (state->hash == NULL) {
++ vfree(state->hist);
++ kfree(state);
++ printk(KERN_ERR "%s: cannot allocate space for MPPC history\n",
++ fname);
++ return NULL;
++ }
++ }
++ }
++
++ if (state->mppe) { /* specific for MPPE */
++ /* Load ARC4 algorithm */
++ state->arc4_tfm = crypto_alloc_tfm("arc4", 0);
++ if (state->arc4_tfm == NULL) {
++ if (state->mppc) {
++ vfree(state->hash);
++ if (comp)
++ vfree(state->hist);
++ }
++ kfree(state);
++ printk(KERN_ERR "%s: cannot load ARC4 module\n", fname);
++ return NULL;
++ }
++
++ /* Load SHA1 algorithm */
++ state->sha1_tfm = crypto_alloc_tfm("sha1", 0);
++ if (state->sha1_tfm == NULL) {
++ crypto_free_tfm(state->arc4_tfm);
++ if (state->mppc) {
++ vfree(state->hash);
++ if (comp)
++ vfree(state->hist);
++ }
++ kfree(state);
++ printk(KERN_ERR "%s: cannot load SHA1 module\n", fname);
++ return NULL;
++ }
++
++ digestsize = crypto_tfm_alg_digestsize(state->sha1_tfm);
++ if (digestsize < MPPE_MAX_KEY_LEN) {
++ crypto_free_tfm(state->sha1_tfm);
++ crypto_free_tfm(state->arc4_tfm);
++ if (state->mppc) {
++ vfree(state->hash);
++ if (comp)
++ vfree(state->hist);
++ }
++ kfree(state);
++ printk(KERN_ERR "%s: CryptoAPI SHA1 digest size too small\n", fname);
++ }
++
++ state->sha1_digest = kmalloc(digestsize, GFP_KERNEL);
++ if (!state->sha1_digest) {
++ crypto_free_tfm(state->sha1_tfm);
++ crypto_free_tfm(state->arc4_tfm);
++ if (state->mppc) {
++ vfree(state->hash);
++ if (comp)
++ vfree(state->hist);
++ }
++ kfree(state);
++ printk(KERN_ERR "%s: cannot allocate space for SHA1 digest\n", fname);
++ }
++
++ memcpy(state->master_key, options+CILEN_MPPE, MPPE_MAX_KEY_LEN);
++ memcpy(state->session_key, state->master_key, MPPE_MAX_KEY_LEN);
++ /* initial key generation is done in mppe_init() */
++ }
++
++ return (void *) state;
++}
++
++static void *
++mppe_comp_alloc(unsigned char *options, int opt_len)
++{
++ return mppe_alloc(options, opt_len, 1);
++}
++
++static void *
++mppe_decomp_alloc(unsigned char *options, int opt_len)
++{
++ return mppe_alloc(options, opt_len, 0);
++}
++
++/* cleanup the (de)compressor */
++static void
++mppe_comp_free(void *arg)
++{
++ struct ppp_mppe_state *state = (struct ppp_mppe_state *) arg;
++
++ if (state != NULL) {
++ if (state->mppe) {
++ if (state->sha1_digest != NULL)
++ kfree(state->sha1_digest);
++ if (state->sha1_tfm != NULL)
++ crypto_free_tfm(state->sha1_tfm);
++ if (state->arc4_tfm != NULL)
++ crypto_free_tfm(state->arc4_tfm);
++ }
++ if (state->hist != NULL)
++ vfree(state->hist);
++ if (state->hash != NULL)
++ vfree(state->hash);
++ kfree(state);
++ }
++}
++
++/* init MPPC/MPPE (de)compresor */
++/* comp != 0 -> init compressor */
++/* comp = 0 -> init decompressor */
++static int
++mppe_init(void *arg, unsigned char *options, int opt_len, int unit,
++ int hdrlen, int mru, int debug, int comp)
++{
++ struct ppp_mppe_state *state = (struct ppp_mppe_state *) arg;
++ u8* fname;
++
++ fname = comp ? "mppe_comp_init" : "mppe_decomp_init";
++
++ if (opt_len < CILEN_MPPE) {
++ if (debug)
++ printk(KERN_WARNING "%s: wrong options length: %u\n",
++ fname, opt_len);
++ return 0;
++ }
++
++ if (options[0] != CI_MPPE || options[1] != CILEN_MPPE ||
++ (options[2] & ~MPPE_STATELESS) != 0 ||
++ options[3] != 0 || options[4] != 0 ||
++ (options[5] & ~(MPPE_56BIT|MPPE_128BIT|MPPE_40BIT|MPPE_MPPC)) != 0 ||
++ (options[5] & (MPPE_56BIT|MPPE_128BIT|MPPE_40BIT|MPPE_MPPC)) == 0) {
++ if (debug)
++ printk(KERN_WARNING "%s: options rejected: o[0]=%02x, o[1]=%02x, "
++ "o[2]=%02x, o[3]=%02x, o[4]=%02x, o[5]=%02x\n", fname,
++ options[0], options[1], options[2], options[3], options[4],
++ options[5]);
++ return 0;
++ }
++
++ if ((options[5] & ~MPPE_MPPC) != MPPE_128BIT &&
++ (options[5] & ~MPPE_MPPC) != MPPE_56BIT &&
++ (options[5] & ~MPPE_MPPC) != MPPE_40BIT &&
++ (options[5] & MPPE_MPPC) != MPPE_MPPC) {
++ if (debug)
++ printk(KERN_WARNING "%s: don't know what to do: o[5]=%02x\n",
++ fname, options[5]);
++ return 0;
++ }
++
++ state->mppc = options[5] & MPPE_MPPC; /* Do we use MPPC? */
++ state->mppe = options[5] & (MPPE_128BIT | MPPE_56BIT |
++ MPPE_40BIT); /* Do we use MPPE? */
++ state->stateless = options[2] & MPPE_STATELESS; /* Do we use stateless mode? */
++
++ switch (state->mppe) {
++ case MPPE_40BIT: /* 40 bit key */
++ state->keylen = 8;
++ state->bitkeylen = 40;
++ break;
++ case MPPE_56BIT: /* 56 bit key */
++ state->keylen = 8;
++ state->bitkeylen = 56;
++ break;
++ case MPPE_128BIT: /* 128 bit key */
++ state->keylen = 16;
++ state->bitkeylen = 128;
++ break;
++ default:
++ state->keylen = 0;
++ state->bitkeylen = 0;
++ }
++
++ state->ccount = MPPE_MAX_CCOUNT;
++ state->bits = 0;
++ state->unit = unit;
++ state->debug = debug;
++ state->histptr = MPPE_HIST_LEN;
++ if (state->mppc) { /* reset history if MPPC was negotiated */
++ memset(state->hist, 0, 2*MPPE_HIST_LEN*sizeof(u8));
++ }
++
++ if (state->mppe) { /* generate initial session keys */
++ mppe_change_key(state, 1);
++ }
++
++ if (comp) { /* specific for compressor */
++ state->nextflushed = 1;
++ } else { /* specific for decompressor */
++ state->mru = mru;
++ state->flushexpected = 1;
++ }
++
++ return 1;
++}
++
++static int
++mppe_comp_init(void *arg, unsigned char *options, int opt_len, int unit,
++ int hdrlen, int debug)
++{
++ return mppe_init(arg, options, opt_len, unit, hdrlen, 0, debug, 1);
++}
++
++
++static int
++mppe_decomp_init(void *arg, unsigned char *options, int opt_len, int unit,
++ int hdrlen, int mru, int debug)
++{
++ return mppe_init(arg, options, opt_len, unit, hdrlen, mru, debug, 0);
++}
++
++static void
++mppe_comp_reset(void *arg)
++{
++ struct ppp_mppe_state *state = (struct ppp_mppe_state *)arg;
++
++ if (state->debug)
++ printk(KERN_DEBUG "%s%d: resetting MPPC/MPPE compressor\n",
++ __FUNCTION__, state->unit);
++
++ state->nextflushed = 1;
++ if (state->mppe)
++ arc4_setkey(state, state->session_key, state->keylen);
++}
++
++static void
++mppe_decomp_reset(void *arg)
++{
++ /* When MPPC/MPPE is in use, we shouldn't receive any CCP Reset-Ack.
++ But when we receive such a packet, we just ignore it. */
++ return;
++}
++
++static void
++mppe_stats(void *arg, struct compstat *stats)
++{
++ struct ppp_mppe_state *state = (struct ppp_mppe_state *)arg;
++
++ *stats = state->stats;
++}
++
++/***************************/
++/**** Compression stuff ****/
++/***************************/
++/* inserts 1 to 8 bits into the output buffer */
++static inline void putbits8(u8 *buf, u32 val, const u32 n, u32 *i, u32 *l)
++{
++ buf += *i;
++ if (*l >= n) {
++ *l = (*l) - n;
++ val <<= *l;
++ *buf = *buf | (val & 0xff);
++ if (*l == 0) {
++ *l = 8;
++ (*i)++;
++ *(++buf) = 0;
++ }
++ } else {
++ (*i)++;
++ *l = 8 - n + (*l);
++ val <<= *l;
++ *buf = *buf | ((val >> 8) & 0xff);
++ *(++buf) = val & 0xff;
++ }
++}
++
++/* inserts 9 to 16 bits into the output buffer */
++static inline void putbits16(u8 *buf, u32 val, const u32 n, u32 *i, u32 *l)
++{
++ buf += *i;
++ if (*l >= n - 8) {
++ (*i)++;
++ *l = 8 - n + (*l);
++ val <<= *l;
++ *buf = *buf | ((val >> 8) & 0xff);
++ *(++buf) = val & 0xff;
++ if (*l == 0) {
++ *l = 8;
++ (*i)++;
++ *(++buf) = 0;
++ }
++ } else {
++ (*i)++; (*i)++;
++ *l = 16 - n + (*l);
++ val <<= *l;
++ *buf = *buf | ((val >> 16) & 0xff);
++ *(++buf) = (val >> 8) & 0xff;
++ *(++buf) = val & 0xff;
++ }
++}
++
++/* inserts 17 to 24 bits into the output buffer */
++static inline void putbits24(u8 *buf, u32 val, const u32 n, u32 *i, u32 *l)
++{
++ buf += *i;
++ if (*l >= n - 16) {
++ (*i)++; (*i)++;
++ *l = 16 - n + (*l);
++ val <<= *l;
++ *buf = *buf | ((val >> 16) & 0xff);
++ *(++buf) = (val >> 8) & 0xff;
++ *(++buf) = val & 0xff;
++ if (*l == 0) {
++ *l = 8;
++ (*i)++;
++ *(++buf) = 0;
++ }
++ } else {
++ (*i)++; (*i)++; (*i)++;
++ *l = 24 - n + (*l);
++ val <<= *l;
++ *buf = *buf | ((val >> 24) & 0xff);
++ *(++buf) = (val >> 16) & 0xff;
++ *(++buf) = (val >> 8) & 0xff;
++ *(++buf) = val & 0xff;
++ }
++}
++
++static int
++mppc_compress(struct ppp_mppe_state *state, unsigned char *ibuf,
++ unsigned char *obuf, int isize, int osize)
++{
++ u32 olen, off, len, idx, i, l;
++ u8 *hist, *sbuf, *p, *q, *r, *s;
++
++ /*
++ At this point, to avoid possible buffer overflow caused by packet
++ expansion during/after compression, we should make sure that
++ osize >= (((isize*9)/8)+1)+2, but we don't do that because in
++ ppp_generic.c we simply allocate bigger obuf.
++
++ Maximum MPPC packet expansion is 12.5%. This is the worst case when
++ all octets in the input buffer are >= 0x80 and we cannot find any
++ repeated tokens. Additionally we have to reserve 2 bytes for MPPE/MPPC
++ status bits and coherency counter.
++ */
++
++ hist = state->hist + MPPE_HIST_LEN;
++ /* check if there is enough room at the end of the history */
++ if (state->histptr + isize >= 2*MPPE_HIST_LEN) {
++ state->bits |= MPPE_BIT_RESET;
++ state->histptr = MPPE_HIST_LEN;
++ memcpy(state->hist, hist, MPPE_HIST_LEN);
++ }
++ /* add packet to the history; isize must be <= MPPE_HIST_LEN */
++ sbuf = state->hist + state->histptr;
++ memcpy(sbuf, ibuf, isize);
++ state->histptr += isize;
++
++ /* compress data */
++ r = sbuf + isize;
++ *obuf = olen = i = 0;
++ l = 8;
++ while (i < isize - 2) {
++ s = q = sbuf + i;
++ idx = ((40543*((((s[0]<<4)^s[1])<<4)^s[2]))>>4) & 0x1fff;
++ p = hist + state->hash[idx];
++ state->hash[idx] = (u16) (s - hist);
++ off = s - p;
++ if (off > MPPE_HIST_LEN - 1 || off < 1 || *p++ != *s++ || *p++ != *s++ ||
++ *p++ != *s++) {
++ /* no match found; encode literal byte */
++ if (ibuf[i] < 0x80) { /* literal byte < 0x80 */
++ putbits8(obuf, (u32) ibuf[i], 8, &olen, &l);
++ } else { /* literal byte >= 0x80 */
++ putbits16(obuf, (u32) (0x100|(ibuf[i]&0x7f)), 9, &olen, &l);
++ }
++ ++i;
++ continue;
++ }
++ if (r - q >= 64) {
++ *p++ != *s++ || *p++ != *s++ || *p++ != *s++ || *p++ != *s++ ||
++ *p++ != *s++ || *p++ != *s++ || *p++ != *s++ || *p++ != *s++ ||
++ *p++ != *s++ || *p++ != *s++ || *p++ != *s++ || *p++ != *s++ ||
++ *p++ != *s++ || *p++ != *s++ || *p++ != *s++ || *p++ != *s++ ||
++ *p++ != *s++ || *p++ != *s++ || *p++ != *s++ || *p++ != *s++ ||
++ *p++ != *s++ || *p++ != *s++ || *p++ != *s++ || *p++ != *s++ ||
++ *p++ != *s++ || *p++ != *s++ || *p++ != *s++ || *p++ != *s++ ||
++ *p++ != *s++ || *p++ != *s++ || *p++ != *s++ || *p++ != *s++ ||
++ *p++ != *s++ || *p++ != *s++ || *p++ != *s++ || *p++ != *s++ ||
++ *p++ != *s++ || *p++ != *s++ || *p++ != *s++ || *p++ != *s++ ||
++ *p++ != *s++ || *p++ != *s++ || *p++ != *s++ || *p++ != *s++ ||
++ *p++ != *s++ || *p++ != *s++ || *p++ != *s++ || *p++ != *s++ ||
++ *p++ != *s++ || *p++ != *s++ || *p++ != *s++ || *p++ != *s++ ||
++ *p++ != *s++ || *p++ != *s++ || *p++ != *s++ || *p++ != *s++ ||
++ *p++ != *s++ || *p++ != *s++ || *p++ != *s++ || *p++ != *s++ ||
++ *p++ != *s++;
++ if (s - q == 64) {
++ p--; s--;
++ while((*p++ == *s++) && (s < r) && (p < q));
++ }
++ } else {
++ while((*p++ == *s++) && (s < r) && (p < q));
++ }
++ len = s - q - 1;
++ i += len;
++
++ /* at least 3 character match found; code data */
++ /* encode offset */
++ if (off < 64) { /* 10-bit offset; 0 <= offset < 64 */
++ putbits16(obuf, 0x3c0|off, 10, &olen, &l);
++ } else if (off < 320) { /* 12-bit offset; 64 <= offset < 320 */
++ putbits16(obuf, 0xe00|(off-64), 12, &olen, &l);
++ } else if (off < 8192) { /* 16-bit offset; 320 <= offset < 8192 */
++ putbits16(obuf, 0xc000|(off-320), 16, &olen, &l);
++ } else {
++ /* This shouldn't happen; we return 0 what means "packet expands",
++ and we send packet uncompressed. */
++ if (state->debug)
++ printk(KERN_DEBUG "%s%d: wrong offset value: %d\n",
++ __FUNCTION__, state->unit, off);
++ return 0;
++ }
++ /* encode length of match */
++ if (len < 4) { /* length = 3 */
++ putbits8(obuf, 0, 1, &olen, &l);
++ } else if (len < 8) { /* 4 <= length < 8 */
++ putbits8(obuf, 0x08|(len&0x03), 4, &olen, &l);
++ } else if (len < 16) { /* 8 <= length < 16 */
++ putbits8(obuf, 0x30|(len&0x07), 6, &olen, &l);
++ } else if (len < 32) { /* 16 <= length < 32 */
++ putbits8(obuf, 0xe0|(len&0x0f), 8, &olen, &l);
++ } else if (len < 64) { /* 32 <= length < 64 */
++ putbits16(obuf, 0x3c0|(len&0x1f), 10, &olen, &l);
++ } else if (len < 128) { /* 64 <= length < 128 */
++ putbits16(obuf, 0xf80|(len&0x3f), 12, &olen, &l);
++ } else if (len < 256) { /* 128 <= length < 256 */
++ putbits16(obuf, 0x3f00|(len&0x7f), 14, &olen, &l);
++ } else if (len < 512) { /* 256 <= length < 512 */
++ putbits16(obuf, 0xfe00|(len&0xff), 16, &olen, &l);
++ } else if (len < 1024) { /* 512 <= length < 1024 */
++ putbits24(obuf, 0x3fc00|(len&0x1ff), 18, &olen, &l);
++ } else if (len < 2048) { /* 1024 <= length < 2048 */
++ putbits24(obuf, 0xff800|(len&0x3ff), 20, &olen, &l);
++ } else if (len < 4096) { /* 2048 <= length < 4096 */
++ putbits24(obuf, 0x3ff000|(len&0x7ff), 22, &olen, &l);
++ } else if (len < 8192) { /* 4096 <= length < 8192 */
++ putbits24(obuf, 0xffe000|(len&0xfff), 24, &olen, &l);
++ } else {
++ /* This shouldn't happen; we return 0 what means "packet expands",
++ and send packet uncompressed. */
++ if (state->debug)
++ printk(KERN_DEBUG "%s%d: wrong length of match value: %d\n",
++ __FUNCTION__, state->unit, len);
++ return 0;
++ }
++ }
++
++ /* Add remaining octets to the output */
++ while(isize - i > 0) {
++ if (ibuf[i] < 0x80) { /* literal byte < 0x80 */
++ putbits8(obuf, (u32) ibuf[i++], 8, &olen, &l);
++ } else { /* literal byte >= 0x80 */
++ putbits16(obuf, (u32) (0x100|(ibuf[i++]&0x7f)), 9, &olen, &l);
++ }
++ }
++ /* Reset unused bits of the last output octet */
++ if ((l != 0) && (l != 8)) {
++ putbits8(obuf, 0, l, &olen, &l);
++ }
++
++ return (int) olen;
++}
++
++int
++mppe_compress(void *arg, unsigned char *ibuf, unsigned char *obuf,
++ int isize, int osize)
++{
++ struct ppp_mppe_state *state = (struct ppp_mppe_state *) arg;
++ int proto, olen, complen, off;
++ unsigned char *wptr;
++
++ /* Check that the protocol is in the range we handle. */
++ proto = PPP_PROTOCOL(ibuf);
++ if (proto < 0x0021 || proto > 0x00fa)
++ return 0;
++
++ wptr = obuf;
++ /* Copy over the PPP header */
++ wptr[0] = PPP_ADDRESS(ibuf);
++ wptr[1] = PPP_CONTROL(ibuf);
++ wptr[2] = PPP_COMP >> 8;
++ wptr[3] = PPP_COMP;
++ wptr += PPP_HDRLEN + (MPPE_OVHD / 2); /* Leave two octets for MPPE/MPPC bits */
++
++ /*
++ * In ver. 0.99 protocol field was compressed. Deflate and BSD compress
++ * do PFC before actual compression, RCF2118 and RFC3078 are not precise
++ * on this topic so I decided to do PFC. Unfortunately this change caused
++ * incompatibility with older/other MPPE/MPPC modules. I have received
++ * a lot of complaints from unexperienced users so I have decided to revert
++ * to previous state, i.e. the protocol field is sent uncompressed now.
++ * Although this may be changed in the future.
++ *
++ * Receiving side (mppe_decompress()) still accepts packets with compressed
++ * and uncompressed protocol field so you shouldn't get "Unsupported protocol
++ * 0x2145 received" messages anymore.
++ */
++ //off = (proto > 0xff) ? 2 : 3; /* PFC - skip first protocol byte if 0 */
++ off = 2;
++
++ ibuf += off;
++
++ mppe_increase_ccount(state);
++
++ if (state->nextflushed) {
++ state->bits |= MPPE_BIT_FLUSHED;
++ state->nextflushed = 0;
++ if (state->mppe && !state->stateless) {
++ /*
++ * If this is the flag packet, the key has been already changed in
++ * mppe_increase_ccount() so we dont't do it once again.
++ */
++ if ((state->ccount & 0xff) != 0xff) {
++ arc4_setkey(state, state->session_key, state->keylen);
++ }
++ }
++ if (state->mppc) { /* reset history */
++ state->bits |= MPPE_BIT_RESET;
++ state->histptr = MPPE_HIST_LEN;
++ memset(state->hist + MPPE_HIST_LEN, 0, MPPE_HIST_LEN*sizeof(u8));
++ }
++ }
++
++ if (state->mppc && !state->mppe) { /* Do only compression */
++ complen = mppc_compress(state, ibuf, wptr, isize - off,
++ osize - PPP_HDRLEN - (MPPE_OVHD / 2));
++ /*
++ * TODO: Implement an heuristics to handle packet expansion in a smart
++ * way. Now, when a packet expands, we send it as uncompressed and
++ * when next packet is sent we have to reset compressor's history.
++ * Maybe it would be better to send such packet as compressed in order
++ * to keep history's continuity.
++ */
++ if ((complen > isize) || (complen > osize - PPP_HDRLEN) ||
++ (complen == 0)) {
++ /* packet expands */
++ state->nextflushed = 1;
++ memcpy(wptr, ibuf, isize - off);
++ olen = isize - (off - 2) + MPPE_OVHD;
++ (state->stats).inc_bytes += olen;
++ (state->stats).inc_packets++;
++ } else {
++ state->bits |= MPPE_BIT_COMP;
++ olen = complen + PPP_HDRLEN + (MPPE_OVHD / 2);
++ (state->stats).comp_bytes += olen;
++ (state->stats).comp_packets++;
++ }
++ } else { /* Do encryption with or without compression */
++ state->bits |= MPPE_BIT_ENCRYPTED;
++ if (!state->mppc && state->mppe) { /* Do only encryption */
++ /* read from ibuf, write to wptr, adjust for PPP_HDRLEN */
++ arc4_encrypt(state, ibuf, isize - off, wptr);
++ olen = isize - (off - 2) + MPPE_OVHD;
++ (state->stats).inc_bytes += olen;
++ (state->stats).inc_packets++;
++ } else { /* Do compression and then encryption - RFC3078 */
++ complen = mppc_compress(state, ibuf, wptr, isize - off,
++ osize - PPP_HDRLEN - (MPPE_OVHD / 2));
++ /*
++ * TODO: Implement an heuristics to handle packet expansion in a smart
++ * way. Now, when a packet expands, we send it as uncompressed and
++ * when next packet is sent we have to reset compressor's history.
++ * Maybe it would be good to send such packet as compressed in order
++ * to keep history's continuity.
++ */
++ if ((complen > isize) || (complen > osize - PPP_HDRLEN) ||
++ (complen == 0)) {
++ /* packet expands */
++ state->nextflushed = 1;
++ arc4_encrypt(state, ibuf, isize - off, wptr);
++ olen = isize - (off - 2) + MPPE_OVHD;
++ (state->stats).inc_bytes += olen;
++ (state->stats).inc_packets++;
++ } else {
++ state->bits |= MPPE_BIT_COMP;
++ /* Hack warning !!! RC4 implementation which we use does
++ encryption "in place" - it means that input and output
++ buffers can be *the same* memory area. Therefore we don't
++ need to use a temporary buffer. But be careful - other
++ implementations don't have to be so nice.
++ I used to use ibuf as temporary buffer here, but it led
++ packet sniffers into error. Thanks to Wilfried Weissmann
++ for pointing that. */
++ arc4_encrypt(state, wptr, complen, wptr);
++ olen = complen + PPP_HDRLEN + (MPPE_OVHD / 2);
++ (state->stats).comp_bytes += olen;
++ (state->stats).comp_packets++;
++ }
++ }
++ }
++
++ /* write status bits and coherency counter into the output buffer */
++ wptr = obuf + PPP_HDRLEN;
++ wptr[0] = MPPE_CTRLHI(state);
++ wptr[1] = MPPE_CTRLLO(state);
++
++ state->bits = 0;
++
++ (state->stats).unc_bytes += isize;
++ (state->stats).unc_packets++;
++
++ return olen;
++}
++
++/***************************/
++/*** Decompression stuff ***/
++/***************************/
++static inline u32 getbits(const u8 *buf, const u32 n, u32 *i, u32 *l)
++{
++ static const u32 m[] = {0x00, 0x01, 0x03, 0x07, 0x0f, 0x1f, 0x3f, 0x7f, 0xff};
++ u32 res, ol;
++
++ ol = *l;
++ if (*l >= n) {
++ *l = (*l) - n;
++ res = (buf[*i] & m[ol]) >> (*l);
++ if (*l == 0) {
++ *l = 8;
++ (*i)++;
++ }
++ } else {
++ *l = 8 - n + (*l);
++ res = (buf[(*i)++] & m[ol]) << 8;
++ res = (res | buf[*i]) >> (*l);
++ }
++
++ return res;
++}
++
++static inline u32 getbyte(const u8 *buf, const u32 i, const u32 l)
++{
++ if (l == 8) {
++ return buf[i];
++ } else {
++ return (((buf[i] << 8) | buf[i+1]) >> l) & 0xff;
++ }
++}
++
++static inline void lamecopy(u8 *dst, u8 *src, u32 len)
++{
++ while (len--)
++ *dst++ = *src++;
++}
++
++static int
++mppc_decompress(struct ppp_mppe_state *state, unsigned char *ibuf,
++ unsigned char *obuf, int isize, int osize)
++{
++ u32 olen, off, len, bits, val, sig, i, l;
++ u8 *history, *s;
++
++ history = state->hist + state->histptr;
++ olen = len = i = 0;
++ l = 8;
++ bits = isize * 8;
++ while (bits >= 8) {
++ val = getbyte(ibuf, i++, l);
++ if (val < 0x80) { /* literal byte < 0x80 */
++ if (state->histptr < 2*MPPE_HIST_LEN) {
++ /* copy uncompressed byte to the history */
++ (state->hist)[(state->histptr)++] = (u8) val;
++ } else {
++ /* buffer overflow; drop packet */
++ if (state->debug)
++ printk(KERN_ERR "%s%d: trying to write outside history "
++ "buffer\n", __FUNCTION__, state->unit);
++ return DECOMP_ERROR;
++ }
++ olen++;
++ bits -= 8;
++ continue;
++ }
++
++ sig = val & 0xc0;
++ if (sig == 0x80) { /* literal byte >= 0x80 */
++ if (state->histptr < 2*MPPE_HIST_LEN) {
++ /* copy uncompressed byte to the history */
++ (state->hist)[(state->histptr)++] =
++ (u8) (0x80|((val&0x3f)<<1)|getbits(ibuf, 1 , &i ,&l));
++ } else {
++ /* buffer overflow; drop packet */
++ if (state->debug)
++ printk(KERN_ERR "%s%d: trying to write outside history "
++ "buffer\n", __FUNCTION__, state->unit);
++ return DECOMP_ERROR;
++ }
++ olen++;
++ bits -= 9;
++ continue;
++ }
++
++ /* Not a literal byte so it must be an (offset,length) pair */
++ /* decode offset */
++ sig = val & 0xf0;
++ if (sig == 0xf0) { /* 10-bit offset; 0 <= offset < 64 */
++ off = (((val&0x0f)<<2)|getbits(ibuf, 2 , &i ,&l));
++ bits -= 10;
++ } else {
++ if (sig == 0xe0) { /* 12-bit offset; 64 <= offset < 320 */
++ off = ((((val&0x0f)<<4)|getbits(ibuf, 4 , &i ,&l))+64);
++ bits -= 12;
++ } else {
++ if ((sig&0xe0) == 0xc0) {/* 16-bit offset; 320 <= offset < 8192 */
++ off = ((((val&0x1f)<<8)|getbyte(ibuf, i++, l))+320);
++ bits -= 16;
++ if (off > MPPE_HIST_LEN - 1) {
++ if (state->debug)
++ printk(KERN_DEBUG "%s%d: too big offset value: %d\n",
++ __FUNCTION__, state->unit, off);
++ return DECOMP_ERROR;
++ }
++ } else { /* this shouldn't happen */
++ if (state->debug)
++ printk(KERN_DEBUG "%s%d: cannot decode offset value\n",
++ __FUNCTION__, state->unit);
++ return DECOMP_ERROR;
++ }
++ }
++ }
++ /* decode length of match */
++ val = getbyte(ibuf, i, l);
++ if ((val & 0x80) == 0x00) { /* len = 3 */
++ len = 3;
++ bits--;
++ getbits(ibuf, 1 , &i ,&l);
++ } else if ((val & 0xc0) == 0x80) { /* 4 <= len < 8 */
++ len = 0x04 | ((val>>4) & 0x03);
++ bits -= 4;
++ getbits(ibuf, 4 , &i ,&l);
++ } else if ((val & 0xe0) == 0xc0) { /* 8 <= len < 16 */
++ len = 0x08 | ((val>>2) & 0x07);
++ bits -= 6;
++ getbits(ibuf, 6 , &i ,&l);
++ } else if ((val & 0xf0) == 0xe0) { /* 16 <= len < 32 */
++ len = 0x10 | (val & 0x0f);
++ bits -= 8;
++ i++;
++ } else {
++ bits -= 8;
++ val = (val << 8) | getbyte(ibuf, ++i, l);
++ if ((val & 0xf800) == 0xf000) { /* 32 <= len < 64 */
++ len = 0x0020 | ((val >> 6) & 0x001f);
++ bits -= 2;
++ getbits(ibuf, 2 , &i ,&l);
++ } else if ((val & 0xfc00) == 0xf800) { /* 64 <= len < 128 */
++ len = 0x0040 | ((val >> 4) & 0x003f);
++ bits -= 4;
++ getbits(ibuf, 4 , &i ,&l);
++ } else if ((val & 0xfe00) == 0xfc00) { /* 128 <= len < 256 */
++ len = 0x0080 | ((val >> 2) & 0x007f);
++ bits -= 6;
++ getbits(ibuf, 6 , &i ,&l);
++ } else if ((val & 0xff00) == 0xfe00) { /* 256 <= len < 512 */
++ len = 0x0100 | (val & 0x00ff);
++ bits -= 8;
++ i++;
++ } else {
++ bits -= 8;
++ val = (val << 8) | getbyte(ibuf, ++i, l);
++ if ((val & 0xff8000) == 0xff0000) { /* 512 <= len < 1024 */
++ len = 0x000200 | ((val >> 6) & 0x0001ff);
++ bits -= 2;
++ getbits(ibuf, 2 , &i ,&l);
++ } else if ((val & 0xffc000) == 0xff8000) {/* 1024 <= len < 2048 */
++ len = 0x000400 | ((val >> 4) & 0x0003ff);
++ bits -= 4;
++ getbits(ibuf, 4 , &i ,&l);
++ } else if ((val & 0xffe000) == 0xffc000) {/* 2048 <= len < 4096 */
++ len = 0x000800 | ((val >> 2) & 0x0007ff);
++ bits -= 6;
++ getbits(ibuf, 6 , &i ,&l);
++ } else if ((val & 0xfff000) == 0xffe000) {/* 4096 <= len < 8192 */
++ len = 0x001000 | (val & 0x000fff);
++ bits -= 8;
++ i++;
++ } else { /* this shouldn't happen */
++ if (state->debug)
++ printk(KERN_DEBUG "%s%d: wrong length code: 0x%X\n",
++ __FUNCTION__, state->unit, val);
++ return DECOMP_ERROR;
++ }
++ }
++ }
++ s = state->hist + state->histptr;
++ state->histptr += len;
++ olen += len;
++ if (state->histptr < 2*MPPE_HIST_LEN) {
++ /* copy uncompressed bytes to the history */
++
++ /* In some cases len may be greater than off. It means that memory
++ * areas pointed by s and s-off overlap. I had used memmove() here
++ * because I thought that it acts as libc's version. Unfortunately,
++ * I was wrong. :-) I got strange errors sometimes. Wilfried suggested
++ * using of byte by byte copying here and strange errors disappeared.
++ */
++ lamecopy(s, s - off, len);
++ } else {
++ /* buffer overflow; drop packet */
++ if (state->debug)
++ printk(KERN_ERR "%s%d: trying to write outside history "
++ "buffer\n", __FUNCTION__, state->unit);
++ return DECOMP_ERROR;
++ }
++ }
++
++ /* Do PFC decompression */
++ len = olen;
++ if ((history[0] & 0x01) != 0) {
++ obuf[0] = 0;
++ obuf++;
++ len++;
++ }
++
++ if (len <= osize) {
++ /* copy uncompressed packet to the output buffer */
++ memcpy(obuf, history, olen);
++ } else {
++ /* buffer overflow; drop packet */
++ if (state->debug)
++ printk(KERN_ERR "%s%d: too big uncompressed packet: %d\n",
++ __FUNCTION__, state->unit, len + (PPP_HDRLEN / 2));
++ return DECOMP_ERROR;
++ }
++
++ return (int) len;
++}
++
++int
++mppe_decompress(void *arg, unsigned char *ibuf, int isize,
++ unsigned char *obuf, int osize)
++{
++ struct ppp_mppe_state *state = (struct ppp_mppe_state *)arg;
++ int seq, bits, uncomplen;
++
++ if (isize <= PPP_HDRLEN + MPPE_OVHD) {
++ if (state->debug) {
++ printk(KERN_DEBUG "%s%d: short packet (len=%d)\n", __FUNCTION__,
++ state->unit, isize);
++ }
++ return DECOMP_ERROR;
++ }
++
++ /* Get coherency counter and control bits from input buffer */
++ seq = MPPE_CCOUNT(ibuf);
++ bits = MPPE_BITS(ibuf);
++
++ if (state->stateless) {
++ /* RFC 3078, sec 8.1. */
++ mppe_increase_ccount(state);
++ if ((seq != state->ccount) && state->debug)
++ printk(KERN_DEBUG "%s%d: bad sequence number: %d, expected: %d\n",
++ __FUNCTION__, state->unit, seq, state->ccount);
++ while (seq != state->ccount)
++ mppe_increase_ccount(state);
++ } else {
++ /* RFC 3078, sec 8.2. */
++ if (state->flushexpected) { /* discard state */
++ if ((bits & MPPE_BIT_FLUSHED)) { /* we received expected FLUSH bit */
++ while (seq != state->ccount)
++ mppe_increase_ccount(state);
++ state->flushexpected = 0;
++ } else /* drop packet*/
++ return DECOMP_ERROR;
++ } else { /* normal state */
++ mppe_increase_ccount(state);
++ if (seq != state->ccount) {
++ /* Packet loss detected, enter the discard state. */
++ if (state->debug)
++ printk(KERN_DEBUG "%s%d: bad sequence number: %d, expected: %d\n",
++ __FUNCTION__, state->unit, seq, state->ccount);
++ state->flushexpected = 1;
++ return DECOMP_ERROR;
++ }
++ }
++ if (state->mppe && (bits & MPPE_BIT_FLUSHED)) {
++ arc4_setkey(state, state->session_key, state->keylen);
++ }
++ }
++
++ if (state->mppc && (bits & (MPPE_BIT_FLUSHED | MPPE_BIT_RESET))) {
++ state->histptr = MPPE_HIST_LEN;
++ if ((bits & MPPE_BIT_FLUSHED)) {
++ memset(state->hist + MPPE_HIST_LEN, 0, MPPE_HIST_LEN*sizeof(u8));
++ } else
++ if ((bits & MPPE_BIT_RESET)) {
++ memcpy(state->hist, state->hist + MPPE_HIST_LEN, MPPE_HIST_LEN);
++ }
++ }
++
++ /* Fill in the first part of the PPP header. The protocol field
++ comes from the decompressed data. */
++ obuf[0] = PPP_ADDRESS(ibuf);
++ obuf[1] = PPP_CONTROL(ibuf);
++ obuf += PPP_HDRLEN / 2;
++
++ if (state->mppe) { /* process encrypted packet */
++ if ((bits & MPPE_BIT_ENCRYPTED)) {
++ /* OK, packet encrypted, so decrypt it */
++ if (state->mppc && (bits & MPPE_BIT_COMP)) {
++ /* Hack warning !!! RC4 implementation which we use does
++ decryption "in place" - it means that input and output
++ buffers can be *the same* memory area. Therefore we don't
++ need to use a temporary buffer. But be careful - other
++ implementations don't have to be so nice. */
++ arc4_decrypt(state, ibuf + PPP_HDRLEN + (MPPE_OVHD / 2), isize -
++ PPP_HDRLEN - (MPPE_OVHD / 2), ibuf + PPP_HDRLEN +
++ (MPPE_OVHD / 2));
++ uncomplen = mppc_decompress(state, ibuf + PPP_HDRLEN +
++ (MPPE_OVHD / 2), obuf, isize -
++ PPP_HDRLEN - (MPPE_OVHD / 2),
++ osize - (PPP_HDRLEN / 2));
++ if (uncomplen == DECOMP_ERROR) {
++ state->flushexpected = 1;
++ return DECOMP_ERROR;
++ }
++ uncomplen += PPP_HDRLEN / 2;
++ (state->stats).comp_bytes += isize;
++ (state->stats).comp_packets++;
++ } else {
++ uncomplen = isize - MPPE_OVHD;
++ /* Decrypt the first byte in order to check if it is
++ compressed or uncompressed protocol field */
++ arc4_decrypt(state, ibuf + PPP_HDRLEN + (MPPE_OVHD / 2), 1, obuf);
++ /* Do PFC decompression */
++ if ((obuf[0] & 0x01) != 0) {
++ obuf[1] = obuf[0];
++ obuf[0] = 0;
++ obuf++;
++ uncomplen++;
++ }
++ /* And finally, decrypt the rest of the frame. */
++ arc4_decrypt(state, ibuf + PPP_HDRLEN + (MPPE_OVHD / 2) + 1,
++ isize - PPP_HDRLEN - (MPPE_OVHD / 2) - 1, obuf + 1);
++ (state->stats).inc_bytes += isize;
++ (state->stats).inc_packets++;
++ }
++ } else { /* this shouldn't happen */
++ if (state->debug)
++ printk(KERN_ERR "%s%d: encryption negotiated but not an "
++ "encrypted packet received\n", __FUNCTION__, state->unit);
++ mppe_change_key(state, 0);
++ state->flushexpected = 1;
++ return DECOMP_ERROR;
++ }
++ } else {
++ if (state->mppc) { /* no MPPE, only MPPC */
++ if ((bits & MPPE_BIT_COMP)) {
++ uncomplen = mppc_decompress(state, ibuf + PPP_HDRLEN +
++ (MPPE_OVHD / 2), obuf, isize -
++ PPP_HDRLEN - (MPPE_OVHD / 2),
++ osize - (PPP_HDRLEN / 2));
++ if (uncomplen == DECOMP_ERROR) {
++ state->flushexpected = 1;
++ return DECOMP_ERROR;
++ }
++ uncomplen += PPP_HDRLEN / 2;
++ (state->stats).comp_bytes += isize;
++ (state->stats).comp_packets++;
++ } else {
++ memcpy(obuf, ibuf + PPP_HDRLEN + (MPPE_OVHD / 2), isize -
++ PPP_HDRLEN - (MPPE_OVHD / 2));
++ uncomplen = isize - MPPE_OVHD;
++ (state->stats).inc_bytes += isize;
++ (state->stats).inc_packets++;
++ }
++ } else { /* this shouldn't happen */
++ if (state->debug)
++ printk(KERN_ERR "%s%d: error - not an MPPC or MPPE frame "
++ "received\n", __FUNCTION__, state->unit);
++ state->flushexpected = 1;
++ return DECOMP_ERROR;
++ }
++ }
++
++ (state->stats).unc_bytes += uncomplen;
++ (state->stats).unc_packets++;
++
++ return uncomplen;
++}
++
++
++/************************************************************
++ * Module interface table
++ ************************************************************/
++
++/* These are in ppp_generic.c */
++extern int ppp_register_compressor (struct compressor *cp);
++extern void ppp_unregister_compressor (struct compressor *cp);
++
++/*
++ * Functions exported to ppp_generic.c.
++ *
++ * In case of MPPC/MPPE there is no need to process incompressible data
++ * because such a data is sent in MPPC/MPPE frame. Therefore the (*incomp)
++ * callback function isn't needed.
++ */
++struct compressor ppp_mppe = {
++ .compress_proto = CI_MPPE,
++ .comp_alloc = mppe_comp_alloc,
++ .comp_free = mppe_comp_free,
++ .comp_init = mppe_comp_init,
++ .comp_reset = mppe_comp_reset,
++ .compress = mppe_compress,
++ .comp_stat = mppe_stats,
++ .decomp_alloc = mppe_decomp_alloc,
++ .decomp_free = mppe_comp_free,
++ .decomp_init = mppe_decomp_init,
++ .decomp_reset = mppe_decomp_reset,
++ .decompress = mppe_decompress,
++ .incomp = NULL,
++ .decomp_stat = mppe_stats,
++ .owner = THIS_MODULE
++};
++
++/************************************************************
++ * Module support routines
++ ************************************************************/
++
++int __init mppe_module_init(void)
++{
++ int answer;
++
++ if (!(crypto_alg_available("arc4", 0) && crypto_alg_available("sha1", 0))) {
++ printk(KERN_ERR "Kernel doesn't provide ARC4 and/or SHA1 algorithms "
++ "required by MPPE/MPPC. Check CryptoAPI configuration.\n");
++ return -ENODEV;
++ }
++
++ /* Allocate space for SHAPad1, SHAPad2 and ... */
++ sha_pad = kmalloc(sizeof(struct sha_pad), GFP_KERNEL);
++ if (sha_pad == NULL)
++ return -ENOMEM;
++ /* ... initialize them */
++ memset(sha_pad->sha_pad1, 0x00, sizeof(sha_pad->sha_pad1));
++ memset(sha_pad->sha_pad2, 0xf2, sizeof(sha_pad->sha_pad2));
++
++ answer = ppp_register_compressor(&ppp_mppe);
++ if (answer == 0) {
++ printk(KERN_INFO "MPPE/MPPC encryption/compression module registered\n");
++ }
++ return answer;
++}
++
++void __exit mppe_module_cleanup(void)
++{
++ kfree(sha_pad);
++ ppp_unregister_compressor(&ppp_mppe);
++ printk(KERN_INFO "MPPE/MPPC encryption/compression module unregistered\n");
++}
++
++module_init(mppe_module_init);
++module_exit(mppe_module_cleanup);
++
++MODULE_AUTHOR("Jan Dubiec <jdx@slackware.pl>");
++MODULE_DESCRIPTION("MPPE/MPPC encryption/compression module for Linux");
++MODULE_VERSION("1.2");
++MODULE_LICENSE("Dual BSD/GPL");
++MODULE_ALIAS("ppp-compress-" __stringify(CI_MPPE));
+diff -ruN linux-2.6.12.orig/include/linux/ppp-comp.h linux-2.6.12/include/linux/ppp-comp.h
+--- linux-2.6.12.orig/include/linux/ppp-comp.h 2004-12-24 22:33:47.000000000 +0100
++++ linux-2.6.12/include/linux/ppp-comp.h 2005-06-28 20:07:01.000000000 +0200
+@@ -28,7 +28,7 @@
+ */
+
+ /*
+- * ==FILEVERSION 980319==
++ * ==FILEVERSION 20040509==
+ *
+ * NOTE TO MAINTAINERS:
+ * If you modify this file at all, please set the above date.
+@@ -80,7 +80,7 @@
+
+ /* Compress a packet */
+ int (*compress) (void *state, unsigned char *rptr,
+- unsigned char *obuf, int isize, int osize);
++ unsigned char *obuf, int isize, int osize);
+
+ /* Return compression statistics */
+ void (*comp_stat) (void *state, struct compstat *stats);
+@@ -101,7 +101,7 @@
+
+ /* Decompress a packet. */
+ int (*decompress) (void *state, unsigned char *ibuf, int isize,
+- unsigned char *obuf, int osize);
++ unsigned char *obuf, int osize);
+
+ /* Update state for an incompressible packet received */
+ void (*incomp) (void *state, unsigned char *ibuf, int icnt);
+@@ -191,6 +191,42 @@
+ #define DEFLATE_CHK_SEQUENCE 0
+
+ /*
++ * Definitions for MPPE/MPPC.
++ */
++
++#define CI_MPPE 18 /* config option for MPPE */
++#define CILEN_MPPE 6 /* length of config option */
++
++#define MPPE_OVHD 4 /* MPPE overhead */
++#define MPPE_MAX_KEY_LEN 16 /* largest key length (128-bit) */
++
++#define MPPE_STATELESS 0x01 /* configuration bit H */
++#define MPPE_40BIT 0x20 /* configuration bit L */
++#define MPPE_56BIT 0x80 /* configuration bit M */
++#define MPPE_128BIT 0x40 /* configuration bit S */
++#define MPPE_MPPC 0x01 /* configuration bit C */
++
++/*
++ * Definitions for Stac LZS.
++ */
++
++#define CI_LZS 17 /* config option for Stac LZS */
++#define CILEN_LZS 5 /* length of config option */
++
++#define LZS_OVHD 4 /* max. LZS overhead */
++#define LZS_HIST_LEN 2048 /* LZS history size */
++#define LZS_MAX_CCOUNT 0x0FFF /* max. coherency counter value */
++
++#define LZS_MODE_NONE 0
++#define LZS_MODE_LCB 1
++#define LZS_MODE_CRC 2
++#define LZS_MODE_SEQ 3
++#define LZS_MODE_EXT 4
++
++#define LZS_EXT_BIT_FLUSHED 0x80 /* bit A */
++#define LZS_EXT_BIT_COMP 0x20 /* bit C */
++
++/*
+ * Definitions for other, as yet unsupported, compression methods.
+ */
+
--- /dev/null
+diff-tree 3e9e7c1d0b7a36fb8affb973a054c5098e27baa8 (from 90eb2665841d7b444602736e2141a01c948f75b1)\r
+Author: Matt Porter <mporter@kernel.crashing.org>\r
+Date: Mon Nov 7 00:58:15 2005 -0800\r
+\r
+ [PATCH] ppc32: cleanup AMCC PPC40x eval boards to support U-Boot\r
+ \r
+ Cleanup PPC40x eval boards (bubinga, walnut and sycamore) to support U-Boot\r
+ as bootloader. The OpenBIOS bd_info struct is not used in the kernel\r
+ anymore (only U-Boot now).\r
+ \r
+ uImage (U-Boot) tested on walnut, sycamore and bubinga\r
+ zImage (OpenBIOS) tested on sycamore, bubinga and ebony\r
+ \r
+ Signed-off-by: Stefan Roese <sr@denx.de>\r
+ Signed-off-by: Matt Porter <mporter@kernel.crashing.org>\r
+ Signed-off-by: Andrew Morton <akpm@osdl.org>\r
+ Signed-off-by: Linus Torvalds <torvalds@osdl.org>\r
+\r
+diff --git a/arch/ppc/boot/simple/Makefile b/arch/ppc/boot/simple/Makefile\r
+index ff0904e..82df88b 100644\r
+--- a/arch/ppc/boot/simple/Makefile\r
++++ b/arch/ppc/boot/simple/Makefile\r
+@@ -67,6 +67,12 @@ zimageinitrd-$(CONFIG_BAMBOO) := zImage\r
+ entrypoint-$(CONFIG_BAMBOO) := 0x01000000\r
+ extra.o-$(CONFIG_BAMBOO) := pibs.o\r
+ \r
++ zimage-$(CONFIG_BUBINGA) := zImage-TREE\r
++zimageinitrd-$(CONFIG_BUBINGA) := zImage.initrd-TREE\r
++ end-$(CONFIG_BUBINGA) := bubinga\r
++ entrypoint-$(CONFIG_BUBINGA) := 0x01000000\r
++ extra.o-$(CONFIG_BUBINGA) := openbios.o\r
++\r
+ zimage-$(CONFIG_EBONY) := zImage-TREE\r
+ zimageinitrd-$(CONFIG_EBONY) := zImage.initrd-TREE\r
+ end-$(CONFIG_EBONY) := ebony\r
+@@ -91,6 +97,18 @@ zimageinitrd-$(CONFIG_OCOTEA) := zImage\r
+ entrypoint-$(CONFIG_OCOTEA) := 0x01000000\r
+ extra.o-$(CONFIG_OCOTEA) := pibs.o\r
+ \r
++ zimage-$(CONFIG_SYCAMORE) := zImage-TREE\r
++zimageinitrd-$(CONFIG_SYCAMORE) := zImage.initrd-TREE\r
++ end-$(CONFIG_SYCAMORE) := sycamore\r
++ entrypoint-$(CONFIG_SYCAMORE) := 0x01000000\r
++ extra.o-$(CONFIG_SYCAMORE) := openbios.o\r
++\r
++ zimage-$(CONFIG_WALNUT) := zImage-TREE\r
++zimageinitrd-$(CONFIG_WALNUT) := zImage.initrd-TREE\r
++ end-$(CONFIG_WALNUT) := walnut\r
++ entrypoint-$(CONFIG_WALNUT) := 0x01000000\r
++ extra.o-$(CONFIG_WALNUT) := openbios.o\r
++\r
+ extra.o-$(CONFIG_EV64260) := misc-ev64260.o\r
+ end-$(CONFIG_EV64260) := ev64260\r
+ cacheflag-$(CONFIG_EV64260) := -include $(clear_L2_L3)\r
+@@ -168,7 +186,8 @@ OBJCOPY_ARGS := -O elf32-powerpc\r
+ \r
+ # head.o and relocate.o must be at the start.\r
+ boot-y := head.o relocate.o $(extra.o-y) $(misc-y)\r
+-boot-$(CONFIG_40x) += embed_config.o\r
++boot-$(CONFIG_REDWOOD_5) += embed_config.o\r
++boot-$(CONFIG_REDWOOD_6) += embed_config.o\r
+ boot-$(CONFIG_8xx) += embed_config.o\r
+ boot-$(CONFIG_8260) += embed_config.o\r
+ boot-$(CONFIG_BSEIP) += iic.o\r
+diff --git a/arch/ppc/boot/simple/misc.c b/arch/ppc/boot/simple/misc.c\r
+index e02de5b..f415d6c 100644\r
+--- a/arch/ppc/boot/simple/misc.c\r
++++ b/arch/ppc/boot/simple/misc.c\r
+@@ -23,7 +23,7 @@\r
+ #include <asm/page.h>\r
+ #include <asm/mmu.h>\r
+ #include <asm/bootinfo.h>\r
+-#ifdef CONFIG_44x\r
++#ifdef CONFIG_4xx\r
+ #include <asm/ibm4xx.h>\r
+ #endif\r
+ #include <asm/reg.h>\r
+@@ -88,6 +88,14 @@ get_mem_size(void)\r
+ return 0;\r
+ }\r
+ \r
++#if defined(CONFIG_40x)\r
++#define PPC4xx_EMAC0_MR0 EMAC0_BASE\r
++#endif\r
++\r
++#if defined(CONFIG_44x) && defined(PPC44x_EMAC0_MR0)\r
++#define PPC4xx_EMAC0_MR0 PPC44x_EMAC0_MR0\r
++#endif\r
++\r
+ struct bi_record *\r
+ decompress_kernel(unsigned long load_addr, int num_words, unsigned long cksum)\r
+ {\r
+@@ -103,13 +111,13 @@ decompress_kernel(unsigned long load_add\r
+ com_port = serial_init(0, NULL);\r
+ #endif\r
+ \r
+-#if defined(CONFIG_44x) && defined(PPC44x_EMAC0_MR0)\r
++#if defined(PPC4xx_EMAC0_MR0)\r
+ /* Reset MAL */\r
+ mtdcr(DCRN_MALCR(DCRN_MAL_BASE), MALCR_MMSR);\r
+ /* Wait for reset */\r
+ while (mfdcr(DCRN_MALCR(DCRN_MAL_BASE)) & MALCR_MMSR) {};\r
+ /* Reset EMAC */\r
+- *(volatile unsigned long *)PPC44x_EMAC0_MR0 = 0x20000000;\r
++ *(volatile unsigned long *)PPC4xx_EMAC0_MR0 = 0x20000000;\r
+ __asm__ __volatile__("eieio");\r
+ #endif\r
+ \r
+@@ -164,7 +172,9 @@ decompress_kernel(unsigned long load_add\r
+ puts(" "); puthex((unsigned long)(&__ramdisk_end));puts("\n");\r
+ }\r
+ \r
++#ifndef CONFIG_40x /* don't overwrite the 40x image located at 0x00400000! */\r
+ avail_ram = (char *)0x00400000;\r
++#endif\r
+ end_avail = (char *)0x00800000;\r
+ puts("avail ram: "); puthex((unsigned long)avail_ram); puts(" ");\r
+ puthex((unsigned long)end_avail); puts("\n");\r
+diff --git a/arch/ppc/boot/simple/openbios.c b/arch/ppc/boot/simple/openbios.c\r
+index c732b6d..81f11d8 100644\r
+--- a/arch/ppc/boot/simple/openbios.c\r
++++ b/arch/ppc/boot/simple/openbios.c\r
+@@ -1,19 +1,43 @@\r
+ /*\r
+ * arch/ppc/boot/simple/openbios.c\r
+ *\r
+- * 2005 (c) SYSGO AG - g.jaeger@sysgo.com\r
++ * Copyright (c) 2005 DENX Software Engineering\r
++ * Stefan Roese <sr@denx.de>\r
++ *\r
++ * Based on original work by\r
++ * 2005 (c) SYSGO AG - g.jaeger@sysgo.com\r
++ *\r
+ * This file is licensed under the terms of the GNU General Public\r
+ * License version 2. This program is licensed "as is" without\r
+ * any warranty of any kind, whether express or implied.\r
+ *\r
+- * Derived from arch/ppc/boot/simple/pibs.c (from MontaVista)\r
+ */\r
+ \r
+ #include <linux/types.h>\r
+ #include <linux/config.h>\r
+ #include <linux/string.h>\r
+ #include <asm/ppcboot.h>\r
+-#include <platforms/4xx/ebony.h>\r
++#include <asm/ibm4xx.h>\r
++#include <asm/reg.h>\r
++#ifdef CONFIG_40x\r
++#include <asm/io.h>\r
++#endif\r
++\r
++#if defined(CONFIG_BUBINGA)\r
++#define BOARD_INFO_VECTOR 0xFFF80B50 /* openbios 1.19 moved this vector down - armin */\r
++#else\r
++#define BOARD_INFO_VECTOR 0xFFFE0B50\r
++#endif\r
++\r
++#ifdef CONFIG_40x\r
++/* Supply a default Ethernet address for those eval boards that don't\r
++ * ship with one. This is an address from the MBX board I have, so\r
++ * it is unlikely you will find it on your network.\r
++ */\r
++static ushort def_enet_addr[] = { 0x0800, 0x3e26, 0x1559 };\r
++\r
++extern unsigned long timebase_period_ns;\r
++#endif /* CONFIG_40x */\r
+ \r
+ extern unsigned long decompress_kernel(unsigned long load_addr, int num_words,\r
+ unsigned long cksum);\r
+@@ -23,15 +47,85 @@ extern unsigned long decompress_kernel(u\r
+ bd_t hold_resid_buf __attribute__ ((__section__ (".data.boot")));\r
+ bd_t *hold_residual = &hold_resid_buf;\r
+ \r
++typedef struct openbios_board_info {\r
++ unsigned char bi_s_version[4]; /* Version of this structure */\r
++ unsigned char bi_r_version[30]; /* Version of the IBM ROM */\r
++ unsigned int bi_memsize; /* DRAM installed, in bytes */\r
++#ifdef CONFIG_405EP\r
++ unsigned char bi_enetaddr[2][6]; /* Local Ethernet MAC address */\r
++#else /* CONFIG_405EP */\r
++ unsigned char bi_enetaddr[6]; /* Local Ethernet MAC address */\r
++#endif /* CONFIG_405EP */\r
++ unsigned char bi_pci_enetaddr[6]; /* PCI Ethernet MAC address */\r
++ unsigned int bi_intfreq; /* Processor speed, in Hz */\r
++ unsigned int bi_busfreq; /* PLB Bus speed, in Hz */\r
++ unsigned int bi_pci_busfreq; /* PCI Bus speed, in Hz */\r
++#ifdef CONFIG_405EP\r
++ unsigned int bi_opb_busfreq; /* OPB Bus speed, in Hz */\r
++ unsigned int bi_pllouta_freq; /* PLL OUTA speed, in Hz */\r
++#endif /* CONFIG_405EP */\r
++} openbios_bd_t;\r
++\r
+ void *\r
+ load_kernel(unsigned long load_addr, int num_words, unsigned long cksum,\r
+ void *ign1, void *ign2)\r
+ {\r
+- decompress_kernel(load_addr, num_words, cksum);\r
++#ifdef CONFIG_40x\r
++ openbios_bd_t *openbios_bd = NULL;\r
++ openbios_bd_t *(*get_board_info)(void) =\r
++ (openbios_bd_t *(*)(void))(*(unsigned long *)BOARD_INFO_VECTOR);\r
++\r
++ /*\r
++ * On 40x platforms we not only need the MAC-addresses, but also the\r
++ * clocks and memsize. Now try to get all values using the OpenBIOS\r
++ * "get_board_info()" callback.\r
++ */\r
++ if ((openbios_bd = get_board_info()) != NULL) {\r
++ /*\r
++ * Copy bd_info from OpenBIOS struct into U-Boot struct\r
++ * used by kernel\r
++ */\r
++ hold_residual->bi_memsize = openbios_bd->bi_memsize;\r
++ hold_residual->bi_intfreq = openbios_bd->bi_intfreq;\r
++ hold_residual->bi_busfreq = openbios_bd->bi_busfreq;\r
++ hold_residual->bi_pci_busfreq = openbios_bd->bi_pci_busfreq;\r
++ memcpy(hold_residual->bi_pci_enetaddr, openbios_bd->bi_pci_enetaddr, 6);\r
++#ifdef CONFIG_405EP\r
++ memcpy(hold_residual->bi_enetaddr, openbios_bd->bi_enetaddr[0], 6);\r
++ memcpy(hold_residual->bi_enet1addr, openbios_bd->bi_enetaddr[1], 6);\r
++ hold_residual->bi_opbfreq = openbios_bd->bi_opb_busfreq;\r
++ hold_residual->bi_procfreq = openbios_bd->bi_pllouta_freq;\r
++#else /* CONFIG_405EP */\r
++ memcpy(hold_residual->bi_enetaddr, openbios_bd->bi_enetaddr, 6);\r
++#endif /* CONFIG_405EP */\r
++ } else {\r
++ /* Hmmm...better try to stuff some defaults.\r
++ */\r
++ hold_residual->bi_memsize = 16 * 1024 * 1024;\r
++ hold_residual->bi_intfreq = 200000000;\r
++ hold_residual->bi_busfreq = 100000000;\r
++ hold_residual->bi_pci_busfreq = 66666666;\r
++\r
++ /*\r
++ * Only supply one mac-address in this fallback\r
++ */\r
++ memcpy(hold_residual->bi_enetaddr, (void *)def_enet_addr, 6);\r
++#ifdef CONFIG_405EP\r
++ hold_residual->bi_opbfreq = 50000000;\r
++ hold_residual->bi_procfreq = 200000000;\r
++#endif /* CONFIG_405EP */\r
++ }\r
++\r
++ timebase_period_ns = 1000000000 / hold_residual->bi_intfreq;\r
++#endif /* CONFIG_40x */\r
+ \r
++#ifdef CONFIG_440GP\r
+ /* simply copy the MAC addresses */\r
+- memcpy(hold_residual->bi_enetaddr, (char *)EBONY_OPENBIOS_MAC_BASE, 6);\r
+- memcpy(hold_residual->bi_enet1addr, (char *)(EBONY_OPENBIOS_MAC_BASE+EBONY_OPENBIOS_MAC_OFFSET), 6);\r
++ memcpy(hold_residual->bi_enetaddr, (char *)OPENBIOS_MAC_BASE, 6);\r
++ memcpy(hold_residual->bi_enet1addr, (char *)(OPENBIOS_MAC_BASE+OPENBIOS_MAC_OFFSET), 6);\r
++#endif /* CONFIG_440GP */\r
++\r
++ decompress_kernel(load_addr, num_words, cksum);\r
+ \r
+ return (void *)hold_residual;\r
+ }\r
+diff --git a/arch/ppc/platforms/4xx/Kconfig b/arch/ppc/platforms/4xx/Kconfig\r
+index e70e4c6..d883791 100644\r
+--- a/arch/ppc/platforms/4xx/Kconfig\r
++++ b/arch/ppc/platforms/4xx/Kconfig\r
+@@ -225,7 +225,7 @@ config EMBEDDEDBOOT\r
+ \r
+ config IBM_OPENBIOS\r
+ bool\r
+- depends on ASH || BUBINGA || REDWOOD_5 || REDWOOD_6 || SYCAMORE || WALNUT\r
++ depends on ASH || REDWOOD_5 || REDWOOD_6\r
+ default y\r
+ \r
+ config PPC4xx_DMA\r
+diff --git a/arch/ppc/platforms/4xx/bubinga.c b/arch/ppc/platforms/4xx/bubinga.c\r
+index 3678abf..8110f55 100644\r
+--- a/arch/ppc/platforms/4xx/bubinga.c\r
++++ b/arch/ppc/platforms/4xx/bubinga.c\r
+@@ -89,7 +89,7 @@ bubinga_early_serial_map(void)\r
+ * by 16.\r
+ */\r
+ uart_div = (mfdcr(DCRN_CPC0_UCR_BASE) & DCRN_CPC0_UCR_U0DIV);\r
+- uart_clock = __res.bi_pllouta_freq / uart_div;\r
++ uart_clock = __res.bi_procfreq / uart_div;\r
+ \r
+ /* Setup serial port access */\r
+ memset(&port, 0, sizeof(port));\r
+diff --git a/arch/ppc/platforms/4xx/bubinga.h b/arch/ppc/platforms/4xx/bubinga.h\r
+index b1df856..b5380cf 100644\r
+--- a/arch/ppc/platforms/4xx/bubinga.h\r
++++ b/arch/ppc/platforms/4xx/bubinga.h\r
+@@ -1,52 +1,34 @@\r
+ /*\r
+- * Support for IBM PPC 405EP evaluation board (Bubinga).\r
++ * arch/ppc/platforms/4xx/bubinga.h\r
+ *\r
+- * Author: SAW (IBM), derived from walnut.h.\r
+- * Maintained by MontaVista Software <source@mvista.com>\r
++ * Bubinga board definitions\r
++ *\r
++ * Copyright (c) 2005 DENX Software Engineering\r
++ * Stefan Roese <sr@denx.de>\r
++ *\r
++ * Based on original work by\r
++ * SAW (IBM)\r
++ * 2003 (c) MontaVista Softare Inc.\r
++ *\r
++ * This program is free software; you can redistribute it and/or modify it\r
++ * under the terms of the GNU General Public License as published by the\r
++ * Free Software Foundation; either version 2 of the License, or (at your\r
++ * option) any later version.\r
+ *\r
+- * 2003 (c) MontaVista Softare Inc. This file is licensed under the\r
+- * terms of the GNU General Public License version 2. This program is\r
+- * licensed "as is" without any warranty of any kind, whether express\r
+- * or implied.\r
+ */\r
+ \r
+ #ifdef __KERNEL__\r
+ #ifndef __BUBINGA_H__\r
+ #define __BUBINGA_H__\r
+ \r
+-/* 405EP */\r
++#include <linux/config.h>\r
+ #include <platforms/4xx/ibm405ep.h>\r
+-\r
+-#ifndef __ASSEMBLY__\r
+-/*\r
+- * Data structure defining board information maintained by the boot\r
+- * ROM on IBM's evaluation board. An effort has been made to\r
+- * keep the field names consistent with the 8xx 'bd_t' board info\r
+- * structures.\r
+- */\r
+-\r
+-typedef struct board_info {\r
+- unsigned char bi_s_version[4]; /* Version of this structure */\r
+- unsigned char bi_r_version[30]; /* Version of the IBM ROM */\r
+- unsigned int bi_memsize; /* DRAM installed, in bytes */\r
+- unsigned char bi_enetaddr[2][6]; /* Local Ethernet MAC address */ unsigned char bi_pci_enetaddr[6]; /* PCI Ethernet MAC address */\r
+- unsigned int bi_intfreq; /* Processor speed, in Hz */\r
+- unsigned int bi_busfreq; /* PLB Bus speed, in Hz */\r
+- unsigned int bi_pci_busfreq; /* PCI Bus speed, in Hz */\r
+- unsigned int bi_opb_busfreq; /* OPB Bus speed, in Hz */\r
+- unsigned int bi_pllouta_freq; /* PLL OUTA speed, in Hz */\r
+-} bd_t;\r
+-\r
+-/* Some 4xx parts use a different timebase frequency from the internal clock.\r
+-*/\r
+-#define bi_tbfreq bi_intfreq\r
+-\r
++#include <asm/ppcboot.h>\r
+ \r
+ /* Memory map for the Bubinga board.\r
+ * Generic 4xx plus RTC.\r
+ */\r
+ \r
+-extern void *bubinga_rtc_base;\r
+ #define BUBINGA_RTC_PADDR ((uint)0xf0000000)\r
+ #define BUBINGA_RTC_VADDR BUBINGA_RTC_PADDR\r
+ #define BUBINGA_RTC_SIZE ((uint)8*1024)\r
+@@ -58,12 +40,18 @@ extern void *bubinga_rtc_base;\r
+ * for typical configurations at various CPU speeds.\r
+ * The base baud is calculated as (FWDA / EXT UART DIV / 16)\r
+ */\r
+-#define BASE_BAUD 0\r
++#define BASE_BAUD 0\r
+ \r
+-#define BUBINGA_FPGA_BASE 0xF0300000\r
++/* Flash */\r
++#define PPC40x_FPGA_BASE 0xF0300000\r
++#define PPC40x_FPGA_REG_OFFS 1 /* offset to flash map reg */\r
++#define PPC40x_FLASH_ONBD_N(x) (x & 0x02)\r
++#define PPC40x_FLASH_SRAM_SEL(x) (x & 0x01)\r
++#define PPC40x_FLASH_LOW 0xFFF00000\r
++#define PPC40x_FLASH_HIGH 0xFFF80000\r
++#define PPC40x_FLASH_SIZE 0x80000\r
+ \r
+-#define PPC4xx_MACHINE_NAME "IBM Bubinga"\r
++#define PPC4xx_MACHINE_NAME "IBM Bubinga"\r
+ \r
+-#endif /* !__ASSEMBLY__ */\r
+ #endif /* __BUBINGA_H__ */\r
+ #endif /* __KERNEL__ */\r
+diff --git a/arch/ppc/platforms/4xx/ebony.h b/arch/ppc/platforms/4xx/ebony.h\r
+index d08faa4..b91ad42 100644\r
+--- a/arch/ppc/platforms/4xx/ebony.h\r
++++ b/arch/ppc/platforms/4xx/ebony.h\r
+@@ -24,8 +24,8 @@\r
+ #define PPC44x_EMAC0_MR0 0xE0000800\r
+ \r
+ /* Where to find the MAC info */\r
+-#define EBONY_OPENBIOS_MAC_BASE 0xfffffe0c\r
+-#define EBONY_OPENBIOS_MAC_OFFSET 0x0c\r
++#define OPENBIOS_MAC_BASE 0xfffffe0c\r
++#define OPENBIOS_MAC_OFFSET 0x0c\r
+ \r
+ /* Default clock rates for Rev. B and Rev. C silicon */\r
+ #define EBONY_440GP_RB_SYSCLK 33000000\r
+diff --git a/arch/ppc/platforms/4xx/sycamore.c b/arch/ppc/platforms/4xx/sycamore.c\r
+index d8019ee..281b4a2 100644\r
+--- a/arch/ppc/platforms/4xx/sycamore.c\r
++++ b/arch/ppc/platforms/4xx/sycamore.c\r
+@@ -88,9 +88,6 @@ ppc405_map_irq(struct pci_dev *dev, unsi\r
+ void __init\r
+ sycamore_setup_arch(void)\r
+ {\r
+-#define SYCAMORE_PS2_BASE 0xF0100000\r
+-#define SYCAMORE_FPGA_BASE 0xF0300000\r
+-\r
+ void *fpga_brdc;\r
+ unsigned char fpga_brdc_data;\r
+ void *fpga_enable;\r
+@@ -100,7 +97,7 @@ sycamore_setup_arch(void)\r
+ \r
+ ppc4xx_setup_arch();\r
+ \r
+- ibm_ocp_set_emac(0, 1);\r
++ ibm_ocp_set_emac(0, 0);\r
+ \r
+ kb_data = ioremap(SYCAMORE_PS2_BASE, 8);\r
+ if (!kb_data) {\r
+@@ -111,7 +108,7 @@ sycamore_setup_arch(void)\r
+ \r
+ kb_cs = kb_data + 1;\r
+ \r
+- fpga_status = ioremap(SYCAMORE_FPGA_BASE, 8);\r
++ fpga_status = ioremap(PPC40x_FPGA_BASE, 8);\r
+ if (!fpga_status) {\r
+ printk(KERN_CRIT\r
+ "sycamore_setup_arch() fpga_status ioremap failed\n");\r
+diff --git a/arch/ppc/platforms/4xx/sycamore.h b/arch/ppc/platforms/4xx/sycamore.h\r
+index 3e7b4e2..1cd6c82 100644\r
+--- a/arch/ppc/platforms/4xx/sycamore.h\r
++++ b/arch/ppc/platforms/4xx/sycamore.h\r
+@@ -1,67 +1,52 @@\r
+ /*\r
+ * arch/ppc/platforms/4xx/sycamore.h\r
+ *\r
+- * Macros, definitions, and data structures specific to the IBM PowerPC\r
+- * 405GPr "Sycamore" evaluation board.\r
++ * Sycamore board definitions\r
+ *\r
+- * Author: Armin Kuster <akuster@mvista.com>\r
++ * Copyright (c) 2005 DENX Software Engineering\r
++ * Stefan Roese <sr@denx.de>\r
++ *\r
++ * Based on original work by\r
++ * Armin Kuster <akuster@mvista.com>\r
++ * 2000 (c) MontaVista, Software, Inc.\r
++ *\r
++ * This program is free software; you can redistribute it and/or modify it\r
++ * under the terms of the GNU General Public License as published by the\r
++ * Free Software Foundation; either version 2 of the License, or (at your\r
++ * option) any later version.\r
+ *\r
+- * 2000 (c) MontaVista, Software, Inc. This file is licensed under\r
+- * the terms of the GNU General Public License version 2. This program\r
+- * is licensed "as is" without any warranty of any kind, whether express\r
+- * or implied.\r
+ */\r
+ \r
+ #ifdef __KERNEL__\r
+ #ifndef __ASM_SYCAMORE_H__\r
+ #define __ASM_SYCAMORE_H__\r
+ \r
++#include <linux/config.h>\r
+ #include <platforms/4xx/ibm405gpr.h>\r
++#include <asm/ppcboot.h>\r
+ \r
+-#ifndef __ASSEMBLY__\r
+-/*\r
+- * Data structure defining board information maintained by the boot\r
+- * ROM on IBM's "Sycamore" evaluation board. An effort has been made to\r
+- * keep the field names consistent with the 8xx 'bd_t' board info\r
+- * structures.\r
+- */\r
+-\r
+-typedef struct board_info {\r
+- unsigned char bi_s_version[4]; /* Version of this structure */\r
+- unsigned char bi_r_version[30]; /* Version of the IBM ROM */\r
+- unsigned int bi_memsize; /* DRAM installed, in bytes */\r
+- unsigned char bi_enetaddr[6]; /* Local Ethernet MAC address */\r
+- unsigned char bi_pci_enetaddr[6]; /* PCI Ethernet MAC address */\r
+- unsigned int bi_intfreq; /* Processor speed, in Hz */\r
+- unsigned int bi_busfreq; /* PLB Bus speed, in Hz */\r
+- unsigned int bi_pci_busfreq; /* PCI Bus speed, in Hz */\r
+-} bd_t;\r
+-\r
+-/* Some 4xx parts use a different timebase frequency from the internal clock.\r
+-*/\r
+-#define bi_tbfreq bi_intfreq\r
+-\r
+-\r
+-/* Memory map for the IBM "Sycamore" 405GP evaluation board.\r
++/* Memory map for the IBM "Sycamore" 405GPr evaluation board.\r
+ * Generic 4xx plus RTC.\r
+ */\r
+ \r
+-extern void *sycamore_rtc_base;\r
+ #define SYCAMORE_RTC_PADDR ((uint)0xf0000000)\r
+ #define SYCAMORE_RTC_VADDR SYCAMORE_RTC_PADDR\r
+-#define SYCAMORE_RTC_SIZE ((uint)8*1024)\r
++#define SYCAMORE_RTC_SIZE ((uint)8*1024)\r
+ \r
+-#ifdef CONFIG_PPC405GP_INTERNAL_CLOCK\r
+-#define BASE_BAUD 201600\r
+-#else\r
+ #define BASE_BAUD 691200\r
+-#endif\r
+ \r
+-#define SYCAMORE_PS2_BASE 0xF0100000\r
+-#define SYCAMORE_FPGA_BASE 0xF0300000\r
++#define SYCAMORE_PS2_BASE 0xF0100000\r
++\r
++/* Flash */\r
++#define PPC40x_FPGA_BASE 0xF0300000\r
++#define PPC40x_FPGA_REG_OFFS 5 /* offset to flash map reg */\r
++#define PPC40x_FLASH_ONBD_N(x) (x & 0x02)\r
++#define PPC40x_FLASH_SRAM_SEL(x) (x & 0x01)\r
++#define PPC40x_FLASH_LOW 0xFFF00000\r
++#define PPC40x_FLASH_HIGH 0xFFF80000\r
++#define PPC40x_FLASH_SIZE 0x80000\r
+ \r
+ #define PPC4xx_MACHINE_NAME "IBM Sycamore"\r
+ \r
+-#endif /* !__ASSEMBLY__ */\r
+ #endif /* __ASM_SYCAMORE_H__ */\r
+ #endif /* __KERNEL__ */\r
+diff --git a/arch/ppc/platforms/4xx/walnut.c b/arch/ppc/platforms/4xx/walnut.c\r
+index a33eda4..74cb331 100644\r
+--- a/arch/ppc/platforms/4xx/walnut.c\r
++++ b/arch/ppc/platforms/4xx/walnut.c\r
+@@ -90,7 +90,7 @@ walnut_setup_arch(void)\r
+ \r
+ kb_cs = kb_data + 1;\r
+ \r
+- fpga_status = ioremap(WALNUT_FPGA_BASE, 8);\r
++ fpga_status = ioremap(PPC40x_FPGA_BASE, 8);\r
+ if (!fpga_status) {\r
+ printk(KERN_CRIT\r
+ "walnut_setup_arch() fpga_status ioremap failed\n");\r
+diff --git a/arch/ppc/platforms/4xx/walnut.h b/arch/ppc/platforms/4xx/walnut.h\r
+index 04cfbf3..dcf2691 100644\r
+--- a/arch/ppc/platforms/4xx/walnut.h\r
++++ b/arch/ppc/platforms/4xx/walnut.h\r
+@@ -1,72 +1,55 @@\r
+ /*\r
+ * arch/ppc/platforms/4xx/walnut.h\r
+ *\r
+- * Macros, definitions, and data structures specific to the IBM PowerPC\r
+- * 405GP "Walnut" evaluation board.\r
++ * Walnut board definitions\r
+ *\r
+- * Authors: Grant Erickson <grant@lcse.umn.edu>, Frank Rowand\r
+- * <frank_rowand@mvista.com>, Debbie Chu <debbie_chu@mvista.com> or\r
+- * source@mvista.com\r
++ * Copyright (c) 2005 DENX Software Engineering\r
++ * Stefan Roese <sr@denx.de>\r
+ *\r
+- * Copyright (c) 1999 Grant Erickson <grant@lcse.umn.edu>\r
++ * Based on original work by\r
++ * Copyright (c) 1999 Grant Erickson <grant@lcse.umn.edu>\r
++ * Frank Rowand <frank_rowand@mvista.com>\r
++ * Debbie Chu <debbie_chu@mvista.com>\r
++ * 2000 (c) MontaVista, Software, Inc.\r
++ *\r
++ * This program is free software; you can redistribute it and/or modify it\r
++ * under the terms of the GNU General Public License as published by the\r
++ * Free Software Foundation; either version 2 of the License, or (at your\r
++ * option) any later version.\r
+ *\r
+- * 2000 (c) MontaVista, Software, Inc. This file is licensed under\r
+- * the terms of the GNU General Public License version 2. This program\r
+- * is licensed "as is" without any warranty of any kind, whether express\r
+- * or implied.\r
+ */\r
+ \r
+ #ifdef __KERNEL__\r
+ #ifndef __ASM_WALNUT_H__\r
+ #define __ASM_WALNUT_H__\r
+ \r
+-/* We have a 405GP core */\r
++#include <linux/config.h>\r
+ #include <platforms/4xx/ibm405gp.h>\r
+-\r
+-#ifndef __ASSEMBLY__\r
+-/*\r
+- * Data structure defining board information maintained by the boot\r
+- * ROM on IBM's "Walnut" evaluation board. An effort has been made to\r
+- * keep the field names consistent with the 8xx 'bd_t' board info\r
+- * structures.\r
+- */\r
+-\r
+-typedef struct board_info {\r
+- unsigned char bi_s_version[4]; /* Version of this structure */\r
+- unsigned char bi_r_version[30]; /* Version of the IBM ROM */\r
+- unsigned int bi_memsize; /* DRAM installed, in bytes */\r
+- unsigned char bi_enetaddr[6]; /* Local Ethernet MAC address */\r
+- unsigned char bi_pci_enetaddr[6]; /* PCI Ethernet MAC address */\r
+- unsigned int bi_intfreq; /* Processor speed, in Hz */\r
+- unsigned int bi_busfreq; /* PLB Bus speed, in Hz */\r
+- unsigned int bi_pci_busfreq; /* PCI Bus speed, in Hz */\r
+-} bd_t;\r
+-\r
+-/* Some 4xx parts use a different timebase frequency from the internal clock.\r
+-*/\r
+-#define bi_tbfreq bi_intfreq\r
+-\r
++#include <asm/ppcboot.h>\r
+ \r
+ /* Memory map for the IBM "Walnut" 405GP evaluation board.\r
+ * Generic 4xx plus RTC.\r
+ */\r
+ \r
+-extern void *walnut_rtc_base;\r
+ #define WALNUT_RTC_PADDR ((uint)0xf0000000)\r
+ #define WALNUT_RTC_VADDR WALNUT_RTC_PADDR\r
+ #define WALNUT_RTC_SIZE ((uint)8*1024)\r
+ \r
+-#ifdef CONFIG_PPC405GP_INTERNAL_CLOCK\r
+-#define BASE_BAUD 201600\r
+-#else\r
+ #define BASE_BAUD 691200\r
+-#endif\r
+ \r
+ #define WALNUT_PS2_BASE 0xF0100000\r
+-#define WALNUT_FPGA_BASE 0xF0300000\r
++\r
++/* Flash */\r
++#define PPC40x_FPGA_BASE 0xF0300000\r
++#define PPC40x_FPGA_REG_OFFS 5 /* offset to flash map reg */\r
++#define PPC40x_FLASH_ONBD_N(x) (x & 0x02)\r
++#define PPC40x_FLASH_SRAM_SEL(x) (x & 0x01)\r
++#define PPC40x_FLASH_LOW 0xFFF00000\r
++#define PPC40x_FLASH_HIGH 0xFFF80000\r
++#define PPC40x_FLASH_SIZE 0x80000\r
++#define WALNUT_FPGA_BASE PPC40x_FPGA_BASE\r
+ \r
+ #define PPC4xx_MACHINE_NAME "IBM Walnut"\r
+ \r
+-#endif /* !__ASSEMBLY__ */\r
+ #endif /* __ASM_WALNUT_H__ */\r
+ #endif /* __KERNEL__ */\r
+diff --git a/include/asm-ppc/ibm_ocp.h b/include/asm-ppc/ibm_ocp.h\r
+index 6f10a25..9c21de1 100644\r
+--- a/include/asm-ppc/ibm_ocp.h\r
++++ b/include/asm-ppc/ibm_ocp.h\r
+@@ -131,9 +131,22 @@ static inline void ibm_ocp_set_emac(int \r
+ /* Copy MAC addresses to EMAC additions */\r
+ for (i=start; i<=end; i++) {\r
+ def = ocp_get_one_device(OCP_VENDOR_IBM, OCP_FUNC_EMAC, i);\r
+- memcpy(((struct ocp_func_emac_data *)def->additions)->mac_addr,\r
+- &__res.bi_enetaddr[i],\r
+- 6);\r
++ if (i == 0)\r
++ memcpy(((struct ocp_func_emac_data *)def->additions)->mac_addr,\r
++ __res.bi_enetaddr, 6);\r
++#if defined(CONFIG_405EP) || defined(CONFIG_44x)\r
++ else if (i == 1)\r
++ memcpy(((struct ocp_func_emac_data *)def->additions)->mac_addr,\r
++ __res.bi_enet1addr, 6);\r
++#endif\r
++#if defined(CONFIG_440GX)\r
++ else if (i == 2)\r
++ memcpy(((struct ocp_func_emac_data *)def->additions)->mac_addr,\r
++ __res.bi_enet2addr, 6);\r
++ else if (i == 3)\r
++ memcpy(((struct ocp_func_emac_data *)def->additions)->mac_addr,\r
++ __res.bi_enet3addr, 6);\r
++#endif\r
+ }\r
+ }\r
+ #endif\r
+diff --git a/include/asm-ppc/ppcboot.h b/include/asm-ppc/ppcboot.h\r
+index fe24e45..6b7b63f 100644\r
+--- a/include/asm-ppc/ppcboot.h\r
++++ b/include/asm-ppc/ppcboot.h\r
+@@ -73,8 +73,8 @@ typedef struct bd_info {\r
+ #if defined(CONFIG_HYMOD)\r
+ hymod_conf_t bi_hymod_conf; /* hymod configuration information */\r
+ #endif\r
+-#if defined(CONFIG_EVB64260) || defined(CONFIG_44x) || defined(CONFIG_85xx) ||\\r
+- defined(CONFIG_83xx)\r
++#if defined(CONFIG_EVB64260) || defined(CONFIG_405EP) || defined(CONFIG_44x) || \\r
++ defined(CONFIG_85xx) || defined(CONFIG_83xx)\r
+ /* second onboard ethernet port */\r
+ unsigned char bi_enet1addr[6];\r
+ #endif\r
+@@ -96,5 +96,7 @@ typedef struct bd_info {\r
+ #endif\r
+ } bd_t;\r
+ \r
++#define bi_tbfreq bi_intfreq\r
++\r
+ #endif /* __ASSEMBLY__ */\r
+ #endif /* __ASM_PPCBOOT_H__ */\r
--- /dev/null
+SECTION = "kernel"
+DESCRIPTION = "Linux kernel for DHT-Walnut (ppc) machine"
+LICENSE = "GPL"
+PR = "r1"
+DEPENDS = "u-boot"
+
+KERNEL_CCSUFFIX = "-3.4.4"
+
+SRC_URI = "ftp://ftp.kernel.org/pub/linux/kernel/v2.6/linux-${PV}.tar.bz2 \
+ file://ppc_40x_uboot.patch;patch=1 \
+ file://iw_we18-5.diff;patch=1 \
+ file://linux-2.6.12-mppe-mppc-1.3.patch;patch=1 \
+ file://dht-walnut_defconfig"
+
+
+S = "${WORKDIR}/linux-${PV}"
+
+inherit kernel
+
+
+FILES_kernel-image = "/boot/zImage.elf"
+
+export OS = "Linux"
+ARCH = "ppc"
+KERNEL_IMAGETYPE = "zImage"
+KERNEL_OUTPUT = "arch/ppc/boot/images/zImage.elf"
+
+
+
+
+do_configure_prepend() {
+ install -m 0644 ${WORKDIR}/dht-walnut_defconfig ${S}/.config
+}
+
+do_stage_append () {
+#need ppc platforms includes + friends in order for external kernel modules to compile
+
+ install -d ${STAGING_KERNEL_DIR}/arch/ppc/platforms
+ install -m 0755 arch/ppc/platforms/*.h ${STAGING_KERNEL_DIR}/arch/ppc/platforms
+
+ install -d ${STAGING_KERNEL_DIR}/arch/ppc/platforms/4xx
+ install -m 0755 arch/ppc/platforms/4xx/*.h ${STAGING_KERNEL_DIR}/arch/ppc/platforms/4xx
+
+ install -d ${STAGING_KERNEL_DIR}/arch/ppc/platforms/83xx
+ install -m 0755 arch/ppc/platforms/83xx/*.h ${STAGING_KERNEL_DIR}/arch/ppc/platforms/83xx
+
+ install -d ${STAGING_KERNEL_DIR}/arch/ppc/platforms/85xx
+ install -m 0755 arch/ppc/platforms/85xx/*.h ${STAGING_KERNEL_DIR}/arch/ppc/platforms/85xx
+
+ install -d ${STAGING_KERNEL_DIR}/include/asm-m68k
+ install -m 0755 include/asm-m68k/*.h ${STAGING_KERNEL_DIR}/include/asm-m68k
+}
+
+do_install_append () {
+ install -d ${DEPLOY_DIR}/images
+ install -m 0755 arch/ppc/boot/images/zImage.elf ${DEPLOY_DIR}/images/${KERNEL_IMAGETYPE}-${PV}-${MACHINE}-${DATETIME}.elf
+ install -m 0755 vmlinux ${DEPLOY_DIR}/images/
+ powerpc-linux-uclibc-objcopy -O binary -R .note -R .comment -S ${DEPLOY_DIR}/images/vmlinux ${DEPLOY_DIR}/images/linux.bin
+ gzip -f -9 ${DEPLOY_DIR}/images/linux.bin
+ mkimage -A ppc -O linux -T kernel -C gzip -a 0 -e 0 -n "owmnr"+${PV}+"-ppc" -d ${DEPLOY_DIR}/images/linux.bin.gz ${DEPLOY_DIR}/images/uImage-${PV}-${MACHINE}-${DATETIME}.bin
+ rm ${DEPLOY_DIR}/images/vmlinux
+ rm ${DEPLOY_DIR}/images/linux.bin.gz
+
+
+}
+
+pkg_postinst_kernel () {
+ true
+}
+
+pkg_postrm_kernel () {
+ true
+}
+
--- /dev/null
+SECTION = "kernel"
+DESCRIPTION = "Linux kernel for DHT-Walnut (ppc) machine"
+LICENSE = "GPL"
+PR = "r0"
+DEPENDS = "u-boot"
+
+KERNEL_CCSUFFIX = "-3.4.4"
+
+SRC_URI = "ftp://ftp.kernel.org/pub/linux/kernel/v2.6/linux-${PV}.tar.bz2 \
+ file://ppc_40x_uboot.patch;patch=1 \
+ file://iw_we18-5.diff;patch=1 \
+ file://linux-2.6.12-mppe-mppc-1.3.patch;patch=1 \
+ file://dht-walnut_defconfig"
+
+
+S = "${WORKDIR}/linux-${PV}"
+
+inherit kernel
+
+
+FILES_kernel-image = "/boot/zImage.elf"
+
+export OS = "Linux"
+ARCH = "ppc"
+KERNEL_IMAGETYPE = "zImage"
+KERNEL_OUTPUT = "arch/ppc/boot/images/zImage.elf"
+
+
+
+
+do_configure_prepend() {
+ install -m 0644 ${WORKDIR}/dht-walnut_defconfig ${S}/.config
+# oe_machinstall -m 0644 ${S}/arch/ppc/configs/dht-walnut_defconfig ${S}/.config || die "no default configuration for ${MACHINE} available."
+# oe_runmake oldconfig
+}
+
+do_stage_append () {
+#need ppc platforms includes + friends in order for external kernel modules to compile
+
+ install -d ${STAGING_KERNEL_DIR}/arch/ppc/platforms
+ install -m 0755 arch/ppc/platforms/*.h ${STAGING_KERNEL_DIR}/arch/ppc/platforms
+
+ install -d ${STAGING_KERNEL_DIR}/arch/ppc/platforms/4xx
+ install -m 0755 arch/ppc/platforms/4xx/*.h ${STAGING_KERNEL_DIR}/arch/ppc/platforms/4xx
+
+ install -d ${STAGING_KERNEL_DIR}/arch/ppc/platforms/83xx
+ install -m 0755 arch/ppc/platforms/83xx/*.h ${STAGING_KERNEL_DIR}/arch/ppc/platforms/83xx
+
+ install -d ${STAGING_KERNEL_DIR}/arch/ppc/platforms/85xx
+ install -m 0755 arch/ppc/platforms/85xx/*.h ${STAGING_KERNEL_DIR}/arch/ppc/platforms/85xx
+
+ install -d ${STAGING_KERNEL_DIR}/include/asm-m68k
+ install -m 0755 include/asm-m68k/*.h ${STAGING_KERNEL_DIR}/include/asm-m68k
+}
+
+do_install_append () {
+ install -d ${DEPLOY_DIR}/images
+ install -m 0755 arch/ppc/boot/images/zImage.elf ${DEPLOY_DIR}/images/${KERNEL_IMAGETYPE}-${PV}-${MACHINE}-${DATETIME}.elf
+ install -m 0755 vmlinux ${DEPLOY_DIR}/images/
+ powerpc-linux-uclibc-objcopy -O binary -R .note -R .comment -S ${DEPLOY_DIR}/images/vmlinux ${DEPLOY_DIR}/images/linux.bin
+ gzip -f -9 ${DEPLOY_DIR}/images/linux.bin
+ mkimage -A ppc -O linux -T kernel -C gzip -a 0 -e 0 -n "owmnr-2.6.12-ppc" -d ${DEPLOY_DIR}/images/linux.bin.gz ${DEPLOY_DIR}/images/uImage-${PV}-${MACHINE}-${DATETIME}.bin
+ rm ${DEPLOY_DIR}/images/vmlinux
+ rm ${DEPLOY_DIR}/images/linux.bin.gz
+
+
+}
+
+pkg_postinst_kernel () {
+ true
+}
+
+pkg_postrm_kernel () {
+ true
+}
+
+
+
+
+#do_configure_prepend() {
+# install -m 0644 ${WORKDIR}/dht-walnut_defconfig ${S}/.config
+#}
+
+
+#do_deploy() {
+# install -d ${DEPLOY_DIR}/images
+# install -m 0644 arch/${ARCH}/boot/images/zImage.elf ${DEPLOY_DIR}/images/${KERNEL_IMAGETYPE}-${PV}-${MACHINE}-${DATETIME}.bin}
+
+#do_deploy[dirs] = "${S}"
+
+#addtask deploy before do_build after do_compile
+
projects / vuplus_openembedded / commitdiff