--- /dev/null
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.24
+# Mon Mar 3 22:58:54 2008
+#
+CONFIG_ARM=y
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+CONFIG_GENERIC_GPIO=y
+# CONFIG_GENERIC_TIME is not set
+# CONFIG_GENERIC_CLOCKEVENTS is not set
+CONFIG_MMU=y
+# CONFIG_NO_IOPORT is not set
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_ZONE_DMA=y
+CONFIG_ARCH_MTD_XIP=y
+CONFIG_VECTORS_BASE=0xffff0000
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_LOCK_KERNEL=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_BSD_PROCESS_ACCT=y
+CONFIG_BSD_PROCESS_ACCT_V3=y
+# CONFIG_TASKSTATS is not set
+# CONFIG_USER_NS is not set
+# CONFIG_PID_NS is not set
+CONFIG_AUDIT=y
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=16
+# CONFIG_CGROUPS is not set
+CONFIG_FAIR_GROUP_SCHED=y
+CONFIG_FAIR_USER_SCHED=y
+# CONFIG_FAIR_CGROUP_SCHED is not set
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_RELAY=y
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_EMBEDDED=y
+CONFIG_UID16=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+CONFIG_KALLSYMS_ALL=y
+CONFIG_KALLSYMS_EXTRA_PASS=y
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_ANON_INODES=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_VM_EVENT_COUNTERS=y
+# CONFIG_SLUB_DEBUG is not set
+# CONFIG_SLAB is not set
+CONFIG_SLUB=y
+# CONFIG_SLOB is not set
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MODULE_FORCE_UNLOAD=y
+CONFIG_MODVERSIONS=y
+CONFIG_MODULE_SRCVERSION_ALL=y
+CONFIG_KMOD=y
+CONFIG_BLOCK=y
+# CONFIG_LBD is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_LSF is not set
+CONFIG_BLK_DEV_BSG=y
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+# CONFIG_IOSCHED_AS is not set
+# CONFIG_IOSCHED_DEADLINE is not set
+CONFIG_IOSCHED_CFQ=y
+# CONFIG_DEFAULT_AS is not set
+# CONFIG_DEFAULT_DEADLINE is not set
+CONFIG_DEFAULT_CFQ=y
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="cfq"
+
+#
+# System Type
+#
+# CONFIG_ARCH_AAEC2000 is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_AT91 is not set
+# CONFIG_ARCH_CLPS7500 is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_CO285 is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_NETX is not set
+# CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_IMX is not set
+# CONFIG_ARCH_IOP13XX is not set
+# CONFIG_ARCH_IOP32X is not set
+# CONFIG_ARCH_IOP33X is not set
+# CONFIG_ARCH_IXP23XX is not set
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_KS8695 is not set
+# CONFIG_ARCH_NS9XXX is not set
+# CONFIG_ARCH_MXC is not set
+# CONFIG_ARCH_PNX4008 is not set
+# CONFIG_ARCH_PXA is not set
+# CONFIG_ARCH_RPC is not set
+CONFIG_ARCH_SA1100=y
+# CONFIG_ARCH_S3C2410 is not set
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_DAVINCI is not set
+# CONFIG_ARCH_OMAP is not set
+
+#
+# SA11x0 Implementations
+#
+# CONFIG_SA1100_ASSABET is not set
+# CONFIG_SA1100_CERF is not set
+# CONFIG_SA1100_COLLIE is not set
+# CONFIG_SA1100_H3100 is not set
+# CONFIG_SA1100_H3600 is not set
+# CONFIG_SA1100_H3800 is not set
+# CONFIG_SA1100_BADGE4 is not set
+# CONFIG_SA1100_JORNADA720 is not set
+# CONFIG_SA1100_HACKKIT is not set
+# CONFIG_SA1100_LART is not set
+# CONFIG_SA1100_PLEB is not set
+# CONFIG_SA1100_SHANNON is not set
+CONFIG_SA1100_SIMPAD=y
+# CONFIG_SA1100_SSP is not set
+
+#
+# Boot options
+#
+
+#
+# Power management
+#
+
+#
+# Processor Type
+#
+CONFIG_CPU_32=y
+CONFIG_CPU_SA1100=y
+CONFIG_CPU_32v4=y
+CONFIG_CPU_ABRT_EV4=y
+CONFIG_CPU_CACHE_V4WB=y
+CONFIG_CPU_CACHE_VIVT=y
+CONFIG_CPU_TLB_V4WB=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
+
+#
+# Processor Features
+#
+# CONFIG_CPU_ICACHE_DISABLE is not set
+# CONFIG_CPU_DCACHE_DISABLE is not set
+# CONFIG_OUTER_CACHE is not set
+
+#
+# Bus support
+#
+CONFIG_ISA=y
+# CONFIG_PCI_SYSCALL is not set
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+CONFIG_PCCARD=y
+# CONFIG_PCMCIA_DEBUG is not set
+CONFIG_PCMCIA=y
+CONFIG_PCMCIA_LOAD_CIS=y
+CONFIG_PCMCIA_IOCTL=y
+
+#
+# PC-card bridges
+#
+# CONFIG_I82365 is not set
+# CONFIG_TCIC is not set
+CONFIG_PCMCIA_SA1100=y
+
+#
+# Kernel Features
+#
+# CONFIG_TICK_ONESHOT is not set
+CONFIG_PREEMPT=y
+CONFIG_NO_IDLE_HZ=y
+CONFIG_HZ=100
+# CONFIG_AEABI is not set
+CONFIG_ARCH_DISCONTIGMEM_ENABLE=y
+CONFIG_NODES_SHIFT=2
+CONFIG_SELECT_MEMORY_MODEL=y
+# CONFIG_FLATMEM_MANUAL is not set
+CONFIG_DISCONTIGMEM_MANUAL=y
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_DISCONTIGMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_NEED_MULTIPLE_NODES=y
+# CONFIG_SPARSEMEM_STATIC is not set
+# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
+CONFIG_SPLIT_PTLOCK_CPUS=4096
+# CONFIG_RESOURCES_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=1
+CONFIG_BOUNCE=y
+CONFIG_VIRT_TO_BUS=y
+CONFIG_LEDS=y
+# CONFIG_LEDS_TIMER is not set
+# CONFIG_LEDS_CPU is not set
+CONFIG_ALIGNMENT_TRAP=y
+
+#
+# Boot options
+#
+CONFIG_ZBOOT_ROM_TEXT=0
+CONFIG_ZBOOT_ROM_BSS=0
+CONFIG_CMDLINE=" debug "
+# CONFIG_XIP_KERNEL is not set
+CONFIG_KEXEC=y
+CONFIG_ATAGS_PROC=y
+
+#
+# CPU Frequency scaling
+#
+# CONFIG_CPU_FREQ is not set
+
+#
+# Floating point emulation
+#
+
+#
+# At least one emulation must be selected
+#
+# CONFIG_FPE_NWFPE is not set
+CONFIG_FPE_FASTFPE=y
+
+#
+# Userspace binary formats
+#
+CONFIG_BINFMT_ELF=y
+CONFIG_BINFMT_AOUT=m
+CONFIG_BINFMT_MISC=m
+# CONFIG_ARTHUR is not set
+
+#
+# Power management options
+#
+CONFIG_PM=y
+# CONFIG_PM_LEGACY is not set
+# CONFIG_PM_DEBUG is not set
+CONFIG_PM_SLEEP=y
+CONFIG_SUSPEND_UP_POSSIBLE=y
+CONFIG_SUSPEND=y
+CONFIG_APM_EMULATION=y
+
+#
+# Networking
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=m
+CONFIG_PACKET_MMAP=y
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+CONFIG_XFRM_USER=m
+# CONFIG_XFRM_SUB_POLICY is not set
+CONFIG_XFRM_MIGRATE=y
+CONFIG_NET_KEY=m
+CONFIG_NET_KEY_MIGRATE=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_ADVANCED_ROUTER=y
+CONFIG_ASK_IP_FIB_HASH=y
+# CONFIG_IP_FIB_TRIE is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_MULTIPLE_TABLES=y
+CONFIG_IP_ROUTE_MULTIPATH=y
+CONFIG_IP_ROUTE_VERBOSE=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+CONFIG_IP_PNP_RARP=y
+CONFIG_NET_IPIP=m
+CONFIG_NET_IPGRE=m
+CONFIG_NET_IPGRE_BROADCAST=y
+CONFIG_IP_MROUTE=y
+CONFIG_IP_PIMSM_V1=y
+CONFIG_IP_PIMSM_V2=y
+# CONFIG_ARPD is not set
+CONFIG_SYN_COOKIES=y
+CONFIG_INET_AH=m
+CONFIG_INET_ESP=m
+CONFIG_INET_IPCOMP=m
+CONFIG_INET_XFRM_TUNNEL=m
+CONFIG_INET_TUNNEL=m
+CONFIG_INET_XFRM_MODE_TRANSPORT=m
+CONFIG_INET_XFRM_MODE_TUNNEL=m
+CONFIG_INET_XFRM_MODE_BEET=m
+CONFIG_INET_LRO=m
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+CONFIG_TCP_CONG_ADVANCED=y
+CONFIG_TCP_CONG_BIC=m
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_TCP_CONG_WESTWOOD=m
+CONFIG_TCP_CONG_HTCP=m
+CONFIG_TCP_CONG_HSTCP=m
+CONFIG_TCP_CONG_HYBLA=m
+CONFIG_TCP_CONG_VEGAS=m
+CONFIG_TCP_CONG_SCALABLE=m
+CONFIG_TCP_CONG_LP=m
+CONFIG_TCP_CONG_VENO=m
+CONFIG_TCP_CONG_YEAH=m
+CONFIG_TCP_CONG_ILLINOIS=m
+# CONFIG_DEFAULT_BIC is not set
+CONFIG_DEFAULT_CUBIC=y
+# CONFIG_DEFAULT_HTCP is not set
+# CONFIG_DEFAULT_VEGAS is not set
+# CONFIG_DEFAULT_WESTWOOD is not set
+# CONFIG_DEFAULT_RENO is not set
+CONFIG_DEFAULT_TCP_CONG="cubic"
+CONFIG_TCP_MD5SIG=y
+CONFIG_IP_VS=m
+# CONFIG_IP_VS_DEBUG is not set
+CONFIG_IP_VS_TAB_BITS=12
+
+#
+# IPVS transport protocol load balancing support
+#
+CONFIG_IP_VS_PROTO_TCP=y
+CONFIG_IP_VS_PROTO_UDP=y
+CONFIG_IP_VS_PROTO_ESP=y
+CONFIG_IP_VS_PROTO_AH=y
+
+#
+# IPVS scheduler
+#
+CONFIG_IP_VS_RR=m
+CONFIG_IP_VS_WRR=m
+CONFIG_IP_VS_LC=m
+CONFIG_IP_VS_WLC=m
+CONFIG_IP_VS_LBLC=m
+CONFIG_IP_VS_LBLCR=m
+CONFIG_IP_VS_DH=m
+CONFIG_IP_VS_SH=m
+CONFIG_IP_VS_SED=m
+CONFIG_IP_VS_NQ=m
+
+#
+# IPVS application helper
+#
+CONFIG_IP_VS_FTP=m
+CONFIG_IPV6=m
+CONFIG_IPV6_PRIVACY=y
+# CONFIG_IPV6_ROUTER_PREF is not set
+CONFIG_IPV6_OPTIMISTIC_DAD=y
+CONFIG_INET6_AH=m
+CONFIG_INET6_ESP=m
+CONFIG_INET6_IPCOMP=m
+CONFIG_IPV6_MIP6=m
+CONFIG_INET6_XFRM_TUNNEL=m
+CONFIG_INET6_TUNNEL=m
+CONFIG_INET6_XFRM_MODE_TRANSPORT=m
+CONFIG_INET6_XFRM_MODE_TUNNEL=m
+CONFIG_INET6_XFRM_MODE_BEET=m
+CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m
+CONFIG_IPV6_SIT=m
+CONFIG_IPV6_TUNNEL=m
+# CONFIG_IPV6_MULTIPLE_TABLES is not set
+CONFIG_NETWORK_SECMARK=y
+CONFIG_NETFILTER=y
+# CONFIG_NETFILTER_DEBUG is not set
+CONFIG_BRIDGE_NETFILTER=y
+
+#
+# Core Netfilter Configuration
+#
+CONFIG_NETFILTER_NETLINK=m
+CONFIG_NETFILTER_NETLINK_QUEUE=m
+CONFIG_NETFILTER_NETLINK_LOG=m
+CONFIG_NF_CONNTRACK_ENABLED=m
+CONFIG_NF_CONNTRACK=m
+CONFIG_NF_CT_ACCT=y
+CONFIG_NF_CONNTRACK_MARK=y
+CONFIG_NF_CONNTRACK_SECMARK=y
+CONFIG_NF_CONNTRACK_EVENTS=y
+CONFIG_NF_CT_PROTO_GRE=m
+CONFIG_NF_CT_PROTO_SCTP=m
+CONFIG_NF_CT_PROTO_UDPLITE=m
+CONFIG_NF_CONNTRACK_AMANDA=m
+CONFIG_NF_CONNTRACK_FTP=m
+CONFIG_NF_CONNTRACK_H323=m
+CONFIG_NF_CONNTRACK_IRC=m
+CONFIG_NF_CONNTRACK_NETBIOS_NS=m
+CONFIG_NF_CONNTRACK_PPTP=m
+CONFIG_NF_CONNTRACK_SANE=m
+CONFIG_NF_CONNTRACK_SIP=m
+CONFIG_NF_CONNTRACK_TFTP=m
+CONFIG_NF_CT_NETLINK=m
+CONFIG_NETFILTER_XTABLES=m
+CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
+CONFIG_NETFILTER_XT_TARGET_CONNMARK=m
+CONFIG_NETFILTER_XT_TARGET_DSCP=m
+CONFIG_NETFILTER_XT_TARGET_MARK=m
+CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
+CONFIG_NETFILTER_XT_TARGET_NFLOG=m
+CONFIG_NETFILTER_XT_TARGET_NOTRACK=m
+CONFIG_NETFILTER_XT_TARGET_TRACE=m
+CONFIG_NETFILTER_XT_TARGET_SECMARK=m
+CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=m
+CONFIG_NETFILTER_XT_TARGET_TCPMSS=m
+CONFIG_NETFILTER_XT_MATCH_COMMENT=m
+CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m
+CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m
+CONFIG_NETFILTER_XT_MATCH_CONNMARK=m
+CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
+CONFIG_NETFILTER_XT_MATCH_DCCP=m
+CONFIG_NETFILTER_XT_MATCH_DSCP=m
+CONFIG_NETFILTER_XT_MATCH_ESP=m
+CONFIG_NETFILTER_XT_MATCH_HELPER=m
+CONFIG_NETFILTER_XT_MATCH_LENGTH=m
+CONFIG_NETFILTER_XT_MATCH_LIMIT=m
+CONFIG_NETFILTER_XT_MATCH_MAC=m
+CONFIG_NETFILTER_XT_MATCH_MARK=m
+CONFIG_NETFILTER_XT_MATCH_POLICY=m
+CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
+CONFIG_NETFILTER_XT_MATCH_PHYSDEV=m
+CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
+CONFIG_NETFILTER_XT_MATCH_QUOTA=m
+CONFIG_NETFILTER_XT_MATCH_REALM=m
+CONFIG_NETFILTER_XT_MATCH_SCTP=m
+CONFIG_NETFILTER_XT_MATCH_STATE=m
+CONFIG_NETFILTER_XT_MATCH_STATISTIC=m
+CONFIG_NETFILTER_XT_MATCH_STRING=m
+CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
+# CONFIG_NETFILTER_XT_MATCH_TIME is not set
+CONFIG_NETFILTER_XT_MATCH_U32=m
+CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m
+
+#
+# IP: Netfilter Configuration
+#
+CONFIG_NF_CONNTRACK_IPV4=m
+CONFIG_NF_CONNTRACK_PROC_COMPAT=y
+CONFIG_IP_NF_QUEUE=m
+CONFIG_IP_NF_IPTABLES=m
+CONFIG_IP_NF_MATCH_IPRANGE=m
+CONFIG_IP_NF_MATCH_TOS=m
+CONFIG_IP_NF_MATCH_RECENT=m
+CONFIG_IP_NF_MATCH_ECN=m
+CONFIG_IP_NF_MATCH_AH=m
+CONFIG_IP_NF_MATCH_TTL=m
+CONFIG_IP_NF_MATCH_OWNER=m
+CONFIG_IP_NF_MATCH_ADDRTYPE=m
+CONFIG_IP_NF_FILTER=m
+CONFIG_IP_NF_TARGET_REJECT=m
+CONFIG_IP_NF_TARGET_LOG=m
+CONFIG_IP_NF_TARGET_ULOG=m
+CONFIG_NF_NAT=m
+CONFIG_NF_NAT_NEEDED=y
+CONFIG_IP_NF_TARGET_MASQUERADE=m
+CONFIG_IP_NF_TARGET_REDIRECT=m
+CONFIG_IP_NF_TARGET_NETMAP=m
+CONFIG_IP_NF_TARGET_SAME=m
+CONFIG_NF_NAT_SNMP_BASIC=m
+CONFIG_NF_NAT_PROTO_GRE=m
+CONFIG_NF_NAT_FTP=m
+CONFIG_NF_NAT_IRC=m
+CONFIG_NF_NAT_TFTP=m
+CONFIG_NF_NAT_AMANDA=m
+CONFIG_NF_NAT_PPTP=m
+CONFIG_NF_NAT_H323=m
+CONFIG_NF_NAT_SIP=m
+CONFIG_IP_NF_MANGLE=m
+CONFIG_IP_NF_TARGET_TOS=m
+CONFIG_IP_NF_TARGET_ECN=m
+CONFIG_IP_NF_TARGET_TTL=m
+CONFIG_IP_NF_TARGET_CLUSTERIP=m
+CONFIG_IP_NF_RAW=m
+CONFIG_IP_NF_ARPTABLES=m
+CONFIG_IP_NF_ARPFILTER=m
+CONFIG_IP_NF_ARP_MANGLE=m
+
+#
+# IPv6: Netfilter Configuration (EXPERIMENTAL)
+#
+CONFIG_NF_CONNTRACK_IPV6=m
+CONFIG_IP6_NF_QUEUE=m
+CONFIG_IP6_NF_IPTABLES=m
+CONFIG_IP6_NF_MATCH_RT=m
+CONFIG_IP6_NF_MATCH_OPTS=m
+CONFIG_IP6_NF_MATCH_FRAG=m
+CONFIG_IP6_NF_MATCH_HL=m
+CONFIG_IP6_NF_MATCH_OWNER=m
+CONFIG_IP6_NF_MATCH_IPV6HEADER=m
+CONFIG_IP6_NF_MATCH_AH=m
+CONFIG_IP6_NF_MATCH_MH=m
+CONFIG_IP6_NF_MATCH_EUI64=m
+CONFIG_IP6_NF_FILTER=m
+CONFIG_IP6_NF_TARGET_LOG=m
+CONFIG_IP6_NF_TARGET_REJECT=m
+CONFIG_IP6_NF_MANGLE=m
+CONFIG_IP6_NF_TARGET_HL=m
+CONFIG_IP6_NF_RAW=m
+
+#
+# Bridge: Netfilter Configuration
+#
+CONFIG_BRIDGE_NF_EBTABLES=m
+CONFIG_BRIDGE_EBT_BROUTE=m
+CONFIG_BRIDGE_EBT_T_FILTER=m
+CONFIG_BRIDGE_EBT_T_NAT=m
+CONFIG_BRIDGE_EBT_802_3=m
+CONFIG_BRIDGE_EBT_AMONG=m
+CONFIG_BRIDGE_EBT_ARP=m
+CONFIG_BRIDGE_EBT_IP=m
+CONFIG_BRIDGE_EBT_LIMIT=m
+CONFIG_BRIDGE_EBT_MARK=m
+CONFIG_BRIDGE_EBT_PKTTYPE=m
+CONFIG_BRIDGE_EBT_STP=m
+CONFIG_BRIDGE_EBT_VLAN=m
+CONFIG_BRIDGE_EBT_ARPREPLY=m
+CONFIG_BRIDGE_EBT_DNAT=m
+CONFIG_BRIDGE_EBT_MARK_T=m
+CONFIG_BRIDGE_EBT_REDIRECT=m
+CONFIG_BRIDGE_EBT_SNAT=m
+CONFIG_BRIDGE_EBT_LOG=m
+CONFIG_BRIDGE_EBT_ULOG=m
+CONFIG_IP_DCCP=m
+CONFIG_INET_DCCP_DIAG=m
+CONFIG_IP_DCCP_ACKVEC=y
+
+#
+# DCCP CCIDs Configuration (EXPERIMENTAL)
+#
+CONFIG_IP_DCCP_CCID2=m
+# CONFIG_IP_DCCP_CCID2_DEBUG is not set
+CONFIG_IP_DCCP_CCID3=m
+CONFIG_IP_DCCP_TFRC_LIB=m
+# CONFIG_IP_DCCP_CCID3_DEBUG is not set
+CONFIG_IP_DCCP_CCID3_RTO=100
+
+#
+# DCCP Kernel Hacking
+#
+# CONFIG_IP_DCCP_DEBUG is not set
+CONFIG_IP_SCTP=m
+# CONFIG_SCTP_DBG_MSG is not set
+# CONFIG_SCTP_DBG_OBJCNT is not set
+# CONFIG_SCTP_HMAC_NONE is not set
+# CONFIG_SCTP_HMAC_SHA1 is not set
+CONFIG_SCTP_HMAC_MD5=y
+CONFIG_TIPC=m
+# CONFIG_TIPC_ADVANCED is not set
+# CONFIG_TIPC_DEBUG is not set
+# CONFIG_ATM is not set
+CONFIG_BRIDGE=m
+CONFIG_VLAN_8021Q=m
+# CONFIG_DECNET is not set
+CONFIG_LLC=m
+CONFIG_LLC2=m
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_SCHED is not set
+CONFIG_NET_CLS_ROUTE=y
+CONFIG_NET_SCH_FIFO=y
+
+#
+# Network testing
+#
+CONFIG_NET_PKTGEN=m
+# CONFIG_HAMRADIO is not set
+CONFIG_IRDA=m
+
+#
+# IrDA protocols
+#
+CONFIG_IRLAN=m
+CONFIG_IRNET=m
+CONFIG_IRCOMM=m
+CONFIG_IRDA_ULTRA=y
+
+#
+# IrDA options
+#
+CONFIG_IRDA_CACHE_LAST_LSAP=y
+CONFIG_IRDA_FAST_RR=y
+CONFIG_IRDA_DEBUG=y
+
+#
+# Infrared-port device drivers
+#
+
+#
+# SIR device drivers
+#
+CONFIG_IRTTY_SIR=m
+
+#
+# Dongle support
+#
+# CONFIG_DONGLE is not set
+# CONFIG_KINGSUN_DONGLE is not set
+# CONFIG_KSDAZZLE_DONGLE is not set
+# CONFIG_KS959_DONGLE is not set
+
+#
+# Old SIR device drivers
+#
+CONFIG_IRPORT_SIR=m
+
+#
+# Old Serial dongle support
+#
+# CONFIG_DONGLE_OLD is not set
+
+#
+# FIR device drivers
+#
+# CONFIG_USB_IRDA is not set
+# CONFIG_SIGMATEL_FIR is not set
+CONFIG_SA1100_FIR=m
+# CONFIG_MCS_FIR is not set
+CONFIG_BT=m
+CONFIG_BT_L2CAP=m
+CONFIG_BT_SCO=m
+CONFIG_BT_RFCOMM=m
+CONFIG_BT_RFCOMM_TTY=y
+CONFIG_BT_BNEP=m
+CONFIG_BT_BNEP_MC_FILTER=y
+CONFIG_BT_BNEP_PROTO_FILTER=y
+CONFIG_BT_HIDP=m
+
+#
+# Bluetooth device drivers
+#
+CONFIG_BT_HCIUSB=m
+CONFIG_BT_HCIUSB_SCO=y
+CONFIG_BT_HCIUART=m
+CONFIG_BT_HCIUART_H4=y
+CONFIG_BT_HCIUART_BCSP=y
+CONFIG_BT_HCIUART_LL=y
+CONFIG_BT_HCIBCM203X=m
+CONFIG_BT_HCIBPA10X=m
+CONFIG_BT_HCIBFUSB=m
+CONFIG_BT_HCIDTL1=m
+CONFIG_BT_HCIBT3C=m
+CONFIG_BT_HCIBLUECARD=m
+CONFIG_BT_HCIBTUART=m
+CONFIG_BT_HCIVHCI=m
+# CONFIG_AF_RXRPC is not set
+CONFIG_FIB_RULES=y
+
+#
+# Wireless
+#
+CONFIG_CFG80211=m
+CONFIG_NL80211=y
+CONFIG_WIRELESS_EXT=y
+CONFIG_MAC80211=m
+CONFIG_MAC80211_RCSIMPLE=y
+# CONFIG_MAC80211_DEBUGFS is not set
+# CONFIG_MAC80211_DEBUG is not set
+CONFIG_IEEE80211=m
+# CONFIG_IEEE80211_DEBUG is not set
+CONFIG_IEEE80211_CRYPT_WEP=m
+CONFIG_IEEE80211_CRYPT_CCMP=m
+CONFIG_IEEE80211_CRYPT_TKIP=m
+CONFIG_IEEE80211_SOFTMAC=m
+# CONFIG_IEEE80211_SOFTMAC_DEBUG is not set
+CONFIG_RFKILL=m
+CONFIG_RFKILL_INPUT=m
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+CONFIG_DEBUG_DRIVER=y
+CONFIG_DEBUG_DEVRES=y
+# CONFIG_SYS_HYPERVISOR is not set
+CONFIG_CONNECTOR=m
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+CONFIG_MTD_CONCAT=y
+CONFIG_MTD_PARTITIONS=y
+CONFIG_MTD_REDBOOT_PARTS=y
+CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=2
+# CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED is not set
+CONFIG_MTD_REDBOOT_PARTS_READONLY=y
+CONFIG_MTD_CMDLINE_PARTS=y
+# CONFIG_MTD_AFS_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+CONFIG_MTD_JEDECPROBE=y
+CONFIG_MTD_GEN_PROBE=y
+CONFIG_MTD_CFI_ADV_OPTIONS=y
+CONFIG_MTD_CFI_NOSWAP=y
+# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
+# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
+CONFIG_MTD_CFI_GEOMETRY=y
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+# CONFIG_MTD_CFI_I2 is not set
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_OTP is not set
+CONFIG_MTD_CFI_INTELEXT=y
+# CONFIG_MTD_CFI_AMDSTD is not set
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+CONFIG_MTD_RAM=y
+CONFIG_MTD_ROM=m
+CONFIG_MTD_ABSENT=m
+CONFIG_MTD_XIP=y
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+# CONFIG_MTD_PHYSMAP is not set
+# CONFIG_MTD_ARM_INTEGRATOR is not set
+CONFIG_MTD_SA1100=y
+# CONFIG_MTD_IMPA7 is not set
+CONFIG_MTD_PLATRAM=m
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+CONFIG_MTD_BLOCK2MTD=m
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+# CONFIG_MTD_NAND is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# UBI - Unsorted block images
+#
+# CONFIG_MTD_UBI is not set
+# CONFIG_PARPORT is not set
+# CONFIG_PNP is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_BLK_DEV_CRYPTOLOOP=m
+CONFIG_BLK_DEV_NBD=m
+# CONFIG_BLK_DEV_UB is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=4096
+CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_MISC_DEVICES is not set
+CONFIG_IDE=m
+CONFIG_IDE_MAX_HWIFS=4
+CONFIG_BLK_DEV_IDE=m
+
+#
+# Please see Documentation/ide.txt for help/info on IDE drives
+#
+# CONFIG_BLK_DEV_IDE_SATA is not set
+CONFIG_BLK_DEV_IDEDISK=m
+CONFIG_IDEDISK_MULTI_MODE=y
+CONFIG_BLK_DEV_IDECS=m
+# CONFIG_BLK_DEV_IDECD is not set
+# CONFIG_BLK_DEV_IDETAPE is not set
+# CONFIG_BLK_DEV_IDEFLOPPY is not set
+CONFIG_IDE_TASK_IOCTL=y
+# CONFIG_IDE_PROC_FS is not set
+
+#
+# IDE chipset support/bugfixes
+#
+CONFIG_IDE_GENERIC=m
+CONFIG_BLK_DEV_PLATFORM=m
+# CONFIG_IDE_ARM is not set
+
+#
+# Other IDE chipsets support
+#
+
+#
+# Note: most of these also require special kernel boot parameters
+#
+# CONFIG_BLK_DEV_4DRIVES is not set
+# CONFIG_BLK_DEV_ALI14XX is not set
+# CONFIG_BLK_DEV_DTC2278 is not set
+# CONFIG_BLK_DEV_HT6560B is not set
+# CONFIG_BLK_DEV_QD65XX is not set
+# CONFIG_BLK_DEV_UMC8672 is not set
+# CONFIG_BLK_DEV_IDEDMA is not set
+CONFIG_IDE_ARCH_OBSOLETE_INIT=y
+# CONFIG_BLK_DEV_HD is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+# CONFIG_SCSI is not set
+# CONFIG_SCSI_DMA is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+CONFIG_NETDEVICES=y
+# CONFIG_NETDEVICES_MULTIQUEUE is not set
+CONFIG_DUMMY=m
+CONFIG_BONDING=m
+CONFIG_MACVLAN=m
+CONFIG_EQUALIZER=m
+CONFIG_TUN=m
+# CONFIG_VETH is not set
+# CONFIG_ARCNET is not set
+# CONFIG_NET_ETHERNET is not set
+CONFIG_MII=m
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
+# CONFIG_TR is not set
+
+#
+# Wireless LAN
+#
+CONFIG_WLAN_PRE80211=y
+# CONFIG_STRIP is not set
+# CONFIG_ARLAN is not set
+# CONFIG_WAVELAN is not set
+# CONFIG_PCMCIA_WAVELAN is not set
+# CONFIG_PCMCIA_NETWAVE is not set
+CONFIG_WLAN_80211=y
+CONFIG_PCMCIA_RAYCS=m
+CONFIG_LIBERTAS=m
+# CONFIG_LIBERTAS_USB is not set
+CONFIG_LIBERTAS_CS=m
+# CONFIG_LIBERTAS_DEBUG is not set
+CONFIG_HERMES=m
+CONFIG_PCMCIA_HERMES=m
+CONFIG_PCMCIA_SPECTRUM=m
+CONFIG_ATMEL=m
+CONFIG_PCMCIA_ATMEL=m
+CONFIG_AIRO_CS=m
+CONFIG_PCMCIA_WL3501=m
+# CONFIG_USB_ZD1201 is not set
+# CONFIG_RTL8187 is not set
+CONFIG_P54_COMMON=m
+# CONFIG_P54_USB is not set
+CONFIG_HOSTAP=m
+CONFIG_HOSTAP_FIRMWARE=y
+CONFIG_HOSTAP_FIRMWARE_NVRAM=y
+CONFIG_HOSTAP_CS=m
+CONFIG_B43=m
+CONFIG_B43_PCMCIA=y
+CONFIG_B43_RFKILL=y
+# CONFIG_B43_DEBUG is not set
+CONFIG_B43_DMA=y
+CONFIG_B43_PIO=y
+CONFIG_B43_DMA_AND_PIO_MODE=y
+# CONFIG_B43_DMA_MODE is not set
+# CONFIG_B43_PIO_MODE is not set
+CONFIG_B43LEGACY=m
+# CONFIG_B43LEGACY_DEBUG is not set
+CONFIG_B43LEGACY_DMA=y
+CONFIG_B43LEGACY_PIO=y
+CONFIG_B43LEGACY_DMA_AND_PIO_MODE=y
+# CONFIG_B43LEGACY_DMA_MODE is not set
+# CONFIG_B43LEGACY_PIO_MODE is not set
+# CONFIG_ZD1211RW is not set
+CONFIG_RT2X00=m
+# CONFIG_RT2500USB is not set
+# CONFIG_RT73USB is not set
+
+#
+# USB Network Adapters
+#
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_RTL8150 is not set
+# CONFIG_USB_USBNET is not set
+CONFIG_NET_PCMCIA=y
+CONFIG_PCMCIA_3C589=m
+CONFIG_PCMCIA_3C574=m
+CONFIG_PCMCIA_FMVJ18X=m
+CONFIG_PCMCIA_PCNET=m
+CONFIG_PCMCIA_NMCLAN=m
+CONFIG_PCMCIA_SMC91C92=m
+CONFIG_PCMCIA_XIRC2PS=m
+CONFIG_PCMCIA_AXNET=m
+# CONFIG_WAN is not set
+CONFIG_PPP=m
+CONFIG_PPP_MULTILINK=y
+CONFIG_PPP_FILTER=y
+CONFIG_PPP_ASYNC=m
+CONFIG_PPP_SYNC_TTY=m
+CONFIG_PPP_DEFLATE=m
+CONFIG_PPP_BSDCOMP=m
+CONFIG_PPP_MPPE=m
+CONFIG_PPPOE=m
+CONFIG_PPPOL2TP=m
+CONFIG_SLIP=m
+CONFIG_SLIP_COMPRESSED=y
+CONFIG_SLHC=m
+CONFIG_SLIP_SMART=y
+CONFIG_SLIP_MODE_SLIP6=y
+CONFIG_SHAPER=m
+CONFIG_NETCONSOLE=m
+# CONFIG_NETCONSOLE_DYNAMIC is not set
+CONFIG_NETPOLL=y
+# CONFIG_NETPOLL_TRAP is not set
+CONFIG_NET_POLL_CONTROLLER=y
+# CONFIG_ISDN is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+CONFIG_INPUT_POLLDEV=m
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=800
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=600
+# CONFIG_INPUT_JOYDEV is not set
+CONFIG_INPUT_EVDEV=y
+CONFIG_INPUT_EVBUG=m
+
+#
+# Input Device Drivers
+#
+CONFIG_INPUT_KEYBOARD=y
+CONFIG_KEYBOARD_ATKBD=m
+CONFIG_KEYBOARD_SUNKBD=m
+CONFIG_KEYBOARD_LKKBD=m
+CONFIG_KEYBOARD_XTKBD=m
+CONFIG_KEYBOARD_NEWTON=m
+CONFIG_KEYBOARD_STOWAWAY=m
+CONFIG_KEYBOARD_GPIO=y
+CONFIG_INPUT_MOUSE=y
+CONFIG_MOUSE_PS2=m
+CONFIG_MOUSE_PS2_ALPS=y
+CONFIG_MOUSE_PS2_LOGIPS2PP=y
+CONFIG_MOUSE_PS2_SYNAPTICS=y
+CONFIG_MOUSE_PS2_LIFEBOOK=y
+CONFIG_MOUSE_PS2_TRACKPOINT=y
+CONFIG_MOUSE_PS2_TOUCHKIT=y
+CONFIG_MOUSE_SERIAL=m
+# CONFIG_MOUSE_APPLETOUCH is not set
+# CONFIG_MOUSE_INPORT is not set
+# CONFIG_MOUSE_LOGIBM is not set
+# CONFIG_MOUSE_PC110PAD is not set
+CONFIG_MOUSE_VSXXXAA=m
+# CONFIG_MOUSE_GPIO is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+CONFIG_INPUT_MISC=y
+# CONFIG_INPUT_ATI_REMOTE is not set
+# CONFIG_INPUT_ATI_REMOTE2 is not set
+# CONFIG_INPUT_KEYSPAN_REMOTE is not set
+# CONFIG_INPUT_POWERMATE is not set
+# CONFIG_INPUT_YEALINK is not set
+CONFIG_INPUT_UINPUT=y
+
+#
+# Hardware I/O ports
+#
+CONFIG_SERIO=y
+CONFIG_SERIO_SERPORT=m
+CONFIG_SERIO_LIBPS2=y
+CONFIG_SERIO_RAW=m
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+CONFIG_VT_HW_CONSOLE_BINDING=y
+CONFIG_SERIAL_NONSTANDARD=y
+# CONFIG_COMPUTONE is not set
+# CONFIG_ROCKETPORT is not set
+# CONFIG_CYCLADES is not set
+# CONFIG_DIGIEPCA is not set
+# CONFIG_MOXA_INTELLIO is not set
+# CONFIG_MOXA_SMARTIO is not set
+# CONFIG_MOXA_SMARTIO_NEW is not set
+# CONFIG_N_HDLC is not set
+# CONFIG_RISCOM8 is not set
+# CONFIG_SPECIALIX is not set
+# CONFIG_SX is not set
+# CONFIG_RIO is not set
+# CONFIG_STALDRV is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_SA1100=y
+CONFIG_SERIAL_SA1100_CONSOLE=y
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+CONFIG_IPMI_HANDLER=y
+# CONFIG_IPMI_PANIC_EVENT is not set
+CONFIG_IPMI_DEVICE_INTERFACE=m
+CONFIG_IPMI_SI=m
+CONFIG_IPMI_WATCHDOG=m
+CONFIG_IPMI_POWEROFF=m
+CONFIG_HW_RANDOM=y
+# CONFIG_NVRAM is not set
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+
+#
+# PCMCIA character devices
+#
+# CONFIG_SYNCLINK_CS is not set
+# CONFIG_CARDMAN_4000 is not set
+# CONFIG_CARDMAN_4040 is not set
+CONFIG_RAW_DRIVER=m
+CONFIG_MAX_RAW_DEVS=256
+# CONFIG_TCG_TPM is not set
+CONFIG_DEVPORT=y
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+# CONFIG_I2C_CHARDEV is not set
+
+#
+# I2C Algorithms
+#
+# CONFIG_I2C_ALGOBIT is not set
+# CONFIG_I2C_ALGOPCF is not set
+# CONFIG_I2C_ALGOPCA is not set
+
+#
+# I2C Hardware Bus support
+#
+# CONFIG_I2C_ELEKTOR is not set
+# CONFIG_I2C_GPIO is not set
+# CONFIG_I2C_OCORES is not set
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_TAOS_EVM is not set
+# CONFIG_I2C_STUB is not set
+# CONFIG_I2C_TINY_USB is not set
+# CONFIG_I2C_PCA_ISA is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_SENSORS_DS1337 is not set
+# CONFIG_SENSORS_DS1374 is not set
+# CONFIG_DS1682 is not set
+# CONFIG_SENSORS_EEPROM is not set
+# CONFIG_SENSORS_PCF8574 is not set
+# CONFIG_SENSORS_PCA9539 is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_SENSORS_MAX6875 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+
+#
+# SPI support
+#
+# CONFIG_SPI is not set
+# CONFIG_SPI_MASTER is not set
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+CONFIG_WATCHDOG=y
+# CONFIG_WATCHDOG_NOWAYOUT is not set
+
+#
+# Watchdog Device Drivers
+#
+# CONFIG_SOFT_WATCHDOG is not set
+CONFIG_SA1100_WATCHDOG=y
+
+#
+# ISA-based Watchdog Cards
+#
+# CONFIG_PCWATCHDOG is not set
+# CONFIG_MIXCOMWD is not set
+# CONFIG_WDT is not set
+
+#
+# USB-based Watchdog Cards
+#
+# CONFIG_USBPCWATCHDOG is not set
+
+#
+# Sonics Silicon Backplane
+#
+CONFIG_SSB_POSSIBLE=y
+CONFIG_SSB=m
+CONFIG_SSB_PCMCIAHOST_POSSIBLE=y
+CONFIG_SSB_PCMCIAHOST=y
+# CONFIG_SSB_SILENT is not set
+# CONFIG_SSB_DEBUG is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_SM501 is not set
+
+#
+# Multimedia Capabilities Port drivers
+#
+CONFIG_MCP=y
+CONFIG_MCP_SA11X0=y
+CONFIG_MCP_UCB1200=y
+CONFIG_MCP_UCB1200_TS=y
+CONFIG_MCP_UCB1200_SWITCHES=y
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+# CONFIG_DVB_CORE is not set
+# CONFIG_DAB is not set
+
+#
+# Graphics support
+#
+# CONFIG_VGASTATE is not set
+CONFIG_VIDEO_OUTPUT_CONTROL=y
+CONFIG_FB=y
+# CONFIG_FIRMWARE_EDID is not set
+# CONFIG_FB_DDC is not set
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
+# CONFIG_FB_SYS_FILLRECT is not set
+# CONFIG_FB_SYS_COPYAREA is not set
+# CONFIG_FB_SYS_IMAGEBLIT is not set
+# CONFIG_FB_SYS_FOPS is not set
+CONFIG_FB_DEFERRED_IO=y
+# CONFIG_FB_SVGALIB is not set
+# CONFIG_FB_MACMODES is not set
+# CONFIG_FB_BACKLIGHT is not set
+# CONFIG_FB_MODE_HELPERS is not set
+# CONFIG_FB_TILEBLITTING is not set
+
+#
+# Frambuffer hardware drivers
+#
+# CONFIG_FB_SA1100 is not set
+# CONFIG_FB_UVESA is not set
+# CONFIG_FB_S1D13XXX is not set
+CONFIG_FB_MQ200=y
+# CONFIG_FB_VIRTUAL is not set
+CONFIG_BACKLIGHT_LCD_SUPPORT=y
+CONFIG_LCD_CLASS_DEVICE=y
+CONFIG_BACKLIGHT_CLASS_DEVICE=y
+# CONFIG_BACKLIGHT_CORGI is not set
+CONFIG_BACKLIGHT_SIMPAD=y
+CONFIG_LCD_SIMPAD=y
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+# CONFIG_MDA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
+CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y
+CONFIG_FONTS=y
+CONFIG_FONT_8x8=y
+CONFIG_FONT_8x16=y
+# CONFIG_FONT_6x11 is not set
+# CONFIG_FONT_7x14 is not set
+CONFIG_FONT_PEARL_8x8=y
+CONFIG_FONT_ACORN_8x8=y
+CONFIG_FONT_MINI_4x6=y
+CONFIG_FONT_SUN8x16=y
+# CONFIG_FONT_SUN12x22 is not set
+# CONFIG_FONT_10x18 is not set
+# CONFIG_LOGO is not set
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+# CONFIG_HID_SUPPORT is not set
+CONFIG_HID=m
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+# CONFIG_USB_ARCH_HAS_OHCI is not set
+# CONFIG_USB_ARCH_HAS_EHCI is not set
+CONFIG_USB=m
+# CONFIG_USB_DEBUG is not set
+
+#
+# Miscellaneous USB options
+#
+# CONFIG_USB_DEVICEFS is not set
+CONFIG_USB_DEVICE_CLASS=y
+# CONFIG_USB_DYNAMIC_MINORS is not set
+# CONFIG_USB_SUSPEND is not set
+# CONFIG_USB_PERSIST is not set
+# CONFIG_USB_OTG is not set
+
+#
+# USB Host Controller Drivers
+#
+# CONFIG_USB_ISP116X_HCD is not set
+CONFIG_USB_SL811_HCD=m
+# CONFIG_USB_SL811_CS is not set
+# CONFIG_USB_R8A66597_HCD is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+
+#
+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+#
+
+#
+# may also be needed; see USB_STORAGE Help for more information
+#
+# CONFIG_USB_LIBUSUAL is not set
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+CONFIG_USB_MON=y
+
+#
+# USB port drivers
+#
+
+#
+# USB Serial Converter support
+#
+# CONFIG_USB_SERIAL is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_AUERSWALD is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_BERRY_CHARGE is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CYPRESS_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_PHIDGET is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_FTDI_ELAN is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TRANCEVIBRATOR is not set
+# CONFIG_USB_IOWARRIOR is not set
+
+#
+# USB DSL modem support
+#
+
+#
+# USB Gadget Support
+#
+# CONFIG_USB_GADGET is not set
+# CONFIG_MMC is not set
+# CONFIG_NEW_LEDS is not set
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+CONFIG_RTC_DEBUG=y
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# I2C RTC drivers
+#
+# CONFIG_RTC_DRV_DS1307 is not set
+# CONFIG_RTC_DRV_DS1374 is not set
+# CONFIG_RTC_DRV_DS1672 is not set
+# CONFIG_RTC_DRV_MAX6900 is not set
+# CONFIG_RTC_DRV_RS5C372 is not set
+# CONFIG_RTC_DRV_ISL1208 is not set
+# CONFIG_RTC_DRV_X1205 is not set
+# CONFIG_RTC_DRV_PCF8563 is not set
+# CONFIG_RTC_DRV_PCF8583 is not set
+# CONFIG_RTC_DRV_M41T80 is not set
+
+#
+# SPI RTC drivers
+#
+
+#
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_CMOS is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+
+#
+# on-CPU RTC drivers
+#
+CONFIG_RTC_DRV_SA1100=y
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+CONFIG_EXT3_FS=y
+# CONFIG_EXT3_FS_XATTR is not set
+# CONFIG_EXT4DEV_FS is not set
+CONFIG_JBD=y
+# CONFIG_JBD_DEBUG is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+CONFIG_FS_POSIX_ACL=y
+# CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
+# CONFIG_OCFS2_FS is not set
+CONFIG_MINIX_FS=m
+CONFIG_ROMFS_FS=m
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+CONFIG_QUOTA=y
+# CONFIG_QUOTA_NETLINK_INTERFACE is not set
+CONFIG_PRINT_QUOTA_WARNING=y
+CONFIG_QFMT_V1=m
+CONFIG_QFMT_V2=m
+CONFIG_QUOTACTL=y
+CONFIG_DNOTIFY=y
+CONFIG_AUTOFS_FS=m
+CONFIG_AUTOFS4_FS=m
+CONFIG_FUSE_FS=m
+CONFIG_GENERIC_ACL=y
+
+#
+# CD-ROM/DVD Filesystems
+#
+CONFIG_ISO9660_FS=m
+CONFIG_JOLIET=y
+CONFIG_ZISOFS=y
+CONFIG_UDF_FS=m
+CONFIG_UDF_NLS=y
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+CONFIG_TMPFS_POSIX_ACL=y
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_CONFIGFS_FS=m
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=0
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+CONFIG_JFFS2_FS_WBUF_VERIFY=y
+CONFIG_JFFS2_SUMMARY=y
+CONFIG_JFFS2_FS_XATTR=y
+CONFIG_JFFS2_FS_POSIX_ACL=y
+CONFIG_JFFS2_FS_SECURITY=y
+CONFIG_JFFS2_COMPRESSION_OPTIONS=y
+CONFIG_JFFS2_ZLIB=y
+# CONFIG_JFFS2_LZO is not set
+CONFIG_JFFS2_RTIME=y
+CONFIG_JFFS2_RUBIN=y
+# CONFIG_JFFS2_CMODE_NONE is not set
+CONFIG_JFFS2_CMODE_PRIORITY=y
+# CONFIG_JFFS2_CMODE_SIZE is not set
+# CONFIG_JFFS2_CMODE_FAVOURLZO is not set
+CONFIG_CRAMFS=m
+# CONFIG_SQUASHFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+CONFIG_NFS_V3_ACL=y
+CONFIG_NFS_V4=y
+CONFIG_NFS_DIRECTIO=y
+CONFIG_NFSD=m
+CONFIG_NFSD_V2_ACL=y
+CONFIG_NFSD_V3=y
+CONFIG_NFSD_V3_ACL=y
+CONFIG_NFSD_V4=y
+CONFIG_NFSD_TCP=y
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_EXPORTFS=m
+CONFIG_NFS_ACL_SUPPORT=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+CONFIG_SUNRPC_GSS=y
+CONFIG_SUNRPC_BIND34=y
+CONFIG_RPCSEC_GSS_KRB5=y
+CONFIG_RPCSEC_GSS_SPKM3=m
+CONFIG_SMB_FS=m
+CONFIG_SMB_NLS_DEFAULT=y
+CONFIG_SMB_NLS_REMOTE="utf8"
+CONFIG_CIFS=m
+CONFIG_CIFS_STATS=y
+CONFIG_CIFS_STATS2=y
+# CONFIG_CIFS_WEAK_PW_HASH is not set
+CONFIG_CIFS_XATTR=y
+CONFIG_CIFS_POSIX=y
+# CONFIG_CIFS_DEBUG2 is not set
+CONFIG_CIFS_EXPERIMENTAL=y
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_ACORN_PARTITION is not set
+# CONFIG_OSF_PARTITION is not set
+# CONFIG_AMIGA_PARTITION is not set
+# CONFIG_ATARI_PARTITION is not set
+# CONFIG_MAC_PARTITION is not set
+CONFIG_MSDOS_PARTITION=y
+CONFIG_BSD_DISKLABEL=y
+CONFIG_MINIX_SUBPARTITION=y
+# CONFIG_SOLARIS_X86_PARTITION is not set
+# CONFIG_UNIXWARE_DISKLABEL is not set
+CONFIG_LDM_PARTITION=y
+# CONFIG_LDM_DEBUG is not set
+# CONFIG_SGI_PARTITION is not set
+# CONFIG_ULTRIX_PARTITION is not set
+# CONFIG_SUN_PARTITION is not set
+# CONFIG_KARMA_PARTITION is not set
+# CONFIG_EFI_PARTITION is not set
+# CONFIG_SYSV68_PARTITION is not set
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="utf8"
+CONFIG_NLS_CODEPAGE_437=m
+CONFIG_NLS_CODEPAGE_737=m
+CONFIG_NLS_CODEPAGE_775=m
+CONFIG_NLS_CODEPAGE_850=m
+CONFIG_NLS_CODEPAGE_852=m
+CONFIG_NLS_CODEPAGE_855=m
+CONFIG_NLS_CODEPAGE_857=m
+CONFIG_NLS_CODEPAGE_860=m
+CONFIG_NLS_CODEPAGE_861=m
+CONFIG_NLS_CODEPAGE_862=m
+CONFIG_NLS_CODEPAGE_863=m
+CONFIG_NLS_CODEPAGE_864=m
+CONFIG_NLS_CODEPAGE_865=m
+CONFIG_NLS_CODEPAGE_866=m
+CONFIG_NLS_CODEPAGE_869=m
+CONFIG_NLS_CODEPAGE_936=m
+CONFIG_NLS_CODEPAGE_950=m
+CONFIG_NLS_CODEPAGE_932=m
+CONFIG_NLS_CODEPAGE_949=m
+CONFIG_NLS_CODEPAGE_874=m
+CONFIG_NLS_ISO8859_8=m
+CONFIG_NLS_CODEPAGE_1250=m
+CONFIG_NLS_CODEPAGE_1251=m
+CONFIG_NLS_ASCII=m
+CONFIG_NLS_ISO8859_1=m
+CONFIG_NLS_ISO8859_2=m
+CONFIG_NLS_ISO8859_3=m
+CONFIG_NLS_ISO8859_4=m
+CONFIG_NLS_ISO8859_5=m
+CONFIG_NLS_ISO8859_6=m
+CONFIG_NLS_ISO8859_7=m
+CONFIG_NLS_ISO8859_9=m
+CONFIG_NLS_ISO8859_13=m
+CONFIG_NLS_ISO8859_14=m
+CONFIG_NLS_ISO8859_15=m
+CONFIG_NLS_KOI8_R=m
+CONFIG_NLS_KOI8_U=m
+CONFIG_NLS_UTF8=m
+CONFIG_DLM=m
+# CONFIG_DLM_DEBUG is not set
+# CONFIG_INSTRUMENTATION is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_MAGIC_SYSRQ=y
+CONFIG_UNUSED_SYMBOLS=y
+CONFIG_DEBUG_FS=y
+CONFIG_HEADERS_CHECK=y
+CONFIG_DEBUG_KERNEL=y
+CONFIG_DEBUG_SHIRQ=y
+CONFIG_DETECT_SOFTLOCKUP=y
+CONFIG_SCHED_DEBUG=y
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+CONFIG_DEBUG_PREEMPT=y
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_RT_MUTEX_TESTER is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_LOCK_STAT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_KOBJECT is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+CONFIG_DEBUG_INFO=y
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_DEBUG_SG is not set
+CONFIG_FRAME_POINTER=y
+CONFIG_FORCED_INLINING=y
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_SAMPLES is not set
+CONFIG_DEBUG_USER=y
+CONFIG_DEBUG_ERRORS=y
+# CONFIG_DEBUG_LL is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+CONFIG_CRYPTO=y
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_ABLKCIPHER=m
+CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_HMAC=y
+CONFIG_CRYPTO_XCBC=m
+CONFIG_CRYPTO_NULL=m
+CONFIG_CRYPTO_MD4=m
+CONFIG_CRYPTO_MD5=y
+CONFIG_CRYPTO_SHA1=m
+CONFIG_CRYPTO_SHA256=m
+CONFIG_CRYPTO_SHA512=m
+CONFIG_CRYPTO_WP512=m
+CONFIG_CRYPTO_TGR192=m
+CONFIG_CRYPTO_GF128MUL=m
+CONFIG_CRYPTO_ECB=m
+CONFIG_CRYPTO_CBC=y
+CONFIG_CRYPTO_PCBC=m
+CONFIG_CRYPTO_LRW=m
+# CONFIG_CRYPTO_XTS is not set
+CONFIG_CRYPTO_CRYPTD=m
+CONFIG_CRYPTO_DES=y
+CONFIG_CRYPTO_FCRYPT=m
+CONFIG_CRYPTO_BLOWFISH=m
+CONFIG_CRYPTO_TWOFISH=m
+CONFIG_CRYPTO_TWOFISH_COMMON=m
+CONFIG_CRYPTO_SERPENT=m
+CONFIG_CRYPTO_AES=m
+CONFIG_CRYPTO_CAST5=m
+CONFIG_CRYPTO_CAST6=m
+CONFIG_CRYPTO_TEA=m
+CONFIG_CRYPTO_ARC4=m
+CONFIG_CRYPTO_KHAZAD=m
+CONFIG_CRYPTO_ANUBIS=m
+# CONFIG_CRYPTO_SEED is not set
+CONFIG_CRYPTO_DEFLATE=m
+CONFIG_CRYPTO_MICHAEL_MIC=m
+CONFIG_CRYPTO_CRC32C=m
+CONFIG_CRYPTO_CAMELLIA=m
+CONFIG_CRYPTO_TEST=m
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_HW is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_CRC_CCITT=m
+CONFIG_CRC16=m
+CONFIG_CRC_ITU_T=m
+CONFIG_CRC32=y
+CONFIG_CRC7=m
+CONFIG_LIBCRC32C=m
+CONFIG_AUDIT_GENERIC=y
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_TEXTSEARCH=y
+CONFIG_TEXTSEARCH_KMP=m
+CONFIG_TEXTSEARCH_BM=m
+CONFIG_TEXTSEARCH_FSM=m
+CONFIG_PLIST=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
--- /dev/null
+--- linux-2.6.20.4.orig/include/asm-arm/kexec.h 2007-04-10 19:16:39.000000000 +0200
++++ linux-2.6.20.4/include/asm-arm/kexec.h 2007-04-03 05:01:09.000000000 +0200
+@@ -8,8 +8,8 @@
+ /* Maximum address we can reach in physical address mode */
+ #define KEXEC_DESTINATION_MEMORY_LIMIT (-1UL)
+ /* Maximum address we can use for the control code buffer */
+-#define KEXEC_CONTROL_MEMORY_LIMIT TASK_SIZE
+-
++//#define KEXEC_CONTROL_MEMORY_LIMIT TASK_SIZE
++#define KEXEC_CONTROL_MEMORY_LIMIT (-1UL)
+ #define KEXEC_CONTROL_CODE_SIZE 4096
+
+ #define KEXEC_ARCH KEXEC_ARCH_ARM
--- /dev/null
+[PATCH] Export atags to userspace and allow kexec to use customised atags
+
+Currently, the atags used by kexec are fixed to the ones originally used
+to boot the kernel. This is less than ideal as changing the commandline,
+initrd and other options would be a useful feature.
+
+This patch exports the atags used for the current kernel to userspace
+through an "atags" file in procfs. The presence of the file is
+controlled by its own Kconfig option and cleans up several ifdef blocks
+into a separate file. The tags for the new kernel are assumed to be at
+a fixed location before the kernel image itself. The location of the
+tags used to boot the original kernel is unimportant and no longer
+saved.
+
+Based on a patch from Uli Luckas <u.luckas@road.de>
+
+Signed-off-by: Richard Purdie <rpurdie@rpsys.net>
+
+---
+ arch/arm/Kconfig | 7 +++
+ arch/arm/kernel/Makefile | 1
+ arch/arm/kernel/atags.c | 86 ++++++++++++++++++++++++++++++++++++++
+ arch/arm/kernel/atags.h | 5 ++
+ arch/arm/kernel/machine_kexec.c | 2
+ arch/arm/kernel/relocate_kernel.S | 30 +------------
+ arch/arm/kernel/setup.c | 32 --------------
+ include/asm-arm/kexec.h | 3 +
+ 8 files changed, 110 insertions(+), 56 deletions(-)
+
+Index: linux-2.6.23/arch/arm/kernel/atags.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.23/arch/arm/kernel/atags.c 2008-01-20 15:56:02.000000000 +0000
+@@ -0,0 +1,86 @@
++#include <linux/slab.h>
++#include <linux/kexec.h>
++#include <linux/proc_fs.h>
++#include <asm/setup.h>
++#include <asm/types.h>
++#include <asm/page.h>
++
++struct buffer {
++ size_t size;
++ char *data;
++};
++static struct buffer tags_buffer;
++
++static int
++read_buffer(char* page, char** start, off_t off, int count,
++ int* eof, void* data)
++{
++ struct buffer *buffer = (struct buffer *)data;
++
++ if (off >= buffer->size) {
++ *eof = 1;
++ return 0;
++ }
++
++ count = min((int) (buffer->size - off), count);
++
++ memcpy(page, &buffer->data[off], count);
++
++ return count;
++}
++
++
++static int
++create_proc_entries(void)
++{
++ struct proc_dir_entry* tags_entry;
++
++ tags_entry = create_proc_read_entry("atags", 0400, &proc_root, read_buffer, &tags_buffer);
++ if (!tags_entry)
++ return -ENOMEM;
++
++ return 0;
++}
++
++
++static char __initdata atags_copy_buf[KEXEC_BOOT_PARAMS_SIZE];
++static char __initdata *atags_copy;
++
++void __init save_atags(const struct tag *tags)
++{
++ atags_copy = atags_copy_buf;
++ memcpy(atags_copy, tags, KEXEC_BOOT_PARAMS_SIZE);
++}
++
++
++static int __init init_atags_procfs(void)
++{
++ struct tag *tag;
++ int error;
++
++ if (!atags_copy) {
++ printk(KERN_WARNING "Exporting ATAGs: No saved tags found\n");
++ return -EIO;
++ }
++
++ for (tag = (struct tag *) atags_copy; tag->hdr.size; tag = tag_next(tag))
++ ;
++
++ tags_buffer.size = ((char *) tag - atags_copy) + sizeof(tag->hdr);
++ tags_buffer.data = kmalloc(tags_buffer.size, GFP_KERNEL);
++ if (tags_buffer.data == NULL)
++ return -ENOMEM;
++ memcpy(tags_buffer.data, atags_copy, tags_buffer.size);
++
++ error = create_proc_entries();
++ if (error) {
++ printk(KERN_ERR "Exporting ATAGs: not enough memory\n");
++ kfree(tags_buffer.data);
++ tags_buffer.size = 0;
++ tags_buffer.data = NULL;
++ }
++
++ return error;
++}
++
++arch_initcall(init_atags_procfs);
+Index: linux-2.6.23/arch/arm/kernel/atags.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.23/arch/arm/kernel/atags.h 2008-01-20 15:56:02.000000000 +0000
+@@ -0,0 +1,5 @@
++#ifdef CONFIG_ATAGS_PROC
++extern void save_atags(struct tag *tags);
++#else
++static inline void save_atags(struct tag *tags) { }
++#endif
+Index: linux-2.6.23/arch/arm/kernel/Makefile
+===================================================================
+--- linux-2.6.23.orig/arch/arm/kernel/Makefile 2007-10-09 21:31:38.000000000 +0100
++++ linux-2.6.23/arch/arm/kernel/Makefile 2008-01-20 15:56:02.000000000 +0000
+@@ -19,6 +19,7 @@ obj-$(CONFIG_ISA_DMA) += dma-isa.o
+ obj-$(CONFIG_PCI) += bios32.o isa.o
+ obj-$(CONFIG_SMP) += smp.o
+ obj-$(CONFIG_KEXEC) += machine_kexec.o relocate_kernel.o
++obj-$(CONFIG_ATAGS_PROC) += atags.o
+ obj-$(CONFIG_OABI_COMPAT) += sys_oabi-compat.o
+
+ obj-$(CONFIG_CRUNCH) += crunch.o crunch-bits.o
+Index: linux-2.6.23/arch/arm/kernel/setup.c
+===================================================================
+--- linux-2.6.23.orig/arch/arm/kernel/setup.c 2008-01-20 15:55:43.000000000 +0000
++++ linux-2.6.23/arch/arm/kernel/setup.c 2008-01-20 15:56:02.000000000 +0000
+@@ -24,7 +24,6 @@
+ #include <linux/interrupt.h>
+ #include <linux/smp.h>
+ #include <linux/fs.h>
+-#include <linux/kexec.h>
+
+ #include <asm/cpu.h>
+ #include <asm/elf.h>
+@@ -39,6 +38,7 @@
+ #include <asm/mach/time.h>
+
+ #include "compat.h"
++#include "atags.h"
+
+ #ifndef MEM_SIZE
+ #define MEM_SIZE (16*1024*1024)
+@@ -784,23 +784,6 @@ static int __init customize_machine(void
+ }
+ arch_initcall(customize_machine);
+
+-#ifdef CONFIG_KEXEC
+-
+-/* Physical addr of where the boot params should be for this machine */
+-extern unsigned long kexec_boot_params_address;
+-
+-/* Physical addr of the buffer into which the boot params are copied */
+-extern unsigned long kexec_boot_params_copy;
+-
+-/* Pointer to the boot params buffer, for manipulation and display */
+-unsigned long kexec_boot_params;
+-EXPORT_SYMBOL(kexec_boot_params);
+-
+-/* The buffer itself - make sure it is sized correctly */
+-static unsigned long kexec_boot_params_buf[(KEXEC_BOOT_PARAMS_SIZE + 3) / 4];
+-
+-#endif
+-
+ void __init setup_arch(char **cmdline_p)
+ {
+ struct tag *tags = (struct tag *)&init_tags;
+@@ -819,18 +802,6 @@ void __init setup_arch(char **cmdline_p)
+ else if (mdesc->boot_params)
+ tags = phys_to_virt(mdesc->boot_params);
+
+-#ifdef CONFIG_KEXEC
+- kexec_boot_params_copy = virt_to_phys(kexec_boot_params_buf);
+- kexec_boot_params = (unsigned long)kexec_boot_params_buf;
+- if (__atags_pointer) {
+- kexec_boot_params_address = __atags_pointer;
+- memcpy((void *)kexec_boot_params, tags, KEXEC_BOOT_PARAMS_SIZE);
+- } else if (mdesc->boot_params) {
+- kexec_boot_params_address = mdesc->boot_params;
+- memcpy((void *)kexec_boot_params, tags, KEXEC_BOOT_PARAMS_SIZE);
+- }
+-#endif
+-
+ /*
+ * If we have the old style parameters, convert them to
+ * a tag list.
+@@ -846,6 +817,7 @@ void __init setup_arch(char **cmdline_p)
+ if (tags->hdr.tag == ATAG_CORE) {
+ if (meminfo.nr_banks != 0)
+ squash_mem_tags(tags);
++ save_atags(tags);
+ parse_tags(tags);
+ }
+
+Index: linux-2.6.23/arch/arm/Kconfig
+===================================================================
+--- linux-2.6.23.orig/arch/arm/Kconfig 2008-01-20 15:55:43.000000000 +0000
++++ linux-2.6.23/arch/arm/Kconfig 2008-01-20 15:58:52.000000000 +0000
+@@ -865,6 +865,13 @@ config KEXEC
+ initially work for you. It may help to enable device hotplugging
+ support.
+
++config ATAGS_PROC
++ bool "Export atags in procfs"
++ default n
++ help
++ Should the atags used to boot the kernel be exported in an "atags"
++ file in procfs. Useful with kexec.
++
+ endmenu
+
+ if (ARCH_SA1100 || ARCH_INTEGRATOR || ARCH_OMAP || ARCH_IMX )
+Index: linux-2.6.23/arch/arm/kernel/machine_kexec.c
+===================================================================
+--- linux-2.6.23.orig/arch/arm/kernel/machine_kexec.c 2007-10-09 21:31:38.000000000 +0100
++++ linux-2.6.23/arch/arm/kernel/machine_kexec.c 2008-01-20 15:56:03.000000000 +0000
+@@ -21,6 +21,7 @@ extern void setup_mm_for_reboot(char mod
+ extern unsigned long kexec_start_address;
+ extern unsigned long kexec_indirection_page;
+ extern unsigned long kexec_mach_type;
++extern unsigned long kexec_boot_atags;
+
+ /*
+ * Provide a dummy crash_notes definition while crash dump arrives to arm.
+@@ -62,6 +63,7 @@ void machine_kexec(struct kimage *image)
+ kexec_start_address = image->start;
+ kexec_indirection_page = page_list;
+ kexec_mach_type = machine_arch_type;
++ kexec_boot_atags = image->start - KEXEC_ARM_ZIMAGE_OFFSET + KEXEC_ARM_ATAGS_OFFSET;
+
+ /* copy our kernel relocation code to the control code page */
+ memcpy(reboot_code_buffer,
+Index: linux-2.6.23/arch/arm/kernel/relocate_kernel.S
+===================================================================
+--- linux-2.6.23.orig/arch/arm/kernel/relocate_kernel.S 2008-01-20 15:55:43.000000000 +0000
++++ linux-2.6.23/arch/arm/kernel/relocate_kernel.S 2008-01-20 15:56:03.000000000 +0000
+@@ -7,23 +7,6 @@
+ .globl relocate_new_kernel
+ relocate_new_kernel:
+
+- /* Move boot params back to where the kernel expects them */
+-
+- ldr r0,kexec_boot_params_address
+- teq r0,#0
+- beq 8f
+-
+- ldr r1,kexec_boot_params_copy
+- mov r6,#KEXEC_BOOT_PARAMS_SIZE/4
+-7:
+- ldr r5,[r1],#4
+- str r5,[r0],#4
+- subs r6,r6,#1
+- bne 7b
+-
+-8:
+- /* Boot params moved, now go on with the kernel */
+-
+ ldr r0,kexec_indirection_page
+ ldr r1,kexec_start_address
+
+@@ -67,7 +50,7 @@ relocate_new_kernel:
+ mov lr,r1
+ mov r0,#0
+ ldr r1,kexec_mach_type
+- ldr r2,kexec_boot_params_address
++ ldr r2,kexec_boot_atags
+ mov pc,lr
+
+ .globl kexec_start_address
+@@ -82,14 +65,9 @@ kexec_indirection_page:
+ kexec_mach_type:
+ .long 0x0
+
+- /* phy addr where new kernel will expect to find boot params */
+- .globl kexec_boot_params_address
+-kexec_boot_params_address:
+- .long 0x0
+-
+- /* phy addr where old kernel put a copy of orig boot params */
+- .globl kexec_boot_params_copy
+-kexec_boot_params_copy:
++ /* phy addr of the atags for the new kernel */
++ .globl kexec_boot_atags
++kexec_boot_atags:
+ .long 0x0
+
+ relocate_new_kernel_end:
+Index: linux-2.6.23/include/asm-arm/kexec.h
+===================================================================
+--- linux-2.6.23.orig/include/asm-arm/kexec.h 2008-01-20 15:55:57.000000000 +0000
++++ linux-2.6.23/include/asm-arm/kexec.h 2008-01-20 15:56:03.000000000 +0000
+@@ -16,6 +16,9 @@
+
+ #define KEXEC_BOOT_PARAMS_SIZE 1536
+
++#define KEXEC_ARM_ATAGS_OFFSET 0x1000
++#define KEXEC_ARM_ZIMAGE_OFFSET 0x8000
++
+ #ifndef __ASSEMBLY__
+
+ struct kimage;
--- /dev/null
+diff -Nur linux-2.6.24.vanilla/drivers/mmc/card/Makefile linux-2.6.24/drivers/mmc/card/Makefile
+--- linux-2.6.24.vanilla/drivers/mmc/card/Makefile 2008-01-24 23:58:37.000000000 +0100
++++ linux-2.6.24/drivers/mmc/card/Makefile 2008-02-23 03:10:45.000000000 +0100
+@@ -6,8 +6,11 @@
+ EXTRA_CFLAGS += -DDEBUG
+ endif
+
++ifeq ($(CONFIG_SA1100_SIMPAD),y)
++# nothing to do
++else
+ obj-$(CONFIG_MMC_BLOCK) += mmc_block.o
+ mmc_block-objs := block.o queue.o
+
+ obj-$(CONFIG_SDIO_UART) += sdio_uart.o
+-
++endif
+diff -Nur linux-2.6.24.vanilla/drivers/mmc/core/Makefile linux-2.6.24/drivers/mmc/core/Makefile
+--- linux-2.6.24.vanilla/drivers/mmc/core/Makefile 2008-01-24 23:58:37.000000000 +0100
++++ linux-2.6.24/drivers/mmc/core/Makefile 2008-02-23 03:10:45.000000000 +0100
+@@ -6,9 +6,13 @@
+ EXTRA_CFLAGS += -DDEBUG
+ endif
+
++ifeq ($(CONFIG_SA1100_SIMPAD),y)
++# nothing to do
++else
+ obj-$(CONFIG_MMC) += mmc_core.o
+ mmc_core-y := core.o sysfs.o bus.o host.o \
+ mmc.o mmc_ops.o sd.o sd_ops.o \
+ sdio.o sdio_ops.o sdio_bus.o \
+ sdio_cis.o sdio_io.o sdio_irq.o
++endif
+
+diff -Nur linux-2.6.24.vanilla/drivers/mmc/host/Kconfig linux-2.6.24/drivers/mmc/host/Kconfig
+--- linux-2.6.24.vanilla/drivers/mmc/host/Kconfig 2008-01-24 23:58:37.000000000 +0100
++++ linux-2.6.24/drivers/mmc/host/Kconfig 2008-02-23 03:10:45.000000000 +0100
+@@ -4,6 +4,7 @@
+
+ comment "MMC/SD Host Controller Drivers"
+
++
+ config MMC_ARMMMCI
+ tristate "ARM AMBA Multimedia Card Interface support"
+ depends on ARM_AMBA
+@@ -130,3 +131,9 @@
+
+ If unsure, or if your system has no SPI master driver, say N.
+
++config MMC_SPI_BLOCK
++ tristate "MMC/SD over GPIO (Software SPI) for SIMpad (EXPERIMENTAL)"
++ depends on SA1100_SIMPAD && EXPERIMENTAL
++ help
++ Say Y here to enable MMC block device over GPIO
++ if you have done the MMC-Mod. For Module say M.
+diff -Nur linux-2.6.24.vanilla/drivers/mmc/host/Makefile linux-2.6.24/drivers/mmc/host/Makefile
+--- linux-2.6.24.vanilla/drivers/mmc/host/Makefile 2008-01-24 23:58:37.000000000 +0100
++++ linux-2.6.24/drivers/mmc/host/Makefile 2008-02-23 03:10:45.000000000 +0100
+@@ -6,6 +6,9 @@
+ EXTRA_CFLAGS += -DDEBUG
+ endif
+
++ifeq ($(CONFIG_SA1100_SIMPAD),y)
++obj-$(CONFIG_MMC_SPI_BLOCK) += mmc_spi_block.o
++else
+ obj-$(CONFIG_MMC_ARMMMCI) += mmci.o
+ obj-$(CONFIG_MMC_PXA) += pxamci.o
+ obj-$(CONFIG_MMC_IMX) += imxmmc.o
+@@ -17,4 +20,4 @@
+ obj-$(CONFIG_MMC_AT91) += at91_mci.o
+ obj-$(CONFIG_MMC_TIFM_SD) += tifm_sd.o
+ obj-$(CONFIG_MMC_SPI) += mmc_spi.o
+-
++endif
+diff -Nur linux-2.6.24.vanilla/drivers/mmc/host/mmc_spi_block.c linux-2.6.24/drivers/mmc/host/mmc_spi_block.c
+--- linux-2.6.24.vanilla/drivers/mmc/host/mmc_spi_block.c 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.24/drivers/mmc/host/mmc_spi_block.c 2008-02-23 03:10:45.000000000 +0100
+@@ -0,0 +1,1622 @@
++/*
++ * Copyright (c) Cl�ent Ballabriga, 2005 - GPL
++ * Copyright (c) Guylhem Aznar, 2005 - GPL
++ *
++ * Please check http://externe.net/zaurus/simpad-bluetooth reference design first.
++ *
++ * Based on Madsuk/Rohde work on a MMC driver for the WRT54G.
++ *
++ * This is an ugly hack of a driver. I am surprised if it ever works!
++ * So please use a real driver or contribute one to the 2.4/2.6 mmc framework
++ *
++ * mrdata: ported to 2.6
++ */
++
++#include <linux/module.h>
++#include <linux/init.h>
++
++#include <linux/sched.h>
++#include <linux/kernel.h>
++#include <linux/fs.h>
++#include <linux/errno.h>
++#include <linux/hdreg.h>
++#include <linux/kdev_t.h>
++#include <linux/blkdev.h>
++#include <linux/spinlock.h>
++#include <linux/time.h>
++#include <linux/delay.h>
++#include <linux/timer.h>
++
++#include <linux/platform_device.h>
++
++#include <asm/hardware.h>
++#include <asm/arch/simpad.h>
++#include <asm/arch/gpio.h>
++
++static int major = 121;
++
++#define DEVICE_NAME "mmc_spi"
++
++static int hd_sizes[1<<6];
++static int hd_blocksizes[1<<6];
++static int hd_hardsectsizes[1<<6];
++static int hd_maxsect[1<<6];
++static struct hd_struct hd[1<<6];
++
++static struct gendisk *mmc_disk;
++
++static struct platform_device *mmc_dev; /* the one and only instance */
++
++static spinlock_t mmc_spi_lock;
++
++/*
++ * *******************************************************************
++ *
++ * This is the only configurable part.
++ *
++ * *******************************************************************
++ *
++ */
++
++// #define DEBUG 1
++// #define DEBUG_HD 1
++// #define CHECK_MEDIA_CHANGE // for developement ONLY, not working yet
++
++/* Let that include where it is or compilation fails on INIT_REQUEST/CURRENT */
++
++
++/*
++ * If you are using different GPIOs in your hardware hack, you must
++ * first make sure they are unused for other functions and then
++ * configure them here.
++ *
++ * On the simpad I use spare pins from the UART1 (internal serial port -> DECT 20-polig):
++ *
++ * Funktion PIN ## Original direction GPIO ## SPI function New direction SD/MMC
++ * - DCD PIN 08 (in) GPIO 23 DO - new name: DI -> MISO (in) PIN 7 Data Out
++ * - DTR PIN 11 (out) GPIO 07 CS (out) PIN 1 Chip Select
++ * - RI PIN 14 (in) GPIO 19 CLK (out) PIN 5 Clock
++ * - DSR PIN 16 (in) GPIO 06 DI - new name: DO -> MOSI (out) PIN 2 Data In
++ *
++ *
++ * SPI: MISO = Master In / Slave OUT MOSI = Master Out / Slave In
++ *
++ * Don't worry about in/out original function - the GPIOs will be
++ * reprogrammed.
++ */
++
++#define GPIO_SD_DI 23
++#define GPIO_SD_CS 7
++#define GPIO_SD_CLK 19
++#define GPIO_SD_DO 6
++
++// #define FAST_GPIO_SD_DI GPIO_GPIO23
++// #define FAST_GPIO_SD_CS GPIO_GPIO7
++// #define FAST_GPIO_SD_CLK GPIO_GPIO19
++// #define FAST_GPIO_SD_DO GPIO_GPIO6
++
++#define FAST_GPIO_SD_DI GPIO_UART1_DCD
++#define FAST_GPIO_SD_CS GPIO_UART1_DTR
++#define FAST_GPIO_SD_CLK GPIO_UART1_RI
++#define FAST_GPIO_SD_DO GPIO_UART1_DSR
++
++/*
++ * *******************************************************************
++ *
++ * Do not change anything below !
++ *
++ * *******************************************************************
++ *
++ */
++
++/* GPIO states */
++#define LOW 0
++#define HIGH 1
++
++#define INPUT 0
++#define OUTPUT 1
++
++#define PRESENT 1
++#define ABSENT 0
++
++typedef unsigned int uint32;
++typedef unsigned long u32_t;
++typedef unsigned short u16_t;
++typedef unsigned char u8_t;
++
++// static struct timer_list mmc_timer;
++
++// static struct timeval s_zeit, e_zeit;
++
++/* start with no card */
++static int mmc_media_detect = 0;
++// static int mmc_media_changed = 1;
++
++
++/////////////////////
++// prototypes
++static int mmc_open(struct inode *inode, struct file *filp);
++static int mmc_release(struct inode *inode, struct file *filp);
++static int mmc_ioctl(struct inode *inode, struct file *filp, unsigned int cmd, unsigned long arg);
++static void mmc_spi_request(struct request_queue *q);
++
++
++/*
++ * *******************************************************************
++ *
++ * Begin GPIO hardware access functions.
++ *
++ * *******************************************************************
++ *
++ */
++
++#define gpio_read(a) ((GPLR & a) ? 1 : 0)
++#define gpio_write_high(a) GPSR = a
++#define gpio_write_low(a) GPCR = a
++
++/* set MMC_Chip_Select to HIGH (MMC/SD-Card inactiv) */
++#define MMC_Disable() gpio_write_high( FAST_GPIO_SD_CS)
++
++/* set MMC_Chip_Select to LOW (MMC/SD-Card activ) */
++#define MMC_Enable() gpio_write_low( FAST_GPIO_SD_CS)
++
++/*
++ * *******************************************************************
++ *
++ * Begin SPI hardware access functions.
++ *
++ * *******************************************************************
++ *
++ */
++static int mmc_spi_media_detect(void)
++{
++// FIXME: add card detection/test by SPI
++
++ return 1;
++}
++
++static int mmc_spi_hardware_init(void)
++{
++ printk("\nmmc: GPIO init\n");
++
++ /* cut existing functions */
++ gpio_set_alternative_function(GPIO_SD_CLK, 0);
++ gpio_set_alternative_function(GPIO_SD_DI, 0);
++ gpio_set_alternative_function(GPIO_SD_DO, 0);
++ gpio_set_alternative_function(GPIO_SD_CS, 0);
++
++ /* remap directions and set state of spi pins */
++ gpio_direction_output(GPIO_SD_CLK, 0);
++ gpio_direction_input(GPIO_SD_DI);
++ gpio_direction_output(GPIO_SD_DO, 0);
++ gpio_direction_output(GPIO_SD_CS, 0);
++
++ printk("mmc: initialising MMC\n");
++
++ /* Start */
++ MMC_Disable();
++ gpio_write_low( FAST_GPIO_SD_CLK);
++ gpio_write_high( FAST_GPIO_SD_DO);
++ return 0;
++}
++
++/* return what has been read, write the parameter */
++/* Clockrate round about 1,2 MHz */
++
++static unsigned char mmc_spi_readwrite(unsigned char data_out)
++{
++ unsigned char i;
++ unsigned char result = 0;
++
++ for(i = 0x80 ; i != 0 ; i >>= 1)
++ {
++ if (data_out & i)
++ {
++ gpio_write_high( FAST_GPIO_SD_DO);
++ }
++ else
++ {
++ gpio_write_low( FAST_GPIO_SD_DO);
++ }
++
++ gpio_write_high( FAST_GPIO_SD_CLK);
++
++ if (gpio_read( FAST_GPIO_SD_DI) == 1)
++ {
++ result |= i;
++ }
++
++ gpio_write_low( FAST_GPIO_SD_CLK);
++
++ }
++
++ gpio_write_high( FAST_GPIO_SD_DO);
++
++ return (result);
++}
++
++/* return what has been read, write the parameter */
++/* Clockrate round 200 kHz */
++
++static unsigned char mmc_spi_readwrite_slow(unsigned char data_out)
++{
++ unsigned char i;
++ unsigned char result = 0;
++
++ for(i = 0x80 ; i != 0 ; i >>= 1)
++ {
++ if (data_out & i)
++ {
++ gpio_write_high( FAST_GPIO_SD_DO);
++ }
++ else
++ {
++ gpio_write_low( FAST_GPIO_SD_DO);
++ }
++
++ udelay(10);
++
++ gpio_write_high( FAST_GPIO_SD_CLK);
++
++ udelay(10);
++
++ if (gpio_read( FAST_GPIO_SD_DI) == 1)
++ {
++ result |= i;
++ }
++
++ udelay(10);
++
++ gpio_write_low( FAST_GPIO_SD_CLK);
++
++ udelay(10);
++
++ }
++
++ gpio_write_high( FAST_GPIO_SD_DO);
++
++ udelay(10);
++
++ // printk("Send Byte = 0x%2X Receive Byte = 0x%2X \n", data_out, result);
++
++ return (result);
++}
++
++/* return what has been read */
++
++static unsigned char mmc_spi_read_only(void)
++{
++ unsigned char i;
++ unsigned char result = 0;
++
++ for(i = 0x80 ; i != 0 ; i >>= 1)
++ {
++
++ gpio_write_high( FAST_GPIO_SD_CLK);
++
++ if (gpio_read( FAST_GPIO_SD_DI) == 1)
++ {
++ result |= i;
++ }
++
++ gpio_write_low( FAST_GPIO_SD_CLK);
++
++ }
++
++ return (result);
++}
++
++/* write the parameter */
++/* Clockrate round about 3,6 MHz */
++
++static unsigned char mmc_spi_write_only(unsigned char data_out)
++{
++ unsigned char i;
++ unsigned char result = 0;
++
++ for(i = 0x80 ; i != 0 ; i >>= 1)
++ {
++
++ if (data_out & i)
++ {
++ gpio_write_high( FAST_GPIO_SD_DO);
++ }
++ else
++ {
++ gpio_write_low( FAST_GPIO_SD_DO);
++ }
++
++ gpio_write_high( FAST_GPIO_SD_CLK);
++
++ gpio_write_low( FAST_GPIO_SD_CLK);
++
++ }
++
++ gpio_write_high( FAST_GPIO_SD_DO);
++
++ return (result);
++}
++
++
++/**
++ * this function was contributed by: rcichielo from openwrt forums
++ *
++ * Comments added by Marc DENTY on 2007-03-20
++ *
++ * Sequence to read a card's "CID" bytes (name, serial number etc)
++ *
++ * Send: 4ah,00h,00h,00h,00h,00h - CMD10, no args, null CRC
++ * Read: xx - NCR Time
++ * Read: xx - Command Response (Should be 00h)
++ * Read: until FEh is received - Wait for Data token
++ * Read: yy * 16 - Get 16 bytes from CID
++ * Read: zz - Read CRC lo byte
++ * Read: zz - Read CRC hi byte
++ *
++ * Useful locations in the returned data packet:
++ *
++ * 03h-08h Manufacturers's name in ascii
++ * 0ah-0dh Card's 32 bit serial number
++ */
++/**
++ * Comments added by Cyril CATTIAUX on 2007-03-21
++ *
++ * CID format specification (from Sandisk SD Product Manual v1.9)
++ *
++ * cid[00 ] Manufacturer ID (unsigned byte)
++ * cid[01-02] OEM/Application ID (ASCII)
++ * cid[03-07] Product Name (ASCII)
++ * cid[08 ] Product Revistion (BCD coded number)
++ * cid[09-12] Serial Number (32-bit unsigned int)
++ * cid[13-14] Reserved(bit 12->15) - Manufacture Date(bit 0->11)
++ * cid[15 ] CRC7(bit 1->7) - Not used, allways 1 (bit 0)
++*/
++static int mmc_read_cid(unsigned char *cid)
++{
++ unsigned char result = 0;
++ int i;
++
++ MMC_Enable();
++
++ /* wait */
++ for (i = 0; i < 4; i++)
++ {
++ result=mmc_spi_readwrite(0xff);
++ }
++
++ /* issue CID (card identification data) read request */
++ mmc_spi_readwrite(0xff);
++ mmc_spi_readwrite(0x40 | 10);
++ mmc_spi_readwrite(0x00);
++ mmc_spi_readwrite(0x00);
++ mmc_spi_readwrite(0x00);
++ mmc_spi_readwrite(0x00);
++ mmc_spi_readwrite(0x95);
++
++ for (i = 0; i < 8; i++)
++ {
++ result=mmc_spi_readwrite(0xff);
++
++ if(result == 0x00)
++ break;
++ }
++
++ if (result != 0x00) {
++ MMC_Disable();
++ mmc_spi_readwrite(0xff);
++ return(1);
++ }
++
++ for (i = 0; i < 8; i++) {
++ result = mmc_spi_readwrite(0xff);
++ if (result == 0xfe) break;
++ }
++
++ if (result != 0xfe) {
++ MMC_Disable();
++ mmc_spi_readwrite(0xff);
++ return(2);
++ }
++
++ for (i = 0; i < 16; i++) {
++ result = mmc_spi_readwrite(0xff);
++ cid[i] = result;
++ }
++
++ mmc_spi_readwrite(0xff);
++ mmc_spi_readwrite(0xff);
++
++ MMC_Disable();
++ mmc_spi_readwrite(0xff);
++
++ return 0;
++}
++
++
++/**
++ * Comments added by Cyril CATTIAUX on 2007-03-21
++ *
++ * CID format specification (from Sandisk SD Product Manual v1.9)
++ *
++ * cid[00 ] Manufacturer ID (unsigned byte)
++ * cid[01-02] OEM/Application ID (ASCII)
++ * cid[03-07] Product Name (ASCII)
++ * cid[08 ] Product Revision (BCD coded 2 digit number)
++ * cid[09-12] Serial Number (32-bit unsigned int)
++ * cid[13-14] Manufacture Date(bit 0->11) (BCD coded 3 digit number YYM offset from 2000) - Reserved(bit 12->15)
++ * cid[15 ] Not used, allways 1 (bit 0) - CRC7(bit 1->7)
++*/
++static void mmc_show_cid_info(void)
++{
++ int i, result;
++ unsigned short tmps;
++ unsigned char cid[16];
++
++ char manufacturer_id;
++ char oem_id[3];
++ char product_name[6];
++ unsigned char product_revision_h, product_revision_l;
++ unsigned int product_sn;
++ unsigned short product_date_y;
++ unsigned char product_date_m;
++
++ result = mmc_read_cid(cid);
++
++ if (result == 0)
++ {
++ printk("mmc_init: MMC/SD Card ID: ");
++ for (i=0; i<16; i++) {
++ printk("%02X ", cid[i]);
++ }
++ manufacturer_id=cid[0];
++ strncpy(oem_id, &cid[1], 2);
++ oem_id[2]='\0';
++ strncpy(product_name, &cid[3], 5);
++ product_name[5]='\0';
++ product_revision_h=(cid[8] >> 4) & 0xf;
++ product_revision_l=cid[8] & 0xf;
++ product_sn=(cid[9]<<24) + (cid[10]<<16) + (cid[11]<<8) + cid[12];
++ tmps=((cid[13]<<8) + cid[14]) & 0x0fff;
++ product_date_y=2000 + (((tmps >> 8) & 0xf) * 10) + ((tmps >> 4) & 0xf);
++ product_date_m=tmps & 0xf;
++
++ printk("\nManufacturer ID : %02X\n", manufacturer_id);
++ printk("OEM/Application ID: %s\n", oem_id);
++ printk("Product name : %s\n", product_name);
++ printk("Product revision : %d.%d\n", product_revision_h, product_revision_l);
++ printk("Product SN : %08X\n", product_sn);
++ printk("Product Date : %d-%d\n", product_date_y, product_date_m);
++
++ } else {
++ printk("mmc_init: impossible to get card indentification info for reason code: %02x", result);
++ }
++}
++
++
++/*
++static int mmc_spi_hw_test(void)
++{
++ unsigned char result, k;
++
++ unsigned int i, j, t;
++
++ printk("mmc_spi_hw_test -> \n\n");
++ k = 0x55;
++ for ( i = 0 ; i < 5; i++) {
++
++ printk("\n0x%2X - ", k);
++ for ( j = 0 ; j < 8; j++ ) {
++ do_gettimeofday( &s_zeit );
++ result = mmc_spi_readwrite_slow(k);
++ do_gettimeofday( &e_zeit );
++
++ if ( result != k ) {
++ printk("!>ERROR<! Transfer = 0x%2X Receive = 0x%2X Trail = %d \n", k, result, j);
++ // i = 255; j = 1000;
++ }
++
++ t = (e_zeit.tv_sec-s_zeit.tv_sec)*1000000+(e_zeit.tv_usec-s_zeit.tv_usec);
++ printk("Durchlauf: %i Versuch: %i von 8 -> Laufzeit: 0x%X s\n", i , j, t);
++ udelay(200);
++ }
++ printk("ready ");
++
++ // k++;
++ }
++ printk("ready ");
++ printk("\n\n");
++ return (0);
++}
++*/
++
++/*
++static int mmc_spi_speed_test(void)
++{
++ unsigned int i, j, k, l, t;
++
++ MMC_Disable();
++
++ for (k = 1; k < 6; k++)
++ {
++ l = 10000 * k;
++ for (j = 0; j < 5; j++)
++ {
++ do_gettimeofday( &s_zeit );
++ for (i = 0; i < l; i++)
++ mmc_spi_readwrite(0xff);
++ do_gettimeofday( &e_zeit );
++ t = (e_zeit.tv_sec-s_zeit.tv_sec)*1000000+(e_zeit.tv_usec-s_zeit.tv_usec);
++ printk("mmc_spi_readwrite: Laufzeit %u x : 0x%X \n", l, t);
++ }
++ }
++
++ for (k = 1; k < 1; k++)
++ {
++ l = 10000 * k;
++ for (j = 0; j < 1; j++)
++ {
++ do_gettimeofday( &s_zeit );
++ for (i = 0; i < l; i++)
++ mmc_spi_readwrite_slow(0xff);
++ do_gettimeofday( &e_zeit );
++ t = (e_zeit.tv_sec-s_zeit.tv_sec)*1000000+(e_zeit.tv_usec-s_zeit.tv_usec);
++ printk("mmc_spi_readwrite_slow: Laufzeit %u x : 0x%X \n", l, t);
++ }
++ }
++
++ for (k = 1; k < 6; k++)
++ {
++ l = 10000 * k;
++ for (j = 0; j < 5; j++)
++ {
++ do_gettimeofday( &s_zeit );
++ for (i = 0; i < l; i++)
++ mmc_spi_read_only();
++ do_gettimeofday( &e_zeit );
++ t = (e_zeit.tv_sec-s_zeit.tv_sec)*1000000+(e_zeit.tv_usec-s_zeit.tv_usec);
++ printk("mmc_spi_read_only: Laufzeit %u x : 0x%X \n", l, t);
++ }
++ }
++
++ for (k = 1; k < 6; k++)
++ {
++ l = 10000 * k;
++ for (j = 0; j < 5; j++)
++ {
++ do_gettimeofday( &s_zeit );
++ for (i = 0; i < l; i++)
++ mmc_spi_write_only(0xff);
++ do_gettimeofday( &e_zeit );
++ t = (e_zeit.tv_sec-s_zeit.tv_sec)*1000000+(e_zeit.tv_usec-s_zeit.tv_usec);
++ printk("mmc_spi_write_only: Laufzeit %u x : 0x%X \n", l, t);
++ }
++ }
++
++ return (1);
++
++}
++*/
++
++
++static int mmc_spi_card_init(void)
++{
++ unsigned char result = 0;
++ short i, j;
++
++// unsigned long flags;
++
++ // save_flags(flags);
++ // cli();
++
++/*
++ printk("GPIO_SD_CS dir: %u alt: %u\n", gpio_getdir(&gp, GPIO_SD_CS), gpio_getalt(&gp, GPIO_SD_CS));
++ printk("GPIO_SD_DI dir: %u alt: %u\n", gpio_getdir(&gp, GPIO_SD_DI), gpio_getalt(&gp, GPIO_SD_DI));
++ printk("GPIO_SD_DO dir: %u alt: %u\n", gpio_getdir(&gp, GPIO_SD_DO), gpio_getalt(&gp, GPIO_SD_DO));
++ printk("GPIO_SD_CS dir: %u alt: %u\n", gpio_getdir(&gp, GPIO_SD_CLK), gpio_getalt(&gp, GPIO_SD_CLK));
++*/
++
++ // printk("\nmmc: mmc_spi_hw_test() *START*\n");
++
++ // mmc_spi_hw_test();
++
++ printk("\nmmc: card init 1/2 (CMD0)\n");
++
++ for (j = 0; j < 10; j++)
++ {
++ MMC_Disable();
++
++ for (i = 0; i < 10; i++)
++ mmc_spi_readwrite_slow(0xff);
++
++ MMC_Enable();
++
++ mmc_spi_readwrite_slow(0xff);
++
++ mmc_spi_readwrite_slow(0x40);
++
++ for (i = 0; i < 4; i++) {
++
++ mmc_spi_readwrite_slow(0x00);
++
++ }
++
++ mmc_spi_readwrite_slow(0x95);
++
++ for (i = 0; i < 8; i++) {
++
++ result = mmc_spi_readwrite_slow(0xff);
++
++#ifdef DEBUG_HD
++ if (result != 0xff) {
++ if (result > 0x1F && result < 0x80)
++ printk("mmc: resp. (CMD0) Versuch(%d) BYTE: %d result = 0x%X Zeichen = %c\n", j, i, result, result);
++ else
++ printk("mmc: resp. (CMD0) Versuch(%d) BYTE: %d result = 0x%X\n", j, i, result);
++ }
++#endif
++ if (result == 0x01)
++ break;
++ }
++
++ if (result == 0x01)
++ break;
++
++ MMC_Disable();
++ mmc_spi_readwrite_slow(0xff);
++
++ mdelay(60);
++ }
++
++ if (result != 0x01) {
++
++ printk("mmc: card init 1/2 error: %d (CMD0) failed\n", result);
++ printk(" -> Hint: MMC/SD-Card realy (fully) inserted ?\n");
++
++ return (1);
++ }
++
++ printk("mmc: card init 1/2 (CMD0) success\n\n");
++
++ mdelay(1);
++
++ printk("mmc: card init 2/2 (CMD1)\n");
++ for (j = 0; j < 10; j++) {
++
++ mmc_spi_readwrite_slow(0xff);
++ mmc_spi_readwrite_slow(0x41);
++ for (i = 0; i < 4; i++)
++ mmc_spi_readwrite_slow(0x00);
++ mmc_spi_readwrite_slow(0x95);
++ for (i = 0; i < 8; i++) {
++ result = mmc_spi_readwrite_slow(0xff);
++#ifdef DEBUG_HD
++ // if (result >= 32 && result <= 127)
++ // printk("mmc: response (CMD1) Versuch(%d) start token BYTE: %d result = 0x%X Zeichen = %c\n", j, i, result, result);
++ // else
++ // printk("mmc: response (CMD1) Versuch(%d) start token BYTE: %d result = 0x%X\n", j, i, result);
++#endif
++ if (result == 0x00)
++ break;
++ }
++
++ mmc_spi_readwrite_slow(0xff);
++
++ if (result == 0x00) {
++ printk("mmc: card init 2/2 (CMD1) success\n\n");
++
++ mmc_spi_readwrite_slow(0xff);
++ mmc_spi_readwrite_slow(0x4d);
++ mmc_spi_readwrite_slow(0x00);
++ mmc_spi_readwrite_slow(0x00);
++ mmc_spi_readwrite_slow(0x00);
++ mmc_spi_readwrite_slow(0x00);
++ mmc_spi_readwrite_slow(0x95);
++ for (i = 0; i < 6; i++) {
++ result = mmc_spi_readwrite_slow(0xff);
++#ifdef DEBUG_HD
++ // if (result > 31 && result < 128)
++ // printk("mmc: response (CMD13) Versuch(%d) start token BYTE: %d result = 0x%X Zeichen = %c\n", j, i, result, result);
++ // else
++ // printk("mmc: response (CMD13) Versuch(%d) start token BYTE: %d result = 0x%X\n", j, i, result);
++#endif
++ // if (result == 0x00)
++ // break;
++ }
++ // mdelay(60);
++ MMC_Disable();
++ mmc_spi_readwrite_slow(0xff);
++ // mmc_spi_readwrite_slow(0xff);
++ // mdelay(10);
++
++ // restore_flags(flags);
++
++ return (0);
++ }
++ mdelay(60);
++ }
++ return (2);
++}
++
++
++static int mmc_spi_card_config(void)
++{
++ unsigned char result = 0;
++ short i, j;
++ unsigned char csd[32];
++ unsigned int c_size;
++ unsigned int c_size_mult;
++ unsigned int mult;
++ unsigned int read_bl_len;
++ unsigned int blocknr = 0;
++ unsigned int block_len = 0;
++ unsigned int size = 0;
++ unsigned char rd_buffer[528];
++// unsigned long flags;
++
++ MMC_Enable();
++
++ mmc_spi_readwrite_slow(0xff);
++ result = mmc_spi_readwrite_slow(0x51);
++ // mmc_spi_readwrite_slow(0x4A);
++ // mmc_spi_readwrite_slow(0x40+0x0D);
++ // mmc_spi_readwrite_slow(0x42);
++ for (i = 0; i < 4; i++)
++ mmc_spi_readwrite_slow(0x00);
++ mmc_spi_readwrite_slow(0x95);
++
++ // printk("mmc: (CMD17) response von 0x51 result = 0x%X\n", result);
++
++ for (i = 0; i < 8; i++) {
++ result = mmc_spi_readwrite_slow(0xff);
++#ifdef DEBUG_HD
++ // printk("mmc: (CMD17) response (start token) result = 0x%X\n", result);
++#endif
++ if (result == 0x00)
++ break;
++ }
++ if (result != 0x00) {
++ MMC_Disable();
++ mmc_spi_readwrite_slow(0xff);
++ // restore_flags(flags);
++ // mmc_spi_readwrite_slow(0xff);
++ return (1);
++ }
++ // restore_flags(flags);
++ for (i = 0; i < 8; i++) {
++ result = mmc_spi_readwrite_slow(0xff);
++ rd_buffer[i] = result;
++#ifdef DEBUG_HD
++ /*
++ if (result >= 32 && result <= 127)
++ printk("mmc: CMD17 response (start token) result = 0x%X Zeichen = %c\n", result, result);
++ else
++ printk("mmc: CMD17 response (start token) result = 0x%X\n", result);
++ */
++#endif
++ // if (result == 0xfe)
++ // break;
++ }
++ /*
++ if (result != 0xfe) {
++ MMC_Disable();
++ mmc_spi_readwrite_slow(0xff);
++ mmc_spi_readwrite_slow(0xff);
++ return(1);
++ }
++ */
++
++ for (i = 8; i < 520; i++) {
++ result = mmc_spi_readwrite_slow(0xff);
++ rd_buffer[i] = result;
++ }
++ for (i = 0; i < 2; i++) {
++ result = mmc_spi_readwrite_slow(0xff);
++ }
++ MMC_Disable();
++ mmc_spi_readwrite_slow(0xff);
++ // mmc_spi_readwrite_slow(0xff);
++
++ printk("Buffer - Start\n");
++
++ for ( i = 0 ; i < 33 ; i++) {
++ printk("\r\n%4X - ", i*16);
++ for ( j = 0 ; j < 16 ; j++) {
++ if ( rd_buffer[i*16+j] < 16)
++ printk("0%X ", rd_buffer[i*16+j]);
++ else
++ printk("%2X ", rd_buffer[i*16+j]);
++ }
++ for ( j = 0 ; j < 16 ; j++) {
++ if ( rd_buffer[i*16+j] < ' ')
++ printk(".");
++ else
++ printk("%c", rd_buffer[i*16+j]);
++ }
++ }
++
++ printk("\nBuffer - Ende\n");
++
++ mmc_show_cid_info();
++
++ for(j = 0 ; j < 1; j++) {
++ MMC_Enable();
++
++ // mdelay(1);
++
++ // save_flags(flags);
++ // cli();
++ mmc_spi_readwrite_slow(0xff);
++ mmc_spi_readwrite_slow(0x49);
++ // mmc_spi_readwrite_slow(0x4A);
++ // mmc_spi_readwrite_slow(0x40+0x0D);
++ // mmc_spi_readwrite_slow(0x42);
++ for (i = 0; i < 4; i++)
++ mmc_spi_readwrite_slow(0x00);
++ mmc_spi_readwrite_slow(0x95);
++ for (i = 0; i < 8; i++) {
++ result = mmc_spi_readwrite_slow(0xff);
++#ifdef DEBUG_HD
++ // printk("mmc: (CMD9) response (start token) result = 0x%X\n", result);
++#endif
++ if (result == 0x00)
++ break;
++ }
++ // restore_flags(flags);
++ if (result != 0x00) {
++ MMC_Disable();
++ mmc_spi_readwrite_slow(0xff);
++ // mmc_spi_readwrite_slow(0xff);
++ return (1);
++ }
++ for (i = 0; i < 22; i++) {
++ result = mmc_spi_readwrite_slow(0xff);
++#ifdef DEBUG_HD
++ if (result >= 32 && result <= 127)
++ printk("mmc: response (start token) result = 0x%X Zeichen = %c\n", result, result);
++ else
++ printk("mmc: response (start token) result = 0x%X\n", result);
++#endif
++ if (result == 0xfe)
++ break;
++ }
++ if (result == 0xfe)
++ break;
++
++ if (result != 0xfe) {
++ MMC_Disable();
++ mmc_spi_readwrite_slow(0xff);
++ // mmc_spi_readwrite_slow(0xff);
++ }
++ mdelay(60);
++ }
++
++ if (result != 0xfe) {
++ MMC_Disable();
++ mmc_spi_readwrite_slow(0xff);
++ printk("mmc: mmc card config (CMD9) failed result = 0x%X\n\n", result);
++ return (2);
++ }
++ for (i = 0; i < 16; i++) {
++ result = mmc_spi_readwrite_slow(0xff);
++ csd[i] = result;
++ }
++ for (i = 0; i < 2; i++) {
++ result = mmc_spi_readwrite_slow(0xff);
++ }
++ MMC_Disable();
++ mmc_spi_readwrite_slow(0xff);
++ // mmc_spi_readwrite_slow(0xff);
++
++ if (result == 0x00)
++ return (3);
++
++ c_size = (csd[8] & 0xC0) + (csd[7] << 8) + ((csd[6] & 0x03) << 16);
++ c_size >>= 6;
++ c_size_mult = (csd[10] & 0x80) + ((csd[9] & 0x03) << 8);
++ c_size_mult >>= 7;
++ read_bl_len = csd[5] & 0x0f;
++ mult = 1;
++ mult <<= c_size_mult + 2;
++ blocknr = (c_size + 1) * mult;
++ block_len = 1;
++ block_len <<= read_bl_len;
++ size = block_len * blocknr;
++ size >>= 10;
++
++ for (i = 0; i < (1 << 6); i++) {
++ hd_blocksizes[i] = 1024;
++ hd_hardsectsizes[i] = block_len;
++ hd_maxsect[i] = 256;
++ }
++ hd_sizes[0] = size;
++ hd[0].nr_sects = blocknr;
++
++ printk("Size = %d, hardsectsize = %d, sectors = %d\n",
++ size, block_len, blocknr);
++
++ return 0;
++}
++
++
++/*
++ * *******************************************************************
++ *
++ * End of SPI hardware access functions.
++ *
++ * *******************************************************************
++ */
++
++
++static int mmc_spi_write_block(unsigned int dest_addr, unsigned char *data)
++{
++ unsigned int address;
++ unsigned char result = 0;
++ unsigned char ab0, ab1, ab2, ab3;
++ int i;
++
++ address = dest_addr;
++
++ ab3 = 0xff & (address >> 24);
++ ab2 = 0xff & (address >> 16);
++ ab1 = 0xff & (address >> 8);
++ ab0 = 0xff & address;
++
++ MMC_Enable();
++
++ mmc_spi_readwrite(0xff);
++
++ mmc_spi_readwrite(0x58);
++ mmc_spi_readwrite(ab3); /* msb */
++ mmc_spi_readwrite(ab2);
++ mmc_spi_readwrite(ab1);
++ mmc_spi_readwrite(ab0); /* lsb */
++ mmc_spi_readwrite(0xff);
++
++ for (i = 0; i < 8; i++)
++ {
++ result = mmc_spi_readwrite(0xff);
++ if (result == 0x00)
++ {
++ break;
++ }
++ }
++
++ if (result != 0x00)
++ {
++ MMC_Disable();
++ mmc_spi_readwrite(0xff);
++ return (1);
++ }
++
++ mmc_spi_readwrite(0xfe);
++
++ for (i = 0; i < 512; i += 32)
++ {
++ mmc_spi_write_only(data[i]);
++ mmc_spi_write_only(data[i+1]);
++ mmc_spi_write_only(data[i+2]);
++ mmc_spi_write_only(data[i+3]);
++ mmc_spi_write_only(data[i+4]);
++ mmc_spi_write_only(data[i+5]);
++ mmc_spi_write_only(data[i+6]);
++ mmc_spi_write_only(data[i+7]);
++ mmc_spi_write_only(data[i+8]);
++ mmc_spi_write_only(data[i+9]);
++ mmc_spi_write_only(data[i+10]);
++ mmc_spi_write_only(data[i+11]);
++ mmc_spi_write_only(data[i+12]);
++ mmc_spi_write_only(data[i+13]);
++ mmc_spi_write_only(data[i+14]);
++ mmc_spi_write_only(data[i+15]);
++ mmc_spi_write_only(data[i+16]);
++ mmc_spi_write_only(data[i+17]);
++ mmc_spi_write_only(data[i+18]);
++ mmc_spi_write_only(data[i+19]);
++ mmc_spi_write_only(data[i+20]);
++ mmc_spi_write_only(data[i+21]);
++ mmc_spi_write_only(data[i+22]);
++ mmc_spi_write_only(data[i+23]);
++ mmc_spi_write_only(data[i+24]);
++ mmc_spi_write_only(data[i+25]);
++ mmc_spi_write_only(data[i+26]);
++ mmc_spi_write_only(data[i+27]);
++ mmc_spi_write_only(data[i+28]);
++ mmc_spi_write_only(data[i+29]);
++ mmc_spi_write_only(data[i+30]);
++ mmc_spi_write_only(data[i+31]);
++ }
++
++ mmc_spi_readwrite(0xff);
++ mmc_spi_readwrite(0xff);
++
++ for (i = 0; i < 1000000; i++)
++ {
++ result = mmc_spi_readwrite(0xff);
++ if (result == 0xff)
++ {
++ break;
++ }
++ }
++
++ if (result != 0xff)
++ {
++ MMC_Disable();
++ mmc_spi_readwrite(0xff);
++ return (3);
++ }
++
++ MMC_Disable();
++ mmc_spi_readwrite(0xff);
++ return (0);
++}
++
++static int mmc_spi_read_block(unsigned char *data, unsigned int src_addr)
++{
++ unsigned int address;
++ unsigned char result = 0;
++ unsigned char ab0, ab1, ab2, ab3;
++ // unsigned long flags;
++ // int i, j;
++ int i;
++
++ address = src_addr;
++
++ ab3 = 0xff & (address >> 24);
++ ab2 = 0xff & (address >> 16);
++ ab1 = 0xff & (address >> 8);
++ ab0 = 0xff & address;
++
++ MMC_Enable();
++
++ mmc_spi_readwrite(0xff);
++
++ mmc_spi_readwrite(0x51);
++ mmc_spi_readwrite(ab3); /* msb */
++ mmc_spi_readwrite(ab2);
++ mmc_spi_readwrite(ab1);
++ mmc_spi_readwrite(ab0); /* lsb */
++ mmc_spi_readwrite(0xff);
++
++ for (i = 0; i < 8; i++)
++ {
++ result = mmc_spi_readwrite(0xff);
++ if (result == 0x00)
++ {
++ break;
++ }
++ }
++
++ if (result != 0x00)
++ {
++ MMC_Disable();
++ mmc_spi_readwrite(0xff);
++ return (1);
++ }
++
++ for (i = 0; i < 100000; i++)
++ {
++ result = mmc_spi_readwrite(0xff);
++ if (result == 0xfe)
++ {
++ break;
++ }
++ }
++
++ if (result != 0xfe)
++ {
++ MMC_Disable();
++ mmc_spi_readwrite(0xff);
++ return (2);
++ }
++
++ for (i = 0; i < 512; i += 32 )
++ {
++ data[i] = mmc_spi_read_only();
++ data[i+1] = mmc_spi_read_only();
++ data[i+2] = mmc_spi_read_only();
++ data[i+3] = mmc_spi_read_only();
++ data[i+4] = mmc_spi_read_only();
++ data[i+5] = mmc_spi_read_only();
++ data[i+6] = mmc_spi_read_only();
++ data[i+7] = mmc_spi_read_only();
++ data[i+8] = mmc_spi_read_only();
++ data[i+9] = mmc_spi_read_only();
++ data[i+10] = mmc_spi_read_only();
++ data[i+11] = mmc_spi_read_only();
++ data[i+12] = mmc_spi_read_only();
++ data[i+13] = mmc_spi_read_only();
++ data[i+14] = mmc_spi_read_only();
++ data[i+15] = mmc_spi_read_only();
++ data[i+16] = mmc_spi_read_only();
++ data[i+17] = mmc_spi_read_only();
++ data[i+18] = mmc_spi_read_only();
++ data[i+19] = mmc_spi_read_only();
++ data[i+20] = mmc_spi_read_only();
++ data[i+21] = mmc_spi_read_only();
++ data[i+22] = mmc_spi_read_only();
++ data[i+23] = mmc_spi_read_only();
++ data[i+24] = mmc_spi_read_only();
++ data[i+25] = mmc_spi_read_only();
++ data[i+26] = mmc_spi_read_only();
++ data[i+27] = mmc_spi_read_only();
++ data[i+28] = mmc_spi_read_only();
++ data[i+29] = mmc_spi_read_only();
++ data[i+30] = mmc_spi_read_only();
++ data[i+31] = mmc_spi_read_only();
++ }
++
++ result = mmc_spi_readwrite(0xff);
++ result = mmc_spi_readwrite(0xff);
++
++ MMC_Disable();
++ mmc_spi_readwrite(0xff);
++
++ return (0);
++}
++
++/*
++static int mmc_revalidate(kdev_t dev)
++{
++ int target, max_p, start, i;
++
++ mmc_media_detect = mmc_spi_media_detect();
++
++ if (mmc_media_detect == 0)
++ {
++ return -ENODEV;
++ }
++
++ target = DEVICE_NR(dev);
++
++ max_p = hd_gendisk.max_p;
++ start = target << 6;
++ for (i = max_p - 1; i >= 0; i--)
++ {
++ int minor = start + i;
++ invalidate_device(MKDEV(MAJOR_NR, minor), 1);
++ hd_gendisk.part[minor].start_sect = 0;
++ hd_gendisk.part[minor].nr_sects = 0;
++ }
++
++ grok_partitions(&hd_gendisk, target, 1 << 6, hd_sizes[0] * 2);
++
++ return 0;
++}
++*/
++
++
++static int mmc_ioctl(struct inode *inode, struct file *filp, unsigned int cmd,
++ unsigned long arg)
++{
++ if (!inode || !inode->i_rdev)
++ return -EINVAL;
++
++ switch (cmd) {
++#if 0
++ case BLKGETSIZE:
++ return put_user(hd[MINOR(inode->i_rdev)].nr_sects,
++ (unsigned long *)arg);
++ case BLKGETSIZE64:
++ return put_user((u64) hd[MINOR(inode->i_rdev)].
++ nr_sects, (u64 *) arg);
++ case BLKRRPART:
++ if (!capable(CAP_SYS_ADMIN))
++ return -EACCES;
++
++ return mmc_revalidate(inode->i_rdev);
++#endif
++ case HDIO_GETGEO:
++ {
++ struct block_device *bdev = inode->i_bdev;
++ struct hd_geometry *loc, g;
++ loc = (struct hd_geometry *)arg;
++ if (!loc)
++ return -EINVAL;
++ memset(loc, 0, sizeof(struct hd_geometry));
++ g.heads = 4;
++ g.sectors = 16;
++ g.cylinders = get_capacity(bdev->bd_disk) / (4*16);
++ g.start = get_start_sect(bdev);
++ return copy_to_user(loc, &g, sizeof(g)) ? -EFAULT : 0;
++ }
++ default:
++ return -ENOTTY;
++ }
++}
++
++
++/*
++static int mmc_check_media_change(kdev_t dev)
++{
++ (void) dev;
++ if (mmc_media_changed == 1)
++ {
++ mmc_media_changed = 0;
++ return 1;
++ }
++ else
++ {
++ return 0;
++ }
++}
++*/
++
++
++/*
++static int mmc_init(void)
++{
++ int result;
++
++ result = mmc_spi_hardware_init();
++
++ if (result != 0)
++ {
++ printk("mmc: error %d in mmc_spi_hardware_init\n", result);
++ return -1;
++ }
++
++
++ result = mmc_spi_hw_test();
++
++ if (result != 0)
++ {
++ printk("\n mmc: mmc_spi_hw_test i.O. \n\n");
++ return -1;
++ }
++
++
++ result = mmc_spi_speed_test();
++
++ if (result != 0)
++ {
++ printk("\n mmc: mmc_spi_speed_test i.O. \n\n");
++ return -1;
++ }
++
++
++ result = mmc_spi_card_init();
++ mdelay(50);
++ if (result != 0)
++ {
++ // Give it an extra shot
++ // result = mmc_spi_card_init();
++ if (result != 0)
++ {
++ printk("mmc: error %d in mmc_card_init\n", result);
++ return -1;
++ }
++ }
++
++ result = mmc_spi_card_config();
++ if (result != 0)
++ {
++ printk("mmc: error %d in mmc_card_config\n", result);
++ return -1;
++ }
++
++
++ return 0;
++}
++*/
++
++/*
++static void mmc_exit(void)
++{
++}
++*/
++
++
++/*
++static void mmc_check_media(void)
++{
++ int old_state, new_state;
++ int result;
++
++ old_state = mmc_media_detect;
++ new_state = mmc_spi_media_detect();
++
++ if (old_state != new_state)
++ {
++ mmc_media_changed = 1;
++ if (new_state == PRESENT)
++ {
++ result = mmc_init();
++ if (result != 0)
++ {
++ printk("mmc: error %d in mmc_init\n", result);
++ }
++ else
++ {
++ mmc_exit();
++ }
++ }
++ }
++
++#ifdef CHECK_MEDIA_CHANGE
++ del_timer(&mmc_timer);
++ mmc_timer.expires = jiffies + 10*HZ;
++ add_timer(&mmc_timer);
++#endif
++
++}
++*/
++
++
++/* NB: There might be several requests in the queue, simply dequeuing only one
++ and not checking for more will cause a stall because the block subsystem
++ will not call this function again unless the queue is "plugged" which can
++ only happen if it runs empty... */
++static void mmc_spi_request(struct request_queue *q)
++{
++ struct request *req;
++ int ret;
++
++ unsigned int mmc_address;
++ unsigned char *buffer_address;
++ int nr_sectors;
++ int i;
++ int result, success;
++
++ if (blk_queue_plugged(q)) {
++ return;
++ }
++
++ spin_lock(&mmc_spi_lock);
++ for(;;) {
++ req = elv_next_request(q);
++ if (!req)
++ break;
++
++ if (!blk_fs_request(req)) {
++ printk("not a blk_fs_request\n");
++ spin_unlock(&mmc_spi_lock);
++ continue;
++ }
++
++ mmc_address = req->sector * hd_hardsectsizes[0];
++ buffer_address = req->buffer;
++ nr_sectors = req->current_nr_sectors;
++ success = 1;
++ if (rq_data_dir(req) == READ) {
++ spin_unlock_irq(q->queue_lock);
++ for (i = 0; i < nr_sectors; i++) {
++ result = mmc_spi_read_block(buffer_address, mmc_address);
++ if (unlikely(result < 0)) {
++ printk(KERN_ERR "mmi_spi_block: error reading block (%d)\n", result);
++ success = 0;
++ break;
++ }
++ mmc_address += hd_hardsectsizes[0];
++ buffer_address += hd_hardsectsizes[0];
++ }
++ spin_lock_irq(q->queue_lock);
++ } else {
++ spin_unlock_irq(q->queue_lock);
++ for (i = 0; i < nr_sectors; i++) {
++ result = mmc_spi_write_block(mmc_address, buffer_address);
++ if (unlikely(result < 0)) {
++ printk(KERN_ERR "mmi_spi_block: error writing block (%d)\n", result);
++ success = 0;
++ break;
++ }
++ mmc_address += hd_hardsectsizes[0];
++ buffer_address += hd_hardsectsizes[0];
++ }
++ spin_lock_irq(q->queue_lock);
++ }
++ ret = end_that_request_chunk(req, success, nr_sectors * hd_hardsectsizes[0]);
++ if (!ret) {
++ blkdev_dequeue_request(req);
++ end_that_request_last(req, 0);
++ }
++ }
++ spin_unlock(&mmc_spi_lock);
++}
++
++
++static int mmc_open(struct inode *inode, struct file *filp)
++{
++ // int device;
++ (void) filp;
++ mmc_media_detect = mmc_spi_media_detect();
++
++ if (mmc_media_detect == 0)
++ return -ENODEV;
++
++ return 0;
++}
++
++static int mmc_release(struct inode *inode, struct file *filp)
++{
++ return 0;
++}
++
++
++static struct block_device_operations mmc_spi_bdops = {
++ .open = mmc_open,
++ .release = mmc_release,
++ .ioctl = mmc_ioctl,
++ .owner = THIS_MODULE,
++#if 0
++ .check_media_change = mmc_check_media_change,
++ .revalidate = mmc_revalidate,
++#endif
++};
++
++static int detect_card(void)
++{
++ int result;
++
++ result = mmc_spi_card_init();
++ if (result != 0) {
++ // Give it an extra shot
++ result = mmc_spi_card_init();
++ if (result != 0) {
++ printk(KERN_ERR "mmc_spi_block: error in mmc_card_init (%d)\n", result);
++ return -ENODEV;
++ }
++ }
++
++ result = mmc_spi_card_config();
++ // result = mmc_spi_speed_test();
++ if (result != 0) {
++ printk(KERN_ERR "mmc_spi_block: error in mmc_card_config (%d)\n", result);
++ return -ENODEV;
++ }
++
++ return 0;
++}
++
++/* Fills in the gendisk structure from the received card
++ data. */
++static int gendisk_init(struct device *dev, struct gendisk *gd)
++{
++ if (!gd)
++ return -EINVAL;
++
++ gd->major = major;
++ gd->first_minor = 0; /* only one device supported */
++ gd->fops = &mmc_spi_bdops;
++ gd->driverfs_dev = dev;
++
++ gd->queue = blk_init_queue(mmc_spi_request,NULL);
++
++ if (!gd->queue)
++ return -ENOMEM;
++
++ sprintf(gd->disk_name, "mmcblk");
++
++ blk_queue_hardsect_size(gd->queue, hd_hardsectsizes[0]);
++
++ set_capacity(gd, hd_sizes[0]<<1);
++
++ return 0;
++}
++
++static int gendisk_fini(struct gendisk *gd)
++{
++ BUG_ON(!gd);
++
++ if (gd->queue)
++ blk_cleanup_queue(gd->queue);
++
++ del_gendisk(gd);
++
++ return 0;
++}
++
++/* platform driver device instance routines */
++static int mmc_spi_probe(struct platform_device *pdev)
++{
++ int result;
++ printk("$Id: mmc_spi_block.c,v 1.05 2008/01/04 01:02:10 mrdata Exp $\n");
++
++ result = mmc_spi_hardware_init();
++ if (result != 0) {
++ printk(KERN_ERR "mmc_spi_block: error in mmc_spi_hardware_init (%d)\n", result);
++ result = -ENODEV;
++ return result;
++ }
++
++ result = detect_card();
++ if (result < 0)
++ return result;
++
++ mmc_media_detect = 1;
++
++ result = register_blkdev(major, DEVICE_NAME);
++ if (result < 0)
++ return result;
++
++ if (!major)
++ major = result;
++
++ /* allow 8 partitions per device */
++ BUG_ON(mmc_disk!=NULL);
++ mmc_disk = alloc_disk(1 << 3);
++ if (!mmc_disk) {
++ result = -ENOMEM;
++ goto out;
++ }
++
++ result = gendisk_init(&pdev->dev, mmc_disk);
++ if (result < 0)
++ goto out;
++
++ add_disk(mmc_disk);
++
++ /*init_timer(&mmc_timer);
++ mmc_timer.expires = jiffies + HZ;
++ mmc_timer.function = (void *)mmc_check_media;
++ add_timer(&mmc_timer); */
++ return 0;
++
++out:
++ if (mmc_disk)
++ put_disk(mmc_disk);
++
++ unregister_blkdev(major, DEVICE_NAME);
++ return result;
++}
++
++static int mmc_spi_remove(struct platform_device *dev)
++{
++ // int ret;
++
++ if (mmc_disk) {
++ gendisk_fini(mmc_disk);
++ put_disk(mmc_disk);
++ }
++
++ // ret = unregister_blkdev(major, DEVICE_NAME);
++ unregister_blkdev(major, DEVICE_NAME);
++ return 0;
++}
++
++struct platform_driver mmc_spi_driver = {
++ .probe = mmc_spi_probe,
++ .remove = mmc_spi_remove,
++ .driver = {
++ .name = "mmc_spi_block",
++ .owner = THIS_MODULE,
++ },
++};
++
++
++/* module init/exit */
++static int __init mmc_spi_block_init(void)
++{
++ int ret;
++ spin_lock_init(&mmc_spi_lock);
++
++ ret = platform_driver_register(&mmc_spi_driver);
++ if (ret < 0)
++ return ret;
++
++ /* we just support one device */
++ mmc_dev = platform_device_register_simple("mmc_spi_block", -1, NULL, 0);
++ if (IS_ERR(mmc_dev))
++ return PTR_ERR(mmc_dev);
++
++ return 0;
++}
++
++
++static void __exit mmc_spi_block_exit(void)
++{
++ platform_driver_unregister(&mmc_spi_driver);
++ if (mmc_dev)
++ platform_device_unregister(mmc_dev);
++}
++
++
++module_init(mmc_spi_block_init);
++module_exit(mmc_spi_block_exit);
++
++MODULE_AUTHOR("Madsuk,Rohde,TaGana,Carsten Juttner <carjay@gmx.net>,Guylhem Aznar <mmc-driver@externe.net>,mrdata");
++MODULE_DESCRIPTION("Driver for MMC/SD-Cards in SPI mode over GPIO (Software SPI)");
++MODULE_SUPPORTED_DEVICE("SIMpad");
++MODULE_LICENSE("GPL");
++
++module_param(major, int, 0444);
++MODULE_PARM_DESC(major, "specify the major device number for the MMC/SD SPI driver");
--- /dev/null
+diff -Nur linux-2.6.24.vanilla/drivers/mfd/Makefile linux-2.6.24/drivers/mfd/Makefile
+--- linux-2.6.24.vanilla/drivers/mfd/Makefile 2008-01-24 23:58:37.000000000 +0100
++++ linux-2.6.24/drivers/mfd/Makefile 2008-02-20 21:27:39.000000000 +0100
+@@ -12,3 +12,7 @@
+ ifeq ($(CONFIG_SA1100_ASSABET),y)
+ obj-$(CONFIG_MCP_UCB1200) += ucb1x00-assabet.o
+ endif
++
++ifeq ($(CONFIG_SA1100_SIMPAD),y)
++obj-$(CONFIG_MCP_UCB1200) += ucb1x00-simpad.o
++endif
+diff -Nur linux-2.6.24.vanilla/drivers/mfd/ucb1x00-simpad.c linux-2.6.24/drivers/mfd/ucb1x00-simpad.c
+--- linux-2.6.24.vanilla/drivers/mfd/ucb1x00-simpad.c 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.24/drivers/mfd/ucb1x00-simpad.c 2008-02-20 21:27:39.000000000 +0100
+@@ -0,0 +1,226 @@
++/*
++ * linux/drivers/mfd/ucb1x00-simpad.c
++ *
++ * Copyright (C) 2001-2003 Russell King, All Rights Reserved.
++ * 2007/03/18 mrdata:
++ * - adapted ucb1x00-assabet.c
++ * - transfer ucb1x00-simpad.c from kernel24
++ * to new structur of kernel26
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License.
++ *
++ * We handle the machine-specific bits of the UCB1x00 driver here.
++ */
++#include <linux/module.h>
++#include <linux/init.h>
++#include <linux/fs.h>
++#include <linux/proc_fs.h>
++#include <linux/device.h>
++
++#include <linux/apm-emulation.h>
++
++#include <asm/dma.h>
++
++#include <asm/arch/simpad.h>
++#include <asm/arch-sa1100/simpad_pm.h>
++
++#include "ucb1x00.h"
++#include "ucb1x00-simpad.h"
++
++#define UCB1X00_ATTR(name,input,designation) \
++static ssize_t name##_show(struct class_device *dev, char *buf) \
++{ \
++ struct ucb1x00 *ucb = classdev_to_ucb1x00(dev); \
++ int val; \
++ ucb1x00_adc_enable(ucb); \
++ val = ucb1x00_adc_read(ucb, input, UCB_NOSYNC); \
++ ucb1x00_adc_disable(ucb); \
++ return sprintf(buf, "%d\n", CALIBRATE_##designation(val)); \
++} \
++static CLASS_DEVICE_ATTR(name,0444,name##_show,NULL)
++
++UCB1X00_ATTR(vbatt, UCB_ADC_INP_AD1, BATTERY);
++UCB1X00_ATTR(vcharger, UCB_ADC_INP_AD2, SUPPLY);
++UCB1X00_ATTR(icharger, UCB_ADC_INP_AD3, CHARGING);
++
++static struct ucb1x00 *ucb_alt;
++
++#define UCB1X00_WERT(name,input,designation) \
++static int ucb1x00_simpad_read_##name(struct ucb1x00 *ucb_alt) \
++{ \
++ int val; \
++ ucb1x00_adc_enable(ucb_alt); \
++ val = ucb1x00_adc_read(ucb_alt, input, UCB_NOSYNC); \
++ ucb1x00_adc_disable(ucb_alt); \
++ return CALIBRATE_##designation(val); \
++}
++
++UCB1X00_WERT(vbatt, UCB_ADC_INP_AD1, BATTERY);
++UCB1X00_WERT(vcharger, UCB_ADC_INP_AD2, SUPPLY);
++UCB1X00_WERT(icharger, UCB_ADC_INP_AD3, CHARGING);
++
++static int ucb1x00_simpad_add(struct ucb1x00_dev *dev)
++{
++ class_device_create_file(&dev->ucb->cdev, &class_device_attr_vbatt);
++ class_device_create_file(&dev->ucb->cdev, &class_device_attr_vcharger);
++ class_device_create_file(&dev->ucb->cdev, &class_device_attr_icharger);
++ ucb_alt = dev->ucb;
++ return 0;
++}
++
++static void ucb1x00_simpad_remove(struct ucb1x00_dev *dev)
++{
++ class_device_remove_file(&dev->ucb->cdev, &class_device_attr_icharger);
++ class_device_remove_file(&dev->ucb->cdev, &class_device_attr_vcharger);
++ class_device_remove_file(&dev->ucb->cdev, &class_device_attr_vbatt);
++}
++
++static struct ucb1x00_driver ucb1x00_simpad_driver = {
++ .add = ucb1x00_simpad_add,
++ .remove = ucb1x00_simpad_remove,
++};
++
++static int __init ucb1x00_simpad_init(void)
++{
++ apm_get_power_status = simpad_apm_get_power_status;
++ return ucb1x00_register_driver(&ucb1x00_simpad_driver);
++}
++
++static void __exit ucb1x00_simpad_exit(void)
++{
++ apm_get_power_status = NULL;
++ ucb1x00_unregister_driver(&ucb1x00_simpad_driver);
++}
++
++/****************************************************************************/
++/* Functions exported for use by the kernel and kernel modules */
++/****************************************************************************/
++
++int simpad_get_battery(struct simpad_battery_apm *bstat)
++{
++ int icharger, vcharger, vbatt;
++
++ if ( ucb_alt ) {
++ icharger = ucb1x00_simpad_read_icharger( ucb_alt );
++ vcharger = ucb1x00_simpad_read_vcharger( ucb_alt );
++ vbatt = ucb1x00_simpad_read_vbatt( ucb_alt );
++ } else {
++ bstat->ac_status = SIMPAD_AC_STATUS_AC_UNKNOWN;
++ bstat->status = SIMPAD_BATT_STATUS_UNKNOWN;
++ bstat->percentage = 0x64; // lets say 100%
++ bstat->life = 330; // lets say a long time
++ return 0;
++ }
++
++ /* AC status */
++ bstat->ac_status = SIMPAD_AC_STATUS_AC_OFFLINE;
++ if ( vcharger>MIN_SUPPLY ) {
++ bstat->ac_status = SIMPAD_AC_STATUS_AC_ONLINE;
++ }
++
++ /* charging */
++ bstat->status = 0x0;
++ if ( icharger >= CHARGING_LED_LEVEL )
++ bstat->status = SIMPAD_BATT_STATUS_CHARGING;
++
++ if ( vbatt > BATT_LOW )
++ bstat->status |= SIMPAD_BATT_STATUS_HIGH;
++ else if ( vbatt < BATT_CRITICAL )
++ bstat->status |= SIMPAD_BATT_STATUS_CRITICAL;
++ else
++ bstat->status |= SIMPAD_BATT_STATUS_LOW;
++
++ if (bstat->status & SIMPAD_BATT_STATUS_CHARGING) {
++ if (icharger > CHARGING_MAX_LEVEL)
++ icharger = CHARGING_MAX_LEVEL;
++ if (icharger < CHARGING_LED_LEVEL)
++ icharger = CHARGING_LED_LEVEL;
++
++ bstat->percentage = 100 - 100 * (icharger - CHARGING_LED_LEVEL) /
++ (CHARGING_MAX_LEVEL - CHARGING_LED_LEVEL);
++ } else {
++ if (vbatt > BATT_FULL)
++ vbatt = BATT_FULL;
++ if (vbatt < BATT_EMPTY)
++ vbatt = BATT_EMPTY;
++
++ bstat->percentage = 100 * (vbatt - BATT_EMPTY) / (BATT_FULL - BATT_EMPTY);
++ }
++
++ /* let's assume: full load is 7h */
++ /* bstat->life = 420*bstat->percentage/100; */
++ /* mrdata: think, 4h is more realistic */
++ bstat->life = 240*(bstat->percentage)/100;
++
++#if 0
++ printk("get_battery: ac: %02x / ch: %02x / perc: %02x / life: %d \n",
++ bstat->ac_status, bstat->status,
++ bstat->percentage, bstat->life );
++#endif
++
++ return 0;
++}
++
++void simpad_apm_get_power_status(struct apm_power_info *info)
++{
++ struct simpad_battery_apm bstat;
++ unsigned char ac = APM_AC_UNKNOWN;
++ unsigned char level = APM_BATTERY_STATUS_UNKNOWN;
++ int status, result;
++
++ result = simpad_get_battery(&bstat);
++ if (result) {
++ printk("%s: unable to access battery information: result=%d\n", __FUNCTION__, result);
++ return;
++ }
++
++ switch (bstat.ac_status) {
++ case SIMPAD_AC_STATUS_AC_OFFLINE:
++ ac = APM_AC_OFFLINE;
++ break;
++ case SIMPAD_AC_STATUS_AC_ONLINE:
++ ac = APM_AC_ONLINE;
++ break;
++ case SIMPAD_AC_STATUS_AC_BACKUP:
++ ac = APM_AC_BACKUP;
++ break;
++ }
++
++ info->ac_line_status = ac;
++
++ status = bstat.status;
++ if (status & (SIMPAD_BATT_STATUS_CHARGING | SIMPAD_BATT_STATUS_CHARGE_MAIN))
++ level = APM_BATTERY_STATUS_CHARGING;
++ else if (status & (SIMPAD_BATT_STATUS_HIGH | SIMPAD_BATT_STATUS_FULL))
++ level = APM_BATTERY_STATUS_HIGH;
++ else if (status & SIMPAD_BATT_STATUS_LOW)
++ level = APM_BATTERY_STATUS_LOW;
++ else if (status & SIMPAD_BATT_STATUS_CRITICAL)
++ level = APM_BATTERY_STATUS_CRITICAL;
++
++ info->battery_status = level;
++ info->battery_flag = info->battery_status;
++
++ info->battery_life = bstat.percentage;
++
++ /* we have a dumb battery - so we know nothing */
++ info->time = bstat.life;
++ info->units = APM_UNITS_MINS;
++
++#if 0
++ printk("apm_get_power: ac: %02x / bs: %02x / bf: %02x / perc: %02x / life: %d\n",
++ info->ac_line_status, info->battery_status, info->battery_flag,
++ info->battery_life, info->time );
++#endif
++ return;
++}
++
++module_init(ucb1x00_simpad_init);
++module_exit(ucb1x00_simpad_exit);
++
++
++MODULE_AUTHOR("Juergen Messerer <juergen.messerer@freesurf.ch>");
++MODULE_DESCRIPTION("SIMpad noddy testing only example ADC driver");
++MODULE_LICENSE("GPL");
+diff -Nur linux-2.6.24.vanilla/drivers/mfd/ucb1x00-simpad.h linux-2.6.24/drivers/mfd/ucb1x00-simpad.h
+--- linux-2.6.24.vanilla/drivers/mfd/ucb1x00-simpad.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.24/drivers/mfd/ucb1x00-simpad.h 2008-02-20 21:27:39.000000000 +0100
+@@ -0,0 +1,86 @@
++/*
++ * linux/drivers/mfd/ucb1x00-simpad.h
++ *
++ * Copyright (C) 2001 Russell King, All Rights Reserved.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License.
++ */
++#ifndef UCB1300_SIMPAD_H
++#define UCB1300_SIMPAD_H
++
++/*
++ * Conversion from AD -> mV
++ * 7.5V = 1023 7.33137mV/Digit
++ *
++ * 400 Units == 9.7V
++ * a = ADC value
++ * 2007/03/24 mrdata:
++ * according UCB1300 datasheet ADC error max. 3 LSB
++ * 5-95% of full scale -> 3*7.33137mV = 21.99mV
++ * // old
++ * 21 = ADC error
++ * 12600 = Divident to get 2*7.3242
++ * 860 = Divider to get 2*7.3242
++ * 170 = Voltagedrop over
++ *
++ * // new
++ * 3 = ADC error
++ * 12610 = Divident to get 2*7.33139
++ * 860 = Divider to get 2*7.33139
++ * 170 = Voltagedrop over
++ */
++// #define CALIBRATE_BATTERY(a) ((((a + 21)*12600)/860) + 170)
++#define CALIBRATE_BATTERY(a) ((((a + 3)*12610)/860) + 170)
++
++/*
++ * We have two types of batteries a small and a large one
++ * To get the right value we to distinguish between those two
++ * 450 Units == 15 V
++ */
++#ifdef SMALL_BATTERY
++#define CALIBRATE_SUPPLY(a) (((a) * 1500) / 51)
++#define MIN_SUPPLY 8500 /* Less then 8.5V means no powersupply */
++#else
++#define CALIBRATE_SUPPLY(a) (((a) * 1500) / 45)
++//#define MIN_SUPPLY 14000 /* Less then 14V means no powersupply */
++#define MIN_SUPPLY 12000 /* Less then 12V means no powersupply */
++#endif
++
++/*
++ * Charging Current
++ * if value is >= 50 then charging is on
++ */
++// #define CALIBRATE_CHARGING(a) (((a) * 1000) / (152/4))
++#define CALIBRATE_CHARGING(a) (a)
++//#define CHARGING_LED_LEVEL 50
++
++#ifdef CONFIG_SA1100_SIMPAD_SINUSPAD
++
++// type small battery
++#define CHARGING_LED_LEVEL 12
++#define CHARGING_MAX_LEVEL 120
++#define BATT_FULL 8100
++#define BATT_LOW 7300
++#define BATT_CRITICAL 6700
++#define BATT_EMPTY 6400
++
++#else // CONFIG_SA1100_SIMPAD_SINUSPAD
++
++// type large battery
++// because of ADC error CHARGING_LED_LEVEL can changed
++// from 27 to 28
++#define CHARGING_LED_LEVEL 27
++#define CHARGING_MAX_LEVEL 265
++// BATT_FULL with SIMPAD_AC_STATUS_AC_OFFLINE
++#define BATT_FULL 8100
++#define BATT_LOW 7400
++#define BATT_CRITICAL 6800
++#define BATT_EMPTY 6500
++
++#endif // CONFIG_SA1100_SIMPAD_SINUSPAD
++
++// int simpad_get_battery(struct simpad_battery_apm *bstat);
++
++#endif
+diff -Nur linux-2.6.24.vanilla/include/asm-arm/arch-sa1100/simpad_pm.h linux-2.6.24/include/asm-arm/arch-sa1100/simpad_pm.h
+--- linux-2.6.24.vanilla/include/asm-arm/arch-sa1100/simpad_pm.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.24/include/asm-arm/arch-sa1100/simpad_pm.h 2008-02-20 21:27:39.000000000 +0100
+@@ -0,0 +1,236 @@
++/*
++* Abstraction interface for microcontroller connection to rest of system
++*
++* Copyright 2003 Peter Pregler
++* Copyright 2000,1 Compaq Computer Corporation.
++*
++* Use consistent with the GNU GPL is permitted,
++* provided that this copyright notice is
++* preserved in its entirety in all copies and derived works.
++*
++* COMPAQ COMPUTER CORPORATION MAKES NO WARRANTIES, EXPRESSED OR IMPLIED,
++* AS TO THE USEFULNESS OR CORRECTNESS OF THIS CODE OR ITS
++* FITNESS FOR ANY PARTICULAR PURPOSE.
++*
++* Author: Peter Pregler (based on work for ipaq by Andrew Christian)
++*
++*/
++
++#ifndef __SIMPAD_HAL_H
++#define __SIMPAD_HAL_H
++
++#include <linux/apm-emulation.h>
++
++struct simpad_battery_apm {
++ unsigned char ac_status; /* line connected yes/no */
++ unsigned char status; /* battery loading yes/no */
++ unsigned char percentage; /* percentage loaded */
++ unsigned short life; /* life till empty */
++};
++
++extern void simpad_apm_get_power_status(struct apm_power_info *);
++
++// extern int simpad_get_battery(struct simpad_battery_apm *bstat);
++
++/* These should match the apm_bios.h definitions */
++#define SIMPAD_AC_STATUS_AC_OFFLINE 0x00
++#define SIMPAD_AC_STATUS_AC_ONLINE 0x01
++#define SIMPAD_AC_STATUS_AC_BACKUP 0x02 /* What does this mean? */
++#define SIMPAD_AC_STATUS_AC_UNKNOWN 0xff
++
++
++/* These bitfields are rarely "or'd" together */
++#define SIMPAD_BATT_STATUS_HIGH 0x01
++#define SIMPAD_BATT_STATUS_LOW 0x02
++#define SIMPAD_BATT_STATUS_CRITICAL 0x04
++#define SIMPAD_BATT_STATUS_CHARGING 0x08
++#define SIMPAD_BATT_STATUS_CHARGE_MAIN 0x10
++#define SIMPAD_BATT_STATUS_DEAD 0x20 /* Battery will not charge */
++#define SIMPAD_BATT_NOT_INSTALLED 0x20 /* For expansion pack batteries */
++#define SIMPAD_BATT_STATUS_FULL 0x40 /* Battery fully charged (and connected to AC) */
++#define SIMPAD_BATT_STATUS_NOBATT 0x80
++#define SIMPAD_BATT_STATUS_UNKNOWN 0xff
++
++#if 0 // FIXME
++#include <linux/simpad_ts.h>
++
++enum simpad_asset_type {
++ ASSET_TCHAR = 0,
++ ASSET_SHORT,
++ ASSET_LONG
++};
++
++#define TTYPE(_type) (((unsigned int)_type) << 8)
++#define TCHAR(_len) (TTYPE(ASSET_TCHAR) | (_len))
++#define TSHORT TTYPE(ASSET_SHORT)
++#define TLONG TTYPE(ASSET_LONG)
++#define ASSET(_type,_num) ((((unsigned int)_type)<<16) | (_num))
++
++#define ASSET_HM_VERSION ASSET( TCHAR(10), 0 ) /* 1.1, 1.2 */
++#define ASSET_SERIAL_NUMBER ASSET( TCHAR(40), 1 ) /* Unique iPAQ serial number */
++#define ASSET_MODULE_ID ASSET( TCHAR(20), 2 ) /* E.g., "iPAQ 3700" */
++#define ASSET_PRODUCT_REVISION ASSET( TCHAR(10), 3 ) /* 1.0, 2.0 */
++#define ASSET_PRODUCT_ID ASSET( TSHORT, 4 ) /* 2 = Palm-sized computer */
++#define ASSET_FRAME_RATE ASSET( TSHORT, 5 )
++#define ASSET_PAGE_MODE ASSET( TSHORT, 6 ) /* 0 = Flash memory */
++#define ASSET_COUNTRY_ID ASSET( TSHORT, 7 ) /* 0 = USA */
++#define ASSET_IS_COLOR_DISPLAY ASSET( TSHORT, 8 ) /* Boolean, 1 = yes */
++#define ASSET_ROM_SIZE ASSET( TSHORT, 9 ) /* 16, 32 */
++#define ASSET_RAM_SIZE ASSET( TSHORT, 10 ) /* 32768 */
++#define ASSET_HORIZONTAL_PIXELS ASSET( TSHORT, 11 ) /* 240 */
++#define ASSET_VERTICAL_PIXELS ASSET( TSHORT, 12 ) /* 320 */
++
++#define ASSET_TYPE(_asset) (((_asset)&0xff000000)>>24)
++#define ASSET_TCHAR_LEN(_asset) (((_asset)&0x00ff0000)>>16)
++#define ASSET_NUMBER(_asset) ((_asset)&0x0000ffff)
++
++#define MAX_TCHAR_LEN 40
++
++struct simpad_asset {
++ unsigned int type;
++ union {
++ unsigned char tchar[ MAX_TCHAR_LEN ];
++ unsigned short vshort;
++ unsigned long vlong;
++ } a;
++};
++
++/********************************************************************
++ * Interface to the hardware-type specific functions
++ *
++ * get_version Read the version number of the microcontroller on the option pack SPI bus
++ * spi_read Reads from the serial EEPROM memory on the option pack SPI bus
++ * spi_write Write to the serial EEPROM memory on the option pack SPI bus
++ * get_option_detect Returns whether or not an option pack is present
++ *
++ * get_thermal_sensor Return measured temperature of the unit, in units of 0.125 deg C
++ * set_notify_led Turns on, off, or blinks the Green LED
++ * read_light_sensor Returns the value of the front light sensor
++ * get_battery Returns the current voltage and charging state of all batteries
++ * audio_clock Sets the audio CODEC to run at a particular rate
++ * audio_power Turns on/off audio CODEC (internally calls audio_clock)
++ * audio_mute Mutes the audio CODEC
++ * asset_read Extracts PocketPC-style asset information from persistent memory
++ * backlight_control Adjusts the backlight level (only on/off for 3100)
++ *
++ *
++ * iPAQ 3100 only
++ * ==============
++ * codec_control Reset/mute/control level of 3100 audio codec
++ * contrast_control Adjusts the contrast level (only for 3100)
++ *
++ * iPAQ 3600, 3700 only
++ * ====================
++ * eeprom_read Reads from the asset information on the eeprom of a 3600 (deprecated)
++ * eeprom_write Writes to the asset information on the eeprom (deprecated)
++ *
++ * The interfaces to the EEPROM functions are maintained only because the simpad_ts driver has
++ * a deprecated ioctl call for them. They are used internally by the "asset_read" function.
++ *
++ * iPAQ 3800, 3900 only
++ * ====================
++ * set_ebat Tells enhanced PCMCIA sleeves that this iPAQ can handle
++ * a wider voltage range (applies to 3800, 3900)
++ *
++ *********************************************************************/
++
++struct simpad_hal_ops {
++ /* Functions provided by the underlying hardware */
++ int (*get_version)( struct simpad_ts_version * );
++ int (*eeprom_read)( unsigned short address, unsigned char *data, unsigned short len );
++ int (*eeprom_write)( unsigned short address, unsigned char *data, unsigned short len );
++ int (*get_thermal_sensor)( unsigned short * );
++ int (*set_notify_led)( unsigned char mode, unsigned char duration,
++ unsigned char ontime, unsigned char offtime );
++ int (*read_light_sensor)( unsigned char *result );
++ int (*get_battery)( struct simpad_battery * );
++ int (*spi_read)( unsigned short address, unsigned char *data, unsigned short len );
++ int (*spi_write)( unsigned short address, unsigned char *data, unsigned short len );
++ int (*codec_control)( unsigned char, unsigned char );
++ int (*get_option_detect)( int *result );
++ int (*audio_clock)( long samplerate );
++ int (*audio_power)( long samplerate );
++ int (*audio_mute)( int mute );
++ int (*asset_read)( struct simpad_asset *asset );
++ int (*set_ebat)( void );
++
++ /* Functions indirectly provided by the underlying hardware */
++ int (*backlight_control)( enum flite_pwr power, unsigned char level );
++ int (*contrast_control)( unsigned char level );
++
++ /* for module use counting */
++ struct module *owner;
++};
++
++/* Used by the device-specific hardware module to register itself */
++extern int simpad_hal_register_interface( struct simpad_hal_ops *ops );
++extern void simpad_hal_unregister_interface( struct simpad_hal_ops *ops );
++
++/*
++ * Calls into HAL from the device-specific hardware module
++ * These run at interrupt time
++ */
++extern void simpad_hal_keypress( unsigned char key );
++extern void simpad_hal_touchpanel( unsigned short x, unsigned short y, int down );
++extern void simpad_hal_option_detect( int present );
++
++/* Callbacks registered by device drivers */
++struct simpad_driver_ops {
++ void (*keypress)( unsigned char key );
++ void (*touchpanel)( unsigned short x, unsigned short y, int down );
++ void (*option_detect)( int present );
++};
++
++extern int simpad_hal_register_driver( struct simpad_driver_ops * );
++extern void simpad_hal_unregister_driver( struct simpad_driver_ops * );
++
++
++/* Calls into HAL from device drivers and other kernel modules */
++extern void simpad_get_flite( struct simpad_ts_backlight *bl );
++extern void simpad_get_contrast( unsigned char *contrast );
++extern int simpad_set_flite( enum flite_pwr pwr, unsigned char brightness );
++extern int simpad_set_contrast( unsigned char contrast );
++extern int simpad_toggle_frontlight( void );
++
++extern int simpad_apm_get_power_status(unsigned char *ac_line_status, unsigned char *battery_status,
++ unsigned char *battery_flag, unsigned char *battery_percentage,
++ unsigned short *battery_life);
++
++extern struct simpad_hal_ops *simpad_hal_ops;
++
++/* Do not use this macro in driver files - instead, use the inline functions defined below */
++#define CALL_HAL( f, args... ) \
++ { int __result = -EIO; \
++ if ( simpad_hal_ops && simpad_hal_ops->f ) { \
++ __MOD_INC_USE_COUNT(simpad_hal_ops->owner); \
++ __result = simpad_hal_ops->f(args); \
++ __MOD_DEC_USE_COUNT(simpad_hal_ops->owner); \
++ } \
++ return __result; }
++
++#define HFUNC static __inline__ int
++
++/* The eeprom_read/write address + len has a maximum value of 512. Both must be even numbers */
++HFUNC simpad_eeprom_read( u16 addr, u8 *data, u16 len ) CALL_HAL(eeprom_read,addr,data,len)
++HFUNC simpad_eeprom_write( u16 addr, u8 *data, u16 len) CALL_HAL(eeprom_write,addr,data,len)
++HFUNC simpad_spi_read( u8 addr, u8 *data, u16 len) CALL_HAL(spi_read,addr,data,len)
++HFUNC simpad_spi_write( u8 addr, u8 *data, u16 len) CALL_HAL(spi_write,addr,data,len)
++HFUNC simpad_get_version( struct simpad_ts_version *v ) CALL_HAL(get_version,v)
++HFUNC simpad_get_thermal_sensor( u16 *thermal ) CALL_HAL(get_thermal_sensor,thermal)
++HFUNC simpad_set_led( u8 mode, u8 dur, u8 ont, u8 offt ) CALL_HAL(set_notify_led, mode, dur, ont, offt)
++HFUNC simpad_get_light_sensor( u8 *result ) CALL_HAL(read_light_sensor,result)
++HFUNC simpad_get_battery( struct simpad_battery *bat ) CALL_HAL(get_battery,bat)
++HFUNC simpad_get_option_detect( int *result) CALL_HAL(get_option_detect,result)
++HFUNC simpad_audio_clock( long samplerate ) CALL_HAL(audio_clock,samplerate)
++HFUNC simpad_audio_power( long samplerate ) CALL_HAL(audio_power,samplerate)
++HFUNC simpad_audio_mute( int mute ) CALL_HAL(audio_mute,mute)
++HFUNC simpad_asset_read( struct simpad_asset *asset ) CALL_HAL(asset_read,asset)
++HFUNC simpad_set_ebat( void ) CALL_HAL(set_ebat)
++
++/* Don't use these functions directly - rather, call {get,set}_{flite,contrast} */
++ /* Functions indirectly provided by the underlying hardware */
++HFUNC simpad_backlight_control( enum flite_pwr p, u8 v ) CALL_HAL(backlight_control,p,v)
++HFUNC simpad_contrast_control( u8 level ) CALL_HAL(contrast_control,level)
++
++#endif
++#endif
--- /dev/null
+diff -uNr linux-2.6.24.vanilla/arch/arm/mach-sa1100/Makefile linux-2.6.24/arch/arm/mach-sa1100/Makefile
+--- linux-2.6.24.vanilla/arch/arm/mach-sa1100/Makefile 2008-01-24 23:58:37.000000000 +0100
++++ linux-2.6.24/arch/arm/mach-sa1100/Makefile 2008-02-20 20:49:57.000000000 +0100
+@@ -41,6 +41,7 @@
+ obj-$(CONFIG_SA1100_SHANNON) += shannon.o
+
+ obj-$(CONFIG_SA1100_SIMPAD) += simpad.o
++obj-$(CONFIG_SA1100_SIMPAD) += cs3-simpad.o
+ led-$(CONFIG_SA1100_SIMPAD) += leds-simpad.o
+
+ # LEDs support
+diff -uNr linux-2.6.24.vanilla/arch/arm/mach-sa1100/cs3-simpad.c linux-2.6.24/arch/arm/mach-sa1100/cs3-simpad.c
+--- linux-2.6.24.vanilla/arch/arm/mach-sa1100/cs3-simpad.c 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.24/arch/arm/mach-sa1100/cs3-simpad.c 2008-02-20 20:49:57.000000000 +0100
+@@ -0,0 +1,169 @@
++/*
++ * simpad-cs3.c
++ *
++ * This driver shows the GPIO states of the cs3 latch. You can also
++ * switch some GPIOS.
++ *
++ * (c) 2007 Bernhard Guillon <Bernhard.Guillon@OpenSIMpad.org>
++ *
++ * You may use this code as per GPL version 2
++ *
++ * Some parts are based on battery.c
++ *
++ * mrdata: -added cs3_ro support
++ * -added preprocessor stuff
++ *
++ */
++
++#include <linux/module.h>
++#include <linux/types.h>
++#include <linux/init.h>
++#include <linux/device.h>
++
++#include <asm/arch/simpad.h>
++
++extern long get_cs3_ro(void);
++extern long get_cs3_shadow(void);
++extern void set_cs3_bit(int value);
++extern void clear_cs3_bit(int value);
++
++struct cs3 {
++ struct class_device class_dev;
++ const char *name;
++ char *id;
++ int type;
++};
++
++struct cs3 cs3 ={
++ .name = "latch_cs3",
++};
++
++
++#define CS3_STORE_ATTR(namek,nameg) \
++static ssize_t namek##_store (struct class_device *cdev, const char * buf, size_t count) \
++{ \
++ char val; \
++ if (sscanf(buf, "%c",&val) != 1) \
++ return -EINVAL; \
++ if (val == '1') \
++ set_cs3_bit(nameg); \
++ else if (val == '0') \
++ clear_cs3_bit(nameg); \
++ return strlen(buf); \
++}
++
++CS3_STORE_ATTR(display_on, DISPLAY_ON);
++CS3_STORE_ATTR(dect_power_on, DECT_POWER_ON);
++CS3_STORE_ATTR(irda_sd, IRDA_SD);
++CS3_STORE_ATTR(sd_mediaq, SD_MEDIAQ);
++CS3_STORE_ATTR(led2_on, LED2_ON);
++CS3_STORE_ATTR(irda_mode, IRDA_MODE);
++CS3_STORE_ATTR(reset_simcard, RESET_SIMCARD);
++
++
++#define CS3_ATTR(shadro,namek,nameg,mode,store) \
++static ssize_t namek##_show(struct class_device *class_dev, char *buf) \
++{ \
++ if (get_cs3_##shadro() & nameg ) \
++ return sprintf(buf, "1\n"); \
++ else \
++ return sprintf(buf, "0\n"); \
++} \
++static CLASS_DEVICE_ATTR(namek, mode, namek##_show, store)
++
++CS3_ATTR(shadow, vcc_5v_en, VCC_5V_EN, 0444, NULL);
++CS3_ATTR(shadow, vcc_3v_en, VCC_3V_EN, 0444, NULL);
++CS3_ATTR(shadow, en1, EN1, 0444, NULL);
++CS3_ATTR(shadow, en0, EN0, 0444, NULL);
++CS3_ATTR(shadow, display_on, DISPLAY_ON, 0664, display_on_store);
++CS3_ATTR(shadow, pcmcia_buff_dis, PCMCIA_BUFF_DIS, 0444, NULL);
++CS3_ATTR(shadow, mq_reset, MQ_RESET, 0444, NULL);
++CS3_ATTR(shadow, pcmcia_reset, PCMCIA_RESET, 0444, NULL);
++CS3_ATTR(shadow, dect_power_on, DECT_POWER_ON, 0664, dect_power_on_store);
++CS3_ATTR(shadow, irda_sd, IRDA_SD, 0664, irda_sd_store);
++CS3_ATTR(shadow, rs232_on, RS232_ON, 0444, NULL);
++CS3_ATTR(shadow, sd_mediaq, SD_MEDIAQ, 0664, sd_mediaq_store);
++CS3_ATTR(shadow, led2_on, LED2_ON, 0664, led2_on_store);
++CS3_ATTR(shadow, irda_mode, IRDA_MODE, 0664, irda_mode_store);
++CS3_ATTR(shadow, enable_5v, ENABLE_5V, 0444, NULL);
++CS3_ATTR(shadow, reset_simcard, RESET_SIMCARD, 0664, reset_simcard_store);
++CS3_ATTR(ro, pcmcia_bvd1, PCMCIA_BVD1, 0444, NULL);
++CS3_ATTR(ro, pcmcia_bvd2, PCMCIA_BVD2, 0444, NULL);
++CS3_ATTR(ro, pcmcia_vs1, PCMCIA_VS1, 0444, NULL);
++CS3_ATTR(ro, pcmcia_vs2, PCMCIA_VS2, 0444, NULL);
++CS3_ATTR(ro, lock_ind, LOCK_IND, 0444, NULL);
++CS3_ATTR(ro, charging_state, CHARGING_STATE, 0444, NULL);
++CS3_ATTR(ro, pcmcia_short, PCMCIA_SHORT, 0444, NULL);
++
++static struct class simpad_gpios_class = {
++ .name = "simpad",
++};
++
++#define create_entry_conditional(namek) \
++ rc = class_device_create_file(&cs3->class_dev, &class_device_attr_##namek); \
++ if (rc) goto out; \
++
++static int register_cs3_latch(struct cs3 *cs3)
++{
++ int rc = 0;
++ cs3->class_dev.class = &simpad_gpios_class;
++ strcpy(cs3->class_dev.class_id, cs3->name);
++ rc = class_device_register(&cs3->class_dev);
++ if(rc)
++ goto out;
++
++ create_entry_conditional(vcc_5v_en);
++ create_entry_conditional(vcc_3v_en);
++ create_entry_conditional(en1);
++ create_entry_conditional(en0);
++ create_entry_conditional(display_on);
++ create_entry_conditional(pcmcia_buff_dis);
++ create_entry_conditional(mq_reset);
++ create_entry_conditional(pcmcia_reset);
++ create_entry_conditional(dect_power_on);
++ create_entry_conditional(irda_sd);
++ create_entry_conditional(rs232_on);
++ create_entry_conditional(sd_mediaq);
++ create_entry_conditional(led2_on);
++ create_entry_conditional(irda_mode);
++ create_entry_conditional(enable_5v);
++ create_entry_conditional(reset_simcard);
++ create_entry_conditional(pcmcia_bvd1);
++ create_entry_conditional(pcmcia_bvd2);
++ create_entry_conditional(pcmcia_vs1);
++ create_entry_conditional(pcmcia_vs2);
++ create_entry_conditional(lock_ind);
++ create_entry_conditional(charging_state);
++ create_entry_conditional(pcmcia_short);
++
++out:
++ return rc;
++}
++
++static int __init simpad_gpios_class_init(void)
++{
++ int rc = 0;
++
++ rc = class_register(&simpad_gpios_class);
++
++ if(rc != 0)
++ {
++ printk(KERN_ERR "cs3 latch class failed to register properly\n");
++ return rc;
++ }
++
++ rc = register_cs3_latch(&cs3);
++ return rc;
++}
++
++static void __exit simpad_gpios_class_exit(void)
++{
++ class_unregister(&simpad_gpios_class);
++}
++
++module_init(simpad_gpios_class_init);
++module_exit(simpad_gpios_class_exit);
++
++MODULE_AUTHOR("Bernhard Guillon");
++MODULE_DESCRIPTION("CS3_latch driver");
++MODULE_LICENSE("GPL");
--- /dev/null
+diff -Nur linux-2.6.24.vanilla/drivers/net/wireless/hostap/hostap_cs.c linux-2.6.24/drivers/net/wireless/hostap/hostap_cs.c
+--- linux-2.6.24.vanilla/drivers/net/wireless/hostap/hostap_cs.c 2008-01-24 23:58:37.000000000 +0100
++++ linux-2.6.24/drivers/net/wireless/hostap/hostap_cs.c 2008-02-28 12:00:27.000000000 +0100
+@@ -1,3 +1,8 @@
++/*
++ *
++ * mrdata: -added shared irq
++ */
++
+ #define PRISM2_PCCARD
+
+ #include <linux/module.h>
+@@ -35,7 +40,7 @@
+ module_param(ignore_cis_vcc, int, 0444);
+ MODULE_PARM_DESC(ignore_cis_vcc, "Ignore broken CIS VCC entry");
+
+-
++int activar=0;
+ /* struct local_info::hw_priv */
+ struct hostap_cs_priv {
+ dev_node_t node;
+@@ -499,11 +504,13 @@
+
+ PDEBUG(DEBUG_HW, "%s: setting Vcc=33 (constant)\n", dev_info);
+ p_dev->conf.IntType = INT_MEMORY_AND_IO;
+-
++
++ activar=0;
+ ret = prism2_config(p_dev);
+ if (ret) {
+ PDEBUG(DEBUG_EXTRA, "prism2_config() failed\n");
+ }
++ activar=1;
+
+ return ret;
+ }
+@@ -693,7 +700,7 @@
+ * irq structure is initialized.
+ */
+ if (link->conf.Attributes & CONF_ENABLE_IRQ) {
+- link->irq.Attributes = IRQ_TYPE_EXCLUSIVE | IRQ_HANDLE_PRESENT;
++ link->irq.Attributes = IRQ_TYPE_DYNAMIC_SHARING | IRQ_FIRST_SHARED | IRQ_HANDLE_PRESENT;
+ link->irq.IRQInfo1 = IRQ_LEVEL_ID;
+ link->irq.Handler = prism2_interrupt;
+ link->irq.Instance = dev;
+diff -Nur linux-2.6.24.vanilla/drivers/net/wireless/hostap/hostap_hw.c linux-2.6.24/drivers/net/wireless/hostap/hostap_hw.c
+--- linux-2.6.24.vanilla/drivers/net/wireless/hostap/hostap_hw.c 2008-01-24 23:58:37.000000000 +0100
++++ linux-2.6.24/drivers/net/wireless/hostap/hostap_hw.c 2008-02-28 12:00:27.000000000 +0100
+@@ -54,6 +54,7 @@
+ #include "hostap.h"
+ #include "hostap_ap.h"
+
++extern int activar;
+
+ /* #define final_version */
+
+@@ -1497,6 +1498,8 @@
+ if (local->hw_downloading)
+ return 1;
+
++ activar=1;
++
+ if (prism2_hw_init(dev, initial)) {
+ return local->no_pri ? 0 : 1;
+ }
+@@ -2630,8 +2633,15 @@
+ int events = 0;
+ u16 ev;
+
+- iface = netdev_priv(dev);
+- local = iface->local;
++
++ // Todos los parametros de entrada son correctos (no son nulos). De momento esta es la unica forma que conozco de detectar el problema.
++ if (!activar) {
++ printk("hostap_hw.c: INTERRUPT BEFORE DEVICE INIT!\n");
++ return IRQ_HANDLED;
++ }
++
++ iface = netdev_priv(dev);
++ local = iface->local;
+
+ prism2_io_debug_add(dev, PRISM2_IO_DEBUG_CMD_INTERRUPT, 0, 0);
+
+diff -Nur linux-2.6.24.vanilla/drivers/net/wireless/hostap/hostap_pci.c linux-2.6.24/drivers/net/wireless/hostap/hostap_pci.c
+--- linux-2.6.24.vanilla/drivers/net/wireless/hostap/hostap_pci.c 2008-01-24 23:58:37.000000000 +0100
++++ linux-2.6.24/drivers/net/wireless/hostap/hostap_pci.c 2008-02-28 12:00:27.000000000 +0100
+@@ -19,6 +19,7 @@
+
+ #include "hostap_wlan.h"
+
++int activar=1;
+
+ static char *dev_info = "hostap_pci";
+
+diff -Nur linux-2.6.24.vanilla/drivers/net/wireless/hostap/hostap_plx.c linux-2.6.24/drivers/net/wireless/hostap/hostap_plx.c
+--- linux-2.6.24.vanilla/drivers/net/wireless/hostap/hostap_plx.c 2008-01-24 23:58:37.000000000 +0100
++++ linux-2.6.24/drivers/net/wireless/hostap/hostap_plx.c 2008-02-28 12:00:27.000000000 +0100
+@@ -21,7 +21,7 @@
+ #include <asm/io.h>
+
+ #include "hostap_wlan.h"
+-
++int activar=1;
+
+ static char *dev_info = "hostap_plx";
+
--- /dev/null
+diff -Nur linux-2.6.24.vanilla/drivers/video/Kconfig linux-2.6.24/drivers/video/Kconfig
+--- linux-2.6.24.vanilla/drivers/video/Kconfig 2008-01-24 23:58:37.000000000 +0100
++++ linux-2.6.24/drivers/video/Kconfig 2008-02-20 21:51:22.000000000 +0100
+@@ -198,7 +198,7 @@
+ This is particularly important to one driver, matroxfb. If
+ unsure, say N.
+
+-comment "Frame buffer hardware drivers"
++comment "Frambuffer hardware drivers"
+ depends on FB
+
+ config FB_CIRRUS
+@@ -1389,6 +1389,15 @@
+ ---help---
+ Driver for graphics boards with S3 Trio / S3 Virge chip.
+
++config FB_MQ200
++ bool "MQ200 Driver"
++ depends on (FB = y) && ARM && ARCH_SA1100
++ select FB_CFB_FILLRECT
++ select FB_CFB_COPYAREA
++ select FB_CFB_IMAGEBLIT
++ help
++ This is a MQ200 driver tested only on Siemens SIMpads.
++
+ config FB_SAVAGE
+ tristate "S3 Savage support"
+ depends on FB && PCI && EXPERIMENTAL
+diff -Nur linux-2.6.24.vanilla/drivers/video/Makefile linux-2.6.24/drivers/video/Makefile
+--- linux-2.6.24.vanilla/drivers/video/Makefile 2008-01-24 23:58:37.000000000 +0100
++++ linux-2.6.24/drivers/video/Makefile 2008-02-20 21:51:22.000000000 +0100
+@@ -35,6 +35,7 @@
+ obj-$(CONFIG_FB_PM2) += pm2fb.o
+ obj-$(CONFIG_FB_PM3) += pm3fb.o
+
++obj-$(CONFIG_FB_MQ200) += mq200/
+ obj-$(CONFIG_FB_MATROX) += matrox/
+ obj-$(CONFIG_FB_RIVA) += riva/
+ obj-$(CONFIG_FB_NVIDIA) += nvidia/
+diff -Nur linux-2.6.24.vanilla/drivers/video/backlight/Kconfig linux-2.6.24/drivers/video/backlight/Kconfig
+--- linux-2.6.24.vanilla/drivers/video/backlight/Kconfig 2008-01-24 23:58:37.000000000 +0100
++++ linux-2.6.24/drivers/video/backlight/Kconfig 2008-02-20 21:51:22.000000000 +0100
+@@ -90,3 +90,20 @@
+ help
+ If you have a Intel LE80578 (Carillo Ranch) say Y to enable the
+ backlight driver.
++
++config BACKLIGHT_SIMPAD
++ tristate "SIMpad MQ200 Backlight driver"
++ depends on SA1100_SIMPAD && BACKLIGHT_CLASS_DEVICE
++ default y
++ help
++ If you have a Siemens SIMpad say Y to enable the
++ backlight driver.
++
++config LCD_SIMPAD
++ tristate "SIMpad MQ200 LCD driver"
++ depends on SA1100_SIMPAD && LCD_CLASS_DEVICE
++ default y
++ help
++ If you have a Siemens SIMpad say Y to enable the
++ LCD driver.
++
+diff -Nur linux-2.6.24.vanilla/drivers/video/backlight/Makefile linux-2.6.24/drivers/video/backlight/Makefile
+--- linux-2.6.24.vanilla/drivers/video/backlight/Makefile 2008-01-24 23:58:37.000000000 +0100
++++ linux-2.6.24/drivers/video/backlight/Makefile 2008-02-20 21:51:22.000000000 +0100
+@@ -9,3 +9,5 @@
+ obj-$(CONFIG_BACKLIGHT_LOCOMO) += locomolcd.o
+ obj-$(CONFIG_BACKLIGHT_PROGEAR) += progear_bl.o
+ obj-$(CONFIG_BACKLIGHT_CARILLO_RANCH) += cr_bllcd.o
++obj-$(CONFIG_BACKLIGHT_SIMPAD) += simpad_bl.o
++obj-$(CONFIG_LCD_SIMPAD) += simpad_lcd.o
+diff -Nur linux-2.6.24.vanilla/drivers/video/backlight/simpad_bl.c linux-2.6.24/drivers/video/backlight/simpad_bl.c
+--- linux-2.6.24.vanilla/drivers/video/backlight/simpad_bl.c 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.24/drivers/video/backlight/simpad_bl.c 2008-02-20 21:51:22.000000000 +0100
+@@ -0,0 +1,208 @@
++/*
++ * GPLv2 <zecke@handhelds.org
++ *
++ * Implementation of the backlight_driver for
++ * the mq200 framebuffer
++ *
++ * 2007/03/17 mrdata:
++ * - small changes simpad_bl_get_brightness()
++ * simpad_bl_set_brightness()
++ * - new function simpad_bl_update_status()
++ * - changed struct backlight_properties simpad_bl_props()
++ * to new one
++ * - changed __init simpad_bl_init() -> backlight_device_register
++ *
++ * 2007/03/24 mrdata
++ * - added .brightness=127 in
++ * struct backlight_properties simpad_bl_props()
++ */
++#include <linux/module.h>
++#include <linux/kernel.h>
++#include <linux/init.h>
++#include <linux/platform_device.h>
++#include <linux/spinlock.h>
++#include <linux/fb.h>
++#include <linux/backlight.h>
++
++#include <asm/types.h>
++#include <asm/hardware.h>
++#include <asm/io.h>
++
++#include "../mq200/mq200_data.h"
++
++#define SIMPAD_BACKLIGHT_MASK 0x00a10044
++#define SIMPAD_DEFAULT_INTENSITY 127
++#define SIMPAD_MAX_INTENSITY 254
++#define REGISTER_BASE 0xf2e00000
++
++static int simpad_bl_suspended;
++static int current_intensity = 0;
++
++static void simpad_bl_send_intensity(struct backlight_device *bd)
++{
++ int intensity = bd->props.brightness;
++
++ union fp0fr fp0fr;
++ unsigned long dutyCycle, pwmcontrol;
++
++ if (intensity > SIMPAD_MAX_INTENSITY)
++ intensity = SIMPAD_MAX_INTENSITY;
++
++ if (bd->props.power != FB_BLANK_UNBLANK)
++ intensity = 0;
++
++ if (bd->props.fb_blank != FB_BLANK_UNBLANK)
++ intensity = 0;
++
++ if (simpad_bl_suspended)
++ intensity = 0;
++
++ if (intensity != current_intensity)
++ {
++ /*
++ * Determine dutyCycle.
++ * Note: the lower the value, the brighter the display!
++ */
++
++ dutyCycle = SIMPAD_MAX_INTENSITY - intensity;
++
++ /*
++ * Configure PWM0 (source clock = oscillator clock, pwm always enabled,
++ * zero, clock pre-divider = 4) pwm frequency = 12.0kHz
++ */
++
++ fp0fr.whole = readl(FP0FR(REGISTER_BASE));
++ pwmcontrol = fp0fr.whole & 0xffff00ff;
++ fp0fr.whole &= 0xffffff00;
++ fp0fr.whole |= 0x00000044;
++ writel(fp0fr.whole, FP0FR(REGISTER_BASE));
++
++ /* Write to pwm duty cycle register. */
++ fp0fr.whole = dutyCycle << 8;
++ fp0fr.whole &= 0x0000ff00;
++ fp0fr.whole |= pwmcontrol;
++ writel(fp0fr.whole, FP0FR(REGISTER_BASE));
++
++ current_intensity = intensity;
++ }
++}
++
++
++#ifdef CONFIG_PM
++static int simpad_bl_suspend(struct platform_device *pdev, pm_message_t state)
++{
++ struct backlight_device *bd = platform_get_drvdata(pdev);
++
++ simpad_bl_suspended = 1;
++ simpad_bl_send_intensity(bd);
++ return 0;
++}
++
++static int simpad_bl_resume(struct platform_device *pdev)
++{
++ struct backlight_device *bd = platform_get_drvdata(pdev);
++
++ simpad_bl_suspended = 0;
++ simpad_bl_send_intensity(bd);
++ return 0;
++}
++#else
++#define simpad_bl_suspend NULL
++#define simpad_bl_resume NULL
++#endif
++
++
++static int simpad_bl_set_intensity(struct backlight_device *bd)
++{
++ simpad_bl_send_intensity(bd);
++ return 0;
++}
++
++
++static int simpad_bl_get_intensity(struct backlight_device *bd)
++{
++ return current_intensity;
++}
++
++
++static struct backlight_ops simpad_bl_ops = {
++ .get_brightness = simpad_bl_get_intensity,
++ .update_status = simpad_bl_set_intensity,
++};
++
++
++static int __init simpad_bl_probe(struct platform_device *pdev)
++{
++ struct backlight_device *bd;
++
++ bd = backlight_device_register("simpad-mq200-bl", &pdev->dev, NULL, &simpad_bl_ops);
++
++ if (IS_ERR (bd))
++ return PTR_ERR (bd);
++
++ platform_set_drvdata(pdev, bd);
++
++ bd->props.max_brightness = SIMPAD_MAX_INTENSITY;
++ bd->props.brightness = SIMPAD_DEFAULT_INTENSITY;
++ simpad_bl_send_intensity(bd);
++
++ return 0;
++}
++
++
++static int simpad_bl_remove(struct platform_device *pdev)
++{
++ struct backlight_device *bd = platform_get_drvdata(pdev);
++
++ bd->props.brightness = 0;
++ bd->props.power = 0;
++ simpad_bl_send_intensity(bd);
++
++ backlight_device_unregister(bd);
++
++ return 0;
++}
++
++static struct platform_driver simpad_bl_driver = {
++ .probe = simpad_bl_probe,
++ .remove = simpad_bl_remove,
++ .suspend = simpad_bl_suspend,
++ .resume = simpad_bl_resume,
++ .driver = {
++ .name = "simpad-mq200-bl",
++ },
++};
++
++static struct platform_device *simpad_bl_device = NULL;
++
++static int __init simpad_bl_init(void)
++{
++ int ret;
++
++ ret = platform_driver_register(&simpad_bl_driver);
++ if (!ret) {
++ simpad_bl_device = platform_device_alloc("simpad-mq200-bl", -1);
++ if (!simpad_bl_device)
++ return -ENOMEM;
++
++ ret = platform_device_add(simpad_bl_device);
++
++ if (ret) {
++ platform_device_put(simpad_bl_device);
++ platform_driver_unregister(&simpad_bl_driver);
++ }
++ }
++ return ret;
++}
++
++static void __exit simpad_bl_exit(void)
++{
++ platform_device_unregister(simpad_bl_device);
++ platform_driver_unregister(&simpad_bl_driver);
++}
++
++
++module_init(simpad_bl_init);
++module_exit(simpad_bl_exit);
++MODULE_AUTHOR("Holger Hans Peter Freyther");
++MODULE_LICENSE("GPL");
+diff -Nur linux-2.6.24.vanilla/drivers/video/backlight/simpad_lcd.c linux-2.6.24/drivers/video/backlight/simpad_lcd.c
+--- linux-2.6.24.vanilla/drivers/video/backlight/simpad_lcd.c 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.24/drivers/video/backlight/simpad_lcd.c 2008-02-20 21:51:22.000000000 +0100
+@@ -0,0 +1,172 @@
++/*
++ * GPLv2 <zecke@handhelds.org
++ *
++ * Implementation of the lcd_driver for the mq200 framebuffer
++ *
++ * 2007/03/24 mrdata:
++ * - added simpad_lcd_get_contrast()
++ * - added simpad_lcd_set_contrast()
++ * - modify struct lcd_properties simpad_lcd_props
++ */
++#include <linux/module.h>
++#include <linux/kernel.h>
++#include <linux/init.h>
++#include <linux/platform_device.h>
++#include <linux/fb.h>
++#include <linux/lcd.h>
++
++#include <asm/arch/simpad.h>
++#include <asm/hardware.h>
++
++extern long get_cs3_shadow(void);
++extern void set_cs3_bit(int);
++extern void clear_cs3_bit(int);
++
++#define UNUSED(x) x=x
++
++static int simpad_lcd_get_power(struct lcd_device* dev)
++{
++ UNUSED(dev);
++
++ return (get_cs3_shadow() & DISPLAY_ON) ? 0 : 4;
++}
++
++static int simpad_lcd_set_power(struct lcd_device* dev, int power)
++{
++ UNUSED(dev);
++
++ if( power == 4 )
++ clear_cs3_bit(DISPLAY_ON);
++ else
++ set_cs3_bit(DISPLAY_ON);
++
++ return 0;
++}
++
++static int simpad_lcd_get_contrast(struct lcd_device* dev)
++{
++ UNUSED(dev);
++
++ return 0;
++}
++
++static int simpad_lcd_set_contrast(struct lcd_device* dev, int contrast)
++{
++ UNUSED(dev);
++
++ UNUSED(contrast);
++
++ return 0;
++}
++
++#ifdef CONFIG_PM
++static int simpad_lcd_suspend(struct platform_device *pdev, pm_message_t state)
++{
++ static int ret;
++ struct lcd_device* ld;
++
++ UNUSED(state);
++
++ ld = platform_get_drvdata(pdev);
++
++ ret = simpad_lcd_set_power(ld, 4);
++
++ return ret;
++}
++
++static int simpad_lcd_resume(struct platform_device *pdev)
++{
++ struct lcd_device *ld;
++ static int ret;
++
++ ld = platform_get_drvdata(pdev);
++
++ ret = simpad_lcd_set_power(ld, 0);
++
++ return ret;
++}
++#else
++#define simpad_lcd_suspend NULL
++#define simpad_lcd_resume NULL
++#endif
++
++
++/*FIXME
++static struct lcd_properties simpad_lcd_props = {
++ .max_contrast = 0,
++};
++*/
++
++static struct lcd_ops simpad_lcd_ops = {
++ .get_power = simpad_lcd_get_power,
++ .set_power = simpad_lcd_set_power,
++ .get_contrast = simpad_lcd_get_contrast,
++ .set_contrast = simpad_lcd_set_contrast,
++};
++
++static int __init simpad_lcd_probe(struct platform_device *pdev)
++{
++ struct lcd_device *ld;
++
++ ld = lcd_device_register ("simpad-mq200-lcd", &pdev->dev, NULL, &simpad_lcd_ops);
++
++ if (IS_ERR(ld))
++ return PTR_ERR(ld);
++
++ platform_set_drvdata(pdev, ld);
++
++ ld->props.max_contrast = 0;
++
++ return 0;
++}
++
++static int simpad_lcd_remove(struct platform_device *pdev)
++{
++ struct lcd_device *ld = platform_get_drvdata(pdev);
++
++ lcd_device_unregister(ld);
++
++ return 0;
++}
++
++static struct platform_driver simpad_lcd_driver = {
++ .probe = simpad_lcd_probe,
++ .remove = simpad_lcd_remove,
++ .suspend = simpad_lcd_suspend,
++ .resume = simpad_lcd_resume,
++ .driver = {
++ .name = "simpad-mq200-lcd",
++ },
++};
++
++static struct platform_device *simpad_lcd_device = NULL;
++
++static int __init simpad_lcd_init(void)
++{
++ int ret;
++
++ ret = platform_driver_register(&simpad_lcd_driver);
++ if (!ret) {
++ simpad_lcd_device = platform_device_alloc("simpad-mq200-lcd", -1);
++ if (!simpad_lcd_device)
++ return -ENOMEM;
++
++ ret = platform_device_add(simpad_lcd_device);
++
++ if (ret) {
++ platform_device_put(simpad_lcd_device);
++ platform_driver_unregister(&simpad_lcd_driver);
++ }
++ }
++ return ret;
++}
++
++static void __exit simpad_lcd_exit(void) {
++ platform_driver_unregister(&simpad_lcd_driver);
++ platform_device_unregister(simpad_lcd_device);
++}
++
++module_init(simpad_lcd_init);
++module_exit(simpad_lcd_exit);
++MODULE_AUTHOR("Holger Hans Peter Freyther");
++MODULE_LICENSE("GPL");
+diff -Nur linux-2.6.24.vanilla/drivers/video/mq200/Makefile linux-2.6.24/drivers/video/mq200/Makefile
+--- linux-2.6.24.vanilla/drivers/video/mq200/Makefile 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.24/drivers/video/mq200/Makefile 2008-02-20 21:51:22.000000000 +0100
+@@ -0,0 +1,6 @@
++# Makefile for mq200 video driver
++# 4 Aug 2003, Holger Hans Peter Freyther
++#
++
++obj-$(CONFIG_FB_MQ200) += mq_skeleton.o mq_external.o
++
+diff -Nur linux-2.6.24.vanilla/drivers/video/mq200/mq200_data.h linux-2.6.24/drivers/video/mq200/mq200_data.h
+--- linux-2.6.24.vanilla/drivers/video/mq200/mq200_data.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.24/drivers/video/mq200/mq200_data.h 2008-02-20 21:51:22.000000000 +0100
+@@ -0,0 +1,1120 @@
++/*
++ * From ucLinux mq200fb.c and mq200fb.h
++ *
++ * 2007/03/11 mrdata:
++ * insert registers for graphics controller 2 module
++ */
++
++#ifndef __MQ200_FB_H__
++#define __MQ200_FB_H__
++
++struct mq200_io_regions {
++ u32 fb_size; /* framebuffer size */
++ unsigned long phys_mmio_base; /* physical register memory base */
++ unsigned long virt_mmio_base; /* virtual start of registers */
++ unsigned long phys_fb_base; /* physical address of frame buffer */
++ unsigned long virt_fb_base; /* virtual start of the framebuffer */
++};
++
++#define MQ200_MONITOR_HORI_RES(info) info->monitor_info.horizontal_res
++#define MQ200_MONITOR_VERT_RES(info) info->monitor_info.vertical_res
++#define MQ200_MONITOR_DEPTH(info) info->monitor_info.depth
++#define MQ200_MONITOR_LINE_LENGTH(info) info->monitor_info.line_length
++
++struct mq200_monitor_info {
++ unsigned int horizontal_res;
++ unsigned int vertical_res;
++ unsigned int depth;
++ unsigned int refresh;
++ unsigned int line_length;
++ unsigned long flags;
++};
++
++
++/**
++ * Addresses of Module
++ */
++#define MQ200_FB_BASE (x) (x + 0x1800000) /* framebuffer */
++#define MQ200_FB_SIZE 0x200000 /* framebuffer size in bytes */
++#define MQ200_REGS_BASE(x) (x + 0x1e00000) /* start of registers area */
++#define MQ200_REGS_SIZE 0x200000 /* registers area size */
++
++#define PMU_OFFSET 0x00000 /* power management */
++#define CPU_OFFSET 0x02000 /* CPU interface */
++#define MIU_OFFSET 0x04000 /* memory controller */
++#define IN_OFFSET 0x08000 /* interrupt controller */
++#define GC_OFFSET 0x0a000 /* graphics controller 1&2 */
++#define GE_OFFSET 0x0c000 /* graphics engine */
++#define FPI_OFFSET 0x0e000 /* flat panel controller */
++#define CP1_OFFSET 0x10000 /* color palette 1 */
++#define DC_OFFSET 0x14000 /* device configuration */
++#define PCI_OFFSET 0x16000 /* PCI configuration */
++#define PSF_OFFSET 0x18000 /* ??? */
++
++
++/****
++ * Registers
++ */
++
++/* power management unit */
++#define PMR(addr) (addr + PCI_OFFSET + 0x40)/* power management
++ register */
++#define PMR_VALUE 0x06210001 /* expected read value of PMR register */
++#define PM00R(addr) (addr + PMU_OFFSET + 0x00) /* power management unit
++ configuration
++ register */
++#define PM01R(addr) (addr + PMU_OFFSET + 0x04) /* D1 state control */
++#define PM02R(addr) (addr + PMU_OFFSET + 0x08) /* d2 state control */
++#define PM06R(addr) (addr + PMU_OFFSET + 0x18) /* PLL 2 programming */
++#define PM07R(addr) (addr + PMU_OFFSET + 0x1c) /* PLL 3 programming */
++
++#define PMCSR(addr) (addr + PCI_OFFSET + 0x44) /* power management
++ control/status
++ register */
++
++/* memory interface unit */
++#define MM00R(addr) (addr + MIU_OFFSET + 0x00)/* MIU interface control
++ 0 */
++#define MM01R(addr) (addr + MIU_OFFSET + 0x04) /* MIU interface control
++ 1 */
++#define MM02R(addr) (addr + MIU_OFFSET + 0x08) /* memory interface
++ control 2 */
++#define MM03R(addr) (addr + MIU_OFFSET + 0x0c) /* memory interface
++ control 3 */
++#define MM04R(addr) (addr + MIU_OFFSET + 0x10) /* memory interface
++ control 4 */
++/* graphics controller 1 module */
++#define GC00R(addr) (addr + GC_OFFSET + 0x00) /* graphics controller 1
++ control */
++#define GC01R(addr) (addr + GC_OFFSET + 0x04) /* graphics controller
++ CRT control */
++#define GC02R(addr) (addr + GC_OFFSET + 0x08) /* horizontal display 1
++ control */
++#define GC03R(addr) (addr + GC_OFFSET + 0x0c) /* vertical display 1
++ control */
++#define GC04R(addr) (addr + GC_OFFSET + 0x10) /* horizontal sync 1
++ control */
++#define GC05R(addr) (addr + GC_OFFSET + 0x14) /* vertical sync 1
++ control */
++#define GC07R(addr) (addr + GC_OFFSET + 0x1c) /* vertical display 1
++ count */
++#define GC08R(addr) (addr + GC_OFFSET + 0x20) /* horizontal window 1
++ control */
++#define GC09R(addr) (addr + GC_OFFSET + 0x24) /* vertical window 1
++ control */
++#define GC0AR(addr) (addr + GC_OFFSET + 0x28) /* alternate horizontal
++ window 1 control */
++#define GC0BR(addr) (addr + GC_OFFSET + 0x2c) /* alternate vertical
++ window 1 control */
++#define GC0CR(addr) (addr + GC_OFFSET + 0x30) /* window 1
++ start address */
++#define GC0DR(addr) (addr + GC_OFFSET + 0x34) /* alternate window 1
++ start address */
++#define GC0ER(addr) (addr + GC_OFFSET + 0x38) /* alternate window 1
++ stride */
++#define GC0FR(addr) (addr + GC_OFFSET + 0x3c) /* alternate window 1
++ line size */
++#define GC10R(addr) (addr + GC_OFFSET + 0x40) /* hardware cursor 1
++ position */
++#define GC11R(addr) (addr + GC_OFFSET + 0x44) /* hardware cursor 1
++ start address and
++ offset */
++#define GC12R(addr) (addr + GC_OFFSET + 0x48) /* hardware cursor 1
++ foreground color */
++#define GC13R(addr) (addr + GC_OFFSET + 0x4c) /* hardware cursor 1
++ background color */
++
++/* graphics controller 2 module */
++#define GC20R(addr) (addr + GC_OFFSET + 0x80) /* graphics controller 2
++ control */
++#define GC21R(addr) (addr + GC_OFFSET + 0x84) /* graphics controller
++ CRC control */
++#define GC22R(addr) (addr + GC_OFFSET + 0x88) /* horizontal display 2
++ control */
++#define GC23R(addr) (addr + GC_OFFSET + 0x8c) /* vertical display 2
++ control */
++#define GC24R(addr) (addr + GC_OFFSET + 0x90) /* horizontal sync 2
++ control */
++#define GC25R(addr) (addr + GC_OFFSET + 0x94) /* vertical sync 2
++ control */
++#define GC27R(addr) (addr + GC_OFFSET + 0x9c) /* vertical display 2
++ count */
++#define GC28R(addr) (addr + GC_OFFSET + 0xa0) /* horizontal window 2
++ control */
++#define GC29R(addr) (addr + GC_OFFSET + 0xa4) /* vertical window 2
++ control */
++#define GC2AR(addr) (addr + GC_OFFSET + 0xa8) /* alternate horizontal
++ window 2 control */
++#define GC2BR(addr) (addr + GC_OFFSET + 0xac) /* alternate vertical
++ window 2 control */
++#define GC2CR(addr) (addr + GC_OFFSET + 0xb0) /* window 2
++ start address */
++#define GC2DR(addr) (addr + GC_OFFSET + 0xb4) /* alternate window 2
++ start address */
++#define GC2ER(addr) (addr + GC_OFFSET + 0xb8) /* alternate window 2
++ stride */
++#define GC2FR(addr) (addr + GC_OFFSET + 0xbc) /* alternate window 2
++ line size */
++#define GC30R(addr) (addr + GC_OFFSET + 0xc0) /* hardware cursor 2
++ position */
++#define GC31R(addr) (addr + GC_OFFSET + 0xc4) /* hardware cursor 2
++ start address and
++ offset */
++#define GC32R(addr) (addr + GC_OFFSET + 0xc8) /* hardware cursor 2
++ foreground color */
++#define GC33R(addr) (addr + GC_OFFSET + 0xcc) /* hardware cursor 2
++ background color */
++
++/* graphics engine */
++#define ROP_SRCCOPY 0xCC /* dest = source */
++#define ROP_SRCPAINT 0xEE /* dest = source OR dest */
++#define ROP_SRCAND 0x88 /* dest = source AND dest */
++#define ROP_SRCINVERT 0x66 /* dest = source XOR dest */
++#define ROP_SRCERASE 0x44 /* dest = source AND (NOT dest) */
++#define ROP_NOTSRCCOPY 0x33 /* dest = NOT source */
++#define ROP_NOTSRCERASE 0x11 /* dest = (NOT source) AND (NOT dest) */
++#define ROP_MERGECOPY 0xC0 /* dest = source AND pattern */
++#define ROP_MERGEPAINT 0xBB /* dest = (NOT source) OR dest */
++#define ROP_PATCOPY 0xF0 /* dest = pattern */
++#define ROP_PATPAINT 0xFB /* dest = DPSnoo */
++#define ROP_PATINVERT 0x5A /* dest = pattern XOR dest */
++#define ROP_DSTINVERT 0x55 /* dest = NOT dest */
++#define ROP_BLACKNESS 0x00 /* dest = BLACK */
++#define ROP_WHITENESS 0xFF /* dest = WHITE */
++
++#define GE00R(addr) (addr + GE_OFFSET + 0x00) /* primary drawing command
++ register */
++#define GE01R(addr) (addr + GE_OFFSET + 0x04) /* primary width and
++ height register */
++#define GE02R(addr) (addr + GE_OFFSET + 0x08) /* primary destination
++ address register */
++#define GE03R(addr) (addr + GE_OFFSET + 0x0c) /* primary source XY
++ register */
++#define GE04R(addr) (addr + GE_OFFSET + 0x10) /* primary color compare
++ register */
++#define GE05R(addr) (addr + GE_OFFSET + 0x14) /* primary clip left/top
++ register */
++#define GE06R(addr) (addr + GE_OFFSET + 0x18) /* primary clip
++ right/bottom register
++ */
++#define GE07R(addr) (addr + GE_OFFSET + 0x1c) /* primary source and
++ pattern offset
++ register */
++#define GE08R(addr) (addr + GE_OFFSET + 0x20) /* primary foreground
++ color
++ register/rectangle
++ fill register */
++#define GE09R(addr) (addr + GE_OFFSET + 0x24) /* source stride/offset
++ register */
++#define GE0AR(addr) (addr + GE_OFFSET + 0x28) /* destination stride
++ register and color
++ depth */
++#define GE0BR(addr) (addr + GE_OFFSET + 0x2c) /* image base address
++ register */
++#define GE40R(addr) (addr + GE_OFFSET + 0x100) /* mono pattern register
++ 0 */
++#define GE41R(addr) (addr + GE_OFFSET + 0x104) /* mono pattern register
++ 1 */
++#define GE42R(addr) (addr + GE_OFFSET + 0x108) /* foreground color
++ register */
++#define GE43R(addr) (addr + GE_OFFSET + 0x10c) /* background color
++ register */
++/* color palette */
++#define C1xxR(addr, regno) \
++ (addr + CP1_OFFSET + (regno) * 4) /* graphics controller color
++ palette 1 */
++/* device configuration */
++#define DC00R(addr) (addr + DC_OFFSET + 0x00) /* device configuration
++ register 0 */
++#define DC_RESET 0x4000
++/* PCI configuration space */
++#define PC00R(addr) (addr + PCI_OFFSET + 0x00)/* device ID/vendor ID
++ register */
++/* Flatpanel Control */
++#define FP00R(addr) (addr + FPI_OFFSET + 0x00) /* Flat Panel Control 0 */
++#define FP01R(addr) (addr + FPI_OFFSET + 0x04) /* Flat Panel Output Pin */
++#define FP02R(addr) (addr + FPI_OFFSET + 0x08) /* Flat Panel Gener Purpose
++ Outout Control Register */
++#define FP03R(addr) (addr + FPI_OFFSET + 0x0c) /* General Purpose I/O Port
++ Control Register */
++#define FP04R(addr) (addr + FPI_OFFSET + 0x10) /* STN Panel Control Register */
++#define FP05R(addr) (addr + FPI_OFFSET + 0x14) /* D-STN Half Frame Buffer
++ Control Register -By Guess */
++#define FP0FR(addr) (addr + FPI_OFFSET + 0x3c) /* Pulse Width Modulation
++ Control Register */
++#define FRCTL_PATTERN_COUNT 32
++#define FP10R(addr) (addr + FPI_OFFSET + 0x40) /* Frame-Rate Control Pattern
++ Register */
++#define FP11R(addr) (addr + FPI_OFFSET + 0x44)
++#define FP2FR(addr) (addr + FPI_OFFSET + 0xc0) /* Frame-Rate Control Weight
++ Registers */
++
++
++
++
++/* power management miscellaneous control */
++union pm00r {
++ struct {
++ u32 pll1_n_b5 :1; /* PLL 1 N parameter bit 5 is 0 */
++ u32 reserved_1 :1;
++ u32 pll2_enbl :1; /* PLL 2 enable */
++ u32 pll3_enbl :1; /* PLL 3 enable */
++ u32 reserved_2 :1;
++ u32 pwr_st_ctrl :1; /* power state status control */
++ u32 reserved_3 :2;
++
++ u32 ge_enbl :1; /* graphics engine enable */
++ u32 ge_bsy_gl :1; /* graphics engine force busy (global) */
++ u32 ge_bsy_lcl :1; /* graphics engine force busy (local) */
++ u32 ge_clock :2; /* graphics engine clock select */
++ u32 ge_cmd_fifo :1; /* graphics engine command FIFO reset */
++ u32 ge_src_fifo :1; /* graphics engine CPU source FIFO reset */
++ u32 miu_pwr_seq :1; /* memory interface unit power sequencing
++ enable */
++
++ u32 d3_mem_rfsh :1; /* D3 memory refresh */
++ u32 d4_mem_rfsh :1; /* D4 memory refresh */
++ u32 gpwr_intrvl :2; /* general power sequencing interval */
++ u32 fppwr_intrvl:2; /* flat panel power sequencing interval */
++ u32 gpwr_seq_ctr:1; /* general power sequencing interval control */
++ u32 pmu_tm :1; /* PMU test mode */
++
++ u32 pwr_state :2; /* power state (read only) */
++ u32 pwr_seq_st :1; /* power sequencing active status (read
++ only) */
++ u32 reserved_4 :5;
++ } part;
++ u32 whole;
++};
++
++/* D1 state control */
++union pm01r {
++ struct {
++ u32 osc_enbl :1; /* D1 oscillator enable */
++ u32 pll1_enbl :1; /* D1 PLL 1 enable */
++ u32 pll2_enbl :1; /* D1 PLL 2 enable */
++ u32 pll3_enbl :1; /* D1 PLL 3 enable */
++ u32 miu_enbl :1; /* D1 Memory Interface Unit (MIU) enable */
++ u32 mem_rfsh :1; /* D1 memory refresh enable */
++ u32 ge_enbl :1; /* D1 Graphics Engine (GE) enable */
++ u32 reserved_1 :1;
++
++ u32 crt_enbl :1; /* D1 CRT enable */
++ u32 fpd_enbl :1; /* D1 Flat Panel enable */
++ u32 reserved_2 :6;
++
++ u32 ctl1_enbl :1; /* D1 controller 1 enable */
++ u32 win1_enbl :1; /* D1 window 1 enable */
++ u32 awin1_enbl :1; /* D1 alternate window 1 enable */
++ u32 cur1_enbl :1; /* D1 cursor 1 enable */
++ u32 reserved_3 :4;
++
++ u32 ctl2_enbl :1; /* D1 controller 2 enable */
++ u32 win2_enbl :1; /* D1 window 2 enable */
++ u32 awin2_enbl :1; /* D1 alternate window 2 enable */
++ u32 cur2_enbl :1; /* D1 cursor 2 enable */
++ u32 reserved_4 :4;
++ } part;
++ u32 whole;
++};
++
++/* D2 state control */
++union pm02r {
++ struct {
++ u32 osc_enbl :1; /* D2 oscillator enable */
++ u32 pll1_enbl :1; /* D2 PLL 1 enable */
++ u32 pll2_enbl :1; /* D2 PLL 2 enable */
++ u32 pll3_enbl :1; /* D2 PLL 3 enable */
++ u32 miu_enbl :1; /* D2 Memory Interface Unit (MIU) enable */
++ u32 mem_rfsh :1; /* D2 memory refresh enable */
++ u32 ge_enbl :1; /* D2 Graphics Engine (GE) enable */
++ u32 reserved_1 :1;
++
++ u32 crt_enbl :1; /* D2 CRT enable */
++ u32 fpd_enbl :1; /* D2 Flat Panel enable */
++ u32 reserved_2 :6;
++
++ u32 ctl1_enbl :1; /* D2 controller 1 enable */
++ u32 win1_enbl :1; /* D2 window 1 enable */
++ u32 awin1_enbl :1; /* D2 alternate window 1 enable */
++ u32 cur1_enbl :1; /* D2 cursor 1 enable */
++ u32 reserved_3 :4;
++
++ u32 ctl2_enbl :1; /* D2 controller 2 enable */
++ u32 win2_enbl :1; /* D2 window 2 enable */
++ u32 awin2_enbl :1; /* D2 alternate window 2 enable */
++ u32 cur2_enbl :1; /* D2 cursor 2 enable */
++ u32 reserved_4 :4;
++ } part;
++ u32 whole;
++};
++
++/* PLL 2 programming */
++union pm06r {
++ struct {
++ u32 clk_src :1; /* PLL 2 reference clock source */
++ u32 bypass :1; /* PLL 2 bypass */
++ u32 reserved_1 :2;
++ u32 p_par :3; /* PLL 2 P parameter */
++ u32 reserved_2 :1;
++
++ u32 n_par :5; /* PLL 2 N parameter */
++ u32 reserved_3 :3;
++
++ u32 m_par :8; /* PLL 2 M parameter */
++
++ u32 reserved_4 :4;
++ u32 trim :4; /* PLL 2 trim value */
++ } part;
++ u32 whole;
++};
++
++/* PLL 3 programming */
++union pm07r {
++ struct {
++ u32 clk_src :1; /* PLL 3 reference clock source */
++ u32 bypass :1; /* PLL 3 bypass */
++ u32 reserved_1 :2;
++ u32 p_par :3; /* PLL 3 P parameter */
++ u32 reserved_2 :1;
++
++ u32 n_par :5; /* PLL 3 N parameter */
++ u32 reserved_3 :3;
++
++ u32 m_par :8; /* PLL 3 M parameter */
++
++ u32 reserved_4 :4;
++ u32 trim :4; /* PLL 3 trim value */
++ } part;
++ u32 whole;
++};
++
++
++
++/* MIU interface control 1 */
++union mm00r {
++ struct {
++ u32 miu_enbl :1; /* MIU enable bit */
++ u32 mr_dsbl :1; /* MIU reset disable bit */
++ u32 edr_dsbl :1; /* embedded DRAM reset disable bit */
++ u32 reserved_1 :29;
++ } part;
++ u32 whole;
++};
++
++/* MIU interface control 2 */
++union mm01r {
++ struct {
++ u32 mc_src :1; /* memory clock source */
++ u32 msr_enbl :1; /* memory slow refresh enable bit */
++ u32 pb_cpu :1; /* page break enable for CPU */
++ u32 pb_gc1 :1; /* page break enable for GC1 */
++ u32 pb_gc2 :1; /* page break enable for GC2 */
++ u32 pb_stn_r :1; /* page break enable for STN read */
++ u32 pb_stn_w :1; /* page break enable for STN write */
++ u32 pb_ge :1; /* page break enable for GE */
++ u32 reserved_1 :4;
++ u32 mr_interval :14; /* normal memory refresh time interval */
++ u32 reserved_2 :4;
++ u32 edarm_enbl :1; /* embedded DRAM auto-refresh mode enable */
++ u32 eds_enbl :1; /* EDRAM standby enable for EDRAM normal
++ mode operation */
++ } part;
++ u32 whole;
++};
++
++/* memory interface control 3 */
++union mm02r {
++ struct {
++ u32 bs_ :2;
++ u32 bs_stnr :2; /* burst count for STN read memory cycles */
++ u32 bs_stnw :2; /* burst count for STN write memroy cycles */
++ u32 bs_ge :2; /* burst count for graphics engine
++ read/write memroy cycles */
++ u32 bs_cpuw :2; /* burst count for CPU write memory cycles */
++ u32 fifo_gc1 :4; /* GC1 display refresh FIFO threshold */
++ u32 fifo_gc2 :4; /* GC2 display refresh FIFO threshold */
++ u32 fifo_stnr :4; /* STN read FIFO threshold */
++ u32 fifo_stnw :4; /* STN write FIFO threshold */
++ u32 fifo_ge_src :3; /* GE source read FIFO threshold */
++ u32 fifo_ge_dst :3; /* GE destination read FIFO threshold */
++ } part;
++ u32 whole;
++};
++
++/* memory interface control 4 */
++union mm03r {
++ struct {
++ u32 rd_late_req :1; /* read latency request */
++ u32 reserved_1 :31;
++ } part;
++ u32 whole;
++};
++
++/* memory interface control 5 */
++union mm04r {
++ struct {
++ u32 latency :3; /* EDRAM latency */
++ u32 dmm_cyc :1; /* enable for the dummy cycle insertion
++ between read and write cycles */
++ u32 pre_dmm_cyc :1; /* enable for the dummy cycle insertion
++ between read/write and precharge cycles
++ for the same bank */
++ u32 reserved_1 :3;
++ u32 bnk_act_cls :2; /* bank activate command to bank close
++ command timing interval control */
++ u32 bnk_act_rw :1; /* bank activate command to read/wirte
++ command timing interval control */
++ u32 bnk_cls_act :1; /* bank close command to bank activate
++ command timing interval control */
++ u32 trc :1; /* row cycle time */
++ u32 reserved_2 :3;
++ u32 delay_r :2; /* programmable delay for read clock */
++ u32 delay_m :2; /* programmable delay for internal memory
++ clock */
++ } part;
++ u32 whole;
++};
++
++/* graphics controller 1 register */
++union gc00r {
++ struct {
++ u32 ctl_enbl :1; /* Controller 1 Enable */
++ u32 hc_reset :1; /* Horizontal Counter 1 Reset */
++ u32 vc_reset :1; /* Vertical Counter 1 Reset */
++ u32 iwin_enbl :1; /* Image Window 1 Enable */
++ u32 gcd :4; /* Graphics Color Depth (GCD) */
++
++ u32 hc_enbl :1; /* Hardware Cursor 1 Enable */
++ u32 reserved_1 :2;
++ u32 aiwin_enbl :1; /* Alternate Image Window Enable */
++ u32 agcd :4; /* Alternate Graphics Color Depth (AGCD) */
++
++ u32 g1rclk_src :2; /* G1RCLK Source */
++ u32 tm0 :1; /* Test Mode 0 */
++ u32 tm1 :1; /* Test Mode 1 */
++ u32 fd :3; /* G1MCLK First Clock Divisor (FD1) */
++ u32 reserved_2 :1;
++
++ u32 sd :8; /* G1MCLK Second Clock Divisor (SD1) */
++ } part;
++ u32 whole;
++};
++
++/* graphics controller CRT control */
++union gc01r {
++ struct {
++ u32 dac_enbl :2; /* CRT DAC enable */
++ u32 hsync_out :1; /* CRT HSYNC output during power down mode */
++ u32 vsync_out :1; /* CRT VSYNC output during power down mode */
++ u32 hsync_ctl :2; /* CRT HSYNC control */
++ u32 vsync_ctl :2; /* CRT VSYNC control */
++ /**/
++ u32 hsync_pol :1; /* CRT HSYNC polarity */
++ u32 vsync_pol :1; /* CRT VSYNC polarity */
++ u32 sync_p_enbl :1; /* sync pedestal enable */
++ u32 blnk_p_enbl :1; /* blank pedestal enable */
++ u32 c_sync_enbl :1; /* composite sync enable */
++ u32 vref_sel :1; /* VREF select */
++ u32 mn_sns_enbl :1; /* monitor sense enable */
++ u32 ct_out_enbl :1; /* constant output enable */
++ /**/
++ u32 dac_out_lvl :8; /* monitor sense DAC output level */
++ /**/
++ u32 blue_dac_r :1; /* blue DAC sense result */
++ u32 green_dac_r :1; /* green DAC sense result */
++ u32 red_dac_r :1; /* red DAC sense result */
++ u32 reserved_1 :1;
++ u32 mon_col_sel :1; /* mono/color monitor select */
++ u32 reserved_2 :3;
++ } part;
++ u32 whole;
++};
++
++/* horizontal display 1 control */
++union gc02r {
++ struct {
++ u32 hd1t :12; /* horizontal display 1 total */
++ u32 reserved_1 :4;
++
++ u32 hd1e :12; /* horizontal display 1 end */
++ u32 reserved_2 :4;
++ } part;
++ u32 whole;
++};
++
++/* vertical display 1 control */
++union gc03r {
++ struct {
++ u32 vd1t :12; /* vertical display 1 total */
++ u32 reserved_1 :4;
++
++ u32 vd1e :12; /* vertical display 1 end */
++ u32 reserved_2 :4;
++ } part;
++ u32 whole;
++};
++
++/* horizontal sync 1 control */
++union gc04r {
++ struct {
++ u32 hs1s :12; /* horizontal sync 1 start */
++ u32 reserved_1 :4;
++
++ u32 hs1e :12; /* horizontal sync 1 end */
++ u32 reserved_2 :4;
++ } part;
++ u32 whole;
++};
++
++/* vertical sync 1 control */
++union gc05r {
++ struct {
++ u32 vs1s :12; /* vertical sync 1 start */
++ u32 reserved_1 :4;
++
++ u32 vs1e :12; /* vertical sync 1 end */
++ u32 reserved_2 :4;
++ } part;
++ u32 whole;
++};
++
++/* vertical display 1 count */
++union gc07r {
++ struct {
++ u32 vd_cnt :12; /* vertical display 1 count */
++ u32 reverved_1 :20;
++ } part;
++ u32 whole;
++};
++
++/* horizontal window 1 control */
++union gc08r {
++ struct {
++ u32 hw1s :12; /* horizontal window 1 start (HW1S) */
++ u32 reserved_1 :4;
++
++ u32 hw1w :12; /* horizontal window 1 width (HW1W) */
++ u32 w1ald :4; /* window 1 additional line data */
++ } part;
++ u32 whole;
++};
++
++/* vertical window 1 control */
++union gc09r {
++ struct {
++ u32 vw1s :12; /* vertical window 1 start */
++ u32 reserved_1 :4;
++ u32 vw1h :12; /* vertical window 1 height */
++ u32 reserved_2 :4;
++ } part;
++ u32 whole;
++};
++
++/* window 1 start address */
++union gc0cr {
++ struct {
++ u32 w1sa :21; /* window 1 start address */
++ u32 reserved_1 :11;
++ } part;
++ u32 whole;
++};
++
++/* window 1 stride */
++union gc0er {
++ struct {
++ s16 w1st; /* window 1 stride */
++ s16 aw1st; /* alternate window 1 stride */
++ } part;
++ u32 whole;
++};
++
++/* hardware cursor 1 position */
++union gc10r {
++ struct {
++ u32 hc1s :12; /* horizontal cursor 1 start */
++ u32 reserved_1 :4;
++ u32 vc1s :12; /* vertical cursor 1 start */
++ u32 reserved_2 :4;
++ } part;
++ u32 whole;
++};
++
++/* hardware cursor 1 start address and offset */
++union gc11r {
++ struct {
++ u32 hc1sa :11; /* hardware cursor 1 start address */
++ u32 reserved_1 :5;
++ u32 hc1o :6; /* horizontal cursor 1 offset */
++ u32 reserved_2 :2;
++ u32 vc1o :6; /* vertical cursor 1 offset */
++ u32 reserved_3 :2;
++ } part;
++ u32 whole;
++};
++
++/* hardware cursor 1 foreground color */
++union gc12r {
++ struct {
++ u32 hc1fc :24; /* hardware cursor 1 foreground color */
++ u32 reserved_1 :8;
++ } part;
++ u32 whole;
++};
++
++/* hardware cursor 1 background color */
++union gc13r {
++ struct {
++ u32 hc1bc :24; /* hardware cursor 1 background color */
++ u32 reserved_1 :8;
++ } part;
++ u32 whole;
++};
++
++
++/* graphics controller 2 register */
++union gc20r {
++ struct {
++ u32 ctl_enbl :1; /* Controller 2 Enable */
++ u32 hc_reset :1; /* Horizontal Counter 2 Reset */
++ u32 vc_reset :1; /* Vertical Counter 2 Reset */
++ u32 iwin_enbl :1; /* Image Window 2 Enable */
++ u32 gcd :4; /* Graphics Color Depth (GCD) */
++
++ u32 hc_enbl :1; /* Hardware Cursor 2 Enable */
++ u32 reserved_1 :2;
++ u32 aiwin_enbl :1; /* Alternate Image Window Enable */
++ u32 agcd :4; /* Alternate Graphics Color Depth (AGCD) */
++
++ u32 g2rclk_src :2; /* G2RCLK Source */
++ u32 tm0 :1; /* Test Mode 0 */
++ u32 tm1 :1; /* Test Mode 1 */
++ u32 fd :3; /* G2MCLK First Clock Divisor (FD1) */
++ u32 reserved_2 :1;
++
++ u32 sd :8; /* G2MCLK Second Clock Divisor (SD1) */
++ } part;
++ u32 whole;
++};
++
++/* graphics controller CRC control */
++union gc21r {
++ struct {
++ u32 crc_enbl :1; /* CRC enable */
++ u32 vsync_wait :1; /* CRC input data control waitime of VSYNC */
++ u32 crc_o_sel :2; /* CRC output select */
++ u32 reserved_1 :4;
++ u32 crc_result :22; /* CRC result (read only) */
++ u32 reserved_2 :2;
++ } part;
++ u32 whole;
++};
++
++/* horizontal display 2 control */
++union gc22r {
++ struct {
++ u32 hd2t :12; /* horizontal display 2 total */
++ u32 reserved_1 :4;
++
++ u32 hd2e :12; /* horizontal display 2 end */
++ u32 reserved_2 :4;
++ } part;
++ u32 whole;
++};
++
++/* vertical display 2 control */
++union gc23r {
++ struct {
++ u32 vd2t :12; /* vertical display 2 total */
++ u32 reserved_1 :4;
++
++ u32 vd2e :12; /* vertical display 2 end */
++ u32 reserved_2 :4;
++ } part;
++ u32 whole;
++};
++
++/* horizontal sync 2 control */
++union gc24r {
++ struct {
++ u32 hs2s :12; /* horizontal sync 2 start */
++ u32 reserved_1 :4;
++
++ u32 hs2e :12; /* horizontal sync 2 end */
++ u32 reserved_2 :4;
++ } part;
++ u32 whole;
++};
++
++/* vertical sync 2 control */
++union gc25r {
++ struct {
++ u32 vs2s :12; /* vertical sync 2 start */
++ u32 reserved_1 :4;
++
++ u32 vs2e :12; /* vertical sync 2 end */
++ u32 reserved_2 :4;
++ } part;
++ u32 whole;
++};
++
++/* vertical display 2 count */
++union gc27r {
++ struct {
++ u32 vd_cnt :12; /* vertical display 2 count */
++ u32 reverved_1 :20;
++ } part;
++ u32 whole;
++};
++
++/* horizontal window 2 control */
++union gc28r {
++ struct {
++ u32 hw2s :12; /* horizontal window 2 start (HW2S) */
++ u32 reserved_1 :4;
++
++ u32 hw2w :12; /* horizontal window 2 width (HW2W) */
++ u32 w2ald :4; /* window 2 additional line data */
++ } part;
++ u32 whole;
++};
++
++/* vertical window 2 control */
++union gc29r {
++ struct {
++ u32 vw2s :12; /* vertical window 2 start */
++ u32 reserved_1 :4;
++ u32 vw2h :12; /* vertical window 2 height */
++ u32 reserved_2 :4;
++ } part;
++ u32 whole;
++};
++
++/* window 2 start address */
++union gc2cr {
++ struct {
++ u32 w2sa :21; /* window 2 start address */
++ u32 reserved_1 :11;
++ } part;
++ u32 whole;
++};
++
++/* window 2 stride */
++union gc2er {
++ struct {
++ s16 w2st; /* window 2 stride */
++ s16 aw2st; /* alternate window 2 stride */
++ } part;
++ u32 whole;
++};
++
++/* hardware cursor 2 position */
++union gc30r {
++ struct {
++ u32 hc2s :12; /* horizontal cursor 2 start */
++ u32 reserved_1 :4;
++ u32 vc2s :12; /* vertical cursor 2 start */
++ u32 reserved_2 :4;
++ } part;
++ u32 whole;
++};
++
++/* hardware cursor 2 start address and offset */
++union gc31r {
++ struct {
++ u32 hc2sa :11; /* hardware cursor 2 start address */
++ u32 reserved_1 :5;
++ u32 hc2o :6; /* horizontal cursor 2 offset */
++ u32 reserved_2 :2;
++ u32 vc2o :6; /* vertical cursor 2 offset */
++ u32 reserved_3 :2;
++ } part;
++ u32 whole;
++};
++
++/* hardware cursor 2 foreground color */
++union gc32r {
++ struct {
++ u32 hc2fc :24; /* hardware cursor 2 foreground color */
++ u32 reserved_1 :8;
++ } part;
++ u32 whole;
++};
++
++/* hardware cursor 2 background color */
++union gc33r {
++ struct {
++ u32 hc2bc :24; /* hardware cursor 2 background color */
++ u32 reserved_1 :8;
++ } part;
++ u32 whole;
++};
++
++
++/* primary drawing command register */
++union ge00r {
++ struct {
++ u32 rop :8; /* raster operation */
++ /**/
++ u32 cmd_typ :3; /* command type */
++ u32 x_dir :1; /* x direction */
++ u32 y_dir :1; /* y direction */
++ u32 src_mem :1; /* source memory */
++ u32 mon_src :1; /* mono source */
++ u32 mon_ptn :1; /* mono pattern */
++ /**/
++ u32 dst_trns_e :1; /* destination transparency enable */
++ u32 dst_trns_p :1; /* destination transparency polarity */
++ u32 mon_trns_e :1; /* mono source or mono pattern transparency
++ enable */
++ u32 mon_trns_p :1; /* mono transparency polarity */
++ u32 mod_sel :1; /* memory to screen or off screen to screen
++ mode select */
++ u32 alpha_sel :2; /* Alpha byte mask selection */
++ u32 sol_col :1; /* solid color */
++ /**/
++ u32 stride_eq :1; /* source stride is equal to destination
++ stride */
++ u32 rop2_sel :1; /* ROP2 code selection */
++ u32 clipping :1; /* enable clipping */
++ u32 auto_exec :1; /* auto execute */
++ u32 reserved_1 :4;
++ } part;
++ u32 whole;
++};
++
++/* primary width and height register */
++union ge01r {
++ struct {
++ u32 width :12; /* source/destination window width */
++ u32 reserved_1 :4;
++
++ u32 height :12; /* source/destination window height */
++ u32 reserved_2 :1;
++ u32 reserved_3 :3;
++ } bitblt;
++ struct {
++ u32 dm :17;
++ u32 axis_major :12;
++ u32 x_y :1; /* x-major or y-major */
++ u32 last_pix :1; /* decision to draw or not to draw the last
++ pixel of the line */
++ u32 reserved_1 :1;
++ } bresenham;
++ u32 whole;
++};
++
++/* primary destination address register */
++union ge02r {
++ struct {
++ u32 dst_x :12; /* destination x position */
++ u32 reserved_1 :1;
++ u32 h_offset :3; /* mono/color pattern horizontal offset */
++
++ u32 dst_y :12; /* destination y position */
++ u32 reserved_2 :1;
++ u32 v_offset :3; /* mono/color pattern vertical offset */
++ } window;
++ struct {
++ u32 x :12; /* starting x coordinate */
++ u32 dm :17; /* 17 bits major-axis delta */
++ u32 reserved_1 :3;
++ } line;
++ u32 whole;
++};
++
++/* source XY register/line draw starting Y coordinate and mintor axis delta */
++union ge03r {
++ struct {
++ u32 src_x :12; /* source X position */
++ u32 reserved_1 :4;
++
++ u32 src_y :12; /* source Y position */
++ u32 reserved_2 :4;
++ } window;
++ struct {
++ u32 start_y :12; /* starting Y coordinate */
++ u32 dn :17; /* 17 bits minor-axis delta */
++ u32 reserved_1 :3;
++ } line;
++ u32 whole;
++};
++
++/* clip left/top register */
++union ge05r {
++ struct {
++ u32 left :12; /* left edge of clipping rectangle */
++ u32 reserved_1 :4;
++
++ u32 top :12; /* top edge of clipping rectangle */
++ u32 reserved_2 :4;
++ } part;
++ u32 whole;
++};
++
++/* source stride/offset register */
++union ge09r {
++ struct {
++ u32 src_strid :12; /* source line stride */
++ u32 reserved_1 :13;
++ u32 strt_bit :3; /* initial mono source bit offset */
++ u32 strt_byte :3; /* initial mono/color source byte offset */
++ u32 reserved_2 :1;
++ } line;
++ struct {
++ u32 strt_bit :5; /* initial mono source bit offset */
++ u32 reserved_1 :1;
++ u32 amount :10; /* number of 16 bytes amount that MIU need
++ to fetch from frame buffer */
++
++ u32 reserved_2 :9;
++ u32 bit_spc :7; /* bit space between lines */
++ } pack_mono;
++ struct {
++ u32 strt_bit :3; /* initial mono source bit offset */
++ u32 strt_byte :3; /* initial mono/color source byte offset */
++ u32 amount :10; /* number of 16 bytes amount that MIU need
++ to fetch from frame buffer */
++
++ u32 reserved_1 :9;
++ u32 bit_spc :3; /* bit space between lines */
++ u32 byt_spc :4; /* byte space between lines */
++ } pack_color;
++ u32 whole;
++};
++
++/* destination stride register and color depth */
++union ge0ar {
++ struct {
++ u32 dst_strid :12; /* destination line stride and color depth */
++ u32 reserved_1 :18;
++ u32 col_dpth :2; /* color depth */
++ } part;
++ u32 whole;
++};
++
++/* graphics controller color pallete */
++union c1xxr {
++ struct {
++ u8 red; /* red color pallete */
++ u8 green; /* green/gray color pallete */
++ u8 blue; /* blue color palette */
++ u8 reserved_1;
++ } part;
++ u32 whole;
++};
++
++/* devicee configuration register 0 */
++union dc00r {
++ struct {
++ u32 osc_bypass :1; /* oscillator bypass */
++ u32 osc_enbl :1; /* oscillator enable */
++ u32 pll1_bypass :1; /* PLL1 bypass */
++ u32 pll1_enbl :1; /* PLL1 enable */
++ u32 pll1_p_par :3; /* PLL1 P parameter */
++ u32 cpu_div :1; /* CPU interface clock divisor */
++ u32 pll1_n_par :5; /* PLL1 N parameter */
++ u32 saisc :1; /* StrongARM interface synchronizer control */
++ u32 s_chp_reset :1; /* software chip reset */
++ u32 mem_enbl :1; /* memory standby enable */
++ u32 pll1_m_par :8; /* PLL 1 M parameter */
++ u32 osc_shaper :1; /* oscillator shaper disable */
++ u32 fast_pwr :1; /* fast power sequencing */
++ u32 osc_frq :2; /* oscillator frequency select */
++ u32 pll1_trim :4; /* PLL 1 trim value */
++ } part;
++ u32 whole;
++};
++
++/* device ID/vendor ID register */
++union pc00r {
++ struct {
++ u16 device; /* device ID */
++ u16 vendor; /* vendor ID */
++ } part;
++ u32 whole;
++};
++
++/* Flat Panel Control Register */
++union fp00r {
++ struct {
++ u32 flatp_enbl : 2; /* Flat Panel Interface Enable */
++ u32 flatp_type : 2; /* Flat Panel Type */
++ u32 mono : 1; /* Mono/Color Panel Select */
++ u32 flatp_intf : 3; /* Flat Panel Interface */
++ u32 dither_pat : 2; /* Dither Pattern */
++ u32 reserved : 2; /* Reserved Must Be 0*/
++ u32 dither_col : 3; /* Dither Base Color */
++ u32 alt_win_ctl: 1; /* Alternate Window Control */
++ u32 frc_ctl : 2; /* FRC Control */
++ u32 dither_adj1: 6; /* Dither Pattern Adjust 1 */
++ u32 dither_adj2: 3; /* Dither Pattern Adjust 2 */
++ u32 dither_adj3: 1; /* Dither Pattern Adjust 3 */
++ u32 test_mode0 : 1; /* Test Mode 0 */
++ u32 test_mode1 : 1; /* Test Mode 1 */
++ u32 test_mode2 : 1; /* Test Mode 2 */
++ u32 test_mode3 : 1; /* Test Mode 3 */
++ } part;
++ u32 whole;
++};
++
++union fp01r {
++ struct {
++ u32 dummy;
++ } part;
++ u32 whole;
++};
++
++union fp02r {
++ struct {
++ u32 dummy;
++ } part;
++ u32 whole;
++};
++
++union fp03r {
++ struct {
++ u32 dummy;
++ } part;
++ u32 whole;
++};
++
++union fp04r {
++ struct {
++ u32 dummy;
++ } part;
++ u32 whole;
++};
++
++union fp05r {
++ struct {
++ u32 dummy;
++ } part;
++ u32 whole;
++};
++
++union fp0fr {
++ struct {
++ u32 dummy;
++ } part;
++ u32 whole;
++};
++
++
++
++
++/****
++ * Others
++ */
++
++#define CHIPNAME "MQ-200"
++
++extern void mq200_external_setpal(unsigned regno, unsigned long color, unsigned long addr);
++extern void mq200_external_setqmode(struct mq200_monitor_info*, unsigned long, spinlock_t *);
++extern void mq200_external_offdisplay(unsigned long);
++extern void mq200_external_ondisplay (unsigned long);
++extern int mq200_external_probe(unsigned long);
++
++
++
++#endif
+diff -Nur linux-2.6.24.vanilla/drivers/video/mq200/mq_external.c linux-2.6.24/drivers/video/mq200/mq_external.c
+--- linux-2.6.24.vanilla/drivers/video/mq200/mq_external.c 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.24/drivers/video/mq200/mq_external.c 2008-02-20 21:51:22.000000000 +0100
+@@ -0,0 +1,513 @@
++/*
++ * Copyright (C) 2005 Holger Hans Peter Freyther
++ *
++ * Based ON:
++ *
++ * linux/drivers/video/mq200fb.c -- MQ-200 for a frame buffer device
++ * based on linux/driver/video/pm2fb.c
++ *
++ * 2007/03/11 mrdata:
++ * bug found in gc1_reset(), renaming to gc1_gc2_reset()
++ * extend mq200_external_ondisplay() -> LCD for GC2 and CRT for GC1
++ *
++ * Copyright (C) 2000 Lineo, Japan
++ *
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License. See the file COPYING in the main directory of this archive
++ * for more details.
++ */
++
++#include <asm/types.h>
++#include <asm/io.h>
++#include <linux/delay.h>
++#include <linux/spinlock.h>
++
++#include <asm/hardware.h>
++
++#include "mq200_data.h"
++
++
++#if 1
++#define PRINTK(args...) printk(args)
++#else
++#define PRINTK(args...)
++#endif
++
++
++/****
++ * power state transition to "state".
++ */
++static void
++power_state_transition(unsigned long register_base, int state)
++{
++ int i;
++ writel(state, PMCSR(register_base));
++ mdelay(300);
++ for (i = 1; ; i++) {
++ udelay(100);
++ if ((readl(PMCSR(register_base)) & 0x3) == state) {
++ break;
++ }
++ }
++}
++
++
++/****
++ * device configuration initialization.
++ */
++static void
++dc_reset(unsigned long register_base)
++{
++ union dc00r dc00r;
++
++ /* Reset First */
++ dc00r.whole = DC_RESET;
++ writel(dc00r.whole, DC00R(register_base));
++ mdelay(100);
++
++ dc00r.whole = 0xEF2082A;
++ writel(dc00r.whole, DC00R(register_base));
++ mdelay(300);
++ PRINTK(CHIPNAME ": DC00R = 0x%08X\n", readl(DC00R(register_base)));
++}
++
++
++/****
++ * initialize memory interface unit.
++ */
++static void
++miu_reset(unsigned long register_base)
++{
++ union mm00r mm00r;
++ union mm01r mm01r;
++ union mm02r mm02r;
++ union mm03r mm03r;
++ union mm04r mm04r;
++
++ /* MIU interface control 1 */
++ mm00r.whole = 0x4;
++ writel(mm00r.whole, MM00R(register_base));
++ mdelay(50);
++ writel(0, MM00R(register_base));
++ mdelay(50);
++
++ /* MIU interface control 2
++ * o PLL 1 output is used as memory clock source.
++ */
++ mm01r.whole = 0x4143e086;
++ writel(mm01r.whole, MM01R(register_base));
++
++ /* memory interface control 3 */
++ mm02r.whole = 0x6d6aabff;
++ writel(mm02r.whole, MM02R(register_base));
++
++ /* memory interface control 5 */
++ mm04r.whole = 0x10d;
++ writel(mm04r.whole, MM04R(register_base));
++
++ /* memory interface control 4 */
++ mm03r.whole = 0x1;
++ writel(mm03r.whole, MM03R(register_base));
++ mdelay(50);
++
++ /* MIU interface control 1 */
++ mm00r.whole = 0x3;
++ writel(mm00r.whole, MM00R(register_base));
++ mdelay(50);
++}
++
++/****
++ *
++ */
++static
++void fpctrl_reset(unsigned long addr)
++{
++ /*
++ * We're in D0 State, let us set the FPCTRL
++ */
++ union fp00r fp00r;
++ union fp01r fp01r;
++ union fp02r fp02r;
++ union fp03r fp03r;
++ union fp04r fp04r;
++ union fp0fr fp0fr;
++
++ fp00r.whole = 0x6320;
++ writel(fp00r.whole, FP00R(addr));
++
++ fp01r.whole = 0x20;
++ writel(fp01r.whole, FP01R(addr));
++
++ fp04r.whole = 0xBD0001;
++ writel(fp04r.whole, FP04R(addr));
++
++ /* Set Flat Panel General Purpose register first */
++ fp02r.whole = 0x0;
++ writel(fp02r.whole, FP02R(addr));
++
++ fp03r.whole = 0x0;
++ writel(fp03r.whole, FP03R(addr));
++
++ fp0fr.whole = 0xA16c44;
++ writel(fp0fr.whole, FP0FR(addr));
++
++ /* Set them again */
++ fp02r.whole = 0x0;
++ writel(fp02r.whole, FP02R(addr));
++
++ fp03r.whole = 0x0;
++ writel(fp03r.whole, FP03R(addr));
++}
++
++
++/****
++ * initialize power management unit.
++ */
++static void
++pmu_reset(unsigned long register_base)
++{
++ union pm00r pm00r;
++ union pm01r pm01r;
++ union pm02r pm02r;
++
++ /* power management miscellaneous control
++ * o GE is driven by PLL 1 clock.
++ */
++ pm00r.whole = 0xc0900;
++ writel(pm00r.whole, PM00R(register_base));
++
++ /* D1 state control */
++ pm01r.whole = 0x5000271;
++ writel(pm01r.whole, PM01R(register_base));
++
++ /* D2 state control */
++ pm02r.whole = 0x271;
++ writel(pm02r.whole, PM02R(register_base));
++}
++
++/****
++ * initialize graphics controller 1
++ * and graphics controller 2
++ */
++static void
++gc1_gc2_reset(unsigned long register_base, spinlock_t *lock )
++{
++ unsigned long flags;
++ union gc00r gc00r;
++ union gc01r gc01r;
++ union gc02r gc02r;
++ union gc03r gc03r;
++ union gc04r gc04r;
++ union gc05r gc05r;
++ union gc08r gc08r;
++ union gc09r gc09r;
++ union gc0cr gc0cr;
++ union gc0er gc0er;
++ union gc20r gc20r;
++ union gc22r gc22r;
++ union gc23r gc23r;
++ union gc24r gc24r;
++ union gc25r gc25r;
++ union gc28r gc28r;
++ union gc29r gc29r;
++ union gc2cr gc2cr;
++ union gc2er gc2er;
++
++ union pm00r pm00r;
++ union pm06r pm06r;
++ union pm06r pm07r;
++
++ spin_lock_irqsave(lock, flags);
++
++ /* alternate window 1 stride */
++ gc0er.whole = 0x640;
++ writel(gc0er.whole, GC0ER(register_base));
++
++ /* image window 1 start address */
++ gc0cr.whole = 0x0;
++ writel(gc0cr.whole, GC0CR(register_base));
++
++ /* alternate window 2 stride */
++ gc2er.whole = 0x640;
++ writel(gc0er.whole, GC2ER(register_base));
++
++ /* image window 2 start address */
++ gc2cr.whole = 0x0;
++ writel(gc2cr.whole, GC2CR(register_base));
++
++ /* read PM Register */
++ pm00r.whole = readl(PM00R(register_base));
++
++ /* horizontal window 1 control */
++ gc08r.whole = 0x131f0000;
++ writel(gc08r.whole, GC08R(register_base));
++
++ /* vertical window 1 control */
++ gc09r.whole = 0x12570000;
++ writel(gc09r.whole, GC09R(register_base));
++
++ /* horizontal display 1 control */
++ gc02r.whole = 0x320041e;
++ writel(gc02r.whole, GC02R(register_base));
++
++ /* vertical display 1 control */
++ gc03r.whole = 0x2570273;
++ writel(gc03r.whole, GC03R(register_base));
++
++ /* horizontal sync 1 control */
++ gc04r.whole = 0x3c70347;
++ writel(gc04r.whole, GC04R(register_base));
++
++ /* vertical sync 1 control */
++ gc05r.whole = 0x25d0259;
++ writel(gc05r.whole, GC05R(register_base));
++
++ /* graphics controller CRT control */
++ gc01r.whole = 0x800;
++ writel(gc01r.whole, GC01R(register_base));
++
++ /* PLL 2 programming */
++ pm06r.whole = 0xE90830;
++ writel(pm06r.whole, PM06R(register_base));
++
++ /* graphics controller 1 register
++ * o GC1 clock source is PLL 2.
++ * o hardware cursor is disabled.
++ */
++ gc00r.whole = 0x10000C8 | 0x20000;
++ writel(gc00r.whole, GC00R(register_base));
++
++#if 0
++ /* alternate horizontal window 1 control */
++ writel(0, GC0AR(register_base));
++
++ /* alternate vertical window 1 control */
++ writel(0, GC0BR(register_base));
++
++ /* window 1 start address */
++ writel(0x2004100, GC0CR(register_base));
++
++ /* alternate window 1 start address */
++ writel(0, GC0DR(register_base));
++
++ /* window 1 stride */
++ gc0er.whole = 0x5100048;
++ writel(gc0er.whole, GC0ER(register_base));
++
++ /* reserved register - ??? - */
++ writel(0x31f, GC0FR(register_base));
++#endif
++
++#if 0
++ /* hardware cursor 1 position */
++ writel(0, GC10R(register_base));
++
++ /* hardware cursor 1 start address and offset */
++ gc11r.whole = 0x5100048;
++ writel(gc11r.whole, GC11R(register_base));
++
++ /* hardware cursor 1 foreground color */
++ writel(0x00ffffff, GC12R(register_base));
++
++ /* hardware cursor 1 background color */
++ writel(0x00000000, GC13R(register_base));
++#endif
++
++ /* horizontal window 2 control */
++ gc28r.whole = 0x31f0000;
++ writel(gc28r.whole, GC28R(register_base));
++
++ /* vertical window 2 control */
++ gc29r.whole = 0x2570000;
++ writel(gc29r.whole, GC29R(register_base));
++
++ /* horizontal display 2 control */
++ gc22r.whole = 0x320041e;
++ writel(gc22r.whole, GC22R(register_base));
++
++ /* vertical display 2 control */
++ gc23r.whole = 0x2570273;
++ writel(gc23r.whole, GC23R(register_base));
++
++ /* horizontal sync 2 control */
++ gc24r.whole = 0x3c70347;
++ writel(gc24r.whole, GC24R(register_base));
++
++ /* vertical sync 2 control */
++ gc25r.whole = 0x25d0259;
++ writel(gc25r.whole, GC25R(register_base));
++
++ /* graphics controller CRT control */
++ gc01r.whole = 0x800;
++ writel(gc01r.whole, GC01R(register_base));
++
++ /* PLL 3 programming */
++ pm07r.whole = 0xE90830;
++ writel(pm07r.whole, PM07R(register_base));
++
++ /* graphics controller 2 register
++ * o GC2 clock source is PLL 3.
++ * o hardware cursor is disabled.
++ */
++ gc20r.whole = 0x10000C8 | 0x30000;
++ writel(gc20r.whole, GC20R(register_base));
++
++ /*
++ * Enable PLL2 and PLL3 in the PM Register
++ */
++ pm00r.part.pll2_enbl = 0x1;
++ pm00r.part.pll3_enbl = 0x1;
++ writel(pm00r.whole, PM00R(register_base));
++
++ spin_unlock_irqrestore(lock, flags);
++}
++
++
++/****
++ * initialize graphics engine.
++ */
++static void
++ge_reset(unsigned long register_base)
++{
++ /* drawing command register */
++ writel(0, GE00R(register_base));
++
++ /* promary width and height register */
++ writel(0, GE01R(register_base));
++
++ /* primary destination address register */
++ writel(0, GE02R(register_base));
++
++ /* primary source XY register */
++ writel(0, GE03R(register_base));
++
++ /* primary color compare register */
++ writel(0, GE04R(register_base));
++
++ /* primary clip left/top register */
++ writel(0, GE05R(register_base));
++
++ /* primary clip right/bottom register */
++ writel(0, GE06R(register_base));
++
++ /* primary source and pattern offset register */
++ writel(0, GE07R(register_base));
++
++ /* primary foreground color register/rectangle fill color depth */
++ writel(0, GE08R(register_base));
++
++ /* source stride/offset register */
++ writel(0, GE09R(register_base));
++
++ /* destination stride register and color depth */
++ writel(0, GE0AR(register_base));
++
++ /* image base address register */
++ writel(0, GE0BR(register_base));
++}
++
++/****
++ * initialize Color Palette 1.
++ */
++static void
++cp1_reset(unsigned long addr_info)
++{
++ int i;
++
++ for (i = 0; i < 256; i++)
++ writel(0, C1xxR(addr_info, i));
++}
++
++
++/*
++ * Below functions are called from the skeleton
++ */
++void mq200_external_setpal(unsigned regno, unsigned long color, unsigned long addr)
++{
++ writel(color,C1xxR(addr,regno));
++}
++
++void mq200_external_setqmode(struct mq200_monitor_info* info,
++ unsigned long addr, spinlock_t *lock)
++{
++ dc_reset(addr); /* device configuration */
++
++ power_state_transition(addr, 0); /* transition to D0 state */
++
++ pmu_reset(addr); /* power management unit */
++
++ miu_reset(addr); /* memory interface unit */
++
++ ge_reset(addr); /* graphics engine */
++
++ fpctrl_reset(addr); /* reset the panel settings */
++
++ gc1_gc2_reset(addr, lock); /* graphics controller 1 and 2 */
++
++ cp1_reset(addr); /* color palette 1 */
++
++ mq200_external_ondisplay(addr); /* LCD and CRT */
++}
++
++void mq200_external_offdisplay(unsigned long addr)
++{
++ /*
++ * Move the MQ200 to D3 mode
++ */
++ power_state_transition(addr, 3);
++}
++
++/**
++ * to be called after mq200_external_setqmode
++ */
++void mq200_external_ondisplay (unsigned long addr)
++{
++ /*
++ * Set the framebuffer details
++ */
++ union gc00r gc00r;
++ union gc01r gc01r;
++ union gc20r gc20r;
++ union fp00r fp00r;
++
++ /* enable LCD for GC2 */
++ fp00r.whole = readl(FP00R(addr));
++ fp00r.whole &= 0xfffffffc;
++
++ gc20r.whole = readl(GC20R(addr));
++
++ if(!(gc20r.whole & 0x1)) {
++ gc20r.whole |= 0x1;
++ writel(gc20r.whole, GC20R(addr));
++ }
++
++ fp00r.whole |= 0x3;
++ writel(fp00r.whole, FP00R(addr));
++
++ /* enable CRT for GC1 */
++ gc00r.whole = readl(GC00R(addr));
++
++ if(!(gc00r.whole & 0x1)) {
++ gc00r.whole |= 0x1;
++ writel(gc00r.whole, GC00R(addr));
++ }
++
++ gc01r.whole = readl(GC01R(addr));
++ gc01r.whole &= 0xfffffffc;
++
++ gc01r.whole |= 0x1;
++ writel(gc01r.whole, GC01R(addr));
++
++}
++
++int mq200_external_probe(unsigned long addr)
++{
++ union pc00r pc00r;
++ if(readl(PMR(addr)) != PMR_VALUE)
++ return 0;
++
++ pc00r.whole = readl(PC00R(addr));
++ printk(KERN_INFO "mq200 video driver found Vendor: 0x%X Device: 0x%X\n",
++ pc00r.part.device, pc00r.part.vendor);
++ return 1;
++}
+diff -Nur linux-2.6.24.vanilla/drivers/video/mq200/mq_skeleton.c linux-2.6.24/drivers/video/mq200/mq_skeleton.c
+--- linux-2.6.24.vanilla/drivers/video/mq200/mq_skeleton.c 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.24/drivers/video/mq200/mq_skeleton.c 2008-02-20 21:51:22.000000000 +0100
+@@ -0,0 +1,398 @@
++/*
++ * Author: Holger Hans Peter Freyther
++ *
++ *
++ * This implements the frame buffer driver interface to communicate
++ * with the kernel.
++ * It uses the mq200 routines from the ucLinux driver from Lineo
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++
++#include <linux/autoconf.h>
++#include <linux/platform_device.h>
++#include <linux/module.h>
++#include <linux/fb.h>
++#include <linux/types.h>
++#include <linux/spinlock.h>
++
++#include "mq200_data.h"
++
++#if CONFIG_SA1100_SIMPAD
++/*
++ * Siemens SIMpad specefic data
++ */
++#include <asm/arch/simpad.h>
++#include <asm/arch/hardware.h>
++
++#define MQ200_REGIONS simpad_mq200_regions
++#define MQ200_MONITOR simpad_mq200_panel
++
++static struct mq200_io_regions simpad_mq200_regions = {
++ .fb_size = MQ200_FB_SIZE,
++ .phys_mmio_base = 0x4be00000,
++ .virt_mmio_base = 0xf2e00000,
++ .phys_fb_base = 0x4b800000,
++ .virt_fb_base = 0xf2800000,
++};
++
++static struct mq200_monitor_info simpad_mq200_panel = {
++ .horizontal_res = 800,
++ .vertical_res = 600,
++ .depth = 16,
++ .refresh = 60,
++ .line_length = 1600,
++ .flags = 0x00130004,
++};
++
++extern long get_cs3_shadow(void);
++extern void set_cs3_bit(int value);
++extern void clear_cs3_bit(int value);
++#endif
++
++
++
++struct mq200_info {
++ struct fb_info fb_info;
++ struct mq200_io_regions io_regions;
++ struct mq200_monitor_info monitor_info;
++
++ /* palette */
++ u32 pseudo_palette[17]; /* 16 colors + 1 in reserve not that well documented... */
++ spinlock_t lock;
++};
++
++
++
++static int mq200_blank( int blank_mode, struct fb_info *info )
++{
++#ifdef CONFIG_SA1100_SIMPAD
++ if(blank_mode ){
++ clear_cs3_bit(DISPLAY_ON);
++ }else {
++ set_cs3_bit(DISPLAY_ON);
++ }
++#endif
++ return 0;
++}
++
++
++static int mq200_check_var(struct fb_var_screeninfo *var,
++ struct fb_info *info )
++{ /* TODO do we need sanity checks here */
++ return 0;
++}
++
++
++static int mq200_set_par( struct fb_info *info )
++{
++ /* TODO set paraemeter */
++ return 0;
++}
++
++static int mq200_setcolreg(unsigned regno, unsigned red, unsigned green,
++ unsigned blue, unsigned transp,
++ struct fb_info *info )
++{
++ struct mq200_info *p;
++ unsigned long color;
++ u32* pal = info->pseudo_palette;
++
++ p = info->par;
++
++ if(regno > 255 )
++ return 1;
++
++ switch( info->var.bits_per_pixel ){
++ case 16:
++ pal[regno] =
++ ((red & 0xf800) >> 0) |
++ ((green & 0xf800) >> 5) | ((blue & 0xf800) >> 11);
++ break;
++ case 24:
++ pal[regno] =
++ ((red & 0xff00) << 8) |
++ ((green & 0xff00)) | ((blue & 0xff00) >> 8);
++ break;
++ case 32:
++ pal[regno] =
++ ((red & 0xff00) >> 8) |
++ ((green & 0xff00)) | ((blue & 0xff00) << 8);
++ break;
++ default:
++ break;
++ }
++
++ red &= 0xFF;
++ green &= 0xFF;
++ blue &= 0xFF;
++
++ color = red | (green << 8) | (blue << 16);
++ mq200_external_setpal(regno, color, p->io_regions.virt_mmio_base);
++
++ return 0;
++}
++
++
++static struct fb_ops mq200_ops = {
++ .owner = THIS_MODULE,
++ .fb_check_var = mq200_check_var,
++ .fb_set_par = mq200_set_par,
++ .fb_setcolreg = mq200_setcolreg,
++#ifdef FB_SOFT_CURSOR
++ .fb_cursor = soft_cursor, /* FIXME use hardware cursor */
++#endif
++ .fb_fillrect = cfb_fillrect,
++ .fb_copyarea = cfb_copyarea,
++ .fb_imageblit = cfb_imageblit,
++ .fb_blank = mq200_blank,
++};
++
++
++/*********************************************************************
++ *
++ * Device driver and module init code
++ * this will register to the fb layer later
++ *
++ *********************************************************************/
++static void mq200_internal_init_color( struct fb_bitfield* red,
++ struct fb_bitfield* green,
++ struct fb_bitfield* blue,
++ int bpp )
++{
++ switch ( bpp )
++ {
++ case 16:
++ red->offset = 11;
++ green->offset = 5;
++ blue->offset = 0;
++
++ red->length = 5;
++ green->length = 6;
++ blue->length = 5;
++ break;
++ case 24:
++ red->offset = 16;
++ green->offset = 8;
++ blue->offset = 0;
++
++ red->length = 8;
++ green->length = 8;
++ blue->length = 8;
++ break;
++ case 32:
++ red->offset = 0;
++ green->offset = 8;
++ blue->offset = 16;
++
++ red->length = 8;
++ green->length = 8;
++ blue->length = 8;
++ case 8: /* fall through */
++ default:
++ red->offset = green->offset = blue->offset = 0;
++ red->length = green->length = blue->length = bpp;
++ break;
++ }
++
++}
++
++
++static struct mq200_info* __init mq200_internal_init_fbinfo(void)
++{
++ struct mq200_info *info = NULL;
++
++ info = (struct mq200_info*)kmalloc(sizeof(*info), GFP_KERNEL);
++ if(!info)
++ return NULL;
++
++ /*
++ * Initialize memory
++ */
++ memset(info, 0, sizeof(struct mq200_info) );
++ spin_lock_init(&info->lock);
++
++ /* set the base IO addresses */
++ info->io_regions = MQ200_REGIONS;
++ info->monitor_info = MQ200_MONITOR;
++
++ info->fb_info.screen_base = (char *)info->io_regions.virt_fb_base;
++
++ /* fb_fix_screeninfo filling */
++ strcpy(info->fb_info.fix.id, "MQ200_FB" );
++ info->fb_info.fix.smem_start = info->io_regions.phys_fb_base;
++ info->fb_info.fix.smem_len = info->io_regions.fb_size; /* - CURSOR_IMAGE */
++ info->fb_info.fix.mmio_start = info->io_regions.phys_mmio_base;
++ info->fb_info.fix.mmio_len = MQ200_REGS_SIZE;
++ info->fb_info.fix.type = FB_TYPE_PACKED_PIXELS;
++ info->fb_info.fix.accel = FB_ACCEL_NONE;
++ info->fb_info.fix.line_length = MQ200_MONITOR_LINE_LENGTH(info);
++
++ if(MQ200_MONITOR_DEPTH(info) <= 8 )
++ info->fb_info.fix.visual = FB_VISUAL_PSEUDOCOLOR;
++ else if( MQ200_MONITOR_DEPTH(info) >= 16 )
++ info->fb_info.fix.visual = FB_VISUAL_DIRECTCOLOR;
++ else
++ panic("Calling mq200 with wrong display data\n");
++
++ /* set the variable screen info */
++ info->fb_info.var.xres = MQ200_MONITOR_HORI_RES(info);
++ info->fb_info.var.yres = MQ200_MONITOR_VERT_RES(info);
++ info->fb_info.var.xres_virtual = MQ200_MONITOR_HORI_RES(info);
++ info->fb_info.var.yres_virtual = MQ200_MONITOR_VERT_RES(info);
++ info->fb_info.var.bits_per_pixel = MQ200_MONITOR_DEPTH(info);
++
++ mq200_internal_init_color(&info->fb_info.var.red,
++ &info->fb_info.var.green,
++ &info->fb_info.var.blue,
++ MQ200_MONITOR_DEPTH(info) );
++
++ info->fb_info.var.transp.length = info->fb_info.var.transp.offset = 0;
++ info->fb_info.var.height = info->fb_info.var.width = -1;
++
++ info->fb_info.var.vmode = FB_VMODE_NONINTERLACED;
++ info->fb_info.var.pixclock = 10000;
++ info->fb_info.var.left_margin = info->fb_info.var.right_margin = 16;
++ info->fb_info.var.upper_margin = info->fb_info.var.lower_margin = 16;
++ info->fb_info.var.hsync_len = info->fb_info.var.vsync_len = 8;
++
++ info->fb_info.var.nonstd = 0;
++ info->fb_info.var.activate = FB_ACTIVATE_NOW;
++ info->fb_info.var.accel_flags = 0;
++
++ return info;
++}
++
++
++extern void mq200_register_attributes(struct device* );
++/*
++ * gets called from the bus
++ * we will register our framebuffer from here
++ */
++static int __init mq200_probe(struct device *dev)
++{
++ struct mq200_info *info = NULL;
++ int retv= 0;
++
++ info = mq200_internal_init_fbinfo();
++ if(!mq200_external_probe(info->io_regions.virt_mmio_base))
++ goto error_out;
++
++ GPDR |= (1<<3);
++ GAFR &= ~(1<<3);
++ GPSR |= (1<<3);
++
++ mq200_external_setqmode(&info->monitor_info,
++ info->io_regions.virt_mmio_base,
++ &info->lock);
++
++ info->fb_info.fbops = &mq200_ops;
++ info->fb_info.flags = FBINFO_FLAG_DEFAULT;
++
++ mq200_check_var(&info->fb_info.var, &info->fb_info );
++
++ fb_alloc_cmap(&info->fb_info.cmap, 1 << MQ200_MONITOR_DEPTH(info), 0 );
++
++ info->fb_info.pseudo_palette = (void*)info->pseudo_palette;
++
++ /* save the pointer to the mq200 struct in var */
++ info->fb_info.par = info;
++
++ retv = register_framebuffer(&info->fb_info );
++ if(retv < 0)
++ goto error_out;
++
++
++ /* will get unset if retv != 0 */
++ dev_set_drvdata(dev, info );
++ return retv;
++
++/*
++ * Free the info and exit
++ */
++error_out:
++ kfree(info);
++ return -EINVAL;
++}
++
++#ifdef CONFIG_PM
++static struct mq200_info* get_mq200_info( struct device *dev)
++{
++ return dev_get_drvdata(dev);
++}
++
++static unsigned long get_mmio_base( struct device *dev )
++{
++ struct mq200_info *info = get_mq200_info(dev);
++ return info->io_regions.virt_mmio_base;
++}
++
++static struct mq200_monitor_info* get_monitor_info( struct device *dev)
++{
++ struct mq200_info *info = get_mq200_info(dev);
++ return &info->monitor_info;
++}
++
++static spinlock_t* get_spinlock( struct device *dev)
++{
++ return &get_mq200_info(dev)->lock;
++}
++
++/*
++ * FIXME: make sure we only call mq200_external_offdisplay only once
++ * a 2nd time will hang the kernel -zecke
++ *
++ * FIXME: save the content of the framebuffer inside dev->saved_state
++ * so on resume we can memcpy it back into the buffer and userspace
++ * does not need to redraw
++ *
++ * functions for suspending and resuming
++ */
++static int mq200_suspend(struct device *dev, pm_message_t state)
++{
++
++ mq200_external_offdisplay( get_mmio_base(dev) );
++ clear_cs3_bit(DISPLAY_ON);
++
++
++ return 0;
++}
++
++static int mq200_resume(struct device *dev)
++{
++ unsigned long mem = get_mmio_base(dev);
++ struct mq200_monitor_info *monitor = get_monitor_info(dev);
++ mq200_external_setqmode(monitor, mem, get_spinlock(dev) );
++
++
++ /*
++ * Set display on if it was on
++ */
++ set_cs3_bit(DISPLAY_ON);
++
++ return 0;
++}
++
++
++#endif
++
++
++static struct device_driver mq200fb_driver = {
++ .name = "simpad-mq200",
++ .bus = &platform_bus_type,
++ .probe = mq200_probe, /* will be called after we've registered the driver */
++ .suspend = mq200_suspend,
++ .resume = mq200_resume
++};
++
++int __devinit mq200_init(void)
++{
++ return driver_register(&mq200fb_driver);
++}
++
++module_init(mq200_init);
++MODULE_DESCRIPTION("MQ200 framebuffer driver");
++MODULE_LICENSE("GPL");
++MODULE_AUTHOR("Holger Hans Peter Freyther");
--- /dev/null
+diff -Nur linux-2.6.24.vanilla/drivers/net/wireless/orinoco_cs.c linux-2.6.24/drivers/net/wireless/orinoco_cs.c
+--- linux-2.6.24.vanilla/drivers/net/wireless/orinoco_cs.c 2008-01-24 23:58:37.000000000 +0100
++++ linux-2.6.24/drivers/net/wireless/orinoco_cs.c 2008-02-22 21:23:51.000000000 +0100
+@@ -8,6 +8,8 @@
+ * cards such as the 3Com AirConnect and Ericsson WLAN.
+ *
+ * Copyright notice & release notes in file orinoco.c
++ *
++ * mrdata: added shared irq
+ */
+
+ #define DRIVER_NAME "orinoco_cs"
+@@ -120,7 +122,7 @@
+ link->priv = dev;
+
+ /* Interrupt setup */
+- link->irq.Attributes = IRQ_TYPE_EXCLUSIVE | IRQ_HANDLE_PRESENT;
++ link->irq.Attributes = IRQ_TYPE_DYNAMIC_SHARING | IRQ_FIRST_SHARED | IRQ_HANDLE_PRESENT;
+ link->irq.IRQInfo1 = IRQ_LEVEL_ID;
+ link->irq.Handler = orinoco_interrupt;
+ link->irq.Instance = dev;
--- /dev/null
+diff -Nur linux-2.6.24.vanilla/drivers/pcmcia/cs.c linux-2.6.24/drivers/pcmcia/cs.c
+--- linux-2.6.24.vanilla/drivers/pcmcia/cs.c 2008-01-24 23:58:37.000000000 +0100
++++ linux-2.6.24/drivers/pcmcia/cs.c 2008-02-22 20:53:06.000000000 +0100
+@@ -10,6 +10,8 @@
+ * are Copyright (C) 1999 David A. Hinds. All Rights Reserved.
+ *
+ * (C) 1999 David A. Hinds
++ *
++ * mrdata: -added suspend fix
+ */
+
+ #include <linux/module.h>
+@@ -59,6 +61,10 @@
+ INT_MODULE_PARM(unreset_delay, 10); /* centiseconds */
+ INT_MODULE_PARM(unreset_check, 10); /* centiseconds */
+ INT_MODULE_PARM(unreset_limit, 30); /* unreset_check's */
++// INT_MODULE_PARM(unreset_delay, 20); /* centiseconds */
++// INT_MODULE_PARM(unreset_check, 100); /* centiseconds */
++// INT_MODULE_PARM(unreset_limit, 300); /* unreset_check's */
++
+
+ /* Access speed for attribute memory windows */
+ INT_MODULE_PARM(cis_speed, 300); /* ns */
+@@ -366,6 +372,7 @@
+ skt->ops->set_socket(skt, &skt->socket);
+
+ msleep(unreset_delay * 10);
++
+ for (i = 0; i < unreset_limit; i++) {
+ skt->ops->get_status(skt, &status);
+
+@@ -434,7 +441,7 @@
+
+ msleep(initial_delay * 10);
+
+- for (i = 0; i < 100; i++) {
++ for (i = 0; i < 100; i++) {
+ skt->ops->get_status(skt, &status);
+ if (!(status & SS_DETECT))
+ return CS_NO_CARD;
+diff -Nur linux-2.6.24.vanilla/drivers/pcmcia/sa1100_generic.c linux-2.6.24/drivers/pcmcia/sa1100_generic.c
+--- linux-2.6.24.vanilla/drivers/pcmcia/sa1100_generic.c 2008-01-24 23:58:37.000000000 +0100
++++ linux-2.6.24/drivers/pcmcia/sa1100_generic.c 2008-02-22 20:53:06.000000000 +0100
+@@ -28,6 +28,9 @@
+ the provisions above, a recipient may use your version of this
+ file under either the MPL or the GPL.
+
++ 2007 mrnice: added thesings changes from device_driver
++ to platform_driver - many thx to thesing
++
+ ======================================================================*/
+
+ #include <linux/module.h>
+@@ -81,13 +84,15 @@
+ return ret;
+ }
+
+-static struct device_driver sa11x0_pcmcia_driver = {
+- .probe = sa11x0_drv_pcmcia_probe,
+- .remove = soc_common_drv_pcmcia_remove,
+- .name = "sa11x0-pcmcia",
+- .bus = &platform_bus_type,
+- .suspend = pcmcia_socket_dev_suspend,
+- .resume = pcmcia_socket_dev_resume,
++static struct platform_driver sa11x0_pcmcia_driver = {
++ .driver = {
++ .name = "sa11x0-pcmcia",
++ .probe = sa11x0_drv_pcmcia_probe,
++ .remove = soc_common_drv_pcmcia_remove,
++ .suspend= pcmcia_socket_dev_suspend,
++ .resume = pcmcia_socket_dev_resume,
++ //.bus = &platform_bus_type,
++ },
+ };
+
+ /* sa11x0_pcmcia_init()
+@@ -100,7 +105,7 @@
+ */
+ static int __init sa11x0_pcmcia_init(void)
+ {
+- return driver_register(&sa11x0_pcmcia_driver);
++ return platform_driver_register(&sa11x0_pcmcia_driver);
+ }
+
+ /* sa11x0_pcmcia_exit()
+@@ -110,7 +115,7 @@
+ */
+ static void __exit sa11x0_pcmcia_exit(void)
+ {
+- driver_unregister(&sa11x0_pcmcia_driver);
++ platform_driver_unregister(&sa11x0_pcmcia_driver);
+ }
+
+ MODULE_AUTHOR("John Dorsey <john+@cs.cmu.edu>");
+diff -Nur linux-2.6.24.vanilla/drivers/pcmcia/sa1100_simpad.c linux-2.6.24/drivers/pcmcia/sa1100_simpad.c
+--- linux-2.6.24.vanilla/drivers/pcmcia/sa1100_simpad.c 2008-01-24 23:58:37.000000000 +0100
++++ linux-2.6.24/drivers/pcmcia/sa1100_simpad.c 2008-02-22 20:53:32.000000000 +0100
+@@ -8,13 +8,15 @@
+ #include <linux/kernel.h>
+ #include <linux/device.h>
+ #include <linux/init.h>
++#include <linux/delay.h>
+
+ #include <asm/hardware.h>
+ #include <asm/mach-types.h>
+ #include <asm/irq.h>
+ #include <asm/arch/simpad.h>
+ #include "sa1100_generic.h"
+-
++
++extern long get_cs3_ro(void);
+ extern long get_cs3_shadow(void);
+ extern void set_cs3_bit(int value);
+ extern void clear_cs3_bit(int value);
+@@ -25,8 +27,15 @@
+
+ static int simpad_pcmcia_hw_init(struct soc_pcmcia_socket *skt)
+ {
+-
+- clear_cs3_bit(VCC_3V_EN|VCC_5V_EN|EN0|EN1);
++ clear_cs3_bit(VCC_3V_EN|VCC_5V_EN|EN0|EN1|PCMCIA_RESET);
++
++ set_cs3_bit(PCMCIA_BUFF_DIS);
++
++ msleep(10);
++
++ clear_cs3_bit(PCMCIA_BUFF_DIS);
++
++ msleep(5);
+
+ skt->irq = IRQ_GPIO_CF_IRQ;
+
+@@ -38,7 +47,7 @@
+ soc_pcmcia_free_irqs(skt, irqs, ARRAY_SIZE(irqs));
+
+ /* Disable CF bus: */
+- //set_cs3_bit(PCMCIA_BUFF_DIS);
++ set_cs3_bit(PCMCIA_BUFF_DIS);
+ clear_cs3_bit(PCMCIA_RESET);
+ }
+
+@@ -47,21 +56,17 @@
+ struct pcmcia_state *state)
+ {
+ unsigned long levels = GPLR;
+- long cs3reg = get_cs3_shadow();
+-
+- state->detect=((levels & GPIO_CF_CD)==0)?1:0;
+- state->ready=(levels & GPIO_CF_IRQ)?1:0;
+- state->bvd1=1; /* Not available on Simpad. */
+- state->bvd2=1; /* Not available on Simpad. */
+- state->wrprot=0; /* Not available on Simpad. */
+-
+- if((cs3reg & 0x0c) == 0x0c) {
+- state->vs_3v=0;
+- state->vs_Xv=0;
+- } else {
+- state->vs_3v=1;
+- state->vs_Xv=0;
+- }
++
++ state->detect = ((levels & GPIO_CF_CD) == 0) ? 1 : 0 ;
++ state->ready = (levels & GPIO_CF_IRQ) ? 1 : 0 ;
++
++ long cs3_ro_reg = get_cs3_ro();
++
++ state->bvd1 = (cs3_ro_reg & PCMCIA_BVD1) ? 1 : 0 ; /* old: =1 Not available on Simpad. */
++ state->bvd2 = (cs3_ro_reg & PCMCIA_BVD2) ? 1 : 0 ; /* old: =1 Not available on Simpad. */
++ state->wrprot = 0 ; /* Not available on Simpad. */
++ state->vs_3v = (cs3_ro_reg & PCMCIA_VS1) ? 0 : 1 ;
++ state->vs_Xv = (cs3_ro_reg & PCMCIA_VS2) ? 0 : 1 ;
+ }
+
+ static int
+@@ -95,7 +100,11 @@
+ local_irq_restore(flags);
+ return -1;
+ }
+-
++
++ if (state->flags & SS_RESET)
++ set_cs3_bit(PCMCIA_RESET);
++ else
++ clear_cs3_bit(PCMCIA_RESET);
+
+ local_irq_restore(flags);
+
+@@ -104,6 +113,7 @@
+
+ static void simpad_pcmcia_socket_init(struct soc_pcmcia_socket *skt)
+ {
++ clear_cs3_bit(PCMCIA_RESET);
+ soc_pcmcia_enable_irqs(skt, irqs, ARRAY_SIZE(irqs));
+ }
+
+diff -Nur linux-2.6.24.vanilla/drivers/pcmcia/soc_common.c linux-2.6.24/drivers/pcmcia/soc_common.c
+--- linux-2.6.24.vanilla/drivers/pcmcia/soc_common.c 2008-01-24 23:58:37.000000000 +0100
++++ linux-2.6.24/drivers/pcmcia/soc_common.c 2008-02-22 20:53:06.000000000 +0100
+@@ -747,7 +747,9 @@
+
+ add_timer(&skt->poll_timer);
+
+- device_create_file(&skt->socket.dev, &dev_attr_status);
++ ret = device_create_file(&skt->socket.dev, &dev_attr_status);
++ if (ret)
++ goto out_err_7;
+ }
+
+ dev_set_drvdata(dev, sinfo);
--- /dev/null
+diff -Nur linux-2.6.24.vanilla/arch/arm/mach-sa1100/simpad.c linux-2.6.24/arch/arm/mach-sa1100/simpad.c
+--- linux-2.6.24.vanilla/arch/arm/mach-sa1100/simpad.c 2008-01-24 23:58:37.000000000 +0100
++++ linux-2.6.24/arch/arm/mach-sa1100/simpad.c 2008-02-20 21:10:00.000000000 +0100
+@@ -1,5 +1,15 @@
+ /*
+ * linux/arch/arm/mach-sa1100/simpad.c
++ *
++ * 2007/04/11 mrdata:
++ * - insert simpad_uart_set_mctrl()
++ * simpad_uart_get_mctrl()
++ * - internal RS232/DECT/Bluetooth
++ * works again (based on 2.4 simpad-serial.patch)
++ * - added cs3_ro
++ *
++ * 2007/04/12 Bernhard Guillon:
++ * -added gpio_keys (based on h3000.c from hh.org)
+ */
+
+ #include <linux/module.h>
+@@ -9,6 +19,9 @@
+ #include <linux/proc_fs.h>
+ #include <linux/string.h>
+ #include <linux/pm.h>
++
++#include <linux/apm-emulation.h>
++
+ #include <linux/platform_device.h>
+ #include <linux/mtd/mtd.h>
+ #include <linux/mtd/partitions.h>
+@@ -27,12 +40,21 @@
+
+ #include <linux/serial_core.h>
+ #include <linux/ioport.h>
++#include <linux/input.h>
++#include <linux/gpio_keys.h>
+ #include <asm/io.h>
+
+ #include "generic.h"
+
++long cs3_ro;
+ long cs3_shadow;
+
++long get_cs3_ro(void)
++{
++ cs3_ro = *(CS3BUSTYPE *)(CS3_BASE);
++ return cs3_ro;
++}
++
+ long get_cs3_shadow(void)
+ {
+ return cs3_shadow;
+@@ -55,9 +77,12 @@
+ *(CS3BUSTYPE *)(CS3_BASE) = cs3_shadow;
+ }
+
++EXPORT_SYMBOL(get_cs3_ro);
++EXPORT_SYMBOL(get_cs3_shadow);
+ EXPORT_SYMBOL(set_cs3_bit);
+ EXPORT_SYMBOL(clear_cs3_bit);
+
++
+ static struct map_desc simpad_io_desc[] __initdata = {
+ { /* MQ200 */
+ .virtual = 0xf2800000,
+@@ -73,23 +98,71 @@
+ };
+
+
++static void simpad_uart_set_mctrl(struct uart_port *port, u_int mctrl)
++{
++ if (port->mapbase == _Ser1UTCR0) {
++ /* internal serial port (ttySA1, DECT/Bluetooth) */
++ if (mctrl & TIOCM_RTS) GPCR = GPIO_UART1_RTS;
++ else GPSR = GPIO_UART1_RTS;
++
++ if (mctrl & TIOCM_DTR) GPCR = GPIO_UART1_DTR;
++ else GPSR = GPIO_UART1_DTR;
++ }
++
++ else if (port->mapbase == _Ser3UTCR0) {
++ /* external serial port (ttySA0, RS232) */
++ if (mctrl & TIOCM_RTS) GPCR = GPIO_UART3_RTS;
++ else GPSR = GPIO_UART3_RTS;
++
++ if (mctrl & TIOCM_DTR) GPCR = GPIO_UART3_DTR;
++ else GPSR = GPIO_UART3_DTR;
++ }
++}
++
++
++static u_int simpad_uart_get_mctrl(struct uart_port *port)
++{
++ u_int ret = TIOCM_CD | TIOCM_CTS | TIOCM_DSR;
++
++ if (port->mapbase == _Ser1UTCR0) {
++ /* internal serial port (ttySA1, DECT/Bluetooth) */
++ int gplr = GPLR;
++ if (gplr & GPIO_UART1_DCD) ret &= ~TIOCM_CD;
++ if (gplr & GPIO_UART1_CTS) ret &= ~TIOCM_CTS;
++ if (gplr & GPIO_UART1_DSR) ret &= ~TIOCM_DSR;
++ }
++
++ else if (port->mapbase == _Ser3UTCR0) {
++ /* external serial port (ttySA0, RS232) */
++ int gplr = GPLR;
++ if (gplr & GPIO_UART3_DCD) ret &= ~TIOCM_CD;
++ if (gplr & GPIO_UART3_CTS) ret &= ~TIOCM_CTS;
++ if (gplr & GPIO_UART3_DSR) ret &= ~TIOCM_DSR;
++ }
++ return ret;
++}
++
++
+ static void simpad_uart_pm(struct uart_port *port, u_int state, u_int oldstate)
+ {
+- if (port->mapbase == (u_int)&Ser1UTCR0) {
+- if (state)
+- {
+- clear_cs3_bit(RS232_ON);
+- clear_cs3_bit(DECT_POWER_ON);
+- }else
+- {
+- set_cs3_bit(RS232_ON);
+- set_cs3_bit(DECT_POWER_ON);
+- }
+- }
++ if (port->mapbase == (u_int)&Ser3UTCR0) {
++ if (state)
++ {
++ clear_cs3_bit(RS232_ON);
++ /* clear_cs3_bit(DECT_POWER_ON); */
++ }else
++ {
++ set_cs3_bit(RS232_ON);
++ /* set_cs3_bit(DECT_POWER_ON); */
++ }
++ }
+ }
+
++
+ static struct sa1100_port_fns simpad_port_fns __initdata = {
+- .pm = simpad_uart_pm,
++ .set_mctrl = simpad_uart_set_mctrl,
++ .get_mctrl = simpad_uart_get_mctrl,
++ .pm = simpad_uart_pm,
+ };
+
+
+@@ -135,7 +208,6 @@
+ };
+
+
+-
+ static void __init simpad_map_io(void)
+ {
+ sa1100_map_io();
+@@ -144,13 +216,12 @@
+
+ set_cs3_bit (EN1 | EN0 | LED2_ON | DISPLAY_ON | RS232_ON |
+ ENABLE_5V | RESET_SIMCARD | DECT_POWER_ON);
+-
+-
++
+ sa1100_register_uart_fns(&simpad_port_fns);
+ sa1100_register_uart(0, 3); /* serial interface */
+ sa1100_register_uart(1, 1); /* DECT */
+
+- // Reassign UART 1 pins
++ /* Reassign UART 1 pins */
+ GAFR |= GPIO_UART_TXD | GPIO_UART_RXD;
+ GPDR |= GPIO_UART_TXD | GPIO_LDD13 | GPIO_LDD15;
+ GPDR &= ~GPIO_UART_RXD;
+@@ -160,7 +231,6 @@
+ * Set up registers for sleep mode.
+ */
+
+-
+ PWER = PWER_GPIO0| PWER_RTC;
+ PGSR = 0x818;
+ PCFR = 0;
+@@ -171,9 +241,10 @@
+ sa11x0_set_mcp_data(&simpad_mcp_data);
+ }
+
++
+ static void simpad_power_off(void)
+ {
+- local_irq_disable(); // was cli
++ local_irq_disable(); /* was cli */
+ set_cs3(0x800); /* only SD_MEDIAQ */
+
+ /* disable internal oscillator, float CS lines */
+@@ -191,31 +262,52 @@
+ while(1);
+
+ local_irq_enable(); /* we won't ever call it */
++}
+
+
+-}
++/*
++ * gpio_keys
++*/
++
++static struct gpio_keys_button simpad_button_table[] = {
++ { KEY_POWER, IRQ_GPIO_POWER_BUTTON, 1, "power button" },
++};
++
++static struct gpio_keys_platform_data simpad_keys_data = {
++ .buttons = simpad_button_table,
++ .nbuttons = ARRAY_SIZE(simpad_button_table),
++};
++
++static struct platform_device simpad_keys = {
++ .name = "gpio-keys",
++ .dev = {
++ .platform_data = &simpad_keys_data,
++ },
++};
+
+
+ /*
+ * MediaQ Video Device
+ */
++
+ static struct platform_device simpad_mq200fb = {
+ .name = "simpad-mq200",
+ .id = 0,
+ };
+
++
+ static struct platform_device *devices[] __initdata = {
+- &simpad_mq200fb
++ &simpad_keys,
++ &simpad_mq200fb,
+ };
+
+
+-
+ static int __init simpad_init(void)
+ {
+ int ret;
+
+ pm_power_off = simpad_power_off;
+-
++
+ ret = platform_add_devices(devices, ARRAY_SIZE(devices));
+ if(ret)
+ printk(KERN_WARNING "simpad: Unable to register mq200 framebuffer device");
+diff -Nur linux-2.6.24.vanilla/include/asm-arm/arch-sa1100/simpad.h linux-2.6.24/include/asm-arm/arch-sa1100/simpad.h
+--- linux-2.6.24.vanilla/include/asm-arm/arch-sa1100/simpad.h 2008-01-24 23:58:37.000000000 +0100
++++ linux-2.6.24/include/asm-arm/arch-sa1100/simpad.h 2008-02-20 21:10:00.000000000 +0100
+@@ -12,11 +12,12 @@
+ #define __ASM_ARCH_SIMPAD_H
+
+
+-#define GPIO_UART1_RTS GPIO_GPIO14
++#define GPIO_UART1_RTS GPIO_GPIO9
+ #define GPIO_UART1_DTR GPIO_GPIO7
+ #define GPIO_UART1_CTS GPIO_GPIO8
+ #define GPIO_UART1_DCD GPIO_GPIO23
+ #define GPIO_UART1_DSR GPIO_GPIO6
++#define GPIO_UART1_RI GPIO_GPIO19
+
+ #define GPIO_UART3_RTS GPIO_GPIO12
+ #define GPIO_UART3_DTR GPIO_GPIO16
+@@ -48,9 +49,9 @@
+ #define GPIO_SMART_CARD GPIO_GPIO10
+ #define IRQ_GPIO_SMARD_CARD IRQ_GPIO10
+
+-// CS3 Latch is write only, a shadow is necessary
++// CS3 Latch is write only 16-bit , a shadow is necessary
+
+-#define CS3BUSTYPE unsigned volatile long
++#define CS3BUSTYPE unsigned volatile long
+ #define CS3_BASE 0xf1000000
+
+ #define VCC_5V_EN 0x0001 // For 5V PCMCIA
+@@ -70,43 +71,17 @@
+ #define ENABLE_5V 0x4000 // Enable 5V circuit
+ #define RESET_SIMCARD 0x8000
+
+-#define RS232_ENABLE 0x0440
+-#define PCMCIAMASK 0x402f
++// CS3 Latch is readable only 8-bit interest
+
++#define PCMCIA_BVD1 0x0001
++#define PCMCIA_BVD2 0x0002
++#define PCMCIA_VS1 0x0004 // PCMCIA card voltage select
++#define PCMCIA_VS2 0x0008 // PCMCIA card voltage select, if both are in high state -> 5V PCMCIA card
++#define LOCK_IND 0x0010
++#define CHARGING_STATE 0x0020 // Ladestatus
++#define PCMCIA_SHORT 0x0040 // low active
+
+-struct simpad_battery {
+- unsigned char ac_status; /* line connected yes/no */
+- unsigned char status; /* battery loading yes/no */
+- unsigned char percentage; /* percentage loaded */
+- unsigned short life; /* life till empty */
+-};
+-
+-/* These should match the apm_bios.h definitions */
+-#define SIMPAD_AC_STATUS_AC_OFFLINE 0x00
+-#define SIMPAD_AC_STATUS_AC_ONLINE 0x01
+-#define SIMPAD_AC_STATUS_AC_BACKUP 0x02 /* What does this mean? */
+-#define SIMPAD_AC_STATUS_AC_UNKNOWN 0xff
+-
+-/* These bitfields are rarely "or'd" together */
+-#define SIMPAD_BATT_STATUS_HIGH 0x01
+-#define SIMPAD_BATT_STATUS_LOW 0x02
+-#define SIMPAD_BATT_STATUS_CRITICAL 0x04
+-#define SIMPAD_BATT_STATUS_CHARGING 0x08
+-#define SIMPAD_BATT_STATUS_CHARGE_MAIN 0x10
+-#define SIMPAD_BATT_STATUS_DEAD 0x20 /* Battery will not charge */
+-#define SIMPAD_BATT_NOT_INSTALLED 0x20 /* For expansion pack batteries */
+-#define SIMPAD_BATT_STATUS_FULL 0x40 /* Battery fully charged (and connected to AC) */
+-#define SIMPAD_BATT_STATUS_NOBATT 0x80
+-#define SIMPAD_BATT_STATUS_UNKNOWN 0xff
+-
+-extern int simpad_get_battery(struct simpad_battery* );
++#define RS232_ENABLE 0x0440
++#define PCMCIAMASK 0x402f
+
+ #endif // __ASM_ARCH_SIMPAD_H
+-
+-
+-
+-
+-
+-
+-
+-
--- /dev/null
+diff -Nur linux-2.6.24.vanilla/drivers/mfd/Kconfig linux-2.6.24/drivers/mfd/Kconfig
+--- linux-2.6.24.vanilla/drivers/mfd/Kconfig 2008-01-24 23:58:37.000000000 +0100
++++ linux-2.6.24/drivers/mfd/Kconfig 2008-02-20 21:17:07.000000000 +0100
+@@ -38,4 +38,7 @@
+ tristate "Touchscreen interface support"
+ depends on MCP_UCB1200 && INPUT
+
++config MCP_UCB1200_SWITCHES
++ tristate "SIMpad Switches support"
++ depends on MCP_UCB1200 && INPUT
+ endmenu
+diff -Nur linux-2.6.24.vanilla/drivers/mfd/Makefile linux-2.6.24/drivers/mfd/Makefile
+--- linux-2.6.24.vanilla/drivers/mfd/Makefile 2008-01-24 23:58:37.000000000 +0100
++++ linux-2.6.24/drivers/mfd/Makefile 2008-02-20 21:17:07.000000000 +0100
+@@ -8,7 +8,7 @@
+ obj-$(CONFIG_MCP_SA11X0) += mcp-sa11x0.o
+ obj-$(CONFIG_MCP_UCB1200) += ucb1x00-core.o
+ obj-$(CONFIG_MCP_UCB1200_TS) += ucb1x00-ts.o
+-
++obj-$(CONFIG_MCP_UCB1200_SWITCHES) += ucb1x00-switches.o
+ ifeq ($(CONFIG_SA1100_ASSABET),y)
+ obj-$(CONFIG_MCP_UCB1200) += ucb1x00-assabet.o
+ endif
+diff -Nur linux-2.6.24.vanilla/drivers/mfd/ucb1x00-switches.c linux-2.6.24/drivers/mfd/ucb1x00-switches.c
+--- linux-2.6.24.vanilla/drivers/mfd/ucb1x00-switches.c 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.24/drivers/mfd/ucb1x00-switches.c 2008-02-20 21:17:07.000000000 +0100
+@@ -0,0 +1,332 @@
++/*
++ * linux/drivers/mfd/ucb1x00-switches.c
++ *
++ * Copyright (C) 2007 Bernhard Guillon.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License.
++ *
++ * This driver is for the Switches of Siemens SIMpad (CL4,SL4,SLC), T-Sinus-Pad and
++ * Swisscom WP50 devices.
++ *
++ * Six switches are routed to GPIO pins on the UCB1300: S3 -- S8.
++ *
++ * This driver is based on the 2.4 ucb1x00-switches, the 2.6 ucb1x00-assabet
++ * and the ucb1x00-ts driver.
++ *
++ * 2007/06/21 mrdata:
++ * - create new thread kswd() to handle irq_events for ucb1300-gpio's
++ * - found out, that not every key-press or key-release
++ * generate a irq_event
++ * -> establish key_state handling
++ * key_state, key_state_last <-> KEY_PRESS, KEY_RELEASE
++ * -> after irq_event polling the ucb1300-gpio's till all keys
++ * in key_state = KEY_RELEASE
++ *
++ */
++#include <linux/module.h>
++#include <linux/init.h>
++#include <linux/input.h>
++#include <linux/device.h>
++#include <linux/sched.h>
++#include <linux/freezer.h>
++#include <linux/kthread.h>
++
++#include <asm/dma.h>
++
++#include "ucb1x00.h"
++
++#define KEY_PRESS 1
++#define KEY_RELEASE 0
++
++static int key [6] = { KEY_PROG1,KEY_PROG2,KEY_UP,KEY_DOWN,KEY_LEFT,KEY_RIGHT };
++
++static unsigned short int key_state [6] = { 0, 0, 0, 0, 0, 0};
++static unsigned short int key_state_last [6] = { 1, 1, 1, 1, 1, 1};
++
++struct ucb1x00_switches {
++ struct input_dev *idev;
++ struct ucb1x00 *ucb;
++
++ wait_queue_head_t irq_wait;
++ struct task_struct *rtask;
++
++ int idx;
++
++ unsigned int valid:1;
++};
++
++static int ucb1x00_thread(void *_switches_id)
++{
++ unsigned short int this;
++ int idx_tmp;
++ int i;
++ struct ucb1x00_switches *switches = _switches_id;
++ struct input_dev *idev = switches->idev;
++ struct task_struct *tsk = current;
++ DECLARE_WAITQUEUE(wait, tsk);
++
++ add_wait_queue(&switches->irq_wait, &wait);
++
++ while (!kthread_should_stop())
++ {
++ signed long timeout;
++
++ if ((switches->idx >= 0) && (switches->idx <= 5) && (switches->valid == 1))
++ {
++ switches->valid = 0;
++
++ idx_tmp = switches->idx;
++
++ ucb1x00_enable(switches->ucb);
++
++ this = ~ucb1x00_io_read(switches->ucb);
++
++ ucb1x00_disable(switches->ucb);
++
++ if (key_state[idx_tmp] == KEY_RELEASE)
++ {
++ key_state_last[idx_tmp] = KEY_RELEASE;
++ key_state[idx_tmp] = KEY_PRESS;
++
++ input_report_key(idev, key[idx_tmp], KEY_PRESS);
++ input_sync(idev);
++ }
++
++ for (i = 0; i < 6; i++)
++ {
++ if ((key_state[i] == KEY_RELEASE) && (((this & (1 << i)) ? 1 : 0) == KEY_PRESS))
++ {
++ key_state_last[i] = KEY_RELEASE;
++ key_state[i] = KEY_PRESS;
++
++ input_report_key(idev, key[i], KEY_PRESS);
++ input_sync(idev);
++ }
++ }
++
++ for(;;)
++ {
++ ucb1x00_enable(switches->ucb);
++ this = ~ucb1x00_io_read(switches->ucb);
++ ucb1x00_disable(switches->ucb);
++
++ for (i = 0; i < 6; i++)
++ {
++ if ((key_state[i] == KEY_PRESS) && (((this & (1 << i)) ? 1 : 0) == KEY_RELEASE))
++ {
++ key_state_last[i] = KEY_PRESS;
++ key_state[i] = KEY_RELEASE;
++
++ input_report_key(idev, key[i], KEY_RELEASE);
++ input_sync(idev);
++ }
++
++ if ((key_state[i] == KEY_RELEASE) && (((this & (1 << i)) ? 1 : 0) == KEY_PRESS))
++ {
++ key_state_last[i] = KEY_RELEASE;
++ key_state[i] = KEY_PRESS;
++
++ input_report_key(idev, key[i], KEY_PRESS);
++ input_sync(idev);
++ }
++
++ }
++
++ // left loop, if no key press detect
++ if ((this | 0xff80) == 0xff80)
++ {
++ break;
++ }
++
++ set_task_state(tsk, TASK_INTERRUPTIBLE);
++
++ try_to_freeze();
++
++ timeout = HZ / 100;
++
++ schedule_timeout(timeout);
++ }
++ }
++
++ set_task_state(tsk, TASK_INTERRUPTIBLE);
++
++ try_to_freeze();
++
++ timeout = MAX_SCHEDULE_TIMEOUT;
++
++ schedule_timeout(timeout);
++ }
++
++ remove_wait_queue(&switches->irq_wait, &wait);
++
++ switches->rtask = NULL;
++
++ return 0;
++}
++
++
++static void ucb1x00_dev_irq(int idx, void *id)
++{
++ struct ucb1x00_switches *switches = id;
++
++ switches->idx = idx;
++ switches->valid = 1;
++
++ wake_up(&switches->irq_wait);
++}
++
++static int ucb1x00_switches_add(struct ucb1x00_dev *dev)
++{
++ struct ucb1x00_switches *switches;
++ struct input_dev *idev;
++ int err,i;
++
++ switches = kzalloc(sizeof(struct ucb1x00_switches), GFP_KERNEL);
++ idev = input_allocate_device();
++
++ if (!switches || !idev) {
++ err = -ENOMEM;
++ goto fail;
++ }
++
++ switches->ucb = dev->ucb;
++
++ idev->private = switches;
++ idev->name = "SIMpad Switches";
++ idev->id.product = switches->ucb->id;
++
++ __set_bit(EV_KEY, idev->evbit);
++ __set_bit(EV_REP, idev->evbit);
++ __set_bit(KEY_PROG1, idev->keybit);
++ __set_bit(KEY_PROG2, idev->keybit);
++ __set_bit(KEY_UP, idev->keybit);
++ __set_bit(KEY_DOWN, idev->keybit);
++ __set_bit(KEY_LEFT, idev->keybit);
++ __set_bit(KEY_RIGHT, idev->keybit);
++
++ err = input_register_device(idev);
++ if (err)
++ goto fail;
++ switches->idev = idev;
++ dev->priv = switches;
++
++ BUG_ON(switches->rtask);
++
++ init_waitqueue_head(&switches->irq_wait);
++
++ ucb1x00_enable(switches->ucb);
++
++ ucb1x00_io_set_dir(switches->ucb,
++ UCB_IO_0 | UCB_IO_1 | UCB_IO_2 |
++ UCB_IO_3 | UCB_IO_4 | UCB_IO_5,
++ UCB_IO_8 | UCB_IO_9);
++
++ ucb1x00_disable(switches->ucb);
++
++ for (i = 0; i < 6; ++i) {
++ ucb1x00_enable_irq(switches->ucb, i, UCB_RISING | UCB_FALLING);
++
++ if (ucb1x00_hook_irq(switches->ucb, i, ucb1x00_dev_irq, switches) < 0) {
++ printk(KERN_ERR "unable to hook IRQ for "
++ "UCB1300 SWITCH_%d\n", i);
++ return -EBUSY;
++ }
++ }
++
++ switches->rtask = kthread_run(ucb1x00_thread, switches, "kswd");
++ if (!IS_ERR(switches->rtask))
++ {
++ return 0;
++ }
++ else
++ {
++ input_unregister_device(switches->idev);
++
++ for (i = 5; i >= 0; --i) {
++ ucb1x00_disable_irq(switches->ucb, i, UCB_RISING | UCB_FALLING);
++
++ /* Only error conditions are ENOENT and EINVAL; silently
++ * ignore:
++ */
++ ucb1x00_free_irq(switches->ucb, i, NULL);
++ }
++ switches->rtask = NULL;
++ ucb1x00_disable(switches->ucb);
++ kfree(switches);
++
++ return -EFAULT;
++ }
++
++fail:
++ input_free_device(idev);
++ kfree(switches);
++ return err;
++
++}
++
++static void ucb1x00_switches_remove(struct ucb1x00_dev *dev)
++{
++ int i;
++ struct ucb1x00_switches *switches = dev->priv;
++
++ if (switches->rtask)
++ kthread_stop(switches->rtask);
++
++ switches->rtask = NULL;
++
++ input_unregister_device(switches->idev);
++
++ for (i = 5; i >= 0; --i) {
++ ucb1x00_disable_irq(switches->ucb, i, UCB_RISING | UCB_FALLING);
++
++ /* Only error conditions are ENOENT and EINVAL; silently
++ * ignore:
++ */
++ ucb1x00_free_irq(switches->ucb, i, NULL);
++ }
++ ucb1x00_disable(switches->ucb);
++ kfree(switches);
++}
++
++#ifdef CONFIG_PM
++static int ucb1x00_switches_resume(struct ucb1x00_dev *dev)
++{
++ struct ucb1x00_switches *switches = dev->priv;
++
++ if (switches->rtask != NULL)
++ {
++ switches->valid = 0;
++ wake_up(&switches->irq_wait);
++
++ printk(KERN_DEBUG "ucb1x00-switches.c -> _switches_resume() kswd - restart *DONE*\n");
++ }
++ return 0;
++}
++#else
++#define ucb1x00_switches_resume NULL
++#endif
++
++static struct ucb1x00_driver ucb1x00_switches_driver = {
++ .add = ucb1x00_switches_add,
++ .remove = ucb1x00_switches_remove,
++ .resume = ucb1x00_switches_resume,
++};
++
++static int __init ucb1x00_switches_init(void)
++{
++ return ucb1x00_register_driver(&ucb1x00_switches_driver);
++}
++
++static void __exit ucb1x00_switches_exit(void)
++{
++ ucb1x00_unregister_driver(&ucb1x00_switches_driver);
++}
++
++module_init(ucb1x00_switches_init);
++module_exit(ucb1x00_switches_exit);
++
++MODULE_AUTHOR("Bernhard Guillon <Bernhard.Guillon@opensimpad.org>");
++MODULE_DESCRIPTION("UCB1x00 Switches driver for Siemens SIMpad");
++MODULE_LICENSE("GPL");
--- /dev/null
+diff -Nur linux-2.6.24.vanilla/drivers/mfd/ucb1x00-ts.c linux-2.6.24/drivers/mfd/ucb1x00-ts.c
+--- linux-2.6.24.vanilla/drivers/mfd/ucb1x00-ts.c 2008-01-24 23:58:37.000000000 +0100
++++ linux-2.6.24/drivers/mfd/ucb1x00-ts.c 2008-02-20 21:21:51.000000000 +0100
+@@ -16,6 +16,10 @@
+ * It is important to note that the signal connected to the ADCSYNC
+ * pin should provide pulses even when the LCD is blanked, otherwise
+ * a pen touch needed to unblank the LCD will never be read.
++ *
++ * mrdata: -added some accuracy improvement based on thesings collie patch
++ * -added suspend fix
++ *
+ */
+ #include <linux/module.h>
+ #include <linux/moduleparam.h>
+@@ -104,6 +108,8 @@
+ UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_GND |
+ UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
+
++ udelay(55);
++
+ return ucb1x00_adc_read(ts->ucb, UCB_ADC_INP_TSPY, ts->adcsync);
+ }
+ }
+@@ -130,7 +136,7 @@
+ UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW |
+ UCB_TS_CR_MODE_POS | UCB_TS_CR_BIAS_ENA);
+
+- udelay(55);
++ udelay(165);
+
+ return ucb1x00_adc_read(ts->ucb, UCB_ADC_INP_TSPY, ts->adcsync);
+ }
+@@ -158,7 +164,7 @@
+ UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW |
+ UCB_TS_CR_MODE_POS | UCB_TS_CR_BIAS_ENA);
+
+- udelay(55);
++ udelay(165);
+
+ return ucb1x00_adc_read(ts->ucb, UCB_ADC_INP_TSPX, ts->adcsync);
+ }
+@@ -216,13 +222,17 @@
+ signed long timeout;
+
+ ts->restart = 0;
+-
++
+ ucb1x00_adc_enable(ts->ucb);
+
+ x = ucb1x00_ts_read_xpos(ts);
++ ucb1x00_adc_disable(ts->ucb);
++ ucb1x00_adc_enable(ts->ucb);
+ y = ucb1x00_ts_read_ypos(ts);
++ ucb1x00_adc_disable(ts->ucb);
++ ucb1x00_adc_enable(ts->ucb);
+ p = ucb1x00_ts_read_pressure(ts);
+-
++
+ /*
+ * Switch back to interrupt mode.
+ */
+@@ -231,15 +241,19 @@
+
+ msleep(10);
+
++ if ((x < 60) || (y < 60)) {
++ p = 0;
++ }
++
+ ucb1x00_enable(ts->ucb);
+
+-
+ if (ucb1x00_ts_pen_down(ts)) {
++
+ set_task_state(tsk, TASK_INTERRUPTIBLE);
+
+ ucb1x00_enable_irq(ts->ucb, UCB_IRQ_TSPX, machine_is_collie() ? UCB_RISING : UCB_FALLING);
+ ucb1x00_disable(ts->ucb);
+-
++
+ /*
+ * If we spat out a valid sample set last time,
+ * spit out a "pen off" sample here.
+@@ -250,7 +264,9 @@
+ }
+
+ timeout = MAX_SCHEDULE_TIMEOUT;
++
+ } else {
++
+ ucb1x00_disable(ts->ucb);
+
+ /*
+@@ -269,6 +285,14 @@
+
+ try_to_freeze();
+
++ /*
++ * While suspend the ktsd-thread goes sleep -> try_to_freeze()
++ * While resume the ktsd-thread do wakup and must rune one time
++ * again to do a clean re-setup -> enable_irq: UCB_IRQ_TSPX
++ */
++ if(ts->restart)
++ timeout = HZ / 100;
++
+ schedule_timeout(timeout);
+ }
+
+@@ -351,8 +375,12 @@
+ * TS interrupt mode is set up again
+ * after sleep.
+ */
++
+ ts->restart = 1;
+ wake_up(&ts->irq_wait);
++
++ printk(KERN_INFO "ucb1x00-ts.c -> ucb1x00_ts_resume() ktsd - restart *DONE*\n");
++
+ }
+ return 0;
+ }
+++ /dev/null
---- linux-2.6.20.4.orig/include/asm-arm/kexec.h 2007-04-10 19:16:39.000000000 +0200
-+++ linux-2.6.20.4/include/asm-arm/kexec.h 2007-04-03 05:01:09.000000000 +0200
-@@ -8,8 +8,8 @@
- /* Maximum address we can reach in physical address mode */
- #define KEXEC_DESTINATION_MEMORY_LIMIT (-1UL)
- /* Maximum address we can use for the control code buffer */
--#define KEXEC_CONTROL_MEMORY_LIMIT TASK_SIZE
--
-+//#define KEXEC_CONTROL_MEMORY_LIMIT TASK_SIZE
-+#define KEXEC_CONTROL_MEMORY_LIMIT (-1UL)
- #define KEXEC_CONTROL_CODE_SIZE 4096
-
- #define KEXEC_ARCH KEXEC_ARCH_ARM
---- linux-2.6.20.4.orig/include/asm-arm/kexec.h 2007-04-10 19:16:39.000000000 +0200
-+++ linux-2.6.20.4/include/asm-arm/kexec.h 2007-04-03 05:01:09.000000000 +0200
-@@ -8,8 +8,8 @@
- /* Maximum address we can reach in physical address mode */
- #define KEXEC_DESTINATION_MEMORY_LIMIT (-1UL)
- /* Maximum address we can use for the control code buffer */
--#define KEXEC_CONTROL_MEMORY_LIMIT TASK_SIZE
--
-+//#define KEXEC_CONTROL_MEMORY_LIMIT TASK_SIZE
-+#define KEXEC_CONTROL_MEMORY_LIMIT (-1UL)
- #define KEXEC_CONTROL_CODE_SIZE 4096
-
- #define KEXEC_ARCH KEXEC_ARCH_ARM
---- linux-2.6.20.4.orig/include/asm-arm/kexec.h 2007-04-10 19:16:39.000000000 +0200
-+++ linux-2.6.20.4/include/asm-arm/kexec.h 2007-04-03 05:01:09.000000000 +0200
-@@ -8,8 +8,8 @@
- /* Maximum address we can reach in physical address mode */
- #define KEXEC_DESTINATION_MEMORY_LIMIT (-1UL)
- /* Maximum address we can use for the control code buffer */
--#define KEXEC_CONTROL_MEMORY_LIMIT TASK_SIZE
--
-+//#define KEXEC_CONTROL_MEMORY_LIMIT TASK_SIZE
-+#define KEXEC_CONTROL_MEMORY_LIMIT (-1UL)
- #define KEXEC_CONTROL_CODE_SIZE 4096
-
- #define KEXEC_ARCH KEXEC_ARCH_ARM
+++ /dev/null
-#
-# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.24
-# Mon Mar 3 12:52:14 2008
-#
-CONFIG_ARM=y
-CONFIG_SYS_SUPPORTS_APM_EMULATION=y
-CONFIG_GENERIC_GPIO=y
-# CONFIG_GENERIC_TIME is not set
-# CONFIG_GENERIC_CLOCKEVENTS is not set
-CONFIG_MMU=y
-# CONFIG_NO_IOPORT is not set
-CONFIG_GENERIC_HARDIRQS=y
-CONFIG_STACKTRACE_SUPPORT=y
-CONFIG_LOCKDEP_SUPPORT=y
-CONFIG_TRACE_IRQFLAGS_SUPPORT=y
-CONFIG_HARDIRQS_SW_RESEND=y
-CONFIG_GENERIC_IRQ_PROBE=y
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-# CONFIG_ARCH_HAS_ILOG2_U32 is not set
-# CONFIG_ARCH_HAS_ILOG2_U64 is not set
-CONFIG_GENERIC_HWEIGHT=y
-CONFIG_GENERIC_CALIBRATE_DELAY=y
-CONFIG_ZONE_DMA=y
-CONFIG_ARCH_MTD_XIP=y
-CONFIG_VECTORS_BASE=0xffff0000
-CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
-
-#
-# General setup
-#
-CONFIG_EXPERIMENTAL=y
-CONFIG_BROKEN_ON_SMP=y
-CONFIG_LOCK_KERNEL=y
-CONFIG_INIT_ENV_ARG_LIMIT=32
-CONFIG_LOCALVERSION=""
-CONFIG_LOCALVERSION_AUTO=y
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-CONFIG_SYSVIPC_SYSCTL=y
-CONFIG_POSIX_MQUEUE=y
-CONFIG_BSD_PROCESS_ACCT=y
-CONFIG_BSD_PROCESS_ACCT_V3=y
-# CONFIG_TASKSTATS is not set
-# CONFIG_USER_NS is not set
-# CONFIG_PID_NS is not set
-CONFIG_AUDIT=y
-CONFIG_IKCONFIG=y
-CONFIG_IKCONFIG_PROC=y
-CONFIG_LOG_BUF_SHIFT=16
-# CONFIG_CGROUPS is not set
-CONFIG_FAIR_GROUP_SCHED=y
-CONFIG_FAIR_USER_SCHED=y
-# CONFIG_FAIR_CGROUP_SCHED is not set
-CONFIG_SYSFS_DEPRECATED=y
-CONFIG_RELAY=y
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_INITRAMFS_SOURCE=""
-CONFIG_CC_OPTIMIZE_FOR_SIZE=y
-CONFIG_SYSCTL=y
-CONFIG_EMBEDDED=y
-CONFIG_UID16=y
-CONFIG_SYSCTL_SYSCALL=y
-CONFIG_KALLSYMS=y
-CONFIG_KALLSYMS_ALL=y
-CONFIG_KALLSYMS_EXTRA_PASS=y
-CONFIG_HOTPLUG=y
-CONFIG_PRINTK=y
-CONFIG_BUG=y
-CONFIG_ELF_CORE=y
-CONFIG_BASE_FULL=y
-CONFIG_FUTEX=y
-CONFIG_ANON_INODES=y
-CONFIG_EPOLL=y
-CONFIG_SIGNALFD=y
-CONFIG_EVENTFD=y
-CONFIG_SHMEM=y
-CONFIG_VM_EVENT_COUNTERS=y
-# CONFIG_SLUB_DEBUG is not set
-# CONFIG_SLAB is not set
-CONFIG_SLUB=y
-# CONFIG_SLOB is not set
-CONFIG_SLABINFO=y
-CONFIG_RT_MUTEXES=y
-# CONFIG_TINY_SHMEM is not set
-CONFIG_BASE_SMALL=0
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_MODULE_FORCE_UNLOAD=y
-CONFIG_MODVERSIONS=y
-CONFIG_MODULE_SRCVERSION_ALL=y
-CONFIG_KMOD=y
-CONFIG_BLOCK=y
-# CONFIG_LBD is not set
-# CONFIG_BLK_DEV_IO_TRACE is not set
-# CONFIG_LSF is not set
-CONFIG_BLK_DEV_BSG=y
-
-#
-# IO Schedulers
-#
-CONFIG_IOSCHED_NOOP=y
-# CONFIG_IOSCHED_AS is not set
-# CONFIG_IOSCHED_DEADLINE is not set
-CONFIG_IOSCHED_CFQ=y
-# CONFIG_DEFAULT_AS is not set
-# CONFIG_DEFAULT_DEADLINE is not set
-CONFIG_DEFAULT_CFQ=y
-# CONFIG_DEFAULT_NOOP is not set
-CONFIG_DEFAULT_IOSCHED="cfq"
-
-#
-# System Type
-#
-# CONFIG_ARCH_AAEC2000 is not set
-# CONFIG_ARCH_INTEGRATOR is not set
-# CONFIG_ARCH_REALVIEW is not set
-# CONFIG_ARCH_VERSATILE is not set
-# CONFIG_ARCH_AT91 is not set
-# CONFIG_ARCH_CLPS7500 is not set
-# CONFIG_ARCH_CLPS711X is not set
-# CONFIG_ARCH_CO285 is not set
-# CONFIG_ARCH_EBSA110 is not set
-# CONFIG_ARCH_EP93XX is not set
-# CONFIG_ARCH_FOOTBRIDGE is not set
-# CONFIG_ARCH_NETX is not set
-# CONFIG_ARCH_H720X is not set
-# CONFIG_ARCH_IMX is not set
-# CONFIG_ARCH_IOP13XX is not set
-# CONFIG_ARCH_IOP32X is not set
-# CONFIG_ARCH_IOP33X is not set
-# CONFIG_ARCH_IXP23XX is not set
-# CONFIG_ARCH_IXP2000 is not set
-# CONFIG_ARCH_IXP4XX is not set
-# CONFIG_ARCH_L7200 is not set
-# CONFIG_ARCH_KS8695 is not set
-# CONFIG_ARCH_NS9XXX is not set
-# CONFIG_ARCH_MXC is not set
-# CONFIG_ARCH_PNX4008 is not set
-# CONFIG_ARCH_PXA is not set
-# CONFIG_ARCH_RPC is not set
-CONFIG_ARCH_SA1100=y
-# CONFIG_ARCH_S3C2410 is not set
-# CONFIG_ARCH_SHARK is not set
-# CONFIG_ARCH_LH7A40X is not set
-# CONFIG_ARCH_DAVINCI is not set
-# CONFIG_ARCH_OMAP is not set
-
-#
-# SA11x0 Implementations
-#
-# CONFIG_SA1100_ASSABET is not set
-# CONFIG_SA1100_CERF is not set
-# CONFIG_SA1100_COLLIE is not set
-# CONFIG_SA1100_H3100 is not set
-# CONFIG_SA1100_H3600 is not set
-# CONFIG_SA1100_H3800 is not set
-# CONFIG_SA1100_BADGE4 is not set
-# CONFIG_SA1100_JORNADA720 is not set
-# CONFIG_SA1100_HACKKIT is not set
-# CONFIG_SA1100_LART is not set
-# CONFIG_SA1100_PLEB is not set
-# CONFIG_SA1100_SHANNON is not set
-CONFIG_SA1100_SIMPAD=y
-# CONFIG_SA1100_SSP is not set
-
-#
-# Boot options
-#
-
-#
-# Power management
-#
-
-#
-# Processor Type
-#
-CONFIG_CPU_32=y
-CONFIG_CPU_SA1100=y
-CONFIG_CPU_32v4=y
-CONFIG_CPU_ABRT_EV4=y
-CONFIG_CPU_CACHE_V4WB=y
-CONFIG_CPU_CACHE_VIVT=y
-CONFIG_CPU_TLB_V4WB=y
-CONFIG_CPU_CP15=y
-CONFIG_CPU_CP15_MMU=y
-
-#
-# Processor Features
-#
-# CONFIG_CPU_ICACHE_DISABLE is not set
-# CONFIG_CPU_DCACHE_DISABLE is not set
-# CONFIG_OUTER_CACHE is not set
-
-#
-# Bus support
-#
-CONFIG_ISA=y
-# CONFIG_PCI_SYSCALL is not set
-# CONFIG_ARCH_SUPPORTS_MSI is not set
-CONFIG_PCCARD=y
-# CONFIG_PCMCIA_DEBUG is not set
-CONFIG_PCMCIA=y
-CONFIG_PCMCIA_LOAD_CIS=y
-CONFIG_PCMCIA_IOCTL=y
-
-#
-# PC-card bridges
-#
-# CONFIG_I82365 is not set
-# CONFIG_TCIC is not set
-CONFIG_PCMCIA_SA1100=y
-
-#
-# Kernel Features
-#
-# CONFIG_TICK_ONESHOT is not set
-CONFIG_PREEMPT=y
-CONFIG_NO_IDLE_HZ=y
-CONFIG_HZ=100
-# CONFIG_AEABI is not set
-CONFIG_ARCH_DISCONTIGMEM_ENABLE=y
-CONFIG_NODES_SHIFT=2
-CONFIG_SELECT_MEMORY_MODEL=y
-# CONFIG_FLATMEM_MANUAL is not set
-CONFIG_DISCONTIGMEM_MANUAL=y
-# CONFIG_SPARSEMEM_MANUAL is not set
-CONFIG_DISCONTIGMEM=y
-CONFIG_FLAT_NODE_MEM_MAP=y
-CONFIG_NEED_MULTIPLE_NODES=y
-# CONFIG_SPARSEMEM_STATIC is not set
-# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
-CONFIG_SPLIT_PTLOCK_CPUS=4096
-# CONFIG_RESOURCES_64BIT is not set
-CONFIG_ZONE_DMA_FLAG=1
-CONFIG_BOUNCE=y
-CONFIG_VIRT_TO_BUS=y
-CONFIG_LEDS=y
-# CONFIG_LEDS_TIMER is not set
-# CONFIG_LEDS_CPU is not set
-CONFIG_ALIGNMENT_TRAP=y
-
-#
-# Boot options
-#
-CONFIG_ZBOOT_ROM_TEXT=0
-CONFIG_ZBOOT_ROM_BSS=0
-CONFIG_CMDLINE=" debug "
-# CONFIG_XIP_KERNEL is not set
-CONFIG_KEXEC=y
-CONFIG_ATAGS_PROC=y
-
-#
-# CPU Frequency scaling
-#
-# CONFIG_CPU_FREQ is not set
-# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set
-# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
-# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
-# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
-
-#
-# Floating point emulation
-#
-
-#
-# At least one emulation must be selected
-#
-# CONFIG_FPE_NWFPE is not set
-CONFIG_FPE_FASTFPE=y
-
-#
-# Userspace binary formats
-#
-CONFIG_BINFMT_ELF=y
-CONFIG_BINFMT_AOUT=m
-CONFIG_BINFMT_MISC=m
-# CONFIG_ARTHUR is not set
-
-#
-# Power management options
-#
-CONFIG_PM=y
-# CONFIG_PM_LEGACY is not set
-# CONFIG_PM_DEBUG is not set
-CONFIG_PM_SLEEP=y
-CONFIG_SUSPEND_UP_POSSIBLE=y
-CONFIG_SUSPEND=y
-CONFIG_APM_EMULATION=y
-
-#
-# Networking
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=m
-CONFIG_PACKET_MMAP=y
-CONFIG_UNIX=y
-CONFIG_XFRM=y
-CONFIG_XFRM_USER=m
-# CONFIG_XFRM_SUB_POLICY is not set
-CONFIG_XFRM_MIGRATE=y
-CONFIG_NET_KEY=m
-CONFIG_NET_KEY_MIGRATE=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_ADVANCED_ROUTER=y
-CONFIG_ASK_IP_FIB_HASH=y
-# CONFIG_IP_FIB_TRIE is not set
-CONFIG_IP_FIB_HASH=y
-CONFIG_IP_MULTIPLE_TABLES=y
-CONFIG_IP_ROUTE_MULTIPATH=y
-CONFIG_IP_ROUTE_VERBOSE=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_IP_PNP_BOOTP=y
-CONFIG_IP_PNP_RARP=y
-CONFIG_NET_IPIP=m
-CONFIG_NET_IPGRE=m
-CONFIG_NET_IPGRE_BROADCAST=y
-CONFIG_IP_MROUTE=y
-CONFIG_IP_PIMSM_V1=y
-CONFIG_IP_PIMSM_V2=y
-# CONFIG_ARPD is not set
-CONFIG_SYN_COOKIES=y
-CONFIG_INET_AH=m
-CONFIG_INET_ESP=m
-CONFIG_INET_IPCOMP=m
-CONFIG_INET_XFRM_TUNNEL=m
-CONFIG_INET_TUNNEL=m
-CONFIG_INET_XFRM_MODE_TRANSPORT=m
-CONFIG_INET_XFRM_MODE_TUNNEL=m
-CONFIG_INET_XFRM_MODE_BEET=m
-CONFIG_INET_LRO=m
-CONFIG_INET_DIAG=y
-CONFIG_INET_TCP_DIAG=y
-CONFIG_TCP_CONG_ADVANCED=y
-CONFIG_TCP_CONG_BIC=m
-CONFIG_TCP_CONG_CUBIC=y
-CONFIG_TCP_CONG_WESTWOOD=m
-CONFIG_TCP_CONG_HTCP=m
-CONFIG_TCP_CONG_HSTCP=m
-CONFIG_TCP_CONG_HYBLA=m
-CONFIG_TCP_CONG_VEGAS=m
-CONFIG_TCP_CONG_SCALABLE=m
-CONFIG_TCP_CONG_LP=m
-CONFIG_TCP_CONG_VENO=m
-CONFIG_TCP_CONG_YEAH=m
-CONFIG_TCP_CONG_ILLINOIS=m
-# CONFIG_DEFAULT_BIC is not set
-CONFIG_DEFAULT_CUBIC=y
-# CONFIG_DEFAULT_HTCP is not set
-# CONFIG_DEFAULT_VEGAS is not set
-# CONFIG_DEFAULT_WESTWOOD is not set
-# CONFIG_DEFAULT_RENO is not set
-CONFIG_DEFAULT_TCP_CONG="cubic"
-CONFIG_TCP_MD5SIG=y
-CONFIG_IP_VS=m
-# CONFIG_IP_VS_DEBUG is not set
-CONFIG_IP_VS_TAB_BITS=12
-
-#
-# IPVS transport protocol load balancing support
-#
-CONFIG_IP_VS_PROTO_TCP=y
-CONFIG_IP_VS_PROTO_UDP=y
-CONFIG_IP_VS_PROTO_ESP=y
-CONFIG_IP_VS_PROTO_AH=y
-
-#
-# IPVS scheduler
-#
-CONFIG_IP_VS_RR=m
-CONFIG_IP_VS_WRR=m
-CONFIG_IP_VS_LC=m
-CONFIG_IP_VS_WLC=m
-CONFIG_IP_VS_LBLC=m
-CONFIG_IP_VS_LBLCR=m
-CONFIG_IP_VS_DH=m
-CONFIG_IP_VS_SH=m
-CONFIG_IP_VS_SED=m
-CONFIG_IP_VS_NQ=m
-
-#
-# IPVS application helper
-#
-CONFIG_IP_VS_FTP=m
-CONFIG_IPV6=m
-CONFIG_IPV6_PRIVACY=y
-# CONFIG_IPV6_ROUTER_PREF is not set
-CONFIG_IPV6_OPTIMISTIC_DAD=y
-CONFIG_INET6_AH=m
-CONFIG_INET6_ESP=m
-CONFIG_INET6_IPCOMP=m
-# CONFIG_IPV6_MIP6 is not set
-CONFIG_INET6_XFRM_TUNNEL=m
-CONFIG_INET6_TUNNEL=m
-CONFIG_INET6_XFRM_MODE_TRANSPORT=m
-CONFIG_INET6_XFRM_MODE_TUNNEL=m
-CONFIG_INET6_XFRM_MODE_BEET=m
-CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m
-CONFIG_IPV6_SIT=m
-CONFIG_IPV6_TUNNEL=m
-# CONFIG_IPV6_MULTIPLE_TABLES is not set
-CONFIG_NETWORK_SECMARK=y
-CONFIG_NETFILTER=y
-# CONFIG_NETFILTER_DEBUG is not set
-CONFIG_BRIDGE_NETFILTER=y
-
-#
-# Core Netfilter Configuration
-#
-CONFIG_NETFILTER_NETLINK=m
-CONFIG_NETFILTER_NETLINK_QUEUE=m
-CONFIG_NETFILTER_NETLINK_LOG=m
-CONFIG_NF_CONNTRACK_ENABLED=m
-CONFIG_NF_CONNTRACK=m
-CONFIG_NF_CT_ACCT=y
-CONFIG_NF_CONNTRACK_MARK=y
-CONFIG_NF_CONNTRACK_SECMARK=y
-CONFIG_NF_CONNTRACK_EVENTS=y
-CONFIG_NF_CT_PROTO_GRE=m
-CONFIG_NF_CT_PROTO_SCTP=m
-CONFIG_NF_CT_PROTO_UDPLITE=m
-CONFIG_NF_CONNTRACK_AMANDA=m
-CONFIG_NF_CONNTRACK_FTP=m
-CONFIG_NF_CONNTRACK_H323=m
-CONFIG_NF_CONNTRACK_IRC=m
-CONFIG_NF_CONNTRACK_NETBIOS_NS=m
-CONFIG_NF_CONNTRACK_PPTP=m
-CONFIG_NF_CONNTRACK_SANE=m
-CONFIG_NF_CONNTRACK_SIP=m
-CONFIG_NF_CONNTRACK_TFTP=m
-CONFIG_NF_CT_NETLINK=m
-CONFIG_NETFILTER_XTABLES=m
-CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
-CONFIG_NETFILTER_XT_TARGET_CONNMARK=m
-CONFIG_NETFILTER_XT_TARGET_DSCP=m
-CONFIG_NETFILTER_XT_TARGET_MARK=m
-CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
-CONFIG_NETFILTER_XT_TARGET_NFLOG=m
-CONFIG_NETFILTER_XT_TARGET_NOTRACK=m
-CONFIG_NETFILTER_XT_TARGET_TRACE=m
-CONFIG_NETFILTER_XT_TARGET_SECMARK=m
-CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=m
-CONFIG_NETFILTER_XT_TARGET_TCPMSS=m
-CONFIG_NETFILTER_XT_MATCH_COMMENT=m
-CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m
-CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m
-CONFIG_NETFILTER_XT_MATCH_CONNMARK=m
-CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
-CONFIG_NETFILTER_XT_MATCH_DCCP=m
-CONFIG_NETFILTER_XT_MATCH_DSCP=m
-CONFIG_NETFILTER_XT_MATCH_ESP=m
-CONFIG_NETFILTER_XT_MATCH_HELPER=m
-CONFIG_NETFILTER_XT_MATCH_LENGTH=m
-CONFIG_NETFILTER_XT_MATCH_LIMIT=m
-CONFIG_NETFILTER_XT_MATCH_MAC=m
-CONFIG_NETFILTER_XT_MATCH_MARK=m
-CONFIG_NETFILTER_XT_MATCH_POLICY=m
-CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
-CONFIG_NETFILTER_XT_MATCH_PHYSDEV=m
-CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
-CONFIG_NETFILTER_XT_MATCH_QUOTA=m
-CONFIG_NETFILTER_XT_MATCH_REALM=m
-CONFIG_NETFILTER_XT_MATCH_SCTP=m
-CONFIG_NETFILTER_XT_MATCH_STATE=m
-CONFIG_NETFILTER_XT_MATCH_STATISTIC=m
-CONFIG_NETFILTER_XT_MATCH_STRING=m
-CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
-# CONFIG_NETFILTER_XT_MATCH_TIME is not set
-CONFIG_NETFILTER_XT_MATCH_U32=m
-CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m
-
-#
-# IP: Netfilter Configuration
-#
-CONFIG_NF_CONNTRACK_IPV4=m
-CONFIG_NF_CONNTRACK_PROC_COMPAT=y
-CONFIG_IP_NF_QUEUE=m
-CONFIG_IP_NF_IPTABLES=m
-CONFIG_IP_NF_MATCH_IPRANGE=m
-CONFIG_IP_NF_MATCH_TOS=m
-CONFIG_IP_NF_MATCH_RECENT=m
-CONFIG_IP_NF_MATCH_ECN=m
-CONFIG_IP_NF_MATCH_AH=m
-CONFIG_IP_NF_MATCH_TTL=m
-CONFIG_IP_NF_MATCH_OWNER=m
-CONFIG_IP_NF_MATCH_ADDRTYPE=m
-CONFIG_IP_NF_FILTER=m
-CONFIG_IP_NF_TARGET_REJECT=m
-CONFIG_IP_NF_TARGET_LOG=m
-CONFIG_IP_NF_TARGET_ULOG=m
-CONFIG_NF_NAT=m
-CONFIG_NF_NAT_NEEDED=y
-CONFIG_IP_NF_TARGET_MASQUERADE=m
-CONFIG_IP_NF_TARGET_REDIRECT=m
-CONFIG_IP_NF_TARGET_NETMAP=m
-CONFIG_IP_NF_TARGET_SAME=m
-CONFIG_NF_NAT_SNMP_BASIC=m
-CONFIG_NF_NAT_PROTO_GRE=m
-CONFIG_NF_NAT_FTP=m
-CONFIG_NF_NAT_IRC=m
-CONFIG_NF_NAT_TFTP=m
-CONFIG_NF_NAT_AMANDA=m
-CONFIG_NF_NAT_PPTP=m
-CONFIG_NF_NAT_H323=m
-CONFIG_NF_NAT_SIP=m
-CONFIG_IP_NF_MANGLE=m
-CONFIG_IP_NF_TARGET_TOS=m
-CONFIG_IP_NF_TARGET_ECN=m
-CONFIG_IP_NF_TARGET_TTL=m
-CONFIG_IP_NF_TARGET_CLUSTERIP=m
-CONFIG_IP_NF_RAW=m
-CONFIG_IP_NF_ARPTABLES=m
-CONFIG_IP_NF_ARPFILTER=m
-CONFIG_IP_NF_ARP_MANGLE=m
-
-#
-# IPv6: Netfilter Configuration (EXPERIMENTAL)
-#
-CONFIG_NF_CONNTRACK_IPV6=m
-CONFIG_IP6_NF_QUEUE=m
-CONFIG_IP6_NF_IPTABLES=m
-CONFIG_IP6_NF_MATCH_RT=m
-CONFIG_IP6_NF_MATCH_OPTS=m
-CONFIG_IP6_NF_MATCH_FRAG=m
-CONFIG_IP6_NF_MATCH_HL=m
-CONFIG_IP6_NF_MATCH_OWNER=m
-CONFIG_IP6_NF_MATCH_IPV6HEADER=m
-CONFIG_IP6_NF_MATCH_AH=m
-CONFIG_IP6_NF_MATCH_MH=m
-CONFIG_IP6_NF_MATCH_EUI64=m
-CONFIG_IP6_NF_FILTER=m
-CONFIG_IP6_NF_TARGET_LOG=m
-CONFIG_IP6_NF_TARGET_REJECT=m
-CONFIG_IP6_NF_MANGLE=m
-CONFIG_IP6_NF_TARGET_HL=m
-CONFIG_IP6_NF_RAW=m
-
-#
-# DECnet: Netfilter Configuration
-#
-CONFIG_DECNET_NF_GRABULATOR=m
-
-#
-# Bridge: Netfilter Configuration
-#
-CONFIG_BRIDGE_NF_EBTABLES=m
-CONFIG_BRIDGE_EBT_BROUTE=m
-CONFIG_BRIDGE_EBT_T_FILTER=m
-CONFIG_BRIDGE_EBT_T_NAT=m
-CONFIG_BRIDGE_EBT_802_3=m
-CONFIG_BRIDGE_EBT_AMONG=m
-CONFIG_BRIDGE_EBT_ARP=m
-CONFIG_BRIDGE_EBT_IP=m
-CONFIG_BRIDGE_EBT_LIMIT=m
-CONFIG_BRIDGE_EBT_MARK=m
-CONFIG_BRIDGE_EBT_PKTTYPE=m
-CONFIG_BRIDGE_EBT_STP=m
-CONFIG_BRIDGE_EBT_VLAN=m
-CONFIG_BRIDGE_EBT_ARPREPLY=m
-CONFIG_BRIDGE_EBT_DNAT=m
-CONFIG_BRIDGE_EBT_MARK_T=m
-CONFIG_BRIDGE_EBT_REDIRECT=m
-CONFIG_BRIDGE_EBT_SNAT=m
-CONFIG_BRIDGE_EBT_LOG=m
-CONFIG_BRIDGE_EBT_ULOG=m
-CONFIG_IP_DCCP=m
-CONFIG_INET_DCCP_DIAG=m
-CONFIG_IP_DCCP_ACKVEC=y
-
-#
-# DCCP CCIDs Configuration (EXPERIMENTAL)
-#
-CONFIG_IP_DCCP_CCID2=m
-# CONFIG_IP_DCCP_CCID2_DEBUG is not set
-CONFIG_IP_DCCP_CCID3=m
-CONFIG_IP_DCCP_TFRC_LIB=m
-# CONFIG_IP_DCCP_CCID3_DEBUG is not set
-CONFIG_IP_DCCP_CCID3_RTO=100
-
-#
-# DCCP Kernel Hacking
-#
-# CONFIG_IP_DCCP_DEBUG is not set
-CONFIG_IP_SCTP=m
-# CONFIG_SCTP_DBG_MSG is not set
-# CONFIG_SCTP_DBG_OBJCNT is not set
-# CONFIG_SCTP_HMAC_NONE is not set
-# CONFIG_SCTP_HMAC_SHA1 is not set
-CONFIG_SCTP_HMAC_MD5=y
-CONFIG_TIPC=m
-# CONFIG_TIPC_ADVANCED is not set
-# CONFIG_TIPC_DEBUG is not set
-CONFIG_ATM=y
-CONFIG_ATM_CLIP=y
-# CONFIG_ATM_CLIP_NO_ICMP is not set
-CONFIG_ATM_LANE=m
-CONFIG_ATM_MPOA=m
-CONFIG_ATM_BR2684=m
-# CONFIG_ATM_BR2684_IPFILTER is not set
-CONFIG_BRIDGE=m
-CONFIG_VLAN_8021Q=m
-CONFIG_DECNET=m
-# CONFIG_DECNET_ROUTER is not set
-CONFIG_LLC=m
-CONFIG_LLC2=m
-CONFIG_IPX=m
-# CONFIG_IPX_INTERN is not set
-CONFIG_ATALK=m
-CONFIG_DEV_APPLETALK=m
-# CONFIG_COPS is not set
-CONFIG_IPDDP=m
-CONFIG_IPDDP_ENCAP=y
-CONFIG_IPDDP_DECAP=y
-CONFIG_X25=m
-CONFIG_LAPB=m
-CONFIG_ECONET=m
-CONFIG_ECONET_AUNUDP=y
-CONFIG_ECONET_NATIVE=y
-CONFIG_WAN_ROUTER=m
-CONFIG_NET_SCHED=y
-
-#
-# Queueing/Scheduling
-#
-CONFIG_NET_SCH_CBQ=m
-CONFIG_NET_SCH_HTB=m
-CONFIG_NET_SCH_HFSC=m
-CONFIG_NET_SCH_ATM=m
-CONFIG_NET_SCH_PRIO=m
-CONFIG_NET_SCH_RR=m
-CONFIG_NET_SCH_RED=m
-CONFIG_NET_SCH_SFQ=m
-CONFIG_NET_SCH_TEQL=m
-CONFIG_NET_SCH_TBF=m
-CONFIG_NET_SCH_GRED=m
-CONFIG_NET_SCH_DSMARK=m
-CONFIG_NET_SCH_NETEM=m
-CONFIG_NET_SCH_INGRESS=m
-
-#
-# Classification
-#
-CONFIG_NET_CLS=y
-CONFIG_NET_CLS_BASIC=m
-CONFIG_NET_CLS_TCINDEX=m
-CONFIG_NET_CLS_ROUTE4=m
-CONFIG_NET_CLS_ROUTE=y
-CONFIG_NET_CLS_FW=m
-CONFIG_NET_CLS_U32=m
-# CONFIG_CLS_U32_PERF is not set
-CONFIG_CLS_U32_MARK=y
-CONFIG_NET_CLS_RSVP=m
-CONFIG_NET_CLS_RSVP6=m
-CONFIG_NET_EMATCH=y
-CONFIG_NET_EMATCH_STACK=32
-CONFIG_NET_EMATCH_CMP=m
-CONFIG_NET_EMATCH_NBYTE=m
-CONFIG_NET_EMATCH_U32=m
-CONFIG_NET_EMATCH_META=m
-CONFIG_NET_EMATCH_TEXT=m
-CONFIG_NET_CLS_ACT=y
-CONFIG_NET_ACT_POLICE=y
-CONFIG_NET_ACT_GACT=m
-CONFIG_GACT_PROB=y
-CONFIG_NET_ACT_MIRRED=m
-CONFIG_NET_ACT_IPT=m
-# CONFIG_NET_ACT_NAT is not set
-CONFIG_NET_ACT_PEDIT=m
-CONFIG_NET_ACT_SIMP=m
-CONFIG_NET_CLS_POLICE=y
-# CONFIG_NET_CLS_IND is not set
-CONFIG_NET_SCH_FIFO=y
-
-#
-# Network testing
-#
-CONFIG_NET_PKTGEN=m
-# CONFIG_HAMRADIO is not set
-CONFIG_IRDA=m
-
-#
-# IrDA protocols
-#
-CONFIG_IRLAN=m
-CONFIG_IRNET=m
-CONFIG_IRCOMM=m
-CONFIG_IRDA_ULTRA=y
-
-#
-# IrDA options
-#
-CONFIG_IRDA_CACHE_LAST_LSAP=y
-CONFIG_IRDA_FAST_RR=y
-CONFIG_IRDA_DEBUG=y
-
-#
-# Infrared-port device drivers
-#
-
-#
-# SIR device drivers
-#
-CONFIG_IRTTY_SIR=m
-
-#
-# Dongle support
-#
-# CONFIG_DONGLE is not set
-# CONFIG_KINGSUN_DONGLE is not set
-# CONFIG_KSDAZZLE_DONGLE is not set
-# CONFIG_KS959_DONGLE is not set
-
-#
-# Old SIR device drivers
-#
-CONFIG_IRPORT_SIR=m
-
-#
-# Old Serial dongle support
-#
-# CONFIG_DONGLE_OLD is not set
-
-#
-# FIR device drivers
-#
-# CONFIG_USB_IRDA is not set
-# CONFIG_SIGMATEL_FIR is not set
-CONFIG_SA1100_FIR=m
-# CONFIG_MCS_FIR is not set
-# CONFIG_BT is not set
-# CONFIG_AF_RXRPC is not set
-CONFIG_FIB_RULES=y
-
-#
-# Wireless
-#
-CONFIG_CFG80211=m
-CONFIG_NL80211=y
-CONFIG_WIRELESS_EXT=y
-CONFIG_MAC80211=m
-CONFIG_MAC80211_RCSIMPLE=y
-# CONFIG_MAC80211_DEBUGFS is not set
-# CONFIG_MAC80211_DEBUG is not set
-CONFIG_IEEE80211=m
-# CONFIG_IEEE80211_DEBUG is not set
-CONFIG_IEEE80211_CRYPT_WEP=m
-CONFIG_IEEE80211_CRYPT_CCMP=m
-CONFIG_IEEE80211_CRYPT_TKIP=m
-CONFIG_IEEE80211_SOFTMAC=m
-# CONFIG_IEEE80211_SOFTMAC_DEBUG is not set
-CONFIG_RFKILL=m
-CONFIG_RFKILL_INPUT=m
-# CONFIG_NET_9P is not set
-
-#
-# Device Drivers
-#
-
-#
-# Generic Driver Options
-#
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_STANDALONE=y
-CONFIG_PREVENT_FIRMWARE_BUILD=y
-CONFIG_FW_LOADER=y
-CONFIG_DEBUG_DRIVER=y
-CONFIG_DEBUG_DEVRES=y
-# CONFIG_SYS_HYPERVISOR is not set
-CONFIG_CONNECTOR=m
-CONFIG_MTD=y
-# CONFIG_MTD_DEBUG is not set
-CONFIG_MTD_CONCAT=y
-CONFIG_MTD_PARTITIONS=y
-CONFIG_MTD_REDBOOT_PARTS=y
-CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=2
-# CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED is not set
-CONFIG_MTD_REDBOOT_PARTS_READONLY=y
-CONFIG_MTD_CMDLINE_PARTS=y
-# CONFIG_MTD_AFS_PARTS is not set
-
-#
-# User Modules And Translation Layers
-#
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLKDEVS=y
-CONFIG_MTD_BLOCK=y
-# CONFIG_FTL is not set
-# CONFIG_NFTL is not set
-# CONFIG_INFTL is not set
-# CONFIG_RFD_FTL is not set
-# CONFIG_SSFDC is not set
-# CONFIG_MTD_OOPS is not set
-
-#
-# RAM/ROM/Flash chip drivers
-#
-CONFIG_MTD_CFI=y
-CONFIG_MTD_JEDECPROBE=y
-CONFIG_MTD_GEN_PROBE=y
-CONFIG_MTD_CFI_ADV_OPTIONS=y
-CONFIG_MTD_CFI_NOSWAP=y
-# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
-# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
-CONFIG_MTD_CFI_GEOMETRY=y
-CONFIG_MTD_MAP_BANK_WIDTH_1=y
-CONFIG_MTD_MAP_BANK_WIDTH_2=y
-CONFIG_MTD_MAP_BANK_WIDTH_4=y
-# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
-# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
-# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
-CONFIG_MTD_CFI_I1=y
-# CONFIG_MTD_CFI_I2 is not set
-# CONFIG_MTD_CFI_I4 is not set
-# CONFIG_MTD_CFI_I8 is not set
-# CONFIG_MTD_OTP is not set
-CONFIG_MTD_CFI_INTELEXT=y
-# CONFIG_MTD_CFI_AMDSTD is not set
-# CONFIG_MTD_CFI_STAA is not set
-CONFIG_MTD_CFI_UTIL=y
-CONFIG_MTD_RAM=y
-CONFIG_MTD_ROM=m
-CONFIG_MTD_ABSENT=m
-CONFIG_MTD_XIP=y
-
-#
-# Mapping drivers for chip access
-#
-# CONFIG_MTD_COMPLEX_MAPPINGS is not set
-# CONFIG_MTD_PHYSMAP is not set
-# CONFIG_MTD_ARM_INTEGRATOR is not set
-CONFIG_MTD_SA1100=y
-# CONFIG_MTD_IMPA7 is not set
-CONFIG_MTD_PLATRAM=m
-
-#
-# Self-contained MTD device drivers
-#
-# CONFIG_MTD_SLRAM is not set
-# CONFIG_MTD_PHRAM is not set
-# CONFIG_MTD_MTDRAM is not set
-CONFIG_MTD_BLOCK2MTD=m
-
-#
-# Disk-On-Chip Device Drivers
-#
-# CONFIG_MTD_DOC2000 is not set
-# CONFIG_MTD_DOC2001 is not set
-# CONFIG_MTD_DOC2001PLUS is not set
-# CONFIG_MTD_NAND is not set
-# CONFIG_MTD_ONENAND is not set
-
-#
-# UBI - Unsorted block images
-#
-# CONFIG_MTD_UBI is not set
-# CONFIG_PARPORT is not set
-# CONFIG_PNP is not set
-CONFIG_BLK_DEV=y
-# CONFIG_BLK_DEV_COW_COMMON is not set
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_CRYPTOLOOP=m
-CONFIG_BLK_DEV_NBD=m
-# CONFIG_BLK_DEV_UB is not set
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_COUNT=16
-CONFIG_BLK_DEV_RAM_SIZE=4096
-CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
-# CONFIG_CDROM_PKTCDVD is not set
-# CONFIG_ATA_OVER_ETH is not set
-# CONFIG_MISC_DEVICES is not set
-CONFIG_IDE=y
-CONFIG_IDE_MAX_HWIFS=4
-CONFIG_BLK_DEV_IDE=y
-
-#
-# Please see Documentation/ide.txt for help/info on IDE drives
-#
-# CONFIG_BLK_DEV_IDE_SATA is not set
-CONFIG_BLK_DEV_IDEDISK=y
-CONFIG_IDEDISK_MULTI_MODE=y
-CONFIG_BLK_DEV_IDECS=y
-# CONFIG_BLK_DEV_IDECD is not set
-# CONFIG_BLK_DEV_IDETAPE is not set
-# CONFIG_BLK_DEV_IDEFLOPPY is not set
-CONFIG_IDE_TASK_IOCTL=y
-CONFIG_IDE_PROC_FS=y
-
-#
-# IDE chipset support/bugfixes
-#
-CONFIG_IDE_GENERIC=y
-CONFIG_BLK_DEV_PLATFORM=y
-# CONFIG_IDE_ARM is not set
-
-#
-# Other IDE chipsets support
-#
-
-#
-# Note: most of these also require special kernel boot parameters
-#
-# CONFIG_BLK_DEV_4DRIVES is not set
-# CONFIG_BLK_DEV_ALI14XX is not set
-# CONFIG_BLK_DEV_DTC2278 is not set
-# CONFIG_BLK_DEV_HT6560B is not set
-# CONFIG_BLK_DEV_QD65XX is not set
-# CONFIG_BLK_DEV_UMC8672 is not set
-# CONFIG_BLK_DEV_IDEDMA is not set
-CONFIG_IDE_ARCH_OBSOLETE_INIT=y
-# CONFIG_BLK_DEV_HD is not set
-
-#
-# SCSI device support
-#
-# CONFIG_RAID_ATTRS is not set
-# CONFIG_SCSI is not set
-# CONFIG_SCSI_DMA is not set
-# CONFIG_SCSI_NETLINK is not set
-# CONFIG_ATA is not set
-# CONFIG_MD is not set
-CONFIG_NETDEVICES=y
-# CONFIG_NETDEVICES_MULTIQUEUE is not set
-CONFIG_IFB=m
-CONFIG_DUMMY=m
-CONFIG_BONDING=m
-CONFIG_MACVLAN=m
-CONFIG_EQUALIZER=m
-CONFIG_TUN=m
-# CONFIG_VETH is not set
-# CONFIG_ARCNET is not set
-# CONFIG_NET_ETHERNET is not set
-CONFIG_MII=m
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_10000 is not set
-# CONFIG_TR is not set
-
-#
-# Wireless LAN
-#
-CONFIG_WLAN_PRE80211=y
-# CONFIG_STRIP is not set
-# CONFIG_ARLAN is not set
-# CONFIG_WAVELAN is not set
-# CONFIG_PCMCIA_WAVELAN is not set
-# CONFIG_PCMCIA_NETWAVE is not set
-CONFIG_WLAN_80211=y
-CONFIG_PCMCIA_RAYCS=m
-CONFIG_LIBERTAS=m
-# CONFIG_LIBERTAS_USB is not set
-CONFIG_LIBERTAS_CS=m
-# CONFIG_LIBERTAS_DEBUG is not set
-CONFIG_HERMES=m
-CONFIG_PCMCIA_HERMES=m
-CONFIG_PCMCIA_SPECTRUM=m
-CONFIG_ATMEL=m
-CONFIG_PCMCIA_ATMEL=m
-CONFIG_AIRO_CS=m
-CONFIG_PCMCIA_WL3501=m
-# CONFIG_USB_ZD1201 is not set
-# CONFIG_RTL8187 is not set
-CONFIG_P54_COMMON=m
-# CONFIG_P54_USB is not set
-CONFIG_HOSTAP=m
-CONFIG_HOSTAP_FIRMWARE=y
-CONFIG_HOSTAP_FIRMWARE_NVRAM=y
-CONFIG_HOSTAP_CS=m
-CONFIG_B43=m
-CONFIG_B43_PCMCIA=y
-CONFIG_B43_RFKILL=y
-# CONFIG_B43_DEBUG is not set
-CONFIG_B43_DMA=y
-CONFIG_B43_PIO=y
-CONFIG_B43_DMA_AND_PIO_MODE=y
-# CONFIG_B43_DMA_MODE is not set
-# CONFIG_B43_PIO_MODE is not set
-CONFIG_B43LEGACY=m
-# CONFIG_B43LEGACY_DEBUG is not set
-CONFIG_B43LEGACY_DMA=y
-CONFIG_B43LEGACY_PIO=y
-CONFIG_B43LEGACY_DMA_AND_PIO_MODE=y
-# CONFIG_B43LEGACY_DMA_MODE is not set
-# CONFIG_B43LEGACY_PIO_MODE is not set
-# CONFIG_ZD1211RW is not set
-CONFIG_RT2X00=m
-# CONFIG_RT2500USB is not set
-# CONFIG_RT73USB is not set
-
-#
-# USB Network Adapters
-#
-# CONFIG_USB_CATC is not set
-# CONFIG_USB_KAWETH is not set
-# CONFIG_USB_PEGASUS is not set
-# CONFIG_USB_RTL8150 is not set
-# CONFIG_USB_USBNET is not set
-CONFIG_NET_PCMCIA=y
-CONFIG_PCMCIA_3C589=m
-CONFIG_PCMCIA_3C574=m
-CONFIG_PCMCIA_FMVJ18X=m
-CONFIG_PCMCIA_PCNET=m
-CONFIG_PCMCIA_NMCLAN=m
-CONFIG_PCMCIA_SMC91C92=m
-CONFIG_PCMCIA_XIRC2PS=m
-CONFIG_PCMCIA_AXNET=m
-# CONFIG_WAN is not set
-# CONFIG_ATM_DRIVERS is not set
-CONFIG_PPP=m
-CONFIG_PPP_MULTILINK=y
-CONFIG_PPP_FILTER=y
-CONFIG_PPP_ASYNC=m
-CONFIG_PPP_SYNC_TTY=m
-CONFIG_PPP_DEFLATE=m
-CONFIG_PPP_BSDCOMP=m
-CONFIG_PPP_MPPE=m
-CONFIG_PPPOE=m
-CONFIG_PPPOATM=m
-CONFIG_PPPOL2TP=m
-CONFIG_SLIP=m
-CONFIG_SLIP_COMPRESSED=y
-CONFIG_SLHC=m
-CONFIG_SLIP_SMART=y
-CONFIG_SLIP_MODE_SLIP6=y
-CONFIG_SHAPER=m
-CONFIG_NETCONSOLE=m
-# CONFIG_NETCONSOLE_DYNAMIC is not set
-CONFIG_NETPOLL=y
-# CONFIG_NETPOLL_TRAP is not set
-CONFIG_NET_POLL_CONTROLLER=y
-# CONFIG_ISDN is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-# CONFIG_INPUT_FF_MEMLESS is not set
-CONFIG_INPUT_POLLDEV=m
-
-#
-# Userland interfaces
-#
-CONFIG_INPUT_MOUSEDEV=y
-CONFIG_INPUT_MOUSEDEV_PSAUX=y
-CONFIG_INPUT_MOUSEDEV_SCREEN_X=800
-CONFIG_INPUT_MOUSEDEV_SCREEN_Y=600
-# CONFIG_INPUT_JOYDEV is not set
-CONFIG_INPUT_EVDEV=y
-CONFIG_INPUT_EVBUG=m
-
-#
-# Input Device Drivers
-#
-CONFIG_INPUT_KEYBOARD=y
-CONFIG_KEYBOARD_ATKBD=m
-CONFIG_KEYBOARD_SUNKBD=m
-CONFIG_KEYBOARD_LKKBD=m
-CONFIG_KEYBOARD_XTKBD=m
-CONFIG_KEYBOARD_NEWTON=m
-CONFIG_KEYBOARD_STOWAWAY=m
-CONFIG_KEYBOARD_GPIO=y
-CONFIG_INPUT_MOUSE=y
-CONFIG_MOUSE_PS2=m
-CONFIG_MOUSE_PS2_ALPS=y
-CONFIG_MOUSE_PS2_LOGIPS2PP=y
-CONFIG_MOUSE_PS2_SYNAPTICS=y
-CONFIG_MOUSE_PS2_LIFEBOOK=y
-CONFIG_MOUSE_PS2_TRACKPOINT=y
-CONFIG_MOUSE_PS2_TOUCHKIT=y
-CONFIG_MOUSE_SERIAL=m
-# CONFIG_MOUSE_APPLETOUCH is not set
-# CONFIG_MOUSE_INPORT is not set
-# CONFIG_MOUSE_LOGIBM is not set
-# CONFIG_MOUSE_PC110PAD is not set
-CONFIG_MOUSE_VSXXXAA=m
-# CONFIG_MOUSE_GPIO is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TABLET is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-CONFIG_INPUT_MISC=y
-# CONFIG_INPUT_ATI_REMOTE is not set
-# CONFIG_INPUT_ATI_REMOTE2 is not set
-# CONFIG_INPUT_KEYSPAN_REMOTE is not set
-# CONFIG_INPUT_POWERMATE is not set
-# CONFIG_INPUT_YEALINK is not set
-CONFIG_INPUT_UINPUT=y
-
-#
-# Hardware I/O ports
-#
-CONFIG_SERIO=y
-CONFIG_SERIO_SERPORT=m
-CONFIG_SERIO_LIBPS2=y
-CONFIG_SERIO_RAW=m
-# CONFIG_GAMEPORT is not set
-
-#
-# Character devices
-#
-CONFIG_VT=y
-CONFIG_VT_CONSOLE=y
-CONFIG_HW_CONSOLE=y
-CONFIG_VT_HW_CONSOLE_BINDING=y
-CONFIG_SERIAL_NONSTANDARD=y
-# CONFIG_COMPUTONE is not set
-# CONFIG_ROCKETPORT is not set
-# CONFIG_CYCLADES is not set
-# CONFIG_DIGIEPCA is not set
-# CONFIG_MOXA_INTELLIO is not set
-# CONFIG_MOXA_SMARTIO is not set
-# CONFIG_MOXA_SMARTIO_NEW is not set
-# CONFIG_N_HDLC is not set
-# CONFIG_RISCOM8 is not set
-# CONFIG_SPECIALIX is not set
-# CONFIG_SX is not set
-# CONFIG_RIO is not set
-# CONFIG_STALDRV is not set
-
-#
-# Serial drivers
-#
-# CONFIG_SERIAL_8250 is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_SA1100=y
-CONFIG_SERIAL_SA1100_CONSOLE=y
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_UNIX98_PTYS=y
-CONFIG_LEGACY_PTYS=y
-CONFIG_LEGACY_PTY_COUNT=256
-CONFIG_IPMI_HANDLER=y
-# CONFIG_IPMI_PANIC_EVENT is not set
-CONFIG_IPMI_DEVICE_INTERFACE=m
-CONFIG_IPMI_SI=m
-CONFIG_IPMI_WATCHDOG=m
-CONFIG_IPMI_POWEROFF=m
-CONFIG_HW_RANDOM=y
-# CONFIG_NVRAM is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-
-#
-# PCMCIA character devices
-#
-# CONFIG_SYNCLINK_CS is not set
-# CONFIG_CARDMAN_4000 is not set
-# CONFIG_CARDMAN_4040 is not set
-CONFIG_RAW_DRIVER=m
-CONFIG_MAX_RAW_DEVS=256
-# CONFIG_TCG_TPM is not set
-CONFIG_DEVPORT=y
-CONFIG_I2C=y
-CONFIG_I2C_BOARDINFO=y
-# CONFIG_I2C_CHARDEV is not set
-
-#
-# I2C Algorithms
-#
-# CONFIG_I2C_ALGOBIT is not set
-# CONFIG_I2C_ALGOPCF is not set
-# CONFIG_I2C_ALGOPCA is not set
-
-#
-# I2C Hardware Bus support
-#
-# CONFIG_I2C_ELEKTOR is not set
-# CONFIG_I2C_GPIO is not set
-# CONFIG_I2C_OCORES is not set
-# CONFIG_I2C_PARPORT_LIGHT is not set
-# CONFIG_I2C_SIMTEC is not set
-# CONFIG_I2C_TAOS_EVM is not set
-# CONFIG_I2C_STUB is not set
-# CONFIG_I2C_TINY_USB is not set
-# CONFIG_I2C_PCA_ISA is not set
-
-#
-# Miscellaneous I2C Chip support
-#
-# CONFIG_SENSORS_DS1337 is not set
-# CONFIG_SENSORS_DS1374 is not set
-# CONFIG_DS1682 is not set
-# CONFIG_SENSORS_EEPROM is not set
-# CONFIG_SENSORS_PCF8574 is not set
-# CONFIG_SENSORS_PCA9539 is not set
-# CONFIG_SENSORS_PCF8591 is not set
-# CONFIG_SENSORS_MAX6875 is not set
-# CONFIG_SENSORS_TSL2550 is not set
-# CONFIG_I2C_DEBUG_CORE is not set
-# CONFIG_I2C_DEBUG_ALGO is not set
-# CONFIG_I2C_DEBUG_BUS is not set
-# CONFIG_I2C_DEBUG_CHIP is not set
-
-#
-# SPI support
-#
-# CONFIG_SPI is not set
-# CONFIG_SPI_MASTER is not set
-# CONFIG_W1 is not set
-# CONFIG_POWER_SUPPLY is not set
-# CONFIG_HWMON is not set
-CONFIG_WATCHDOG=y
-# CONFIG_WATCHDOG_NOWAYOUT is not set
-
-#
-# Watchdog Device Drivers
-#
-# CONFIG_SOFT_WATCHDOG is not set
-CONFIG_SA1100_WATCHDOG=y
-
-#
-# ISA-based Watchdog Cards
-#
-# CONFIG_PCWATCHDOG is not set
-# CONFIG_MIXCOMWD is not set
-# CONFIG_WDT is not set
-
-#
-# USB-based Watchdog Cards
-#
-# CONFIG_USBPCWATCHDOG is not set
-
-#
-# Sonics Silicon Backplane
-#
-CONFIG_SSB_POSSIBLE=y
-CONFIG_SSB=m
-CONFIG_SSB_PCMCIAHOST_POSSIBLE=y
-CONFIG_SSB_PCMCIAHOST=y
-# CONFIG_SSB_SILENT is not set
-# CONFIG_SSB_DEBUG is not set
-
-#
-# Multifunction device drivers
-#
-# CONFIG_MFD_SM501 is not set
-
-#
-# Multimedia Capabilities Port drivers
-#
-CONFIG_MCP=y
-CONFIG_MCP_SA11X0=y
-CONFIG_MCP_UCB1200=y
-CONFIG_MCP_UCB1200_TS=y
-CONFIG_MCP_UCB1200_SWITCHES=y
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-# CONFIG_DVB_CORE is not set
-# CONFIG_DAB is not set
-
-#
-# Graphics support
-#
-# CONFIG_VGASTATE is not set
-CONFIG_VIDEO_OUTPUT_CONTROL=y
-CONFIG_FB=y
-# CONFIG_FIRMWARE_EDID is not set
-# CONFIG_FB_DDC is not set
-CONFIG_FB_CFB_FILLRECT=y
-CONFIG_FB_CFB_COPYAREA=y
-CONFIG_FB_CFB_IMAGEBLIT=y
-# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
-# CONFIG_FB_SYS_FILLRECT is not set
-# CONFIG_FB_SYS_COPYAREA is not set
-# CONFIG_FB_SYS_IMAGEBLIT is not set
-# CONFIG_FB_SYS_FOPS is not set
-CONFIG_FB_DEFERRED_IO=y
-# CONFIG_FB_SVGALIB is not set
-# CONFIG_FB_MACMODES is not set
-# CONFIG_FB_BACKLIGHT is not set
-# CONFIG_FB_MODE_HELPERS is not set
-# CONFIG_FB_TILEBLITTING is not set
-
-#
-# Frambuffer hardware drivers
-#
-# CONFIG_FB_SA1100 is not set
-# CONFIG_FB_UVESA is not set
-# CONFIG_FB_S1D13XXX is not set
-CONFIG_FB_MQ200=y
-# CONFIG_FB_VIRTUAL is not set
-CONFIG_BACKLIGHT_LCD_SUPPORT=y
-CONFIG_LCD_CLASS_DEVICE=y
-CONFIG_BACKLIGHT_CLASS_DEVICE=y
-# CONFIG_BACKLIGHT_CORGI is not set
-CONFIG_BACKLIGHT_SIMPAD=y
-CONFIG_LCD_SIMPAD=y
-
-#
-# Display device support
-#
-# CONFIG_DISPLAY_SUPPORT is not set
-
-#
-# Console display driver support
-#
-# CONFIG_VGA_CONSOLE is not set
-# CONFIG_MDA_CONSOLE is not set
-CONFIG_DUMMY_CONSOLE=y
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
-CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y
-CONFIG_FONTS=y
-CONFIG_FONT_8x8=y
-CONFIG_FONT_8x16=y
-# CONFIG_FONT_6x11 is not set
-# CONFIG_FONT_7x14 is not set
-CONFIG_FONT_PEARL_8x8=y
-CONFIG_FONT_ACORN_8x8=y
-CONFIG_FONT_MINI_4x6=y
-CONFIG_FONT_SUN8x16=y
-# CONFIG_FONT_SUN12x22 is not set
-# CONFIG_FONT_10x18 is not set
-CONFIG_LOGO=y
-CONFIG_LOGO_LINUX_MONO=y
-CONFIG_LOGO_LINUX_VGA16=y
-CONFIG_LOGO_LINUX_CLUT224=y
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-# CONFIG_HID_SUPPORT is not set
-CONFIG_USB_SUPPORT=y
-CONFIG_USB_ARCH_HAS_HCD=y
-# CONFIG_USB_ARCH_HAS_OHCI is not set
-# CONFIG_USB_ARCH_HAS_EHCI is not set
-CONFIG_USB=m
-# CONFIG_USB_DEBUG is not set
-
-#
-# Miscellaneous USB options
-#
-# CONFIG_USB_DEVICEFS is not set
-CONFIG_USB_DEVICE_CLASS=y
-# CONFIG_USB_DYNAMIC_MINORS is not set
-# CONFIG_USB_SUSPEND is not set
-# CONFIG_USB_PERSIST is not set
-# CONFIG_USB_OTG is not set
-
-#
-# USB Host Controller Drivers
-#
-# CONFIG_USB_ISP116X_HCD is not set
-CONFIG_USB_SL811_HCD=m
-# CONFIG_USB_SL811_CS is not set
-# CONFIG_USB_R8A66597_HCD is not set
-
-#
-# USB Device Class drivers
-#
-# CONFIG_USB_ACM is not set
-# CONFIG_USB_PRINTER is not set
-
-#
-# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
-#
-
-#
-# may also be needed; see USB_STORAGE Help for more information
-#
-# CONFIG_USB_LIBUSUAL is not set
-
-#
-# USB Imaging devices
-#
-# CONFIG_USB_MDC800 is not set
-CONFIG_USB_MON=y
-
-#
-# USB port drivers
-#
-
-#
-# USB Serial Converter support
-#
-# CONFIG_USB_SERIAL is not set
-
-#
-# USB Miscellaneous drivers
-#
-# CONFIG_USB_EMI62 is not set
-# CONFIG_USB_EMI26 is not set
-# CONFIG_USB_ADUTUX is not set
-# CONFIG_USB_AUERSWALD is not set
-# CONFIG_USB_RIO500 is not set
-# CONFIG_USB_LEGOTOWER is not set
-# CONFIG_USB_LCD is not set
-# CONFIG_USB_BERRY_CHARGE is not set
-# CONFIG_USB_LED is not set
-# CONFIG_USB_CYPRESS_CY7C63 is not set
-# CONFIG_USB_CYTHERM is not set
-# CONFIG_USB_PHIDGET is not set
-# CONFIG_USB_IDMOUSE is not set
-# CONFIG_USB_FTDI_ELAN is not set
-# CONFIG_USB_APPLEDISPLAY is not set
-# CONFIG_USB_LD is not set
-# CONFIG_USB_TRANCEVIBRATOR is not set
-# CONFIG_USB_IOWARRIOR is not set
-
-#
-# USB DSL modem support
-#
-# CONFIG_USB_ATM is not set
-
-#
-# USB Gadget Support
-#
-# CONFIG_USB_GADGET is not set
-# CONFIG_MMC is not set
-# CONFIG_NEW_LEDS is not set
-CONFIG_RTC_LIB=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_HCTOSYS=y
-CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
-CONFIG_RTC_DEBUG=y
-
-#
-# RTC interfaces
-#
-CONFIG_RTC_INTF_SYSFS=y
-CONFIG_RTC_INTF_PROC=y
-CONFIG_RTC_INTF_DEV=y
-# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
-# CONFIG_RTC_DRV_TEST is not set
-
-#
-# I2C RTC drivers
-#
-# CONFIG_RTC_DRV_DS1307 is not set
-# CONFIG_RTC_DRV_DS1374 is not set
-# CONFIG_RTC_DRV_DS1672 is not set
-# CONFIG_RTC_DRV_MAX6900 is not set
-# CONFIG_RTC_DRV_RS5C372 is not set
-# CONFIG_RTC_DRV_ISL1208 is not set
-# CONFIG_RTC_DRV_X1205 is not set
-# CONFIG_RTC_DRV_PCF8563 is not set
-# CONFIG_RTC_DRV_PCF8583 is not set
-# CONFIG_RTC_DRV_M41T80 is not set
-
-#
-# SPI RTC drivers
-#
-
-#
-# Platform RTC drivers
-#
-# CONFIG_RTC_DRV_CMOS is not set
-# CONFIG_RTC_DRV_DS1553 is not set
-# CONFIG_RTC_DRV_STK17TA8 is not set
-# CONFIG_RTC_DRV_DS1742 is not set
-# CONFIG_RTC_DRV_M48T86 is not set
-# CONFIG_RTC_DRV_M48T59 is not set
-# CONFIG_RTC_DRV_V3020 is not set
-
-#
-# on-CPU RTC drivers
-#
-CONFIG_RTC_DRV_SA1100=y
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-# CONFIG_EXT2_FS_XATTR is not set
-# CONFIG_EXT2_FS_XIP is not set
-CONFIG_EXT3_FS=y
-# CONFIG_EXT3_FS_XATTR is not set
-# CONFIG_EXT4DEV_FS is not set
-CONFIG_JBD=y
-# CONFIG_JBD_DEBUG is not set
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-CONFIG_FS_POSIX_ACL=y
-# CONFIG_XFS_FS is not set
-# CONFIG_GFS2_FS is not set
-# CONFIG_OCFS2_FS is not set
-CONFIG_MINIX_FS=m
-CONFIG_ROMFS_FS=m
-CONFIG_INOTIFY=y
-CONFIG_INOTIFY_USER=y
-CONFIG_QUOTA=y
-# CONFIG_QUOTA_NETLINK_INTERFACE is not set
-CONFIG_PRINT_QUOTA_WARNING=y
-CONFIG_QFMT_V1=m
-CONFIG_QFMT_V2=m
-CONFIG_QUOTACTL=y
-CONFIG_DNOTIFY=y
-CONFIG_AUTOFS_FS=m
-CONFIG_AUTOFS4_FS=m
-CONFIG_FUSE_FS=m
-CONFIG_GENERIC_ACL=y
-
-#
-# CD-ROM/DVD Filesystems
-#
-CONFIG_ISO9660_FS=m
-CONFIG_JOLIET=y
-CONFIG_ZISOFS=y
-CONFIG_UDF_FS=m
-CONFIG_UDF_NLS=y
-
-#
-# DOS/FAT/NT Filesystems
-#
-CONFIG_FAT_FS=y
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_FAT_DEFAULT_CODEPAGE=437
-CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-CONFIG_PROC_SYSCTL=y
-CONFIG_SYSFS=y
-CONFIG_TMPFS=y
-CONFIG_TMPFS_POSIX_ACL=y
-# CONFIG_HUGETLB_PAGE is not set
-CONFIG_CONFIGFS_FS=m
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_HFSPLUS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-CONFIG_JFFS2_FS=y
-CONFIG_JFFS2_FS_DEBUG=0
-CONFIG_JFFS2_FS_WRITEBUFFER=y
-CONFIG_JFFS2_FS_WBUF_VERIFY=y
-CONFIG_JFFS2_SUMMARY=y
-CONFIG_JFFS2_FS_XATTR=y
-CONFIG_JFFS2_FS_POSIX_ACL=y
-CONFIG_JFFS2_FS_SECURITY=y
-CONFIG_JFFS2_COMPRESSION_OPTIONS=y
-CONFIG_JFFS2_ZLIB=y
-# CONFIG_JFFS2_LZO is not set
-CONFIG_JFFS2_RTIME=y
-CONFIG_JFFS2_RUBIN=y
-# CONFIG_JFFS2_CMODE_NONE is not set
-CONFIG_JFFS2_CMODE_PRIORITY=y
-# CONFIG_JFFS2_CMODE_SIZE is not set
-# CONFIG_JFFS2_CMODE_FAVOURLZO is not set
-CONFIG_CRAMFS=m
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-CONFIG_NETWORK_FILESYSTEMS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_NFS_V3_ACL=y
-CONFIG_NFS_V4=y
-CONFIG_NFS_DIRECTIO=y
-CONFIG_NFSD=m
-CONFIG_NFSD_V2_ACL=y
-CONFIG_NFSD_V3=y
-CONFIG_NFSD_V3_ACL=y
-CONFIG_NFSD_V4=y
-CONFIG_NFSD_TCP=y
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-CONFIG_LOCKD_V4=y
-CONFIG_EXPORTFS=m
-CONFIG_NFS_ACL_SUPPORT=y
-CONFIG_NFS_COMMON=y
-CONFIG_SUNRPC=y
-CONFIG_SUNRPC_GSS=y
-CONFIG_SUNRPC_BIND34=y
-CONFIG_RPCSEC_GSS_KRB5=y
-CONFIG_RPCSEC_GSS_SPKM3=m
-CONFIG_SMB_FS=m
-CONFIG_SMB_NLS_DEFAULT=y
-CONFIG_SMB_NLS_REMOTE="utf8"
-CONFIG_CIFS=m
-CONFIG_CIFS_STATS=y
-CONFIG_CIFS_STATS2=y
-# CONFIG_CIFS_WEAK_PW_HASH is not set
-CONFIG_CIFS_XATTR=y
-CONFIG_CIFS_POSIX=y
-# CONFIG_CIFS_DEBUG2 is not set
-CONFIG_CIFS_EXPERIMENTAL=y
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-CONFIG_PARTITION_ADVANCED=y
-# CONFIG_ACORN_PARTITION is not set
-# CONFIG_OSF_PARTITION is not set
-# CONFIG_AMIGA_PARTITION is not set
-# CONFIG_ATARI_PARTITION is not set
-# CONFIG_MAC_PARTITION is not set
-CONFIG_MSDOS_PARTITION=y
-CONFIG_BSD_DISKLABEL=y
-CONFIG_MINIX_SUBPARTITION=y
-# CONFIG_SOLARIS_X86_PARTITION is not set
-# CONFIG_UNIXWARE_DISKLABEL is not set
-CONFIG_LDM_PARTITION=y
-# CONFIG_LDM_DEBUG is not set
-# CONFIG_SGI_PARTITION is not set
-# CONFIG_ULTRIX_PARTITION is not set
-# CONFIG_SUN_PARTITION is not set
-# CONFIG_KARMA_PARTITION is not set
-# CONFIG_EFI_PARTITION is not set
-# CONFIG_SYSV68_PARTITION is not set
-CONFIG_NLS=y
-CONFIG_NLS_DEFAULT="utf8"
-CONFIG_NLS_CODEPAGE_437=m
-CONFIG_NLS_CODEPAGE_737=m
-CONFIG_NLS_CODEPAGE_775=m
-CONFIG_NLS_CODEPAGE_850=m
-CONFIG_NLS_CODEPAGE_852=m
-CONFIG_NLS_CODEPAGE_855=m
-CONFIG_NLS_CODEPAGE_857=m
-CONFIG_NLS_CODEPAGE_860=m
-CONFIG_NLS_CODEPAGE_861=m
-CONFIG_NLS_CODEPAGE_862=m
-CONFIG_NLS_CODEPAGE_863=m
-CONFIG_NLS_CODEPAGE_864=m
-CONFIG_NLS_CODEPAGE_865=m
-CONFIG_NLS_CODEPAGE_866=m
-CONFIG_NLS_CODEPAGE_869=m
-CONFIG_NLS_CODEPAGE_936=m
-CONFIG_NLS_CODEPAGE_950=m
-CONFIG_NLS_CODEPAGE_932=m
-CONFIG_NLS_CODEPAGE_949=m
-CONFIG_NLS_CODEPAGE_874=m
-CONFIG_NLS_ISO8859_8=m
-CONFIG_NLS_CODEPAGE_1250=m
-CONFIG_NLS_CODEPAGE_1251=m
-CONFIG_NLS_ASCII=m
-CONFIG_NLS_ISO8859_1=m
-CONFIG_NLS_ISO8859_2=m
-CONFIG_NLS_ISO8859_3=m
-CONFIG_NLS_ISO8859_4=m
-CONFIG_NLS_ISO8859_5=m
-CONFIG_NLS_ISO8859_6=m
-CONFIG_NLS_ISO8859_7=m
-CONFIG_NLS_ISO8859_9=m
-CONFIG_NLS_ISO8859_13=m
-CONFIG_NLS_ISO8859_14=m
-CONFIG_NLS_ISO8859_15=m
-CONFIG_NLS_KOI8_R=m
-CONFIG_NLS_KOI8_U=m
-CONFIG_NLS_UTF8=m
-CONFIG_DLM=m
-# CONFIG_DLM_DEBUG is not set
-# CONFIG_INSTRUMENTATION is not set
-
-#
-# Kernel hacking
-#
-# CONFIG_PRINTK_TIME is not set
-CONFIG_ENABLE_WARN_DEPRECATED=y
-CONFIG_ENABLE_MUST_CHECK=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_UNUSED_SYMBOLS=y
-CONFIG_DEBUG_FS=y
-CONFIG_HEADERS_CHECK=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_DEBUG_SHIRQ=y
-CONFIG_DETECT_SOFTLOCKUP=y
-CONFIG_SCHED_DEBUG=y
-# CONFIG_SCHEDSTATS is not set
-# CONFIG_TIMER_STATS is not set
-CONFIG_DEBUG_PREEMPT=y
-# CONFIG_DEBUG_RT_MUTEXES is not set
-# CONFIG_RT_MUTEX_TESTER is not set
-# CONFIG_DEBUG_SPINLOCK is not set
-# CONFIG_DEBUG_MUTEXES is not set
-# CONFIG_DEBUG_LOCK_ALLOC is not set
-# CONFIG_PROVE_LOCKING is not set
-# CONFIG_LOCK_STAT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
-# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
-# CONFIG_DEBUG_KOBJECT is not set
-CONFIG_DEBUG_BUGVERBOSE=y
-CONFIG_DEBUG_INFO=y
-# CONFIG_DEBUG_VM is not set
-# CONFIG_DEBUG_LIST is not set
-# CONFIG_DEBUG_SG is not set
-CONFIG_FRAME_POINTER=y
-CONFIG_FORCED_INLINING=y
-# CONFIG_BOOT_PRINTK_DELAY is not set
-# CONFIG_RCU_TORTURE_TEST is not set
-# CONFIG_FAULT_INJECTION is not set
-# CONFIG_SAMPLES is not set
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_ERRORS=y
-# CONFIG_DEBUG_LL is not set
-
-#
-# Security options
-#
-# CONFIG_KEYS is not set
-# CONFIG_SECURITY is not set
-# CONFIG_SECURITY_FILE_CAPABILITIES is not set
-CONFIG_CRYPTO=y
-CONFIG_CRYPTO_ALGAPI=y
-CONFIG_CRYPTO_ABLKCIPHER=m
-CONFIG_CRYPTO_BLKCIPHER=y
-CONFIG_CRYPTO_HASH=y
-CONFIG_CRYPTO_MANAGER=y
-CONFIG_CRYPTO_HMAC=y
-CONFIG_CRYPTO_XCBC=m
-CONFIG_CRYPTO_NULL=m
-CONFIG_CRYPTO_MD4=m
-CONFIG_CRYPTO_MD5=y
-CONFIG_CRYPTO_SHA1=m
-CONFIG_CRYPTO_SHA256=m
-CONFIG_CRYPTO_SHA512=m
-CONFIG_CRYPTO_WP512=m
-CONFIG_CRYPTO_TGR192=m
-CONFIG_CRYPTO_GF128MUL=m
-CONFIG_CRYPTO_ECB=m
-CONFIG_CRYPTO_CBC=y
-CONFIG_CRYPTO_PCBC=m
-CONFIG_CRYPTO_LRW=m
-# CONFIG_CRYPTO_XTS is not set
-CONFIG_CRYPTO_CRYPTD=m
-CONFIG_CRYPTO_DES=y
-CONFIG_CRYPTO_FCRYPT=m
-CONFIG_CRYPTO_BLOWFISH=m
-CONFIG_CRYPTO_TWOFISH=m
-CONFIG_CRYPTO_TWOFISH_COMMON=m
-CONFIG_CRYPTO_SERPENT=m
-CONFIG_CRYPTO_AES=m
-CONFIG_CRYPTO_CAST5=m
-CONFIG_CRYPTO_CAST6=m
-CONFIG_CRYPTO_TEA=m
-CONFIG_CRYPTO_ARC4=m
-CONFIG_CRYPTO_KHAZAD=m
-CONFIG_CRYPTO_ANUBIS=m
-# CONFIG_CRYPTO_SEED is not set
-CONFIG_CRYPTO_DEFLATE=m
-CONFIG_CRYPTO_MICHAEL_MIC=m
-CONFIG_CRYPTO_CRC32C=m
-CONFIG_CRYPTO_CAMELLIA=m
-CONFIG_CRYPTO_TEST=m
-# CONFIG_CRYPTO_AUTHENC is not set
-# CONFIG_CRYPTO_HW is not set
-
-#
-# Library routines
-#
-CONFIG_BITREVERSE=y
-CONFIG_CRC_CCITT=m
-CONFIG_CRC16=m
-CONFIG_CRC_ITU_T=m
-CONFIG_CRC32=y
-CONFIG_CRC7=m
-CONFIG_LIBCRC32C=m
-CONFIG_AUDIT_GENERIC=y
-CONFIG_ZLIB_INFLATE=y
-CONFIG_ZLIB_DEFLATE=y
-CONFIG_TEXTSEARCH=y
-CONFIG_TEXTSEARCH_KMP=m
-CONFIG_TEXTSEARCH_BM=m
-CONFIG_TEXTSEARCH_FSM=m
-CONFIG_PLIST=y
-CONFIG_HAS_IOMEM=y
-CONFIG_HAS_IOPORT=y
-CONFIG_HAS_DMA=y
+++ /dev/null
-[PATCH] Export atags to userspace and allow kexec to use customised atags
-
-Currently, the atags used by kexec are fixed to the ones originally used
-to boot the kernel. This is less than ideal as changing the commandline,
-initrd and other options would be a useful feature.
-
-This patch exports the atags used for the current kernel to userspace
-through an "atags" file in procfs. The presence of the file is
-controlled by its own Kconfig option and cleans up several ifdef blocks
-into a separate file. The tags for the new kernel are assumed to be at
-a fixed location before the kernel image itself. The location of the
-tags used to boot the original kernel is unimportant and no longer
-saved.
-
-Based on a patch from Uli Luckas <u.luckas@road.de>
-
-Signed-off-by: Richard Purdie <rpurdie@rpsys.net>
-
----
- arch/arm/Kconfig | 7 +++
- arch/arm/kernel/Makefile | 1
- arch/arm/kernel/atags.c | 86 ++++++++++++++++++++++++++++++++++++++
- arch/arm/kernel/atags.h | 5 ++
- arch/arm/kernel/machine_kexec.c | 2
- arch/arm/kernel/relocate_kernel.S | 30 +------------
- arch/arm/kernel/setup.c | 32 --------------
- include/asm-arm/kexec.h | 3 +
- 8 files changed, 110 insertions(+), 56 deletions(-)
-
-Index: linux-2.6.23/arch/arm/kernel/atags.c
-===================================================================
---- /dev/null 1970-01-01 00:00:00.000000000 +0000
-+++ linux-2.6.23/arch/arm/kernel/atags.c 2008-01-20 15:56:02.000000000 +0000
-@@ -0,0 +1,86 @@
-+#include <linux/slab.h>
-+#include <linux/kexec.h>
-+#include <linux/proc_fs.h>
-+#include <asm/setup.h>
-+#include <asm/types.h>
-+#include <asm/page.h>
-+
-+struct buffer {
-+ size_t size;
-+ char *data;
-+};
-+static struct buffer tags_buffer;
-+
-+static int
-+read_buffer(char* page, char** start, off_t off, int count,
-+ int* eof, void* data)
-+{
-+ struct buffer *buffer = (struct buffer *)data;
-+
-+ if (off >= buffer->size) {
-+ *eof = 1;
-+ return 0;
-+ }
-+
-+ count = min((int) (buffer->size - off), count);
-+
-+ memcpy(page, &buffer->data[off], count);
-+
-+ return count;
-+}
-+
-+
-+static int
-+create_proc_entries(void)
-+{
-+ struct proc_dir_entry* tags_entry;
-+
-+ tags_entry = create_proc_read_entry("atags", 0400, &proc_root, read_buffer, &tags_buffer);
-+ if (!tags_entry)
-+ return -ENOMEM;
-+
-+ return 0;
-+}
-+
-+
-+static char __initdata atags_copy_buf[KEXEC_BOOT_PARAMS_SIZE];
-+static char __initdata *atags_copy;
-+
-+void __init save_atags(const struct tag *tags)
-+{
-+ atags_copy = atags_copy_buf;
-+ memcpy(atags_copy, tags, KEXEC_BOOT_PARAMS_SIZE);
-+}
-+
-+
-+static int __init init_atags_procfs(void)
-+{
-+ struct tag *tag;
-+ int error;
-+
-+ if (!atags_copy) {
-+ printk(KERN_WARNING "Exporting ATAGs: No saved tags found\n");
-+ return -EIO;
-+ }
-+
-+ for (tag = (struct tag *) atags_copy; tag->hdr.size; tag = tag_next(tag))
-+ ;
-+
-+ tags_buffer.size = ((char *) tag - atags_copy) + sizeof(tag->hdr);
-+ tags_buffer.data = kmalloc(tags_buffer.size, GFP_KERNEL);
-+ if (tags_buffer.data == NULL)
-+ return -ENOMEM;
-+ memcpy(tags_buffer.data, atags_copy, tags_buffer.size);
-+
-+ error = create_proc_entries();
-+ if (error) {
-+ printk(KERN_ERR "Exporting ATAGs: not enough memory\n");
-+ kfree(tags_buffer.data);
-+ tags_buffer.size = 0;
-+ tags_buffer.data = NULL;
-+ }
-+
-+ return error;
-+}
-+
-+arch_initcall(init_atags_procfs);
-Index: linux-2.6.23/arch/arm/kernel/atags.h
-===================================================================
---- /dev/null 1970-01-01 00:00:00.000000000 +0000
-+++ linux-2.6.23/arch/arm/kernel/atags.h 2008-01-20 15:56:02.000000000 +0000
-@@ -0,0 +1,5 @@
-+#ifdef CONFIG_ATAGS_PROC
-+extern void save_atags(struct tag *tags);
-+#else
-+static inline void save_atags(struct tag *tags) { }
-+#endif
-Index: linux-2.6.23/arch/arm/kernel/Makefile
-===================================================================
---- linux-2.6.23.orig/arch/arm/kernel/Makefile 2007-10-09 21:31:38.000000000 +0100
-+++ linux-2.6.23/arch/arm/kernel/Makefile 2008-01-20 15:56:02.000000000 +0000
-@@ -19,6 +19,7 @@ obj-$(CONFIG_ISA_DMA) += dma-isa.o
- obj-$(CONFIG_PCI) += bios32.o isa.o
- obj-$(CONFIG_SMP) += smp.o
- obj-$(CONFIG_KEXEC) += machine_kexec.o relocate_kernel.o
-+obj-$(CONFIG_ATAGS_PROC) += atags.o
- obj-$(CONFIG_OABI_COMPAT) += sys_oabi-compat.o
-
- obj-$(CONFIG_CRUNCH) += crunch.o crunch-bits.o
-Index: linux-2.6.23/arch/arm/kernel/setup.c
-===================================================================
---- linux-2.6.23.orig/arch/arm/kernel/setup.c 2008-01-20 15:55:43.000000000 +0000
-+++ linux-2.6.23/arch/arm/kernel/setup.c 2008-01-20 15:56:02.000000000 +0000
-@@ -24,7 +24,6 @@
- #include <linux/interrupt.h>
- #include <linux/smp.h>
- #include <linux/fs.h>
--#include <linux/kexec.h>
-
- #include <asm/cpu.h>
- #include <asm/elf.h>
-@@ -39,6 +38,7 @@
- #include <asm/mach/time.h>
-
- #include "compat.h"
-+#include "atags.h"
-
- #ifndef MEM_SIZE
- #define MEM_SIZE (16*1024*1024)
-@@ -784,23 +784,6 @@ static int __init customize_machine(void
- }
- arch_initcall(customize_machine);
-
--#ifdef CONFIG_KEXEC
--
--/* Physical addr of where the boot params should be for this machine */
--extern unsigned long kexec_boot_params_address;
--
--/* Physical addr of the buffer into which the boot params are copied */
--extern unsigned long kexec_boot_params_copy;
--
--/* Pointer to the boot params buffer, for manipulation and display */
--unsigned long kexec_boot_params;
--EXPORT_SYMBOL(kexec_boot_params);
--
--/* The buffer itself - make sure it is sized correctly */
--static unsigned long kexec_boot_params_buf[(KEXEC_BOOT_PARAMS_SIZE + 3) / 4];
--
--#endif
--
- void __init setup_arch(char **cmdline_p)
- {
- struct tag *tags = (struct tag *)&init_tags;
-@@ -819,18 +802,6 @@ void __init setup_arch(char **cmdline_p)
- else if (mdesc->boot_params)
- tags = phys_to_virt(mdesc->boot_params);
-
--#ifdef CONFIG_KEXEC
-- kexec_boot_params_copy = virt_to_phys(kexec_boot_params_buf);
-- kexec_boot_params = (unsigned long)kexec_boot_params_buf;
-- if (__atags_pointer) {
-- kexec_boot_params_address = __atags_pointer;
-- memcpy((void *)kexec_boot_params, tags, KEXEC_BOOT_PARAMS_SIZE);
-- } else if (mdesc->boot_params) {
-- kexec_boot_params_address = mdesc->boot_params;
-- memcpy((void *)kexec_boot_params, tags, KEXEC_BOOT_PARAMS_SIZE);
-- }
--#endif
--
- /*
- * If we have the old style parameters, convert them to
- * a tag list.
-@@ -846,6 +817,7 @@ void __init setup_arch(char **cmdline_p)
- if (tags->hdr.tag == ATAG_CORE) {
- if (meminfo.nr_banks != 0)
- squash_mem_tags(tags);
-+ save_atags(tags);
- parse_tags(tags);
- }
-
-Index: linux-2.6.23/arch/arm/Kconfig
-===================================================================
---- linux-2.6.23.orig/arch/arm/Kconfig 2008-01-20 15:55:43.000000000 +0000
-+++ linux-2.6.23/arch/arm/Kconfig 2008-01-20 15:58:52.000000000 +0000
-@@ -865,6 +865,13 @@ config KEXEC
- initially work for you. It may help to enable device hotplugging
- support.
-
-+config ATAGS_PROC
-+ bool "Export atags in procfs"
-+ default n
-+ help
-+ Should the atags used to boot the kernel be exported in an "atags"
-+ file in procfs. Useful with kexec.
-+
- endmenu
-
- if (ARCH_SA1100 || ARCH_INTEGRATOR || ARCH_OMAP || ARCH_IMX )
-Index: linux-2.6.23/arch/arm/kernel/machine_kexec.c
-===================================================================
---- linux-2.6.23.orig/arch/arm/kernel/machine_kexec.c 2007-10-09 21:31:38.000000000 +0100
-+++ linux-2.6.23/arch/arm/kernel/machine_kexec.c 2008-01-20 15:56:03.000000000 +0000
-@@ -21,6 +21,7 @@ extern void setup_mm_for_reboot(char mod
- extern unsigned long kexec_start_address;
- extern unsigned long kexec_indirection_page;
- extern unsigned long kexec_mach_type;
-+extern unsigned long kexec_boot_atags;
-
- /*
- * Provide a dummy crash_notes definition while crash dump arrives to arm.
-@@ -62,6 +63,7 @@ void machine_kexec(struct kimage *image)
- kexec_start_address = image->start;
- kexec_indirection_page = page_list;
- kexec_mach_type = machine_arch_type;
-+ kexec_boot_atags = image->start - KEXEC_ARM_ZIMAGE_OFFSET + KEXEC_ARM_ATAGS_OFFSET;
-
- /* copy our kernel relocation code to the control code page */
- memcpy(reboot_code_buffer,
-Index: linux-2.6.23/arch/arm/kernel/relocate_kernel.S
-===================================================================
---- linux-2.6.23.orig/arch/arm/kernel/relocate_kernel.S 2008-01-20 15:55:43.000000000 +0000
-+++ linux-2.6.23/arch/arm/kernel/relocate_kernel.S 2008-01-20 15:56:03.000000000 +0000
-@@ -7,23 +7,6 @@
- .globl relocate_new_kernel
- relocate_new_kernel:
-
-- /* Move boot params back to where the kernel expects them */
--
-- ldr r0,kexec_boot_params_address
-- teq r0,#0
-- beq 8f
--
-- ldr r1,kexec_boot_params_copy
-- mov r6,#KEXEC_BOOT_PARAMS_SIZE/4
--7:
-- ldr r5,[r1],#4
-- str r5,[r0],#4
-- subs r6,r6,#1
-- bne 7b
--
--8:
-- /* Boot params moved, now go on with the kernel */
--
- ldr r0,kexec_indirection_page
- ldr r1,kexec_start_address
-
-@@ -67,7 +50,7 @@ relocate_new_kernel:
- mov lr,r1
- mov r0,#0
- ldr r1,kexec_mach_type
-- ldr r2,kexec_boot_params_address
-+ ldr r2,kexec_boot_atags
- mov pc,lr
-
- .globl kexec_start_address
-@@ -82,14 +65,9 @@ kexec_indirection_page:
- kexec_mach_type:
- .long 0x0
-
-- /* phy addr where new kernel will expect to find boot params */
-- .globl kexec_boot_params_address
--kexec_boot_params_address:
-- .long 0x0
--
-- /* phy addr where old kernel put a copy of orig boot params */
-- .globl kexec_boot_params_copy
--kexec_boot_params_copy:
-+ /* phy addr of the atags for the new kernel */
-+ .globl kexec_boot_atags
-+kexec_boot_atags:
- .long 0x0
-
- relocate_new_kernel_end:
-Index: linux-2.6.23/include/asm-arm/kexec.h
-===================================================================
---- linux-2.6.23.orig/include/asm-arm/kexec.h 2008-01-20 15:55:57.000000000 +0000
-+++ linux-2.6.23/include/asm-arm/kexec.h 2008-01-20 15:56:03.000000000 +0000
-@@ -16,6 +16,9 @@
-
- #define KEXEC_BOOT_PARAMS_SIZE 1536
-
-+#define KEXEC_ARM_ATAGS_OFFSET 0x1000
-+#define KEXEC_ARM_ZIMAGE_OFFSET 0x8000
-+
- #ifndef __ASSEMBLY__
-
- struct kimage;
+++ /dev/null
-diff -Nur linux-2.6.24.vanilla/drivers/mmc/card/Makefile linux-2.6.24/drivers/mmc/card/Makefile
---- linux-2.6.24.vanilla/drivers/mmc/card/Makefile 2008-01-24 23:58:37.000000000 +0100
-+++ linux-2.6.24/drivers/mmc/card/Makefile 2008-02-23 03:10:45.000000000 +0100
-@@ -6,8 +6,11 @@
- EXTRA_CFLAGS += -DDEBUG
- endif
-
-+ifeq ($(CONFIG_SA1100_SIMPAD),y)
-+# nothing to do
-+else
- obj-$(CONFIG_MMC_BLOCK) += mmc_block.o
- mmc_block-objs := block.o queue.o
-
- obj-$(CONFIG_SDIO_UART) += sdio_uart.o
--
-+endif
-diff -Nur linux-2.6.24.vanilla/drivers/mmc/core/Makefile linux-2.6.24/drivers/mmc/core/Makefile
---- linux-2.6.24.vanilla/drivers/mmc/core/Makefile 2008-01-24 23:58:37.000000000 +0100
-+++ linux-2.6.24/drivers/mmc/core/Makefile 2008-02-23 03:10:45.000000000 +0100
-@@ -6,9 +6,13 @@
- EXTRA_CFLAGS += -DDEBUG
- endif
-
-+ifeq ($(CONFIG_SA1100_SIMPAD),y)
-+# nothing to do
-+else
- obj-$(CONFIG_MMC) += mmc_core.o
- mmc_core-y := core.o sysfs.o bus.o host.o \
- mmc.o mmc_ops.o sd.o sd_ops.o \
- sdio.o sdio_ops.o sdio_bus.o \
- sdio_cis.o sdio_io.o sdio_irq.o
-+endif
-
-diff -Nur linux-2.6.24.vanilla/drivers/mmc/host/Kconfig linux-2.6.24/drivers/mmc/host/Kconfig
---- linux-2.6.24.vanilla/drivers/mmc/host/Kconfig 2008-01-24 23:58:37.000000000 +0100
-+++ linux-2.6.24/drivers/mmc/host/Kconfig 2008-02-23 03:10:45.000000000 +0100
-@@ -4,6 +4,7 @@
-
- comment "MMC/SD Host Controller Drivers"
-
-+
- config MMC_ARMMMCI
- tristate "ARM AMBA Multimedia Card Interface support"
- depends on ARM_AMBA
-@@ -130,3 +131,9 @@
-
- If unsure, or if your system has no SPI master driver, say N.
-
-+config MMC_SPI_BLOCK
-+ tristate "MMC/SD over GPIO (Software SPI) for SIMpad (EXPERIMENTAL)"
-+ depends on SA1100_SIMPAD && EXPERIMENTAL
-+ help
-+ Say Y here to enable MMC block device over GPIO
-+ if you have done the MMC-Mod. For Module say M.
-diff -Nur linux-2.6.24.vanilla/drivers/mmc/host/Makefile linux-2.6.24/drivers/mmc/host/Makefile
---- linux-2.6.24.vanilla/drivers/mmc/host/Makefile 2008-01-24 23:58:37.000000000 +0100
-+++ linux-2.6.24/drivers/mmc/host/Makefile 2008-02-23 03:10:45.000000000 +0100
-@@ -6,6 +6,9 @@
- EXTRA_CFLAGS += -DDEBUG
- endif
-
-+ifeq ($(CONFIG_SA1100_SIMPAD),y)
-+obj-$(CONFIG_MMC_SPI_BLOCK) += mmc_spi_block.o
-+else
- obj-$(CONFIG_MMC_ARMMMCI) += mmci.o
- obj-$(CONFIG_MMC_PXA) += pxamci.o
- obj-$(CONFIG_MMC_IMX) += imxmmc.o
-@@ -17,4 +20,4 @@
- obj-$(CONFIG_MMC_AT91) += at91_mci.o
- obj-$(CONFIG_MMC_TIFM_SD) += tifm_sd.o
- obj-$(CONFIG_MMC_SPI) += mmc_spi.o
--
-+endif
-diff -Nur linux-2.6.24.vanilla/drivers/mmc/host/mmc_spi_block.c linux-2.6.24/drivers/mmc/host/mmc_spi_block.c
---- linux-2.6.24.vanilla/drivers/mmc/host/mmc_spi_block.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.24/drivers/mmc/host/mmc_spi_block.c 2008-02-23 03:10:45.000000000 +0100
-@@ -0,0 +1,1622 @@
-+/*
-+ * Copyright (c) Cl�ent Ballabriga, 2005 - GPL
-+ * Copyright (c) Guylhem Aznar, 2005 - GPL
-+ *
-+ * Please check http://externe.net/zaurus/simpad-bluetooth reference design first.
-+ *
-+ * Based on Madsuk/Rohde work on a MMC driver for the WRT54G.
-+ *
-+ * This is an ugly hack of a driver. I am surprised if it ever works!
-+ * So please use a real driver or contribute one to the 2.4/2.6 mmc framework
-+ *
-+ * mrdata: ported to 2.6
-+ */
-+
-+#include <linux/module.h>
-+#include <linux/init.h>
-+
-+#include <linux/sched.h>
-+#include <linux/kernel.h>
-+#include <linux/fs.h>
-+#include <linux/errno.h>
-+#include <linux/hdreg.h>
-+#include <linux/kdev_t.h>
-+#include <linux/blkdev.h>
-+#include <linux/spinlock.h>
-+#include <linux/time.h>
-+#include <linux/delay.h>
-+#include <linux/timer.h>
-+
-+#include <linux/platform_device.h>
-+
-+#include <asm/hardware.h>
-+#include <asm/arch/simpad.h>
-+#include <asm/arch/gpio.h>
-+
-+static int major = 121;
-+
-+#define DEVICE_NAME "mmc_spi"
-+
-+static int hd_sizes[1<<6];
-+static int hd_blocksizes[1<<6];
-+static int hd_hardsectsizes[1<<6];
-+static int hd_maxsect[1<<6];
-+static struct hd_struct hd[1<<6];
-+
-+static struct gendisk *mmc_disk;
-+
-+static struct platform_device *mmc_dev; /* the one and only instance */
-+
-+static spinlock_t mmc_spi_lock;
-+
-+/*
-+ * *******************************************************************
-+ *
-+ * This is the only configurable part.
-+ *
-+ * *******************************************************************
-+ *
-+ */
-+
-+// #define DEBUG 1
-+// #define DEBUG_HD 1
-+// #define CHECK_MEDIA_CHANGE // for developement ONLY, not working yet
-+
-+/* Let that include where it is or compilation fails on INIT_REQUEST/CURRENT */
-+
-+
-+/*
-+ * If you are using different GPIOs in your hardware hack, you must
-+ * first make sure they are unused for other functions and then
-+ * configure them here.
-+ *
-+ * On the simpad I use spare pins from the UART1 (internal serial port -> DECT 20-polig):
-+ *
-+ * Funktion PIN ## Original direction GPIO ## SPI function New direction SD/MMC
-+ * - DCD PIN 08 (in) GPIO 23 DO - new name: DI -> MISO (in) PIN 7 Data Out
-+ * - DTR PIN 11 (out) GPIO 07 CS (out) PIN 1 Chip Select
-+ * - RI PIN 14 (in) GPIO 19 CLK (out) PIN 5 Clock
-+ * - DSR PIN 16 (in) GPIO 06 DI - new name: DO -> MOSI (out) PIN 2 Data In
-+ *
-+ *
-+ * SPI: MISO = Master In / Slave OUT MOSI = Master Out / Slave In
-+ *
-+ * Don't worry about in/out original function - the GPIOs will be
-+ * reprogrammed.
-+ */
-+
-+#define GPIO_SD_DI 23
-+#define GPIO_SD_CS 7
-+#define GPIO_SD_CLK 19
-+#define GPIO_SD_DO 6
-+
-+// #define FAST_GPIO_SD_DI GPIO_GPIO23
-+// #define FAST_GPIO_SD_CS GPIO_GPIO7
-+// #define FAST_GPIO_SD_CLK GPIO_GPIO19
-+// #define FAST_GPIO_SD_DO GPIO_GPIO6
-+
-+#define FAST_GPIO_SD_DI GPIO_UART1_DCD
-+#define FAST_GPIO_SD_CS GPIO_UART1_DTR
-+#define FAST_GPIO_SD_CLK GPIO_UART1_RI
-+#define FAST_GPIO_SD_DO GPIO_UART1_DSR
-+
-+/*
-+ * *******************************************************************
-+ *
-+ * Do not change anything below !
-+ *
-+ * *******************************************************************
-+ *
-+ */
-+
-+/* GPIO states */
-+#define LOW 0
-+#define HIGH 1
-+
-+#define INPUT 0
-+#define OUTPUT 1
-+
-+#define PRESENT 1
-+#define ABSENT 0
-+
-+typedef unsigned int uint32;
-+typedef unsigned long u32_t;
-+typedef unsigned short u16_t;
-+typedef unsigned char u8_t;
-+
-+// static struct timer_list mmc_timer;
-+
-+// static struct timeval s_zeit, e_zeit;
-+
-+/* start with no card */
-+static int mmc_media_detect = 0;
-+// static int mmc_media_changed = 1;
-+
-+
-+/////////////////////
-+// prototypes
-+static int mmc_open(struct inode *inode, struct file *filp);
-+static int mmc_release(struct inode *inode, struct file *filp);
-+static int mmc_ioctl(struct inode *inode, struct file *filp, unsigned int cmd, unsigned long arg);
-+static void mmc_spi_request(struct request_queue *q);
-+
-+
-+/*
-+ * *******************************************************************
-+ *
-+ * Begin GPIO hardware access functions.
-+ *
-+ * *******************************************************************
-+ *
-+ */
-+
-+#define gpio_read(a) ((GPLR & a) ? 1 : 0)
-+#define gpio_write_high(a) GPSR = a
-+#define gpio_write_low(a) GPCR = a
-+
-+/* set MMC_Chip_Select to HIGH (MMC/SD-Card inactiv) */
-+#define MMC_Disable() gpio_write_high( FAST_GPIO_SD_CS)
-+
-+/* set MMC_Chip_Select to LOW (MMC/SD-Card activ) */
-+#define MMC_Enable() gpio_write_low( FAST_GPIO_SD_CS)
-+
-+/*
-+ * *******************************************************************
-+ *
-+ * Begin SPI hardware access functions.
-+ *
-+ * *******************************************************************
-+ *
-+ */
-+static int mmc_spi_media_detect(void)
-+{
-+// FIXME: add card detection/test by SPI
-+
-+ return 1;
-+}
-+
-+static int mmc_spi_hardware_init(void)
-+{
-+ printk("\nmmc: GPIO init\n");
-+
-+ /* cut existing functions */
-+ gpio_set_alternative_function(GPIO_SD_CLK, 0);
-+ gpio_set_alternative_function(GPIO_SD_DI, 0);
-+ gpio_set_alternative_function(GPIO_SD_DO, 0);
-+ gpio_set_alternative_function(GPIO_SD_CS, 0);
-+
-+ /* remap directions and set state of spi pins */
-+ gpio_direction_output(GPIO_SD_CLK, 0);
-+ gpio_direction_input(GPIO_SD_DI);
-+ gpio_direction_output(GPIO_SD_DO, 0);
-+ gpio_direction_output(GPIO_SD_CS, 0);
-+
-+ printk("mmc: initialising MMC\n");
-+
-+ /* Start */
-+ MMC_Disable();
-+ gpio_write_low( FAST_GPIO_SD_CLK);
-+ gpio_write_high( FAST_GPIO_SD_DO);
-+ return 0;
-+}
-+
-+/* return what has been read, write the parameter */
-+/* Clockrate round about 1,2 MHz */
-+
-+static unsigned char mmc_spi_readwrite(unsigned char data_out)
-+{
-+ unsigned char i;
-+ unsigned char result = 0;
-+
-+ for(i = 0x80 ; i != 0 ; i >>= 1)
-+ {
-+ if (data_out & i)
-+ {
-+ gpio_write_high( FAST_GPIO_SD_DO);
-+ }
-+ else
-+ {
-+ gpio_write_low( FAST_GPIO_SD_DO);
-+ }
-+
-+ gpio_write_high( FAST_GPIO_SD_CLK);
-+
-+ if (gpio_read( FAST_GPIO_SD_DI) == 1)
-+ {
-+ result |= i;
-+ }
-+
-+ gpio_write_low( FAST_GPIO_SD_CLK);
-+
-+ }
-+
-+ gpio_write_high( FAST_GPIO_SD_DO);
-+
-+ return (result);
-+}
-+
-+/* return what has been read, write the parameter */
-+/* Clockrate round 200 kHz */
-+
-+static unsigned char mmc_spi_readwrite_slow(unsigned char data_out)
-+{
-+ unsigned char i;
-+ unsigned char result = 0;
-+
-+ for(i = 0x80 ; i != 0 ; i >>= 1)
-+ {
-+ if (data_out & i)
-+ {
-+ gpio_write_high( FAST_GPIO_SD_DO);
-+ }
-+ else
-+ {
-+ gpio_write_low( FAST_GPIO_SD_DO);
-+ }
-+
-+ udelay(10);
-+
-+ gpio_write_high( FAST_GPIO_SD_CLK);
-+
-+ udelay(10);
-+
-+ if (gpio_read( FAST_GPIO_SD_DI) == 1)
-+ {
-+ result |= i;
-+ }
-+
-+ udelay(10);
-+
-+ gpio_write_low( FAST_GPIO_SD_CLK);
-+
-+ udelay(10);
-+
-+ }
-+
-+ gpio_write_high( FAST_GPIO_SD_DO);
-+
-+ udelay(10);
-+
-+ // printk("Send Byte = 0x%2X Receive Byte = 0x%2X \n", data_out, result);
-+
-+ return (result);
-+}
-+
-+/* return what has been read */
-+
-+static unsigned char mmc_spi_read_only(void)
-+{
-+ unsigned char i;
-+ unsigned char result = 0;
-+
-+ for(i = 0x80 ; i != 0 ; i >>= 1)
-+ {
-+
-+ gpio_write_high( FAST_GPIO_SD_CLK);
-+
-+ if (gpio_read( FAST_GPIO_SD_DI) == 1)
-+ {
-+ result |= i;
-+ }
-+
-+ gpio_write_low( FAST_GPIO_SD_CLK);
-+
-+ }
-+
-+ return (result);
-+}
-+
-+/* write the parameter */
-+/* Clockrate round about 3,6 MHz */
-+
-+static unsigned char mmc_spi_write_only(unsigned char data_out)
-+{
-+ unsigned char i;
-+ unsigned char result = 0;
-+
-+ for(i = 0x80 ; i != 0 ; i >>= 1)
-+ {
-+
-+ if (data_out & i)
-+ {
-+ gpio_write_high( FAST_GPIO_SD_DO);
-+ }
-+ else
-+ {
-+ gpio_write_low( FAST_GPIO_SD_DO);
-+ }
-+
-+ gpio_write_high( FAST_GPIO_SD_CLK);
-+
-+ gpio_write_low( FAST_GPIO_SD_CLK);
-+
-+ }
-+
-+ gpio_write_high( FAST_GPIO_SD_DO);
-+
-+ return (result);
-+}
-+
-+
-+/**
-+ * this function was contributed by: rcichielo from openwrt forums
-+ *
-+ * Comments added by Marc DENTY on 2007-03-20
-+ *
-+ * Sequence to read a card's "CID" bytes (name, serial number etc)
-+ *
-+ * Send: 4ah,00h,00h,00h,00h,00h - CMD10, no args, null CRC
-+ * Read: xx - NCR Time
-+ * Read: xx - Command Response (Should be 00h)
-+ * Read: until FEh is received - Wait for Data token
-+ * Read: yy * 16 - Get 16 bytes from CID
-+ * Read: zz - Read CRC lo byte
-+ * Read: zz - Read CRC hi byte
-+ *
-+ * Useful locations in the returned data packet:
-+ *
-+ * 03h-08h Manufacturers's name in ascii
-+ * 0ah-0dh Card's 32 bit serial number
-+ */
-+/**
-+ * Comments added by Cyril CATTIAUX on 2007-03-21
-+ *
-+ * CID format specification (from Sandisk SD Product Manual v1.9)
-+ *
-+ * cid[00 ] Manufacturer ID (unsigned byte)
-+ * cid[01-02] OEM/Application ID (ASCII)
-+ * cid[03-07] Product Name (ASCII)
-+ * cid[08 ] Product Revistion (BCD coded number)
-+ * cid[09-12] Serial Number (32-bit unsigned int)
-+ * cid[13-14] Reserved(bit 12->15) - Manufacture Date(bit 0->11)
-+ * cid[15 ] CRC7(bit 1->7) - Not used, allways 1 (bit 0)
-+*/
-+static int mmc_read_cid(unsigned char *cid)
-+{
-+ unsigned char result = 0;
-+ int i;
-+
-+ MMC_Enable();
-+
-+ /* wait */
-+ for (i = 0; i < 4; i++)
-+ {
-+ result=mmc_spi_readwrite(0xff);
-+ }
-+
-+ /* issue CID (card identification data) read request */
-+ mmc_spi_readwrite(0xff);
-+ mmc_spi_readwrite(0x40 | 10);
-+ mmc_spi_readwrite(0x00);
-+ mmc_spi_readwrite(0x00);
-+ mmc_spi_readwrite(0x00);
-+ mmc_spi_readwrite(0x00);
-+ mmc_spi_readwrite(0x95);
-+
-+ for (i = 0; i < 8; i++)
-+ {
-+ result=mmc_spi_readwrite(0xff);
-+
-+ if(result == 0x00)
-+ break;
-+ }
-+
-+ if (result != 0x00) {
-+ MMC_Disable();
-+ mmc_spi_readwrite(0xff);
-+ return(1);
-+ }
-+
-+ for (i = 0; i < 8; i++) {
-+ result = mmc_spi_readwrite(0xff);
-+ if (result == 0xfe) break;
-+ }
-+
-+ if (result != 0xfe) {
-+ MMC_Disable();
-+ mmc_spi_readwrite(0xff);
-+ return(2);
-+ }
-+
-+ for (i = 0; i < 16; i++) {
-+ result = mmc_spi_readwrite(0xff);
-+ cid[i] = result;
-+ }
-+
-+ mmc_spi_readwrite(0xff);
-+ mmc_spi_readwrite(0xff);
-+
-+ MMC_Disable();
-+ mmc_spi_readwrite(0xff);
-+
-+ return 0;
-+}
-+
-+
-+/**
-+ * Comments added by Cyril CATTIAUX on 2007-03-21
-+ *
-+ * CID format specification (from Sandisk SD Product Manual v1.9)
-+ *
-+ * cid[00 ] Manufacturer ID (unsigned byte)
-+ * cid[01-02] OEM/Application ID (ASCII)
-+ * cid[03-07] Product Name (ASCII)
-+ * cid[08 ] Product Revision (BCD coded 2 digit number)
-+ * cid[09-12] Serial Number (32-bit unsigned int)
-+ * cid[13-14] Manufacture Date(bit 0->11) (BCD coded 3 digit number YYM offset from 2000) - Reserved(bit 12->15)
-+ * cid[15 ] Not used, allways 1 (bit 0) - CRC7(bit 1->7)
-+*/
-+static void mmc_show_cid_info(void)
-+{
-+ int i, result;
-+ unsigned short tmps;
-+ unsigned char cid[16];
-+
-+ char manufacturer_id;
-+ char oem_id[3];
-+ char product_name[6];
-+ unsigned char product_revision_h, product_revision_l;
-+ unsigned int product_sn;
-+ unsigned short product_date_y;
-+ unsigned char product_date_m;
-+
-+ result = mmc_read_cid(cid);
-+
-+ if (result == 0)
-+ {
-+ printk("mmc_init: MMC/SD Card ID: ");
-+ for (i=0; i<16; i++) {
-+ printk("%02X ", cid[i]);
-+ }
-+ manufacturer_id=cid[0];
-+ strncpy(oem_id, &cid[1], 2);
-+ oem_id[2]='\0';
-+ strncpy(product_name, &cid[3], 5);
-+ product_name[5]='\0';
-+ product_revision_h=(cid[8] >> 4) & 0xf;
-+ product_revision_l=cid[8] & 0xf;
-+ product_sn=(cid[9]<<24) + (cid[10]<<16) + (cid[11]<<8) + cid[12];
-+ tmps=((cid[13]<<8) + cid[14]) & 0x0fff;
-+ product_date_y=2000 + (((tmps >> 8) & 0xf) * 10) + ((tmps >> 4) & 0xf);
-+ product_date_m=tmps & 0xf;
-+
-+ printk("\nManufacturer ID : %02X\n", manufacturer_id);
-+ printk("OEM/Application ID: %s\n", oem_id);
-+ printk("Product name : %s\n", product_name);
-+ printk("Product revision : %d.%d\n", product_revision_h, product_revision_l);
-+ printk("Product SN : %08X\n", product_sn);
-+ printk("Product Date : %d-%d\n", product_date_y, product_date_m);
-+
-+ } else {
-+ printk("mmc_init: impossible to get card indentification info for reason code: %02x", result);
-+ }
-+}
-+
-+
-+/*
-+static int mmc_spi_hw_test(void)
-+{
-+ unsigned char result, k;
-+
-+ unsigned int i, j, t;
-+
-+ printk("mmc_spi_hw_test -> \n\n");
-+ k = 0x55;
-+ for ( i = 0 ; i < 5; i++) {
-+
-+ printk("\n0x%2X - ", k);
-+ for ( j = 0 ; j < 8; j++ ) {
-+ do_gettimeofday( &s_zeit );
-+ result = mmc_spi_readwrite_slow(k);
-+ do_gettimeofday( &e_zeit );
-+
-+ if ( result != k ) {
-+ printk("!>ERROR<! Transfer = 0x%2X Receive = 0x%2X Trail = %d \n", k, result, j);
-+ // i = 255; j = 1000;
-+ }
-+
-+ t = (e_zeit.tv_sec-s_zeit.tv_sec)*1000000+(e_zeit.tv_usec-s_zeit.tv_usec);
-+ printk("Durchlauf: %i Versuch: %i von 8 -> Laufzeit: 0x%X s\n", i , j, t);
-+ udelay(200);
-+ }
-+ printk("ready ");
-+
-+ // k++;
-+ }
-+ printk("ready ");
-+ printk("\n\n");
-+ return (0);
-+}
-+*/
-+
-+/*
-+static int mmc_spi_speed_test(void)
-+{
-+ unsigned int i, j, k, l, t;
-+
-+ MMC_Disable();
-+
-+ for (k = 1; k < 6; k++)
-+ {
-+ l = 10000 * k;
-+ for (j = 0; j < 5; j++)
-+ {
-+ do_gettimeofday( &s_zeit );
-+ for (i = 0; i < l; i++)
-+ mmc_spi_readwrite(0xff);
-+ do_gettimeofday( &e_zeit );
-+ t = (e_zeit.tv_sec-s_zeit.tv_sec)*1000000+(e_zeit.tv_usec-s_zeit.tv_usec);
-+ printk("mmc_spi_readwrite: Laufzeit %u x : 0x%X \n", l, t);
-+ }
-+ }
-+
-+ for (k = 1; k < 1; k++)
-+ {
-+ l = 10000 * k;
-+ for (j = 0; j < 1; j++)
-+ {
-+ do_gettimeofday( &s_zeit );
-+ for (i = 0; i < l; i++)
-+ mmc_spi_readwrite_slow(0xff);
-+ do_gettimeofday( &e_zeit );
-+ t = (e_zeit.tv_sec-s_zeit.tv_sec)*1000000+(e_zeit.tv_usec-s_zeit.tv_usec);
-+ printk("mmc_spi_readwrite_slow: Laufzeit %u x : 0x%X \n", l, t);
-+ }
-+ }
-+
-+ for (k = 1; k < 6; k++)
-+ {
-+ l = 10000 * k;
-+ for (j = 0; j < 5; j++)
-+ {
-+ do_gettimeofday( &s_zeit );
-+ for (i = 0; i < l; i++)
-+ mmc_spi_read_only();
-+ do_gettimeofday( &e_zeit );
-+ t = (e_zeit.tv_sec-s_zeit.tv_sec)*1000000+(e_zeit.tv_usec-s_zeit.tv_usec);
-+ printk("mmc_spi_read_only: Laufzeit %u x : 0x%X \n", l, t);
-+ }
-+ }
-+
-+ for (k = 1; k < 6; k++)
-+ {
-+ l = 10000 * k;
-+ for (j = 0; j < 5; j++)
-+ {
-+ do_gettimeofday( &s_zeit );
-+ for (i = 0; i < l; i++)
-+ mmc_spi_write_only(0xff);
-+ do_gettimeofday( &e_zeit );
-+ t = (e_zeit.tv_sec-s_zeit.tv_sec)*1000000+(e_zeit.tv_usec-s_zeit.tv_usec);
-+ printk("mmc_spi_write_only: Laufzeit %u x : 0x%X \n", l, t);
-+ }
-+ }
-+
-+ return (1);
-+
-+}
-+*/
-+
-+
-+static int mmc_spi_card_init(void)
-+{
-+ unsigned char result = 0;
-+ short i, j;
-+
-+// unsigned long flags;
-+
-+ // save_flags(flags);
-+ // cli();
-+
-+/*
-+ printk("GPIO_SD_CS dir: %u alt: %u\n", gpio_getdir(&gp, GPIO_SD_CS), gpio_getalt(&gp, GPIO_SD_CS));
-+ printk("GPIO_SD_DI dir: %u alt: %u\n", gpio_getdir(&gp, GPIO_SD_DI), gpio_getalt(&gp, GPIO_SD_DI));
-+ printk("GPIO_SD_DO dir: %u alt: %u\n", gpio_getdir(&gp, GPIO_SD_DO), gpio_getalt(&gp, GPIO_SD_DO));
-+ printk("GPIO_SD_CS dir: %u alt: %u\n", gpio_getdir(&gp, GPIO_SD_CLK), gpio_getalt(&gp, GPIO_SD_CLK));
-+*/
-+
-+ // printk("\nmmc: mmc_spi_hw_test() *START*\n");
-+
-+ // mmc_spi_hw_test();
-+
-+ printk("\nmmc: card init 1/2 (CMD0)\n");
-+
-+ for (j = 0; j < 10; j++)
-+ {
-+ MMC_Disable();
-+
-+ for (i = 0; i < 10; i++)
-+ mmc_spi_readwrite_slow(0xff);
-+
-+ MMC_Enable();
-+
-+ mmc_spi_readwrite_slow(0xff);
-+
-+ mmc_spi_readwrite_slow(0x40);
-+
-+ for (i = 0; i < 4; i++) {
-+
-+ mmc_spi_readwrite_slow(0x00);
-+
-+ }
-+
-+ mmc_spi_readwrite_slow(0x95);
-+
-+ for (i = 0; i < 8; i++) {
-+
-+ result = mmc_spi_readwrite_slow(0xff);
-+
-+#ifdef DEBUG_HD
-+ if (result != 0xff) {
-+ if (result > 0x1F && result < 0x80)
-+ printk("mmc: resp. (CMD0) Versuch(%d) BYTE: %d result = 0x%X Zeichen = %c\n", j, i, result, result);
-+ else
-+ printk("mmc: resp. (CMD0) Versuch(%d) BYTE: %d result = 0x%X\n", j, i, result);
-+ }
-+#endif
-+ if (result == 0x01)
-+ break;
-+ }
-+
-+ if (result == 0x01)
-+ break;
-+
-+ MMC_Disable();
-+ mmc_spi_readwrite_slow(0xff);
-+
-+ mdelay(60);
-+ }
-+
-+ if (result != 0x01) {
-+
-+ printk("mmc: card init 1/2 error: %d (CMD0) failed\n", result);
-+ printk(" -> Hint: MMC/SD-Card realy (fully) inserted ?\n");
-+
-+ return (1);
-+ }
-+
-+ printk("mmc: card init 1/2 (CMD0) success\n\n");
-+
-+ mdelay(1);
-+
-+ printk("mmc: card init 2/2 (CMD1)\n");
-+ for (j = 0; j < 10; j++) {
-+
-+ mmc_spi_readwrite_slow(0xff);
-+ mmc_spi_readwrite_slow(0x41);
-+ for (i = 0; i < 4; i++)
-+ mmc_spi_readwrite_slow(0x00);
-+ mmc_spi_readwrite_slow(0x95);
-+ for (i = 0; i < 8; i++) {
-+ result = mmc_spi_readwrite_slow(0xff);
-+#ifdef DEBUG_HD
-+ // if (result >= 32 && result <= 127)
-+ // printk("mmc: response (CMD1) Versuch(%d) start token BYTE: %d result = 0x%X Zeichen = %c\n", j, i, result, result);
-+ // else
-+ // printk("mmc: response (CMD1) Versuch(%d) start token BYTE: %d result = 0x%X\n", j, i, result);
-+#endif
-+ if (result == 0x00)
-+ break;
-+ }
-+
-+ mmc_spi_readwrite_slow(0xff);
-+
-+ if (result == 0x00) {
-+ printk("mmc: card init 2/2 (CMD1) success\n\n");
-+
-+ mmc_spi_readwrite_slow(0xff);
-+ mmc_spi_readwrite_slow(0x4d);
-+ mmc_spi_readwrite_slow(0x00);
-+ mmc_spi_readwrite_slow(0x00);
-+ mmc_spi_readwrite_slow(0x00);
-+ mmc_spi_readwrite_slow(0x00);
-+ mmc_spi_readwrite_slow(0x95);
-+ for (i = 0; i < 6; i++) {
-+ result = mmc_spi_readwrite_slow(0xff);
-+#ifdef DEBUG_HD
-+ // if (result > 31 && result < 128)
-+ // printk("mmc: response (CMD13) Versuch(%d) start token BYTE: %d result = 0x%X Zeichen = %c\n", j, i, result, result);
-+ // else
-+ // printk("mmc: response (CMD13) Versuch(%d) start token BYTE: %d result = 0x%X\n", j, i, result);
-+#endif
-+ // if (result == 0x00)
-+ // break;
-+ }
-+ // mdelay(60);
-+ MMC_Disable();
-+ mmc_spi_readwrite_slow(0xff);
-+ // mmc_spi_readwrite_slow(0xff);
-+ // mdelay(10);
-+
-+ // restore_flags(flags);
-+
-+ return (0);
-+ }
-+ mdelay(60);
-+ }
-+ return (2);
-+}
-+
-+
-+static int mmc_spi_card_config(void)
-+{
-+ unsigned char result = 0;
-+ short i, j;
-+ unsigned char csd[32];
-+ unsigned int c_size;
-+ unsigned int c_size_mult;
-+ unsigned int mult;
-+ unsigned int read_bl_len;
-+ unsigned int blocknr = 0;
-+ unsigned int block_len = 0;
-+ unsigned int size = 0;
-+ unsigned char rd_buffer[528];
-+// unsigned long flags;
-+
-+ MMC_Enable();
-+
-+ mmc_spi_readwrite_slow(0xff);
-+ result = mmc_spi_readwrite_slow(0x51);
-+ // mmc_spi_readwrite_slow(0x4A);
-+ // mmc_spi_readwrite_slow(0x40+0x0D);
-+ // mmc_spi_readwrite_slow(0x42);
-+ for (i = 0; i < 4; i++)
-+ mmc_spi_readwrite_slow(0x00);
-+ mmc_spi_readwrite_slow(0x95);
-+
-+ // printk("mmc: (CMD17) response von 0x51 result = 0x%X\n", result);
-+
-+ for (i = 0; i < 8; i++) {
-+ result = mmc_spi_readwrite_slow(0xff);
-+#ifdef DEBUG_HD
-+ // printk("mmc: (CMD17) response (start token) result = 0x%X\n", result);
-+#endif
-+ if (result == 0x00)
-+ break;
-+ }
-+ if (result != 0x00) {
-+ MMC_Disable();
-+ mmc_spi_readwrite_slow(0xff);
-+ // restore_flags(flags);
-+ // mmc_spi_readwrite_slow(0xff);
-+ return (1);
-+ }
-+ // restore_flags(flags);
-+ for (i = 0; i < 8; i++) {
-+ result = mmc_spi_readwrite_slow(0xff);
-+ rd_buffer[i] = result;
-+#ifdef DEBUG_HD
-+ /*
-+ if (result >= 32 && result <= 127)
-+ printk("mmc: CMD17 response (start token) result = 0x%X Zeichen = %c\n", result, result);
-+ else
-+ printk("mmc: CMD17 response (start token) result = 0x%X\n", result);
-+ */
-+#endif
-+ // if (result == 0xfe)
-+ // break;
-+ }
-+ /*
-+ if (result != 0xfe) {
-+ MMC_Disable();
-+ mmc_spi_readwrite_slow(0xff);
-+ mmc_spi_readwrite_slow(0xff);
-+ return(1);
-+ }
-+ */
-+
-+ for (i = 8; i < 520; i++) {
-+ result = mmc_spi_readwrite_slow(0xff);
-+ rd_buffer[i] = result;
-+ }
-+ for (i = 0; i < 2; i++) {
-+ result = mmc_spi_readwrite_slow(0xff);
-+ }
-+ MMC_Disable();
-+ mmc_spi_readwrite_slow(0xff);
-+ // mmc_spi_readwrite_slow(0xff);
-+
-+ printk("Buffer - Start\n");
-+
-+ for ( i = 0 ; i < 33 ; i++) {
-+ printk("\r\n%4X - ", i*16);
-+ for ( j = 0 ; j < 16 ; j++) {
-+ if ( rd_buffer[i*16+j] < 16)
-+ printk("0%X ", rd_buffer[i*16+j]);
-+ else
-+ printk("%2X ", rd_buffer[i*16+j]);
-+ }
-+ for ( j = 0 ; j < 16 ; j++) {
-+ if ( rd_buffer[i*16+j] < ' ')
-+ printk(".");
-+ else
-+ printk("%c", rd_buffer[i*16+j]);
-+ }
-+ }
-+
-+ printk("\nBuffer - Ende\n");
-+
-+ mmc_show_cid_info();
-+
-+ for(j = 0 ; j < 1; j++) {
-+ MMC_Enable();
-+
-+ // mdelay(1);
-+
-+ // save_flags(flags);
-+ // cli();
-+ mmc_spi_readwrite_slow(0xff);
-+ mmc_spi_readwrite_slow(0x49);
-+ // mmc_spi_readwrite_slow(0x4A);
-+ // mmc_spi_readwrite_slow(0x40+0x0D);
-+ // mmc_spi_readwrite_slow(0x42);
-+ for (i = 0; i < 4; i++)
-+ mmc_spi_readwrite_slow(0x00);
-+ mmc_spi_readwrite_slow(0x95);
-+ for (i = 0; i < 8; i++) {
-+ result = mmc_spi_readwrite_slow(0xff);
-+#ifdef DEBUG_HD
-+ // printk("mmc: (CMD9) response (start token) result = 0x%X\n", result);
-+#endif
-+ if (result == 0x00)
-+ break;
-+ }
-+ // restore_flags(flags);
-+ if (result != 0x00) {
-+ MMC_Disable();
-+ mmc_spi_readwrite_slow(0xff);
-+ // mmc_spi_readwrite_slow(0xff);
-+ return (1);
-+ }
-+ for (i = 0; i < 22; i++) {
-+ result = mmc_spi_readwrite_slow(0xff);
-+#ifdef DEBUG_HD
-+ if (result >= 32 && result <= 127)
-+ printk("mmc: response (start token) result = 0x%X Zeichen = %c\n", result, result);
-+ else
-+ printk("mmc: response (start token) result = 0x%X\n", result);
-+#endif
-+ if (result == 0xfe)
-+ break;
-+ }
-+ if (result == 0xfe)
-+ break;
-+
-+ if (result != 0xfe) {
-+ MMC_Disable();
-+ mmc_spi_readwrite_slow(0xff);
-+ // mmc_spi_readwrite_slow(0xff);
-+ }
-+ mdelay(60);
-+ }
-+
-+ if (result != 0xfe) {
-+ MMC_Disable();
-+ mmc_spi_readwrite_slow(0xff);
-+ printk("mmc: mmc card config (CMD9) failed result = 0x%X\n\n", result);
-+ return (2);
-+ }
-+ for (i = 0; i < 16; i++) {
-+ result = mmc_spi_readwrite_slow(0xff);
-+ csd[i] = result;
-+ }
-+ for (i = 0; i < 2; i++) {
-+ result = mmc_spi_readwrite_slow(0xff);
-+ }
-+ MMC_Disable();
-+ mmc_spi_readwrite_slow(0xff);
-+ // mmc_spi_readwrite_slow(0xff);
-+
-+ if (result == 0x00)
-+ return (3);
-+
-+ c_size = (csd[8] & 0xC0) + (csd[7] << 8) + ((csd[6] & 0x03) << 16);
-+ c_size >>= 6;
-+ c_size_mult = (csd[10] & 0x80) + ((csd[9] & 0x03) << 8);
-+ c_size_mult >>= 7;
-+ read_bl_len = csd[5] & 0x0f;
-+ mult = 1;
-+ mult <<= c_size_mult + 2;
-+ blocknr = (c_size + 1) * mult;
-+ block_len = 1;
-+ block_len <<= read_bl_len;
-+ size = block_len * blocknr;
-+ size >>= 10;
-+
-+ for (i = 0; i < (1 << 6); i++) {
-+ hd_blocksizes[i] = 1024;
-+ hd_hardsectsizes[i] = block_len;
-+ hd_maxsect[i] = 256;
-+ }
-+ hd_sizes[0] = size;
-+ hd[0].nr_sects = blocknr;
-+
-+ printk("Size = %d, hardsectsize = %d, sectors = %d\n",
-+ size, block_len, blocknr);
-+
-+ return 0;
-+}
-+
-+
-+/*
-+ * *******************************************************************
-+ *
-+ * End of SPI hardware access functions.
-+ *
-+ * *******************************************************************
-+ */
-+
-+
-+static int mmc_spi_write_block(unsigned int dest_addr, unsigned char *data)
-+{
-+ unsigned int address;
-+ unsigned char result = 0;
-+ unsigned char ab0, ab1, ab2, ab3;
-+ int i;
-+
-+ address = dest_addr;
-+
-+ ab3 = 0xff & (address >> 24);
-+ ab2 = 0xff & (address >> 16);
-+ ab1 = 0xff & (address >> 8);
-+ ab0 = 0xff & address;
-+
-+ MMC_Enable();
-+
-+ mmc_spi_readwrite(0xff);
-+
-+ mmc_spi_readwrite(0x58);
-+ mmc_spi_readwrite(ab3); /* msb */
-+ mmc_spi_readwrite(ab2);
-+ mmc_spi_readwrite(ab1);
-+ mmc_spi_readwrite(ab0); /* lsb */
-+ mmc_spi_readwrite(0xff);
-+
-+ for (i = 0; i < 8; i++)
-+ {
-+ result = mmc_spi_readwrite(0xff);
-+ if (result == 0x00)
-+ {
-+ break;
-+ }
-+ }
-+
-+ if (result != 0x00)
-+ {
-+ MMC_Disable();
-+ mmc_spi_readwrite(0xff);
-+ return (1);
-+ }
-+
-+ mmc_spi_readwrite(0xfe);
-+
-+ for (i = 0; i < 512; i += 32)
-+ {
-+ mmc_spi_write_only(data[i]);
-+ mmc_spi_write_only(data[i+1]);
-+ mmc_spi_write_only(data[i+2]);
-+ mmc_spi_write_only(data[i+3]);
-+ mmc_spi_write_only(data[i+4]);
-+ mmc_spi_write_only(data[i+5]);
-+ mmc_spi_write_only(data[i+6]);
-+ mmc_spi_write_only(data[i+7]);
-+ mmc_spi_write_only(data[i+8]);
-+ mmc_spi_write_only(data[i+9]);
-+ mmc_spi_write_only(data[i+10]);
-+ mmc_spi_write_only(data[i+11]);
-+ mmc_spi_write_only(data[i+12]);
-+ mmc_spi_write_only(data[i+13]);
-+ mmc_spi_write_only(data[i+14]);
-+ mmc_spi_write_only(data[i+15]);
-+ mmc_spi_write_only(data[i+16]);
-+ mmc_spi_write_only(data[i+17]);
-+ mmc_spi_write_only(data[i+18]);
-+ mmc_spi_write_only(data[i+19]);
-+ mmc_spi_write_only(data[i+20]);
-+ mmc_spi_write_only(data[i+21]);
-+ mmc_spi_write_only(data[i+22]);
-+ mmc_spi_write_only(data[i+23]);
-+ mmc_spi_write_only(data[i+24]);
-+ mmc_spi_write_only(data[i+25]);
-+ mmc_spi_write_only(data[i+26]);
-+ mmc_spi_write_only(data[i+27]);
-+ mmc_spi_write_only(data[i+28]);
-+ mmc_spi_write_only(data[i+29]);
-+ mmc_spi_write_only(data[i+30]);
-+ mmc_spi_write_only(data[i+31]);
-+ }
-+
-+ mmc_spi_readwrite(0xff);
-+ mmc_spi_readwrite(0xff);
-+
-+ for (i = 0; i < 1000000; i++)
-+ {
-+ result = mmc_spi_readwrite(0xff);
-+ if (result == 0xff)
-+ {
-+ break;
-+ }
-+ }
-+
-+ if (result != 0xff)
-+ {
-+ MMC_Disable();
-+ mmc_spi_readwrite(0xff);
-+ return (3);
-+ }
-+
-+ MMC_Disable();
-+ mmc_spi_readwrite(0xff);
-+ return (0);
-+}
-+
-+static int mmc_spi_read_block(unsigned char *data, unsigned int src_addr)
-+{
-+ unsigned int address;
-+ unsigned char result = 0;
-+ unsigned char ab0, ab1, ab2, ab3;
-+ // unsigned long flags;
-+ // int i, j;
-+ int i;
-+
-+ address = src_addr;
-+
-+ ab3 = 0xff & (address >> 24);
-+ ab2 = 0xff & (address >> 16);
-+ ab1 = 0xff & (address >> 8);
-+ ab0 = 0xff & address;
-+
-+ MMC_Enable();
-+
-+ mmc_spi_readwrite(0xff);
-+
-+ mmc_spi_readwrite(0x51);
-+ mmc_spi_readwrite(ab3); /* msb */
-+ mmc_spi_readwrite(ab2);
-+ mmc_spi_readwrite(ab1);
-+ mmc_spi_readwrite(ab0); /* lsb */
-+ mmc_spi_readwrite(0xff);
-+
-+ for (i = 0; i < 8; i++)
-+ {
-+ result = mmc_spi_readwrite(0xff);
-+ if (result == 0x00)
-+ {
-+ break;
-+ }
-+ }
-+
-+ if (result != 0x00)
-+ {
-+ MMC_Disable();
-+ mmc_spi_readwrite(0xff);
-+ return (1);
-+ }
-+
-+ for (i = 0; i < 100000; i++)
-+ {
-+ result = mmc_spi_readwrite(0xff);
-+ if (result == 0xfe)
-+ {
-+ break;
-+ }
-+ }
-+
-+ if (result != 0xfe)
-+ {
-+ MMC_Disable();
-+ mmc_spi_readwrite(0xff);
-+ return (2);
-+ }
-+
-+ for (i = 0; i < 512; i += 32 )
-+ {
-+ data[i] = mmc_spi_read_only();
-+ data[i+1] = mmc_spi_read_only();
-+ data[i+2] = mmc_spi_read_only();
-+ data[i+3] = mmc_spi_read_only();
-+ data[i+4] = mmc_spi_read_only();
-+ data[i+5] = mmc_spi_read_only();
-+ data[i+6] = mmc_spi_read_only();
-+ data[i+7] = mmc_spi_read_only();
-+ data[i+8] = mmc_spi_read_only();
-+ data[i+9] = mmc_spi_read_only();
-+ data[i+10] = mmc_spi_read_only();
-+ data[i+11] = mmc_spi_read_only();
-+ data[i+12] = mmc_spi_read_only();
-+ data[i+13] = mmc_spi_read_only();
-+ data[i+14] = mmc_spi_read_only();
-+ data[i+15] = mmc_spi_read_only();
-+ data[i+16] = mmc_spi_read_only();
-+ data[i+17] = mmc_spi_read_only();
-+ data[i+18] = mmc_spi_read_only();
-+ data[i+19] = mmc_spi_read_only();
-+ data[i+20] = mmc_spi_read_only();
-+ data[i+21] = mmc_spi_read_only();
-+ data[i+22] = mmc_spi_read_only();
-+ data[i+23] = mmc_spi_read_only();
-+ data[i+24] = mmc_spi_read_only();
-+ data[i+25] = mmc_spi_read_only();
-+ data[i+26] = mmc_spi_read_only();
-+ data[i+27] = mmc_spi_read_only();
-+ data[i+28] = mmc_spi_read_only();
-+ data[i+29] = mmc_spi_read_only();
-+ data[i+30] = mmc_spi_read_only();
-+ data[i+31] = mmc_spi_read_only();
-+ }
-+
-+ result = mmc_spi_readwrite(0xff);
-+ result = mmc_spi_readwrite(0xff);
-+
-+ MMC_Disable();
-+ mmc_spi_readwrite(0xff);
-+
-+ return (0);
-+}
-+
-+/*
-+static int mmc_revalidate(kdev_t dev)
-+{
-+ int target, max_p, start, i;
-+
-+ mmc_media_detect = mmc_spi_media_detect();
-+
-+ if (mmc_media_detect == 0)
-+ {
-+ return -ENODEV;
-+ }
-+
-+ target = DEVICE_NR(dev);
-+
-+ max_p = hd_gendisk.max_p;
-+ start = target << 6;
-+ for (i = max_p - 1; i >= 0; i--)
-+ {
-+ int minor = start + i;
-+ invalidate_device(MKDEV(MAJOR_NR, minor), 1);
-+ hd_gendisk.part[minor].start_sect = 0;
-+ hd_gendisk.part[minor].nr_sects = 0;
-+ }
-+
-+ grok_partitions(&hd_gendisk, target, 1 << 6, hd_sizes[0] * 2);
-+
-+ return 0;
-+}
-+*/
-+
-+
-+static int mmc_ioctl(struct inode *inode, struct file *filp, unsigned int cmd,
-+ unsigned long arg)
-+{
-+ if (!inode || !inode->i_rdev)
-+ return -EINVAL;
-+
-+ switch (cmd) {
-+#if 0
-+ case BLKGETSIZE:
-+ return put_user(hd[MINOR(inode->i_rdev)].nr_sects,
-+ (unsigned long *)arg);
-+ case BLKGETSIZE64:
-+ return put_user((u64) hd[MINOR(inode->i_rdev)].
-+ nr_sects, (u64 *) arg);
-+ case BLKRRPART:
-+ if (!capable(CAP_SYS_ADMIN))
-+ return -EACCES;
-+
-+ return mmc_revalidate(inode->i_rdev);
-+#endif
-+ case HDIO_GETGEO:
-+ {
-+ struct block_device *bdev = inode->i_bdev;
-+ struct hd_geometry *loc, g;
-+ loc = (struct hd_geometry *)arg;
-+ if (!loc)
-+ return -EINVAL;
-+ memset(loc, 0, sizeof(struct hd_geometry));
-+ g.heads = 4;
-+ g.sectors = 16;
-+ g.cylinders = get_capacity(bdev->bd_disk) / (4*16);
-+ g.start = get_start_sect(bdev);
-+ return copy_to_user(loc, &g, sizeof(g)) ? -EFAULT : 0;
-+ }
-+ default:
-+ return -ENOTTY;
-+ }
-+}
-+
-+
-+/*
-+static int mmc_check_media_change(kdev_t dev)
-+{
-+ (void) dev;
-+ if (mmc_media_changed == 1)
-+ {
-+ mmc_media_changed = 0;
-+ return 1;
-+ }
-+ else
-+ {
-+ return 0;
-+ }
-+}
-+*/
-+
-+
-+/*
-+static int mmc_init(void)
-+{
-+ int result;
-+
-+ result = mmc_spi_hardware_init();
-+
-+ if (result != 0)
-+ {
-+ printk("mmc: error %d in mmc_spi_hardware_init\n", result);
-+ return -1;
-+ }
-+
-+
-+ result = mmc_spi_hw_test();
-+
-+ if (result != 0)
-+ {
-+ printk("\n mmc: mmc_spi_hw_test i.O. \n\n");
-+ return -1;
-+ }
-+
-+
-+ result = mmc_spi_speed_test();
-+
-+ if (result != 0)
-+ {
-+ printk("\n mmc: mmc_spi_speed_test i.O. \n\n");
-+ return -1;
-+ }
-+
-+
-+ result = mmc_spi_card_init();
-+ mdelay(50);
-+ if (result != 0)
-+ {
-+ // Give it an extra shot
-+ // result = mmc_spi_card_init();
-+ if (result != 0)
-+ {
-+ printk("mmc: error %d in mmc_card_init\n", result);
-+ return -1;
-+ }
-+ }
-+
-+ result = mmc_spi_card_config();
-+ if (result != 0)
-+ {
-+ printk("mmc: error %d in mmc_card_config\n", result);
-+ return -1;
-+ }
-+
-+
-+ return 0;
-+}
-+*/
-+
-+/*
-+static void mmc_exit(void)
-+{
-+}
-+*/
-+
-+
-+/*
-+static void mmc_check_media(void)
-+{
-+ int old_state, new_state;
-+ int result;
-+
-+ old_state = mmc_media_detect;
-+ new_state = mmc_spi_media_detect();
-+
-+ if (old_state != new_state)
-+ {
-+ mmc_media_changed = 1;
-+ if (new_state == PRESENT)
-+ {
-+ result = mmc_init();
-+ if (result != 0)
-+ {
-+ printk("mmc: error %d in mmc_init\n", result);
-+ }
-+ else
-+ {
-+ mmc_exit();
-+ }
-+ }
-+ }
-+
-+#ifdef CHECK_MEDIA_CHANGE
-+ del_timer(&mmc_timer);
-+ mmc_timer.expires = jiffies + 10*HZ;
-+ add_timer(&mmc_timer);
-+#endif
-+
-+}
-+*/
-+
-+
-+/* NB: There might be several requests in the queue, simply dequeuing only one
-+ and not checking for more will cause a stall because the block subsystem
-+ will not call this function again unless the queue is "plugged" which can
-+ only happen if it runs empty... */
-+static void mmc_spi_request(struct request_queue *q)
-+{
-+ struct request *req;
-+ int ret;
-+
-+ unsigned int mmc_address;
-+ unsigned char *buffer_address;
-+ int nr_sectors;
-+ int i;
-+ int result, success;
-+
-+ if (blk_queue_plugged(q)) {
-+ return;
-+ }
-+
-+ spin_lock(&mmc_spi_lock);
-+ for(;;) {
-+ req = elv_next_request(q);
-+ if (!req)
-+ break;
-+
-+ if (!blk_fs_request(req)) {
-+ printk("not a blk_fs_request\n");
-+ spin_unlock(&mmc_spi_lock);
-+ continue;
-+ }
-+
-+ mmc_address = req->sector * hd_hardsectsizes[0];
-+ buffer_address = req->buffer;
-+ nr_sectors = req->current_nr_sectors;
-+ success = 1;
-+ if (rq_data_dir(req) == READ) {
-+ spin_unlock_irq(q->queue_lock);
-+ for (i = 0; i < nr_sectors; i++) {
-+ result = mmc_spi_read_block(buffer_address, mmc_address);
-+ if (unlikely(result < 0)) {
-+ printk(KERN_ERR "mmi_spi_block: error reading block (%d)\n", result);
-+ success = 0;
-+ break;
-+ }
-+ mmc_address += hd_hardsectsizes[0];
-+ buffer_address += hd_hardsectsizes[0];
-+ }
-+ spin_lock_irq(q->queue_lock);
-+ } else {
-+ spin_unlock_irq(q->queue_lock);
-+ for (i = 0; i < nr_sectors; i++) {
-+ result = mmc_spi_write_block(mmc_address, buffer_address);
-+ if (unlikely(result < 0)) {
-+ printk(KERN_ERR "mmi_spi_block: error writing block (%d)\n", result);
-+ success = 0;
-+ break;
-+ }
-+ mmc_address += hd_hardsectsizes[0];
-+ buffer_address += hd_hardsectsizes[0];
-+ }
-+ spin_lock_irq(q->queue_lock);
-+ }
-+ ret = end_that_request_chunk(req, success, nr_sectors * hd_hardsectsizes[0]);
-+ if (!ret) {
-+ blkdev_dequeue_request(req);
-+ end_that_request_last(req, 0);
-+ }
-+ }
-+ spin_unlock(&mmc_spi_lock);
-+}
-+
-+
-+static int mmc_open(struct inode *inode, struct file *filp)
-+{
-+ // int device;
-+ (void) filp;
-+ mmc_media_detect = mmc_spi_media_detect();
-+
-+ if (mmc_media_detect == 0)
-+ return -ENODEV;
-+
-+ return 0;
-+}
-+
-+static int mmc_release(struct inode *inode, struct file *filp)
-+{
-+ return 0;
-+}
-+
-+
-+static struct block_device_operations mmc_spi_bdops = {
-+ .open = mmc_open,
-+ .release = mmc_release,
-+ .ioctl = mmc_ioctl,
-+ .owner = THIS_MODULE,
-+#if 0
-+ .check_media_change = mmc_check_media_change,
-+ .revalidate = mmc_revalidate,
-+#endif
-+};
-+
-+static int detect_card(void)
-+{
-+ int result;
-+
-+ result = mmc_spi_card_init();
-+ if (result != 0) {
-+ // Give it an extra shot
-+ result = mmc_spi_card_init();
-+ if (result != 0) {
-+ printk(KERN_ERR "mmc_spi_block: error in mmc_card_init (%d)\n", result);
-+ return -ENODEV;
-+ }
-+ }
-+
-+ result = mmc_spi_card_config();
-+ // result = mmc_spi_speed_test();
-+ if (result != 0) {
-+ printk(KERN_ERR "mmc_spi_block: error in mmc_card_config (%d)\n", result);
-+ return -ENODEV;
-+ }
-+
-+ return 0;
-+}
-+
-+/* Fills in the gendisk structure from the received card
-+ data. */
-+static int gendisk_init(struct device *dev, struct gendisk *gd)
-+{
-+ if (!gd)
-+ return -EINVAL;
-+
-+ gd->major = major;
-+ gd->first_minor = 0; /* only one device supported */
-+ gd->fops = &mmc_spi_bdops;
-+ gd->driverfs_dev = dev;
-+
-+ gd->queue = blk_init_queue(mmc_spi_request,NULL);
-+
-+ if (!gd->queue)
-+ return -ENOMEM;
-+
-+ sprintf(gd->disk_name, "mmcblk");
-+
-+ blk_queue_hardsect_size(gd->queue, hd_hardsectsizes[0]);
-+
-+ set_capacity(gd, hd_sizes[0]<<1);
-+
-+ return 0;
-+}
-+
-+static int gendisk_fini(struct gendisk *gd)
-+{
-+ BUG_ON(!gd);
-+
-+ if (gd->queue)
-+ blk_cleanup_queue(gd->queue);
-+
-+ del_gendisk(gd);
-+
-+ return 0;
-+}
-+
-+/* platform driver device instance routines */
-+static int mmc_spi_probe(struct platform_device *pdev)
-+{
-+ int result;
-+ printk("$Id: mmc_spi_block.c,v 1.05 2008/01/04 01:02:10 mrdata Exp $\n");
-+
-+ result = mmc_spi_hardware_init();
-+ if (result != 0) {
-+ printk(KERN_ERR "mmc_spi_block: error in mmc_spi_hardware_init (%d)\n", result);
-+ result = -ENODEV;
-+ return result;
-+ }
-+
-+ result = detect_card();
-+ if (result < 0)
-+ return result;
-+
-+ mmc_media_detect = 1;
-+
-+ result = register_blkdev(major, DEVICE_NAME);
-+ if (result < 0)
-+ return result;
-+
-+ if (!major)
-+ major = result;
-+
-+ /* allow 8 partitions per device */
-+ BUG_ON(mmc_disk!=NULL);
-+ mmc_disk = alloc_disk(1 << 3);
-+ if (!mmc_disk) {
-+ result = -ENOMEM;
-+ goto out;
-+ }
-+
-+ result = gendisk_init(&pdev->dev, mmc_disk);
-+ if (result < 0)
-+ goto out;
-+
-+ add_disk(mmc_disk);
-+
-+ /*init_timer(&mmc_timer);
-+ mmc_timer.expires = jiffies + HZ;
-+ mmc_timer.function = (void *)mmc_check_media;
-+ add_timer(&mmc_timer); */
-+ return 0;
-+
-+out:
-+ if (mmc_disk)
-+ put_disk(mmc_disk);
-+
-+ unregister_blkdev(major, DEVICE_NAME);
-+ return result;
-+}
-+
-+static int mmc_spi_remove(struct platform_device *dev)
-+{
-+ // int ret;
-+
-+ if (mmc_disk) {
-+ gendisk_fini(mmc_disk);
-+ put_disk(mmc_disk);
-+ }
-+
-+ // ret = unregister_blkdev(major, DEVICE_NAME);
-+ unregister_blkdev(major, DEVICE_NAME);
-+ return 0;
-+}
-+
-+struct platform_driver mmc_spi_driver = {
-+ .probe = mmc_spi_probe,
-+ .remove = mmc_spi_remove,
-+ .driver = {
-+ .name = "mmc_spi_block",
-+ .owner = THIS_MODULE,
-+ },
-+};
-+
-+
-+/* module init/exit */
-+static int __init mmc_spi_block_init(void)
-+{
-+ int ret;
-+ spin_lock_init(&mmc_spi_lock);
-+
-+ ret = platform_driver_register(&mmc_spi_driver);
-+ if (ret < 0)
-+ return ret;
-+
-+ /* we just support one device */
-+ mmc_dev = platform_device_register_simple("mmc_spi_block", -1, NULL, 0);
-+ if (IS_ERR(mmc_dev))
-+ return PTR_ERR(mmc_dev);
-+
-+ return 0;
-+}
-+
-+
-+static void __exit mmc_spi_block_exit(void)
-+{
-+ platform_driver_unregister(&mmc_spi_driver);
-+ if (mmc_dev)
-+ platform_device_unregister(mmc_dev);
-+}
-+
-+
-+module_init(mmc_spi_block_init);
-+module_exit(mmc_spi_block_exit);
-+
-+MODULE_AUTHOR("Madsuk,Rohde,TaGana,Carsten Juttner <carjay@gmx.net>,Guylhem Aznar <mmc-driver@externe.net>,mrdata");
-+MODULE_DESCRIPTION("Driver for MMC/SD-Cards in SPI mode over GPIO (Software SPI)");
-+MODULE_SUPPORTED_DEVICE("SIMpad");
-+MODULE_LICENSE("GPL");
-+
-+module_param(major, int, 0444);
-+MODULE_PARM_DESC(major, "specify the major device number for the MMC/SD SPI driver");
+++ /dev/null
-diff -Nur linux-2.6.24.vanilla/drivers/mfd/Makefile linux-2.6.24/drivers/mfd/Makefile
---- linux-2.6.24.vanilla/drivers/mfd/Makefile 2008-01-24 23:58:37.000000000 +0100
-+++ linux-2.6.24/drivers/mfd/Makefile 2008-02-20 21:27:39.000000000 +0100
-@@ -12,3 +12,7 @@
- ifeq ($(CONFIG_SA1100_ASSABET),y)
- obj-$(CONFIG_MCP_UCB1200) += ucb1x00-assabet.o
- endif
-+
-+ifeq ($(CONFIG_SA1100_SIMPAD),y)
-+obj-$(CONFIG_MCP_UCB1200) += ucb1x00-simpad.o
-+endif
-diff -Nur linux-2.6.24.vanilla/drivers/mfd/ucb1x00-simpad.c linux-2.6.24/drivers/mfd/ucb1x00-simpad.c
---- linux-2.6.24.vanilla/drivers/mfd/ucb1x00-simpad.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.24/drivers/mfd/ucb1x00-simpad.c 2008-02-20 21:27:39.000000000 +0100
-@@ -0,0 +1,226 @@
-+/*
-+ * linux/drivers/mfd/ucb1x00-simpad.c
-+ *
-+ * Copyright (C) 2001-2003 Russell King, All Rights Reserved.
-+ * 2007/03/18 mrdata:
-+ * - adapted ucb1x00-assabet.c
-+ * - transfer ucb1x00-simpad.c from kernel24
-+ * to new structur of kernel26
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License.
-+ *
-+ * We handle the machine-specific bits of the UCB1x00 driver here.
-+ */
-+#include <linux/module.h>
-+#include <linux/init.h>
-+#include <linux/fs.h>
-+#include <linux/proc_fs.h>
-+#include <linux/device.h>
-+
-+#include <linux/apm-emulation.h>
-+
-+#include <asm/dma.h>
-+
-+#include <asm/arch/simpad.h>
-+#include <asm/arch-sa1100/simpad_pm.h>
-+
-+#include "ucb1x00.h"
-+#include "ucb1x00-simpad.h"
-+
-+#define UCB1X00_ATTR(name,input,designation) \
-+static ssize_t name##_show(struct class_device *dev, char *buf) \
-+{ \
-+ struct ucb1x00 *ucb = classdev_to_ucb1x00(dev); \
-+ int val; \
-+ ucb1x00_adc_enable(ucb); \
-+ val = ucb1x00_adc_read(ucb, input, UCB_NOSYNC); \
-+ ucb1x00_adc_disable(ucb); \
-+ return sprintf(buf, "%d\n", CALIBRATE_##designation(val)); \
-+} \
-+static CLASS_DEVICE_ATTR(name,0444,name##_show,NULL)
-+
-+UCB1X00_ATTR(vbatt, UCB_ADC_INP_AD1, BATTERY);
-+UCB1X00_ATTR(vcharger, UCB_ADC_INP_AD2, SUPPLY);
-+UCB1X00_ATTR(icharger, UCB_ADC_INP_AD3, CHARGING);
-+
-+static struct ucb1x00 *ucb_alt;
-+
-+#define UCB1X00_WERT(name,input,designation) \
-+static int ucb1x00_simpad_read_##name(struct ucb1x00 *ucb_alt) \
-+{ \
-+ int val; \
-+ ucb1x00_adc_enable(ucb_alt); \
-+ val = ucb1x00_adc_read(ucb_alt, input, UCB_NOSYNC); \
-+ ucb1x00_adc_disable(ucb_alt); \
-+ return CALIBRATE_##designation(val); \
-+}
-+
-+UCB1X00_WERT(vbatt, UCB_ADC_INP_AD1, BATTERY);
-+UCB1X00_WERT(vcharger, UCB_ADC_INP_AD2, SUPPLY);
-+UCB1X00_WERT(icharger, UCB_ADC_INP_AD3, CHARGING);
-+
-+static int ucb1x00_simpad_add(struct ucb1x00_dev *dev)
-+{
-+ class_device_create_file(&dev->ucb->cdev, &class_device_attr_vbatt);
-+ class_device_create_file(&dev->ucb->cdev, &class_device_attr_vcharger);
-+ class_device_create_file(&dev->ucb->cdev, &class_device_attr_icharger);
-+ ucb_alt = dev->ucb;
-+ return 0;
-+}
-+
-+static void ucb1x00_simpad_remove(struct ucb1x00_dev *dev)
-+{
-+ class_device_remove_file(&dev->ucb->cdev, &class_device_attr_icharger);
-+ class_device_remove_file(&dev->ucb->cdev, &class_device_attr_vcharger);
-+ class_device_remove_file(&dev->ucb->cdev, &class_device_attr_vbatt);
-+}
-+
-+static struct ucb1x00_driver ucb1x00_simpad_driver = {
-+ .add = ucb1x00_simpad_add,
-+ .remove = ucb1x00_simpad_remove,
-+};
-+
-+static int __init ucb1x00_simpad_init(void)
-+{
-+ apm_get_power_status = simpad_apm_get_power_status;
-+ return ucb1x00_register_driver(&ucb1x00_simpad_driver);
-+}
-+
-+static void __exit ucb1x00_simpad_exit(void)
-+{
-+ apm_get_power_status = NULL;
-+ ucb1x00_unregister_driver(&ucb1x00_simpad_driver);
-+}
-+
-+/****************************************************************************/
-+/* Functions exported for use by the kernel and kernel modules */
-+/****************************************************************************/
-+
-+int simpad_get_battery(struct simpad_battery_apm *bstat)
-+{
-+ int icharger, vcharger, vbatt;
-+
-+ if ( ucb_alt ) {
-+ icharger = ucb1x00_simpad_read_icharger( ucb_alt );
-+ vcharger = ucb1x00_simpad_read_vcharger( ucb_alt );
-+ vbatt = ucb1x00_simpad_read_vbatt( ucb_alt );
-+ } else {
-+ bstat->ac_status = SIMPAD_AC_STATUS_AC_UNKNOWN;
-+ bstat->status = SIMPAD_BATT_STATUS_UNKNOWN;
-+ bstat->percentage = 0x64; // lets say 100%
-+ bstat->life = 330; // lets say a long time
-+ return 0;
-+ }
-+
-+ /* AC status */
-+ bstat->ac_status = SIMPAD_AC_STATUS_AC_OFFLINE;
-+ if ( vcharger>MIN_SUPPLY ) {
-+ bstat->ac_status = SIMPAD_AC_STATUS_AC_ONLINE;
-+ }
-+
-+ /* charging */
-+ bstat->status = 0x0;
-+ if ( icharger >= CHARGING_LED_LEVEL )
-+ bstat->status = SIMPAD_BATT_STATUS_CHARGING;
-+
-+ if ( vbatt > BATT_LOW )
-+ bstat->status |= SIMPAD_BATT_STATUS_HIGH;
-+ else if ( vbatt < BATT_CRITICAL )
-+ bstat->status |= SIMPAD_BATT_STATUS_CRITICAL;
-+ else
-+ bstat->status |= SIMPAD_BATT_STATUS_LOW;
-+
-+ if (bstat->status & SIMPAD_BATT_STATUS_CHARGING) {
-+ if (icharger > CHARGING_MAX_LEVEL)
-+ icharger = CHARGING_MAX_LEVEL;
-+ if (icharger < CHARGING_LED_LEVEL)
-+ icharger = CHARGING_LED_LEVEL;
-+
-+ bstat->percentage = 100 - 100 * (icharger - CHARGING_LED_LEVEL) /
-+ (CHARGING_MAX_LEVEL - CHARGING_LED_LEVEL);
-+ } else {
-+ if (vbatt > BATT_FULL)
-+ vbatt = BATT_FULL;
-+ if (vbatt < BATT_EMPTY)
-+ vbatt = BATT_EMPTY;
-+
-+ bstat->percentage = 100 * (vbatt - BATT_EMPTY) / (BATT_FULL - BATT_EMPTY);
-+ }
-+
-+ /* let's assume: full load is 7h */
-+ /* bstat->life = 420*bstat->percentage/100; */
-+ /* mrdata: think, 4h is more realistic */
-+ bstat->life = 240*(bstat->percentage)/100;
-+
-+#if 0
-+ printk("get_battery: ac: %02x / ch: %02x / perc: %02x / life: %d \n",
-+ bstat->ac_status, bstat->status,
-+ bstat->percentage, bstat->life );
-+#endif
-+
-+ return 0;
-+}
-+
-+void simpad_apm_get_power_status(struct apm_power_info *info)
-+{
-+ struct simpad_battery_apm bstat;
-+ unsigned char ac = APM_AC_UNKNOWN;
-+ unsigned char level = APM_BATTERY_STATUS_UNKNOWN;
-+ int status, result;
-+
-+ result = simpad_get_battery(&bstat);
-+ if (result) {
-+ printk("%s: unable to access battery information: result=%d\n", __FUNCTION__, result);
-+ return;
-+ }
-+
-+ switch (bstat.ac_status) {
-+ case SIMPAD_AC_STATUS_AC_OFFLINE:
-+ ac = APM_AC_OFFLINE;
-+ break;
-+ case SIMPAD_AC_STATUS_AC_ONLINE:
-+ ac = APM_AC_ONLINE;
-+ break;
-+ case SIMPAD_AC_STATUS_AC_BACKUP:
-+ ac = APM_AC_BACKUP;
-+ break;
-+ }
-+
-+ info->ac_line_status = ac;
-+
-+ status = bstat.status;
-+ if (status & (SIMPAD_BATT_STATUS_CHARGING | SIMPAD_BATT_STATUS_CHARGE_MAIN))
-+ level = APM_BATTERY_STATUS_CHARGING;
-+ else if (status & (SIMPAD_BATT_STATUS_HIGH | SIMPAD_BATT_STATUS_FULL))
-+ level = APM_BATTERY_STATUS_HIGH;
-+ else if (status & SIMPAD_BATT_STATUS_LOW)
-+ level = APM_BATTERY_STATUS_LOW;
-+ else if (status & SIMPAD_BATT_STATUS_CRITICAL)
-+ level = APM_BATTERY_STATUS_CRITICAL;
-+
-+ info->battery_status = level;
-+ info->battery_flag = info->battery_status;
-+
-+ info->battery_life = bstat.percentage;
-+
-+ /* we have a dumb battery - so we know nothing */
-+ info->time = bstat.life;
-+ info->units = APM_UNITS_MINS;
-+
-+#if 0
-+ printk("apm_get_power: ac: %02x / bs: %02x / bf: %02x / perc: %02x / life: %d\n",
-+ info->ac_line_status, info->battery_status, info->battery_flag,
-+ info->battery_life, info->time );
-+#endif
-+ return;
-+}
-+
-+module_init(ucb1x00_simpad_init);
-+module_exit(ucb1x00_simpad_exit);
-+
-+
-+MODULE_AUTHOR("Juergen Messerer <juergen.messerer@freesurf.ch>");
-+MODULE_DESCRIPTION("SIMpad noddy testing only example ADC driver");
-+MODULE_LICENSE("GPL");
-diff -Nur linux-2.6.24.vanilla/drivers/mfd/ucb1x00-simpad.h linux-2.6.24/drivers/mfd/ucb1x00-simpad.h
---- linux-2.6.24.vanilla/drivers/mfd/ucb1x00-simpad.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.24/drivers/mfd/ucb1x00-simpad.h 2008-02-20 21:27:39.000000000 +0100
-@@ -0,0 +1,86 @@
-+/*
-+ * linux/drivers/mfd/ucb1x00-simpad.h
-+ *
-+ * Copyright (C) 2001 Russell King, All Rights Reserved.
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License.
-+ */
-+#ifndef UCB1300_SIMPAD_H
-+#define UCB1300_SIMPAD_H
-+
-+/*
-+ * Conversion from AD -> mV
-+ * 7.5V = 1023 7.33137mV/Digit
-+ *
-+ * 400 Units == 9.7V
-+ * a = ADC value
-+ * 2007/03/24 mrdata:
-+ * according UCB1300 datasheet ADC error max. 3 LSB
-+ * 5-95% of full scale -> 3*7.33137mV = 21.99mV
-+ * // old
-+ * 21 = ADC error
-+ * 12600 = Divident to get 2*7.3242
-+ * 860 = Divider to get 2*7.3242
-+ * 170 = Voltagedrop over
-+ *
-+ * // new
-+ * 3 = ADC error
-+ * 12610 = Divident to get 2*7.33139
-+ * 860 = Divider to get 2*7.33139
-+ * 170 = Voltagedrop over
-+ */
-+// #define CALIBRATE_BATTERY(a) ((((a + 21)*12600)/860) + 170)
-+#define CALIBRATE_BATTERY(a) ((((a + 3)*12610)/860) + 170)
-+
-+/*
-+ * We have two types of batteries a small and a large one
-+ * To get the right value we to distinguish between those two
-+ * 450 Units == 15 V
-+ */
-+#ifdef SMALL_BATTERY
-+#define CALIBRATE_SUPPLY(a) (((a) * 1500) / 51)
-+#define MIN_SUPPLY 8500 /* Less then 8.5V means no powersupply */
-+#else
-+#define CALIBRATE_SUPPLY(a) (((a) * 1500) / 45)
-+//#define MIN_SUPPLY 14000 /* Less then 14V means no powersupply */
-+#define MIN_SUPPLY 12000 /* Less then 12V means no powersupply */
-+#endif
-+
-+/*
-+ * Charging Current
-+ * if value is >= 50 then charging is on
-+ */
-+// #define CALIBRATE_CHARGING(a) (((a) * 1000) / (152/4))
-+#define CALIBRATE_CHARGING(a) (a)
-+//#define CHARGING_LED_LEVEL 50
-+
-+#ifdef CONFIG_SA1100_SIMPAD_SINUSPAD
-+
-+// type small battery
-+#define CHARGING_LED_LEVEL 12
-+#define CHARGING_MAX_LEVEL 120
-+#define BATT_FULL 8100
-+#define BATT_LOW 7300
-+#define BATT_CRITICAL 6700
-+#define BATT_EMPTY 6400
-+
-+#else // CONFIG_SA1100_SIMPAD_SINUSPAD
-+
-+// type large battery
-+// because of ADC error CHARGING_LED_LEVEL can changed
-+// from 27 to 28
-+#define CHARGING_LED_LEVEL 27
-+#define CHARGING_MAX_LEVEL 265
-+// BATT_FULL with SIMPAD_AC_STATUS_AC_OFFLINE
-+#define BATT_FULL 8100
-+#define BATT_LOW 7400
-+#define BATT_CRITICAL 6800
-+#define BATT_EMPTY 6500
-+
-+#endif // CONFIG_SA1100_SIMPAD_SINUSPAD
-+
-+// int simpad_get_battery(struct simpad_battery_apm *bstat);
-+
-+#endif
-diff -Nur linux-2.6.24.vanilla/include/asm-arm/arch-sa1100/simpad_pm.h linux-2.6.24/include/asm-arm/arch-sa1100/simpad_pm.h
---- linux-2.6.24.vanilla/include/asm-arm/arch-sa1100/simpad_pm.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.24/include/asm-arm/arch-sa1100/simpad_pm.h 2008-02-20 21:27:39.000000000 +0100
-@@ -0,0 +1,236 @@
-+/*
-+* Abstraction interface for microcontroller connection to rest of system
-+*
-+* Copyright 2003 Peter Pregler
-+* Copyright 2000,1 Compaq Computer Corporation.
-+*
-+* Use consistent with the GNU GPL is permitted,
-+* provided that this copyright notice is
-+* preserved in its entirety in all copies and derived works.
-+*
-+* COMPAQ COMPUTER CORPORATION MAKES NO WARRANTIES, EXPRESSED OR IMPLIED,
-+* AS TO THE USEFULNESS OR CORRECTNESS OF THIS CODE OR ITS
-+* FITNESS FOR ANY PARTICULAR PURPOSE.
-+*
-+* Author: Peter Pregler (based on work for ipaq by Andrew Christian)
-+*
-+*/
-+
-+#ifndef __SIMPAD_HAL_H
-+#define __SIMPAD_HAL_H
-+
-+#include <linux/apm-emulation.h>
-+
-+struct simpad_battery_apm {
-+ unsigned char ac_status; /* line connected yes/no */
-+ unsigned char status; /* battery loading yes/no */
-+ unsigned char percentage; /* percentage loaded */
-+ unsigned short life; /* life till empty */
-+};
-+
-+extern void simpad_apm_get_power_status(struct apm_power_info *);
-+
-+// extern int simpad_get_battery(struct simpad_battery_apm *bstat);
-+
-+/* These should match the apm_bios.h definitions */
-+#define SIMPAD_AC_STATUS_AC_OFFLINE 0x00
-+#define SIMPAD_AC_STATUS_AC_ONLINE 0x01
-+#define SIMPAD_AC_STATUS_AC_BACKUP 0x02 /* What does this mean? */
-+#define SIMPAD_AC_STATUS_AC_UNKNOWN 0xff
-+
-+
-+/* These bitfields are rarely "or'd" together */
-+#define SIMPAD_BATT_STATUS_HIGH 0x01
-+#define SIMPAD_BATT_STATUS_LOW 0x02
-+#define SIMPAD_BATT_STATUS_CRITICAL 0x04
-+#define SIMPAD_BATT_STATUS_CHARGING 0x08
-+#define SIMPAD_BATT_STATUS_CHARGE_MAIN 0x10
-+#define SIMPAD_BATT_STATUS_DEAD 0x20 /* Battery will not charge */
-+#define SIMPAD_BATT_NOT_INSTALLED 0x20 /* For expansion pack batteries */
-+#define SIMPAD_BATT_STATUS_FULL 0x40 /* Battery fully charged (and connected to AC) */
-+#define SIMPAD_BATT_STATUS_NOBATT 0x80
-+#define SIMPAD_BATT_STATUS_UNKNOWN 0xff
-+
-+#if 0 // FIXME
-+#include <linux/simpad_ts.h>
-+
-+enum simpad_asset_type {
-+ ASSET_TCHAR = 0,
-+ ASSET_SHORT,
-+ ASSET_LONG
-+};
-+
-+#define TTYPE(_type) (((unsigned int)_type) << 8)
-+#define TCHAR(_len) (TTYPE(ASSET_TCHAR) | (_len))
-+#define TSHORT TTYPE(ASSET_SHORT)
-+#define TLONG TTYPE(ASSET_LONG)
-+#define ASSET(_type,_num) ((((unsigned int)_type)<<16) | (_num))
-+
-+#define ASSET_HM_VERSION ASSET( TCHAR(10), 0 ) /* 1.1, 1.2 */
-+#define ASSET_SERIAL_NUMBER ASSET( TCHAR(40), 1 ) /* Unique iPAQ serial number */
-+#define ASSET_MODULE_ID ASSET( TCHAR(20), 2 ) /* E.g., "iPAQ 3700" */
-+#define ASSET_PRODUCT_REVISION ASSET( TCHAR(10), 3 ) /* 1.0, 2.0 */
-+#define ASSET_PRODUCT_ID ASSET( TSHORT, 4 ) /* 2 = Palm-sized computer */
-+#define ASSET_FRAME_RATE ASSET( TSHORT, 5 )
-+#define ASSET_PAGE_MODE ASSET( TSHORT, 6 ) /* 0 = Flash memory */
-+#define ASSET_COUNTRY_ID ASSET( TSHORT, 7 ) /* 0 = USA */
-+#define ASSET_IS_COLOR_DISPLAY ASSET( TSHORT, 8 ) /* Boolean, 1 = yes */
-+#define ASSET_ROM_SIZE ASSET( TSHORT, 9 ) /* 16, 32 */
-+#define ASSET_RAM_SIZE ASSET( TSHORT, 10 ) /* 32768 */
-+#define ASSET_HORIZONTAL_PIXELS ASSET( TSHORT, 11 ) /* 240 */
-+#define ASSET_VERTICAL_PIXELS ASSET( TSHORT, 12 ) /* 320 */
-+
-+#define ASSET_TYPE(_asset) (((_asset)&0xff000000)>>24)
-+#define ASSET_TCHAR_LEN(_asset) (((_asset)&0x00ff0000)>>16)
-+#define ASSET_NUMBER(_asset) ((_asset)&0x0000ffff)
-+
-+#define MAX_TCHAR_LEN 40
-+
-+struct simpad_asset {
-+ unsigned int type;
-+ union {
-+ unsigned char tchar[ MAX_TCHAR_LEN ];
-+ unsigned short vshort;
-+ unsigned long vlong;
-+ } a;
-+};
-+
-+/********************************************************************
-+ * Interface to the hardware-type specific functions
-+ *
-+ * get_version Read the version number of the microcontroller on the option pack SPI bus
-+ * spi_read Reads from the serial EEPROM memory on the option pack SPI bus
-+ * spi_write Write to the serial EEPROM memory on the option pack SPI bus
-+ * get_option_detect Returns whether or not an option pack is present
-+ *
-+ * get_thermal_sensor Return measured temperature of the unit, in units of 0.125 deg C
-+ * set_notify_led Turns on, off, or blinks the Green LED
-+ * read_light_sensor Returns the value of the front light sensor
-+ * get_battery Returns the current voltage and charging state of all batteries
-+ * audio_clock Sets the audio CODEC to run at a particular rate
-+ * audio_power Turns on/off audio CODEC (internally calls audio_clock)
-+ * audio_mute Mutes the audio CODEC
-+ * asset_read Extracts PocketPC-style asset information from persistent memory
-+ * backlight_control Adjusts the backlight level (only on/off for 3100)
-+ *
-+ *
-+ * iPAQ 3100 only
-+ * ==============
-+ * codec_control Reset/mute/control level of 3100 audio codec
-+ * contrast_control Adjusts the contrast level (only for 3100)
-+ *
-+ * iPAQ 3600, 3700 only
-+ * ====================
-+ * eeprom_read Reads from the asset information on the eeprom of a 3600 (deprecated)
-+ * eeprom_write Writes to the asset information on the eeprom (deprecated)
-+ *
-+ * The interfaces to the EEPROM functions are maintained only because the simpad_ts driver has
-+ * a deprecated ioctl call for them. They are used internally by the "asset_read" function.
-+ *
-+ * iPAQ 3800, 3900 only
-+ * ====================
-+ * set_ebat Tells enhanced PCMCIA sleeves that this iPAQ can handle
-+ * a wider voltage range (applies to 3800, 3900)
-+ *
-+ *********************************************************************/
-+
-+struct simpad_hal_ops {
-+ /* Functions provided by the underlying hardware */
-+ int (*get_version)( struct simpad_ts_version * );
-+ int (*eeprom_read)( unsigned short address, unsigned char *data, unsigned short len );
-+ int (*eeprom_write)( unsigned short address, unsigned char *data, unsigned short len );
-+ int (*get_thermal_sensor)( unsigned short * );
-+ int (*set_notify_led)( unsigned char mode, unsigned char duration,
-+ unsigned char ontime, unsigned char offtime );
-+ int (*read_light_sensor)( unsigned char *result );
-+ int (*get_battery)( struct simpad_battery * );
-+ int (*spi_read)( unsigned short address, unsigned char *data, unsigned short len );
-+ int (*spi_write)( unsigned short address, unsigned char *data, unsigned short len );
-+ int (*codec_control)( unsigned char, unsigned char );
-+ int (*get_option_detect)( int *result );
-+ int (*audio_clock)( long samplerate );
-+ int (*audio_power)( long samplerate );
-+ int (*audio_mute)( int mute );
-+ int (*asset_read)( struct simpad_asset *asset );
-+ int (*set_ebat)( void );
-+
-+ /* Functions indirectly provided by the underlying hardware */
-+ int (*backlight_control)( enum flite_pwr power, unsigned char level );
-+ int (*contrast_control)( unsigned char level );
-+
-+ /* for module use counting */
-+ struct module *owner;
-+};
-+
-+/* Used by the device-specific hardware module to register itself */
-+extern int simpad_hal_register_interface( struct simpad_hal_ops *ops );
-+extern void simpad_hal_unregister_interface( struct simpad_hal_ops *ops );
-+
-+/*
-+ * Calls into HAL from the device-specific hardware module
-+ * These run at interrupt time
-+ */
-+extern void simpad_hal_keypress( unsigned char key );
-+extern void simpad_hal_touchpanel( unsigned short x, unsigned short y, int down );
-+extern void simpad_hal_option_detect( int present );
-+
-+/* Callbacks registered by device drivers */
-+struct simpad_driver_ops {
-+ void (*keypress)( unsigned char key );
-+ void (*touchpanel)( unsigned short x, unsigned short y, int down );
-+ void (*option_detect)( int present );
-+};
-+
-+extern int simpad_hal_register_driver( struct simpad_driver_ops * );
-+extern void simpad_hal_unregister_driver( struct simpad_driver_ops * );
-+
-+
-+/* Calls into HAL from device drivers and other kernel modules */
-+extern void simpad_get_flite( struct simpad_ts_backlight *bl );
-+extern void simpad_get_contrast( unsigned char *contrast );
-+extern int simpad_set_flite( enum flite_pwr pwr, unsigned char brightness );
-+extern int simpad_set_contrast( unsigned char contrast );
-+extern int simpad_toggle_frontlight( void );
-+
-+extern int simpad_apm_get_power_status(unsigned char *ac_line_status, unsigned char *battery_status,
-+ unsigned char *battery_flag, unsigned char *battery_percentage,
-+ unsigned short *battery_life);
-+
-+extern struct simpad_hal_ops *simpad_hal_ops;
-+
-+/* Do not use this macro in driver files - instead, use the inline functions defined below */
-+#define CALL_HAL( f, args... ) \
-+ { int __result = -EIO; \
-+ if ( simpad_hal_ops && simpad_hal_ops->f ) { \
-+ __MOD_INC_USE_COUNT(simpad_hal_ops->owner); \
-+ __result = simpad_hal_ops->f(args); \
-+ __MOD_DEC_USE_COUNT(simpad_hal_ops->owner); \
-+ } \
-+ return __result; }
-+
-+#define HFUNC static __inline__ int
-+
-+/* The eeprom_read/write address + len has a maximum value of 512. Both must be even numbers */
-+HFUNC simpad_eeprom_read( u16 addr, u8 *data, u16 len ) CALL_HAL(eeprom_read,addr,data,len)
-+HFUNC simpad_eeprom_write( u16 addr, u8 *data, u16 len) CALL_HAL(eeprom_write,addr,data,len)
-+HFUNC simpad_spi_read( u8 addr, u8 *data, u16 len) CALL_HAL(spi_read,addr,data,len)
-+HFUNC simpad_spi_write( u8 addr, u8 *data, u16 len) CALL_HAL(spi_write,addr,data,len)
-+HFUNC simpad_get_version( struct simpad_ts_version *v ) CALL_HAL(get_version,v)
-+HFUNC simpad_get_thermal_sensor( u16 *thermal ) CALL_HAL(get_thermal_sensor,thermal)
-+HFUNC simpad_set_led( u8 mode, u8 dur, u8 ont, u8 offt ) CALL_HAL(set_notify_led, mode, dur, ont, offt)
-+HFUNC simpad_get_light_sensor( u8 *result ) CALL_HAL(read_light_sensor,result)
-+HFUNC simpad_get_battery( struct simpad_battery *bat ) CALL_HAL(get_battery,bat)
-+HFUNC simpad_get_option_detect( int *result) CALL_HAL(get_option_detect,result)
-+HFUNC simpad_audio_clock( long samplerate ) CALL_HAL(audio_clock,samplerate)
-+HFUNC simpad_audio_power( long samplerate ) CALL_HAL(audio_power,samplerate)
-+HFUNC simpad_audio_mute( int mute ) CALL_HAL(audio_mute,mute)
-+HFUNC simpad_asset_read( struct simpad_asset *asset ) CALL_HAL(asset_read,asset)
-+HFUNC simpad_set_ebat( void ) CALL_HAL(set_ebat)
-+
-+/* Don't use these functions directly - rather, call {get,set}_{flite,contrast} */
-+ /* Functions indirectly provided by the underlying hardware */
-+HFUNC simpad_backlight_control( enum flite_pwr p, u8 v ) CALL_HAL(backlight_control,p,v)
-+HFUNC simpad_contrast_control( u8 level ) CALL_HAL(contrast_control,level)
-+
-+#endif
-+#endif
+++ /dev/null
-diff -uNr linux-2.6.24.vanilla/arch/arm/mach-sa1100/Makefile linux-2.6.24/arch/arm/mach-sa1100/Makefile
---- linux-2.6.24.vanilla/arch/arm/mach-sa1100/Makefile 2008-01-24 23:58:37.000000000 +0100
-+++ linux-2.6.24/arch/arm/mach-sa1100/Makefile 2008-02-20 20:49:57.000000000 +0100
-@@ -41,6 +41,7 @@
- obj-$(CONFIG_SA1100_SHANNON) += shannon.o
-
- obj-$(CONFIG_SA1100_SIMPAD) += simpad.o
-+obj-$(CONFIG_SA1100_SIMPAD) += cs3-simpad.o
- led-$(CONFIG_SA1100_SIMPAD) += leds-simpad.o
-
- # LEDs support
-diff -uNr linux-2.6.24.vanilla/arch/arm/mach-sa1100/cs3-simpad.c linux-2.6.24/arch/arm/mach-sa1100/cs3-simpad.c
---- linux-2.6.24.vanilla/arch/arm/mach-sa1100/cs3-simpad.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.24/arch/arm/mach-sa1100/cs3-simpad.c 2008-02-20 20:49:57.000000000 +0100
-@@ -0,0 +1,169 @@
-+/*
-+ * simpad-cs3.c
-+ *
-+ * This driver shows the GPIO states of the cs3 latch. You can also
-+ * switch some GPIOS.
-+ *
-+ * (c) 2007 Bernhard Guillon <Bernhard.Guillon@OpenSIMpad.org>
-+ *
-+ * You may use this code as per GPL version 2
-+ *
-+ * Some parts are based on battery.c
-+ *
-+ * mrdata: -added cs3_ro support
-+ * -added preprocessor stuff
-+ *
-+ */
-+
-+#include <linux/module.h>
-+#include <linux/types.h>
-+#include <linux/init.h>
-+#include <linux/device.h>
-+
-+#include <asm/arch/simpad.h>
-+
-+extern long get_cs3_ro(void);
-+extern long get_cs3_shadow(void);
-+extern void set_cs3_bit(int value);
-+extern void clear_cs3_bit(int value);
-+
-+struct cs3 {
-+ struct class_device class_dev;
-+ const char *name;
-+ char *id;
-+ int type;
-+};
-+
-+struct cs3 cs3 ={
-+ .name = "latch_cs3",
-+};
-+
-+
-+#define CS3_STORE_ATTR(namek,nameg) \
-+static ssize_t namek##_store (struct class_device *cdev, const char * buf, size_t count) \
-+{ \
-+ char val; \
-+ if (sscanf(buf, "%c",&val) != 1) \
-+ return -EINVAL; \
-+ if (val == '1') \
-+ set_cs3_bit(nameg); \
-+ else if (val == '0') \
-+ clear_cs3_bit(nameg); \
-+ return strlen(buf); \
-+}
-+
-+CS3_STORE_ATTR(display_on, DISPLAY_ON);
-+CS3_STORE_ATTR(dect_power_on, DECT_POWER_ON);
-+CS3_STORE_ATTR(irda_sd, IRDA_SD);
-+CS3_STORE_ATTR(sd_mediaq, SD_MEDIAQ);
-+CS3_STORE_ATTR(led2_on, LED2_ON);
-+CS3_STORE_ATTR(irda_mode, IRDA_MODE);
-+CS3_STORE_ATTR(reset_simcard, RESET_SIMCARD);
-+
-+
-+#define CS3_ATTR(shadro,namek,nameg,mode,store) \
-+static ssize_t namek##_show(struct class_device *class_dev, char *buf) \
-+{ \
-+ if (get_cs3_##shadro() & nameg ) \
-+ return sprintf(buf, "1\n"); \
-+ else \
-+ return sprintf(buf, "0\n"); \
-+} \
-+static CLASS_DEVICE_ATTR(namek, mode, namek##_show, store)
-+
-+CS3_ATTR(shadow, vcc_5v_en, VCC_5V_EN, 0444, NULL);
-+CS3_ATTR(shadow, vcc_3v_en, VCC_3V_EN, 0444, NULL);
-+CS3_ATTR(shadow, en1, EN1, 0444, NULL);
-+CS3_ATTR(shadow, en0, EN0, 0444, NULL);
-+CS3_ATTR(shadow, display_on, DISPLAY_ON, 0664, display_on_store);
-+CS3_ATTR(shadow, pcmcia_buff_dis, PCMCIA_BUFF_DIS, 0444, NULL);
-+CS3_ATTR(shadow, mq_reset, MQ_RESET, 0444, NULL);
-+CS3_ATTR(shadow, pcmcia_reset, PCMCIA_RESET, 0444, NULL);
-+CS3_ATTR(shadow, dect_power_on, DECT_POWER_ON, 0664, dect_power_on_store);
-+CS3_ATTR(shadow, irda_sd, IRDA_SD, 0664, irda_sd_store);
-+CS3_ATTR(shadow, rs232_on, RS232_ON, 0444, NULL);
-+CS3_ATTR(shadow, sd_mediaq, SD_MEDIAQ, 0664, sd_mediaq_store);
-+CS3_ATTR(shadow, led2_on, LED2_ON, 0664, led2_on_store);
-+CS3_ATTR(shadow, irda_mode, IRDA_MODE, 0664, irda_mode_store);
-+CS3_ATTR(shadow, enable_5v, ENABLE_5V, 0444, NULL);
-+CS3_ATTR(shadow, reset_simcard, RESET_SIMCARD, 0664, reset_simcard_store);
-+CS3_ATTR(ro, pcmcia_bvd1, PCMCIA_BVD1, 0444, NULL);
-+CS3_ATTR(ro, pcmcia_bvd2, PCMCIA_BVD2, 0444, NULL);
-+CS3_ATTR(ro, pcmcia_vs1, PCMCIA_VS1, 0444, NULL);
-+CS3_ATTR(ro, pcmcia_vs2, PCMCIA_VS2, 0444, NULL);
-+CS3_ATTR(ro, lock_ind, LOCK_IND, 0444, NULL);
-+CS3_ATTR(ro, charging_state, CHARGING_STATE, 0444, NULL);
-+CS3_ATTR(ro, pcmcia_short, PCMCIA_SHORT, 0444, NULL);
-+
-+static struct class simpad_gpios_class = {
-+ .name = "simpad",
-+};
-+
-+#define create_entry_conditional(namek) \
-+ rc = class_device_create_file(&cs3->class_dev, &class_device_attr_##namek); \
-+ if (rc) goto out; \
-+
-+static int register_cs3_latch(struct cs3 *cs3)
-+{
-+ int rc = 0;
-+ cs3->class_dev.class = &simpad_gpios_class;
-+ strcpy(cs3->class_dev.class_id, cs3->name);
-+ rc = class_device_register(&cs3->class_dev);
-+ if(rc)
-+ goto out;
-+
-+ create_entry_conditional(vcc_5v_en);
-+ create_entry_conditional(vcc_3v_en);
-+ create_entry_conditional(en1);
-+ create_entry_conditional(en0);
-+ create_entry_conditional(display_on);
-+ create_entry_conditional(pcmcia_buff_dis);
-+ create_entry_conditional(mq_reset);
-+ create_entry_conditional(pcmcia_reset);
-+ create_entry_conditional(dect_power_on);
-+ create_entry_conditional(irda_sd);
-+ create_entry_conditional(rs232_on);
-+ create_entry_conditional(sd_mediaq);
-+ create_entry_conditional(led2_on);
-+ create_entry_conditional(irda_mode);
-+ create_entry_conditional(enable_5v);
-+ create_entry_conditional(reset_simcard);
-+ create_entry_conditional(pcmcia_bvd1);
-+ create_entry_conditional(pcmcia_bvd2);
-+ create_entry_conditional(pcmcia_vs1);
-+ create_entry_conditional(pcmcia_vs2);
-+ create_entry_conditional(lock_ind);
-+ create_entry_conditional(charging_state);
-+ create_entry_conditional(pcmcia_short);
-+
-+out:
-+ return rc;
-+}
-+
-+static int __init simpad_gpios_class_init(void)
-+{
-+ int rc = 0;
-+
-+ rc = class_register(&simpad_gpios_class);
-+
-+ if(rc != 0)
-+ {
-+ printk(KERN_ERR "cs3 latch class failed to register properly\n");
-+ return rc;
-+ }
-+
-+ rc = register_cs3_latch(&cs3);
-+ return rc;
-+}
-+
-+static void __exit simpad_gpios_class_exit(void)
-+{
-+ class_unregister(&simpad_gpios_class);
-+}
-+
-+module_init(simpad_gpios_class_init);
-+module_exit(simpad_gpios_class_exit);
-+
-+MODULE_AUTHOR("Bernhard Guillon");
-+MODULE_DESCRIPTION("CS3_latch driver");
-+MODULE_LICENSE("GPL");
+++ /dev/null
-diff -Nur linux-2.6.24.vanilla/drivers/net/wireless/hostap/hostap_cs.c linux-2.6.24/drivers/net/wireless/hostap/hostap_cs.c
---- linux-2.6.24.vanilla/drivers/net/wireless/hostap/hostap_cs.c 2008-01-24 23:58:37.000000000 +0100
-+++ linux-2.6.24/drivers/net/wireless/hostap/hostap_cs.c 2008-02-28 12:00:27.000000000 +0100
-@@ -1,3 +1,8 @@
-+/*
-+ *
-+ * mrdata: -added shared irq
-+ */
-+
- #define PRISM2_PCCARD
-
- #include <linux/module.h>
-@@ -35,7 +40,7 @@
- module_param(ignore_cis_vcc, int, 0444);
- MODULE_PARM_DESC(ignore_cis_vcc, "Ignore broken CIS VCC entry");
-
--
-+int activar=0;
- /* struct local_info::hw_priv */
- struct hostap_cs_priv {
- dev_node_t node;
-@@ -499,11 +504,13 @@
-
- PDEBUG(DEBUG_HW, "%s: setting Vcc=33 (constant)\n", dev_info);
- p_dev->conf.IntType = INT_MEMORY_AND_IO;
--
-+
-+ activar=0;
- ret = prism2_config(p_dev);
- if (ret) {
- PDEBUG(DEBUG_EXTRA, "prism2_config() failed\n");
- }
-+ activar=1;
-
- return ret;
- }
-@@ -693,7 +700,7 @@
- * irq structure is initialized.
- */
- if (link->conf.Attributes & CONF_ENABLE_IRQ) {
-- link->irq.Attributes = IRQ_TYPE_EXCLUSIVE | IRQ_HANDLE_PRESENT;
-+ link->irq.Attributes = IRQ_TYPE_DYNAMIC_SHARING | IRQ_FIRST_SHARED | IRQ_HANDLE_PRESENT;
- link->irq.IRQInfo1 = IRQ_LEVEL_ID;
- link->irq.Handler = prism2_interrupt;
- link->irq.Instance = dev;
-diff -Nur linux-2.6.24.vanilla/drivers/net/wireless/hostap/hostap_hw.c linux-2.6.24/drivers/net/wireless/hostap/hostap_hw.c
---- linux-2.6.24.vanilla/drivers/net/wireless/hostap/hostap_hw.c 2008-01-24 23:58:37.000000000 +0100
-+++ linux-2.6.24/drivers/net/wireless/hostap/hostap_hw.c 2008-02-28 12:00:27.000000000 +0100
-@@ -54,6 +54,7 @@
- #include "hostap.h"
- #include "hostap_ap.h"
-
-+extern int activar;
-
- /* #define final_version */
-
-@@ -1497,6 +1498,8 @@
- if (local->hw_downloading)
- return 1;
-
-+ activar=1;
-+
- if (prism2_hw_init(dev, initial)) {
- return local->no_pri ? 0 : 1;
- }
-@@ -2630,8 +2633,15 @@
- int events = 0;
- u16 ev;
-
-- iface = netdev_priv(dev);
-- local = iface->local;
-+
-+ // Todos los parametros de entrada son correctos (no son nulos). De momento esta es la unica forma que conozco de detectar el problema.
-+ if (!activar) {
-+ printk("hostap_hw.c: INTERRUPT BEFORE DEVICE INIT!\n");
-+ return IRQ_HANDLED;
-+ }
-+
-+ iface = netdev_priv(dev);
-+ local = iface->local;
-
- prism2_io_debug_add(dev, PRISM2_IO_DEBUG_CMD_INTERRUPT, 0, 0);
-
-diff -Nur linux-2.6.24.vanilla/drivers/net/wireless/hostap/hostap_pci.c linux-2.6.24/drivers/net/wireless/hostap/hostap_pci.c
---- linux-2.6.24.vanilla/drivers/net/wireless/hostap/hostap_pci.c 2008-01-24 23:58:37.000000000 +0100
-+++ linux-2.6.24/drivers/net/wireless/hostap/hostap_pci.c 2008-02-28 12:00:27.000000000 +0100
-@@ -19,6 +19,7 @@
-
- #include "hostap_wlan.h"
-
-+int activar=1;
-
- static char *dev_info = "hostap_pci";
-
-diff -Nur linux-2.6.24.vanilla/drivers/net/wireless/hostap/hostap_plx.c linux-2.6.24/drivers/net/wireless/hostap/hostap_plx.c
---- linux-2.6.24.vanilla/drivers/net/wireless/hostap/hostap_plx.c 2008-01-24 23:58:37.000000000 +0100
-+++ linux-2.6.24/drivers/net/wireless/hostap/hostap_plx.c 2008-02-28 12:00:27.000000000 +0100
-@@ -21,7 +21,7 @@
- #include <asm/io.h>
-
- #include "hostap_wlan.h"
--
-+int activar=1;
-
- static char *dev_info = "hostap_plx";
-
+++ /dev/null
-diff -Nur linux-2.6.24.vanilla/drivers/video/Kconfig linux-2.6.24/drivers/video/Kconfig
---- linux-2.6.24.vanilla/drivers/video/Kconfig 2008-01-24 23:58:37.000000000 +0100
-+++ linux-2.6.24/drivers/video/Kconfig 2008-02-20 21:51:22.000000000 +0100
-@@ -198,7 +198,7 @@
- This is particularly important to one driver, matroxfb. If
- unsure, say N.
-
--comment "Frame buffer hardware drivers"
-+comment "Frambuffer hardware drivers"
- depends on FB
-
- config FB_CIRRUS
-@@ -1389,6 +1389,15 @@
- ---help---
- Driver for graphics boards with S3 Trio / S3 Virge chip.
-
-+config FB_MQ200
-+ bool "MQ200 Driver"
-+ depends on (FB = y) && ARM && ARCH_SA1100
-+ select FB_CFB_FILLRECT
-+ select FB_CFB_COPYAREA
-+ select FB_CFB_IMAGEBLIT
-+ help
-+ This is a MQ200 driver tested only on Siemens SIMpads.
-+
- config FB_SAVAGE
- tristate "S3 Savage support"
- depends on FB && PCI && EXPERIMENTAL
-diff -Nur linux-2.6.24.vanilla/drivers/video/Makefile linux-2.6.24/drivers/video/Makefile
---- linux-2.6.24.vanilla/drivers/video/Makefile 2008-01-24 23:58:37.000000000 +0100
-+++ linux-2.6.24/drivers/video/Makefile 2008-02-20 21:51:22.000000000 +0100
-@@ -35,6 +35,7 @@
- obj-$(CONFIG_FB_PM2) += pm2fb.o
- obj-$(CONFIG_FB_PM3) += pm3fb.o
-
-+obj-$(CONFIG_FB_MQ200) += mq200/
- obj-$(CONFIG_FB_MATROX) += matrox/
- obj-$(CONFIG_FB_RIVA) += riva/
- obj-$(CONFIG_FB_NVIDIA) += nvidia/
-diff -Nur linux-2.6.24.vanilla/drivers/video/backlight/Kconfig linux-2.6.24/drivers/video/backlight/Kconfig
---- linux-2.6.24.vanilla/drivers/video/backlight/Kconfig 2008-01-24 23:58:37.000000000 +0100
-+++ linux-2.6.24/drivers/video/backlight/Kconfig 2008-02-20 21:51:22.000000000 +0100
-@@ -90,3 +90,20 @@
- help
- If you have a Intel LE80578 (Carillo Ranch) say Y to enable the
- backlight driver.
-+
-+config BACKLIGHT_SIMPAD
-+ tristate "SIMpad MQ200 Backlight driver"
-+ depends on SA1100_SIMPAD && BACKLIGHT_CLASS_DEVICE
-+ default y
-+ help
-+ If you have a Siemens SIMpad say Y to enable the
-+ backlight driver.
-+
-+config LCD_SIMPAD
-+ tristate "SIMpad MQ200 LCD driver"
-+ depends on SA1100_SIMPAD && LCD_CLASS_DEVICE
-+ default y
-+ help
-+ If you have a Siemens SIMpad say Y to enable the
-+ LCD driver.
-+
-diff -Nur linux-2.6.24.vanilla/drivers/video/backlight/Makefile linux-2.6.24/drivers/video/backlight/Makefile
---- linux-2.6.24.vanilla/drivers/video/backlight/Makefile 2008-01-24 23:58:37.000000000 +0100
-+++ linux-2.6.24/drivers/video/backlight/Makefile 2008-02-20 21:51:22.000000000 +0100
-@@ -9,3 +9,5 @@
- obj-$(CONFIG_BACKLIGHT_LOCOMO) += locomolcd.o
- obj-$(CONFIG_BACKLIGHT_PROGEAR) += progear_bl.o
- obj-$(CONFIG_BACKLIGHT_CARILLO_RANCH) += cr_bllcd.o
-+obj-$(CONFIG_BACKLIGHT_SIMPAD) += simpad_bl.o
-+obj-$(CONFIG_LCD_SIMPAD) += simpad_lcd.o
-diff -Nur linux-2.6.24.vanilla/drivers/video/backlight/simpad_bl.c linux-2.6.24/drivers/video/backlight/simpad_bl.c
---- linux-2.6.24.vanilla/drivers/video/backlight/simpad_bl.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.24/drivers/video/backlight/simpad_bl.c 2008-02-20 21:51:22.000000000 +0100
-@@ -0,0 +1,208 @@
-+/*
-+ * GPLv2 <zecke@handhelds.org
-+ *
-+ * Implementation of the backlight_driver for
-+ * the mq200 framebuffer
-+ *
-+ * 2007/03/17 mrdata:
-+ * - small changes simpad_bl_get_brightness()
-+ * simpad_bl_set_brightness()
-+ * - new function simpad_bl_update_status()
-+ * - changed struct backlight_properties simpad_bl_props()
-+ * to new one
-+ * - changed __init simpad_bl_init() -> backlight_device_register
-+ *
-+ * 2007/03/24 mrdata
-+ * - added .brightness=127 in
-+ * struct backlight_properties simpad_bl_props()
-+ */
-+#include <linux/module.h>
-+#include <linux/kernel.h>
-+#include <linux/init.h>
-+#include <linux/platform_device.h>
-+#include <linux/spinlock.h>
-+#include <linux/fb.h>
-+#include <linux/backlight.h>
-+
-+#include <asm/types.h>
-+#include <asm/hardware.h>
-+#include <asm/io.h>
-+
-+#include "../mq200/mq200_data.h"
-+
-+#define SIMPAD_BACKLIGHT_MASK 0x00a10044
-+#define SIMPAD_DEFAULT_INTENSITY 127
-+#define SIMPAD_MAX_INTENSITY 254
-+#define REGISTER_BASE 0xf2e00000
-+
-+static int simpad_bl_suspended;
-+static int current_intensity = 0;
-+
-+static void simpad_bl_send_intensity(struct backlight_device *bd)
-+{
-+ int intensity = bd->props.brightness;
-+
-+ union fp0fr fp0fr;
-+ unsigned long dutyCycle, pwmcontrol;
-+
-+ if (intensity > SIMPAD_MAX_INTENSITY)
-+ intensity = SIMPAD_MAX_INTENSITY;
-+
-+ if (bd->props.power != FB_BLANK_UNBLANK)
-+ intensity = 0;
-+
-+ if (bd->props.fb_blank != FB_BLANK_UNBLANK)
-+ intensity = 0;
-+
-+ if (simpad_bl_suspended)
-+ intensity = 0;
-+
-+ if (intensity != current_intensity)
-+ {
-+ /*
-+ * Determine dutyCycle.
-+ * Note: the lower the value, the brighter the display!
-+ */
-+
-+ dutyCycle = SIMPAD_MAX_INTENSITY - intensity;
-+
-+ /*
-+ * Configure PWM0 (source clock = oscillator clock, pwm always enabled,
-+ * zero, clock pre-divider = 4) pwm frequency = 12.0kHz
-+ */
-+
-+ fp0fr.whole = readl(FP0FR(REGISTER_BASE));
-+ pwmcontrol = fp0fr.whole & 0xffff00ff;
-+ fp0fr.whole &= 0xffffff00;
-+ fp0fr.whole |= 0x00000044;
-+ writel(fp0fr.whole, FP0FR(REGISTER_BASE));
-+
-+ /* Write to pwm duty cycle register. */
-+ fp0fr.whole = dutyCycle << 8;
-+ fp0fr.whole &= 0x0000ff00;
-+ fp0fr.whole |= pwmcontrol;
-+ writel(fp0fr.whole, FP0FR(REGISTER_BASE));
-+
-+ current_intensity = intensity;
-+ }
-+}
-+
-+
-+#ifdef CONFIG_PM
-+static int simpad_bl_suspend(struct platform_device *pdev, pm_message_t state)
-+{
-+ struct backlight_device *bd = platform_get_drvdata(pdev);
-+
-+ simpad_bl_suspended = 1;
-+ simpad_bl_send_intensity(bd);
-+ return 0;
-+}
-+
-+static int simpad_bl_resume(struct platform_device *pdev)
-+{
-+ struct backlight_device *bd = platform_get_drvdata(pdev);
-+
-+ simpad_bl_suspended = 0;
-+ simpad_bl_send_intensity(bd);
-+ return 0;
-+}
-+#else
-+#define simpad_bl_suspend NULL
-+#define simpad_bl_resume NULL
-+#endif
-+
-+
-+static int simpad_bl_set_intensity(struct backlight_device *bd)
-+{
-+ simpad_bl_send_intensity(bd);
-+ return 0;
-+}
-+
-+
-+static int simpad_bl_get_intensity(struct backlight_device *bd)
-+{
-+ return current_intensity;
-+}
-+
-+
-+static struct backlight_ops simpad_bl_ops = {
-+ .get_brightness = simpad_bl_get_intensity,
-+ .update_status = simpad_bl_set_intensity,
-+};
-+
-+
-+static int __init simpad_bl_probe(struct platform_device *pdev)
-+{
-+ struct backlight_device *bd;
-+
-+ bd = backlight_device_register("simpad-mq200-bl", &pdev->dev, NULL, &simpad_bl_ops);
-+
-+ if (IS_ERR (bd))
-+ return PTR_ERR (bd);
-+
-+ platform_set_drvdata(pdev, bd);
-+
-+ bd->props.max_brightness = SIMPAD_MAX_INTENSITY;
-+ bd->props.brightness = SIMPAD_DEFAULT_INTENSITY;
-+ simpad_bl_send_intensity(bd);
-+
-+ return 0;
-+}
-+
-+
-+static int simpad_bl_remove(struct platform_device *pdev)
-+{
-+ struct backlight_device *bd = platform_get_drvdata(pdev);
-+
-+ bd->props.brightness = 0;
-+ bd->props.power = 0;
-+ simpad_bl_send_intensity(bd);
-+
-+ backlight_device_unregister(bd);
-+
-+ return 0;
-+}
-+
-+static struct platform_driver simpad_bl_driver = {
-+ .probe = simpad_bl_probe,
-+ .remove = simpad_bl_remove,
-+ .suspend = simpad_bl_suspend,
-+ .resume = simpad_bl_resume,
-+ .driver = {
-+ .name = "simpad-mq200-bl",
-+ },
-+};
-+
-+static struct platform_device *simpad_bl_device = NULL;
-+
-+static int __init simpad_bl_init(void)
-+{
-+ int ret;
-+
-+ ret = platform_driver_register(&simpad_bl_driver);
-+ if (!ret) {
-+ simpad_bl_device = platform_device_alloc("simpad-mq200-bl", -1);
-+ if (!simpad_bl_device)
-+ return -ENOMEM;
-+
-+ ret = platform_device_add(simpad_bl_device);
-+
-+ if (ret) {
-+ platform_device_put(simpad_bl_device);
-+ platform_driver_unregister(&simpad_bl_driver);
-+ }
-+ }
-+ return ret;
-+}
-+
-+static void __exit simpad_bl_exit(void)
-+{
-+ platform_device_unregister(simpad_bl_device);
-+ platform_driver_unregister(&simpad_bl_driver);
-+}
-+
-+
-+module_init(simpad_bl_init);
-+module_exit(simpad_bl_exit);
-+MODULE_AUTHOR("Holger Hans Peter Freyther");
-+MODULE_LICENSE("GPL");
-diff -Nur linux-2.6.24.vanilla/drivers/video/backlight/simpad_lcd.c linux-2.6.24/drivers/video/backlight/simpad_lcd.c
---- linux-2.6.24.vanilla/drivers/video/backlight/simpad_lcd.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.24/drivers/video/backlight/simpad_lcd.c 2008-02-20 21:51:22.000000000 +0100
-@@ -0,0 +1,172 @@
-+/*
-+ * GPLv2 <zecke@handhelds.org
-+ *
-+ * Implementation of the lcd_driver for the mq200 framebuffer
-+ *
-+ * 2007/03/24 mrdata:
-+ * - added simpad_lcd_get_contrast()
-+ * - added simpad_lcd_set_contrast()
-+ * - modify struct lcd_properties simpad_lcd_props
-+ */
-+#include <linux/module.h>
-+#include <linux/kernel.h>
-+#include <linux/init.h>
-+#include <linux/platform_device.h>
-+#include <linux/fb.h>
-+#include <linux/lcd.h>
-+
-+#include <asm/arch/simpad.h>
-+#include <asm/hardware.h>
-+
-+extern long get_cs3_shadow(void);
-+extern void set_cs3_bit(int);
-+extern void clear_cs3_bit(int);
-+
-+#define UNUSED(x) x=x
-+
-+static int simpad_lcd_get_power(struct lcd_device* dev)
-+{
-+ UNUSED(dev);
-+
-+ return (get_cs3_shadow() & DISPLAY_ON) ? 0 : 4;
-+}
-+
-+static int simpad_lcd_set_power(struct lcd_device* dev, int power)
-+{
-+ UNUSED(dev);
-+
-+ if( power == 4 )
-+ clear_cs3_bit(DISPLAY_ON);
-+ else
-+ set_cs3_bit(DISPLAY_ON);
-+
-+ return 0;
-+}
-+
-+static int simpad_lcd_get_contrast(struct lcd_device* dev)
-+{
-+ UNUSED(dev);
-+
-+ return 0;
-+}
-+
-+static int simpad_lcd_set_contrast(struct lcd_device* dev, int contrast)
-+{
-+ UNUSED(dev);
-+
-+ UNUSED(contrast);
-+
-+ return 0;
-+}
-+
-+#ifdef CONFIG_PM
-+static int simpad_lcd_suspend(struct platform_device *pdev, pm_message_t state)
-+{
-+ static int ret;
-+ struct lcd_device* ld;
-+
-+ UNUSED(state);
-+
-+ ld = platform_get_drvdata(pdev);
-+
-+ ret = simpad_lcd_set_power(ld, 4);
-+
-+ return ret;
-+}
-+
-+static int simpad_lcd_resume(struct platform_device *pdev)
-+{
-+ struct lcd_device *ld;
-+ static int ret;
-+
-+ ld = platform_get_drvdata(pdev);
-+
-+ ret = simpad_lcd_set_power(ld, 0);
-+
-+ return ret;
-+}
-+#else
-+#define simpad_lcd_suspend NULL
-+#define simpad_lcd_resume NULL
-+#endif
-+
-+
-+/*FIXME
-+static struct lcd_properties simpad_lcd_props = {
-+ .max_contrast = 0,
-+};
-+*/
-+
-+static struct lcd_ops simpad_lcd_ops = {
-+ .get_power = simpad_lcd_get_power,
-+ .set_power = simpad_lcd_set_power,
-+ .get_contrast = simpad_lcd_get_contrast,
-+ .set_contrast = simpad_lcd_set_contrast,
-+};
-+
-+static int __init simpad_lcd_probe(struct platform_device *pdev)
-+{
-+ struct lcd_device *ld;
-+
-+ ld = lcd_device_register ("simpad-mq200-lcd", &pdev->dev, NULL, &simpad_lcd_ops);
-+
-+ if (IS_ERR(ld))
-+ return PTR_ERR(ld);
-+
-+ platform_set_drvdata(pdev, ld);
-+
-+ ld->props.max_contrast = 0;
-+
-+ return 0;
-+}
-+
-+static int simpad_lcd_remove(struct platform_device *pdev)
-+{
-+ struct lcd_device *ld = platform_get_drvdata(pdev);
-+
-+ lcd_device_unregister(ld);
-+
-+ return 0;
-+}
-+
-+static struct platform_driver simpad_lcd_driver = {
-+ .probe = simpad_lcd_probe,
-+ .remove = simpad_lcd_remove,
-+ .suspend = simpad_lcd_suspend,
-+ .resume = simpad_lcd_resume,
-+ .driver = {
-+ .name = "simpad-mq200-lcd",
-+ },
-+};
-+
-+static struct platform_device *simpad_lcd_device = NULL;
-+
-+static int __init simpad_lcd_init(void)
-+{
-+ int ret;
-+
-+ ret = platform_driver_register(&simpad_lcd_driver);
-+ if (!ret) {
-+ simpad_lcd_device = platform_device_alloc("simpad-mq200-lcd", -1);
-+ if (!simpad_lcd_device)
-+ return -ENOMEM;
-+
-+ ret = platform_device_add(simpad_lcd_device);
-+
-+ if (ret) {
-+ platform_device_put(simpad_lcd_device);
-+ platform_driver_unregister(&simpad_lcd_driver);
-+ }
-+ }
-+ return ret;
-+}
-+
-+static void __exit simpad_lcd_exit(void) {
-+ platform_driver_unregister(&simpad_lcd_driver);
-+ platform_device_unregister(simpad_lcd_device);
-+}
-+
-+module_init(simpad_lcd_init);
-+module_exit(simpad_lcd_exit);
-+MODULE_AUTHOR("Holger Hans Peter Freyther");
-+MODULE_LICENSE("GPL");
-diff -Nur linux-2.6.24.vanilla/drivers/video/mq200/Makefile linux-2.6.24/drivers/video/mq200/Makefile
---- linux-2.6.24.vanilla/drivers/video/mq200/Makefile 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.24/drivers/video/mq200/Makefile 2008-02-20 21:51:22.000000000 +0100
-@@ -0,0 +1,6 @@
-+# Makefile for mq200 video driver
-+# 4 Aug 2003, Holger Hans Peter Freyther
-+#
-+
-+obj-$(CONFIG_FB_MQ200) += mq_skeleton.o mq_external.o
-+
-diff -Nur linux-2.6.24.vanilla/drivers/video/mq200/mq200_data.h linux-2.6.24/drivers/video/mq200/mq200_data.h
---- linux-2.6.24.vanilla/drivers/video/mq200/mq200_data.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.24/drivers/video/mq200/mq200_data.h 2008-02-20 21:51:22.000000000 +0100
-@@ -0,0 +1,1120 @@
-+/*
-+ * From ucLinux mq200fb.c and mq200fb.h
-+ *
-+ * 2007/03/11 mrdata:
-+ * insert registers for graphics controller 2 module
-+ */
-+
-+#ifndef __MQ200_FB_H__
-+#define __MQ200_FB_H__
-+
-+struct mq200_io_regions {
-+ u32 fb_size; /* framebuffer size */
-+ unsigned long phys_mmio_base; /* physical register memory base */
-+ unsigned long virt_mmio_base; /* virtual start of registers */
-+ unsigned long phys_fb_base; /* physical address of frame buffer */
-+ unsigned long virt_fb_base; /* virtual start of the framebuffer */
-+};
-+
-+#define MQ200_MONITOR_HORI_RES(info) info->monitor_info.horizontal_res
-+#define MQ200_MONITOR_VERT_RES(info) info->monitor_info.vertical_res
-+#define MQ200_MONITOR_DEPTH(info) info->monitor_info.depth
-+#define MQ200_MONITOR_LINE_LENGTH(info) info->monitor_info.line_length
-+
-+struct mq200_monitor_info {
-+ unsigned int horizontal_res;
-+ unsigned int vertical_res;
-+ unsigned int depth;
-+ unsigned int refresh;
-+ unsigned int line_length;
-+ unsigned long flags;
-+};
-+
-+
-+/**
-+ * Addresses of Module
-+ */
-+#define MQ200_FB_BASE (x) (x + 0x1800000) /* framebuffer */
-+#define MQ200_FB_SIZE 0x200000 /* framebuffer size in bytes */
-+#define MQ200_REGS_BASE(x) (x + 0x1e00000) /* start of registers area */
-+#define MQ200_REGS_SIZE 0x200000 /* registers area size */
-+
-+#define PMU_OFFSET 0x00000 /* power management */
-+#define CPU_OFFSET 0x02000 /* CPU interface */
-+#define MIU_OFFSET 0x04000 /* memory controller */
-+#define IN_OFFSET 0x08000 /* interrupt controller */
-+#define GC_OFFSET 0x0a000 /* graphics controller 1&2 */
-+#define GE_OFFSET 0x0c000 /* graphics engine */
-+#define FPI_OFFSET 0x0e000 /* flat panel controller */
-+#define CP1_OFFSET 0x10000 /* color palette 1 */
-+#define DC_OFFSET 0x14000 /* device configuration */
-+#define PCI_OFFSET 0x16000 /* PCI configuration */
-+#define PSF_OFFSET 0x18000 /* ??? */
-+
-+
-+/****
-+ * Registers
-+ */
-+
-+/* power management unit */
-+#define PMR(addr) (addr + PCI_OFFSET + 0x40)/* power management
-+ register */
-+#define PMR_VALUE 0x06210001 /* expected read value of PMR register */
-+#define PM00R(addr) (addr + PMU_OFFSET + 0x00) /* power management unit
-+ configuration
-+ register */
-+#define PM01R(addr) (addr + PMU_OFFSET + 0x04) /* D1 state control */
-+#define PM02R(addr) (addr + PMU_OFFSET + 0x08) /* d2 state control */
-+#define PM06R(addr) (addr + PMU_OFFSET + 0x18) /* PLL 2 programming */
-+#define PM07R(addr) (addr + PMU_OFFSET + 0x1c) /* PLL 3 programming */
-+
-+#define PMCSR(addr) (addr + PCI_OFFSET + 0x44) /* power management
-+ control/status
-+ register */
-+
-+/* memory interface unit */
-+#define MM00R(addr) (addr + MIU_OFFSET + 0x00)/* MIU interface control
-+ 0 */
-+#define MM01R(addr) (addr + MIU_OFFSET + 0x04) /* MIU interface control
-+ 1 */
-+#define MM02R(addr) (addr + MIU_OFFSET + 0x08) /* memory interface
-+ control 2 */
-+#define MM03R(addr) (addr + MIU_OFFSET + 0x0c) /* memory interface
-+ control 3 */
-+#define MM04R(addr) (addr + MIU_OFFSET + 0x10) /* memory interface
-+ control 4 */
-+/* graphics controller 1 module */
-+#define GC00R(addr) (addr + GC_OFFSET + 0x00) /* graphics controller 1
-+ control */
-+#define GC01R(addr) (addr + GC_OFFSET + 0x04) /* graphics controller
-+ CRT control */
-+#define GC02R(addr) (addr + GC_OFFSET + 0x08) /* horizontal display 1
-+ control */
-+#define GC03R(addr) (addr + GC_OFFSET + 0x0c) /* vertical display 1
-+ control */
-+#define GC04R(addr) (addr + GC_OFFSET + 0x10) /* horizontal sync 1
-+ control */
-+#define GC05R(addr) (addr + GC_OFFSET + 0x14) /* vertical sync 1
-+ control */
-+#define GC07R(addr) (addr + GC_OFFSET + 0x1c) /* vertical display 1
-+ count */
-+#define GC08R(addr) (addr + GC_OFFSET + 0x20) /* horizontal window 1
-+ control */
-+#define GC09R(addr) (addr + GC_OFFSET + 0x24) /* vertical window 1
-+ control */
-+#define GC0AR(addr) (addr + GC_OFFSET + 0x28) /* alternate horizontal
-+ window 1 control */
-+#define GC0BR(addr) (addr + GC_OFFSET + 0x2c) /* alternate vertical
-+ window 1 control */
-+#define GC0CR(addr) (addr + GC_OFFSET + 0x30) /* window 1
-+ start address */
-+#define GC0DR(addr) (addr + GC_OFFSET + 0x34) /* alternate window 1
-+ start address */
-+#define GC0ER(addr) (addr + GC_OFFSET + 0x38) /* alternate window 1
-+ stride */
-+#define GC0FR(addr) (addr + GC_OFFSET + 0x3c) /* alternate window 1
-+ line size */
-+#define GC10R(addr) (addr + GC_OFFSET + 0x40) /* hardware cursor 1
-+ position */
-+#define GC11R(addr) (addr + GC_OFFSET + 0x44) /* hardware cursor 1
-+ start address and
-+ offset */
-+#define GC12R(addr) (addr + GC_OFFSET + 0x48) /* hardware cursor 1
-+ foreground color */
-+#define GC13R(addr) (addr + GC_OFFSET + 0x4c) /* hardware cursor 1
-+ background color */
-+
-+/* graphics controller 2 module */
-+#define GC20R(addr) (addr + GC_OFFSET + 0x80) /* graphics controller 2
-+ control */
-+#define GC21R(addr) (addr + GC_OFFSET + 0x84) /* graphics controller
-+ CRC control */
-+#define GC22R(addr) (addr + GC_OFFSET + 0x88) /* horizontal display 2
-+ control */
-+#define GC23R(addr) (addr + GC_OFFSET + 0x8c) /* vertical display 2
-+ control */
-+#define GC24R(addr) (addr + GC_OFFSET + 0x90) /* horizontal sync 2
-+ control */
-+#define GC25R(addr) (addr + GC_OFFSET + 0x94) /* vertical sync 2
-+ control */
-+#define GC27R(addr) (addr + GC_OFFSET + 0x9c) /* vertical display 2
-+ count */
-+#define GC28R(addr) (addr + GC_OFFSET + 0xa0) /* horizontal window 2
-+ control */
-+#define GC29R(addr) (addr + GC_OFFSET + 0xa4) /* vertical window 2
-+ control */
-+#define GC2AR(addr) (addr + GC_OFFSET + 0xa8) /* alternate horizontal
-+ window 2 control */
-+#define GC2BR(addr) (addr + GC_OFFSET + 0xac) /* alternate vertical
-+ window 2 control */
-+#define GC2CR(addr) (addr + GC_OFFSET + 0xb0) /* window 2
-+ start address */
-+#define GC2DR(addr) (addr + GC_OFFSET + 0xb4) /* alternate window 2
-+ start address */
-+#define GC2ER(addr) (addr + GC_OFFSET + 0xb8) /* alternate window 2
-+ stride */
-+#define GC2FR(addr) (addr + GC_OFFSET + 0xbc) /* alternate window 2
-+ line size */
-+#define GC30R(addr) (addr + GC_OFFSET + 0xc0) /* hardware cursor 2
-+ position */
-+#define GC31R(addr) (addr + GC_OFFSET + 0xc4) /* hardware cursor 2
-+ start address and
-+ offset */
-+#define GC32R(addr) (addr + GC_OFFSET + 0xc8) /* hardware cursor 2
-+ foreground color */
-+#define GC33R(addr) (addr + GC_OFFSET + 0xcc) /* hardware cursor 2
-+ background color */
-+
-+/* graphics engine */
-+#define ROP_SRCCOPY 0xCC /* dest = source */
-+#define ROP_SRCPAINT 0xEE /* dest = source OR dest */
-+#define ROP_SRCAND 0x88 /* dest = source AND dest */
-+#define ROP_SRCINVERT 0x66 /* dest = source XOR dest */
-+#define ROP_SRCERASE 0x44 /* dest = source AND (NOT dest) */
-+#define ROP_NOTSRCCOPY 0x33 /* dest = NOT source */
-+#define ROP_NOTSRCERASE 0x11 /* dest = (NOT source) AND (NOT dest) */
-+#define ROP_MERGECOPY 0xC0 /* dest = source AND pattern */
-+#define ROP_MERGEPAINT 0xBB /* dest = (NOT source) OR dest */
-+#define ROP_PATCOPY 0xF0 /* dest = pattern */
-+#define ROP_PATPAINT 0xFB /* dest = DPSnoo */
-+#define ROP_PATINVERT 0x5A /* dest = pattern XOR dest */
-+#define ROP_DSTINVERT 0x55 /* dest = NOT dest */
-+#define ROP_BLACKNESS 0x00 /* dest = BLACK */
-+#define ROP_WHITENESS 0xFF /* dest = WHITE */
-+
-+#define GE00R(addr) (addr + GE_OFFSET + 0x00) /* primary drawing command
-+ register */
-+#define GE01R(addr) (addr + GE_OFFSET + 0x04) /* primary width and
-+ height register */
-+#define GE02R(addr) (addr + GE_OFFSET + 0x08) /* primary destination
-+ address register */
-+#define GE03R(addr) (addr + GE_OFFSET + 0x0c) /* primary source XY
-+ register */
-+#define GE04R(addr) (addr + GE_OFFSET + 0x10) /* primary color compare
-+ register */
-+#define GE05R(addr) (addr + GE_OFFSET + 0x14) /* primary clip left/top
-+ register */
-+#define GE06R(addr) (addr + GE_OFFSET + 0x18) /* primary clip
-+ right/bottom register
-+ */
-+#define GE07R(addr) (addr + GE_OFFSET + 0x1c) /* primary source and
-+ pattern offset
-+ register */
-+#define GE08R(addr) (addr + GE_OFFSET + 0x20) /* primary foreground
-+ color
-+ register/rectangle
-+ fill register */
-+#define GE09R(addr) (addr + GE_OFFSET + 0x24) /* source stride/offset
-+ register */
-+#define GE0AR(addr) (addr + GE_OFFSET + 0x28) /* destination stride
-+ register and color
-+ depth */
-+#define GE0BR(addr) (addr + GE_OFFSET + 0x2c) /* image base address
-+ register */
-+#define GE40R(addr) (addr + GE_OFFSET + 0x100) /* mono pattern register
-+ 0 */
-+#define GE41R(addr) (addr + GE_OFFSET + 0x104) /* mono pattern register
-+ 1 */
-+#define GE42R(addr) (addr + GE_OFFSET + 0x108) /* foreground color
-+ register */
-+#define GE43R(addr) (addr + GE_OFFSET + 0x10c) /* background color
-+ register */
-+/* color palette */
-+#define C1xxR(addr, regno) \
-+ (addr + CP1_OFFSET + (regno) * 4) /* graphics controller color
-+ palette 1 */
-+/* device configuration */
-+#define DC00R(addr) (addr + DC_OFFSET + 0x00) /* device configuration
-+ register 0 */
-+#define DC_RESET 0x4000
-+/* PCI configuration space */
-+#define PC00R(addr) (addr + PCI_OFFSET + 0x00)/* device ID/vendor ID
-+ register */
-+/* Flatpanel Control */
-+#define FP00R(addr) (addr + FPI_OFFSET + 0x00) /* Flat Panel Control 0 */
-+#define FP01R(addr) (addr + FPI_OFFSET + 0x04) /* Flat Panel Output Pin */
-+#define FP02R(addr) (addr + FPI_OFFSET + 0x08) /* Flat Panel Gener Purpose
-+ Outout Control Register */
-+#define FP03R(addr) (addr + FPI_OFFSET + 0x0c) /* General Purpose I/O Port
-+ Control Register */
-+#define FP04R(addr) (addr + FPI_OFFSET + 0x10) /* STN Panel Control Register */
-+#define FP05R(addr) (addr + FPI_OFFSET + 0x14) /* D-STN Half Frame Buffer
-+ Control Register -By Guess */
-+#define FP0FR(addr) (addr + FPI_OFFSET + 0x3c) /* Pulse Width Modulation
-+ Control Register */
-+#define FRCTL_PATTERN_COUNT 32
-+#define FP10R(addr) (addr + FPI_OFFSET + 0x40) /* Frame-Rate Control Pattern
-+ Register */
-+#define FP11R(addr) (addr + FPI_OFFSET + 0x44)
-+#define FP2FR(addr) (addr + FPI_OFFSET + 0xc0) /* Frame-Rate Control Weight
-+ Registers */
-+
-+
-+
-+
-+/* power management miscellaneous control */
-+union pm00r {
-+ struct {
-+ u32 pll1_n_b5 :1; /* PLL 1 N parameter bit 5 is 0 */
-+ u32 reserved_1 :1;
-+ u32 pll2_enbl :1; /* PLL 2 enable */
-+ u32 pll3_enbl :1; /* PLL 3 enable */
-+ u32 reserved_2 :1;
-+ u32 pwr_st_ctrl :1; /* power state status control */
-+ u32 reserved_3 :2;
-+
-+ u32 ge_enbl :1; /* graphics engine enable */
-+ u32 ge_bsy_gl :1; /* graphics engine force busy (global) */
-+ u32 ge_bsy_lcl :1; /* graphics engine force busy (local) */
-+ u32 ge_clock :2; /* graphics engine clock select */
-+ u32 ge_cmd_fifo :1; /* graphics engine command FIFO reset */
-+ u32 ge_src_fifo :1; /* graphics engine CPU source FIFO reset */
-+ u32 miu_pwr_seq :1; /* memory interface unit power sequencing
-+ enable */
-+
-+ u32 d3_mem_rfsh :1; /* D3 memory refresh */
-+ u32 d4_mem_rfsh :1; /* D4 memory refresh */
-+ u32 gpwr_intrvl :2; /* general power sequencing interval */
-+ u32 fppwr_intrvl:2; /* flat panel power sequencing interval */
-+ u32 gpwr_seq_ctr:1; /* general power sequencing interval control */
-+ u32 pmu_tm :1; /* PMU test mode */
-+
-+ u32 pwr_state :2; /* power state (read only) */
-+ u32 pwr_seq_st :1; /* power sequencing active status (read
-+ only) */
-+ u32 reserved_4 :5;
-+ } part;
-+ u32 whole;
-+};
-+
-+/* D1 state control */
-+union pm01r {
-+ struct {
-+ u32 osc_enbl :1; /* D1 oscillator enable */
-+ u32 pll1_enbl :1; /* D1 PLL 1 enable */
-+ u32 pll2_enbl :1; /* D1 PLL 2 enable */
-+ u32 pll3_enbl :1; /* D1 PLL 3 enable */
-+ u32 miu_enbl :1; /* D1 Memory Interface Unit (MIU) enable */
-+ u32 mem_rfsh :1; /* D1 memory refresh enable */
-+ u32 ge_enbl :1; /* D1 Graphics Engine (GE) enable */
-+ u32 reserved_1 :1;
-+
-+ u32 crt_enbl :1; /* D1 CRT enable */
-+ u32 fpd_enbl :1; /* D1 Flat Panel enable */
-+ u32 reserved_2 :6;
-+
-+ u32 ctl1_enbl :1; /* D1 controller 1 enable */
-+ u32 win1_enbl :1; /* D1 window 1 enable */
-+ u32 awin1_enbl :1; /* D1 alternate window 1 enable */
-+ u32 cur1_enbl :1; /* D1 cursor 1 enable */
-+ u32 reserved_3 :4;
-+
-+ u32 ctl2_enbl :1; /* D1 controller 2 enable */
-+ u32 win2_enbl :1; /* D1 window 2 enable */
-+ u32 awin2_enbl :1; /* D1 alternate window 2 enable */
-+ u32 cur2_enbl :1; /* D1 cursor 2 enable */
-+ u32 reserved_4 :4;
-+ } part;
-+ u32 whole;
-+};
-+
-+/* D2 state control */
-+union pm02r {
-+ struct {
-+ u32 osc_enbl :1; /* D2 oscillator enable */
-+ u32 pll1_enbl :1; /* D2 PLL 1 enable */
-+ u32 pll2_enbl :1; /* D2 PLL 2 enable */
-+ u32 pll3_enbl :1; /* D2 PLL 3 enable */
-+ u32 miu_enbl :1; /* D2 Memory Interface Unit (MIU) enable */
-+ u32 mem_rfsh :1; /* D2 memory refresh enable */
-+ u32 ge_enbl :1; /* D2 Graphics Engine (GE) enable */
-+ u32 reserved_1 :1;
-+
-+ u32 crt_enbl :1; /* D2 CRT enable */
-+ u32 fpd_enbl :1; /* D2 Flat Panel enable */
-+ u32 reserved_2 :6;
-+
-+ u32 ctl1_enbl :1; /* D2 controller 1 enable */
-+ u32 win1_enbl :1; /* D2 window 1 enable */
-+ u32 awin1_enbl :1; /* D2 alternate window 1 enable */
-+ u32 cur1_enbl :1; /* D2 cursor 1 enable */
-+ u32 reserved_3 :4;
-+
-+ u32 ctl2_enbl :1; /* D2 controller 2 enable */
-+ u32 win2_enbl :1; /* D2 window 2 enable */
-+ u32 awin2_enbl :1; /* D2 alternate window 2 enable */
-+ u32 cur2_enbl :1; /* D2 cursor 2 enable */
-+ u32 reserved_4 :4;
-+ } part;
-+ u32 whole;
-+};
-+
-+/* PLL 2 programming */
-+union pm06r {
-+ struct {
-+ u32 clk_src :1; /* PLL 2 reference clock source */
-+ u32 bypass :1; /* PLL 2 bypass */
-+ u32 reserved_1 :2;
-+ u32 p_par :3; /* PLL 2 P parameter */
-+ u32 reserved_2 :1;
-+
-+ u32 n_par :5; /* PLL 2 N parameter */
-+ u32 reserved_3 :3;
-+
-+ u32 m_par :8; /* PLL 2 M parameter */
-+
-+ u32 reserved_4 :4;
-+ u32 trim :4; /* PLL 2 trim value */
-+ } part;
-+ u32 whole;
-+};
-+
-+/* PLL 3 programming */
-+union pm07r {
-+ struct {
-+ u32 clk_src :1; /* PLL 3 reference clock source */
-+ u32 bypass :1; /* PLL 3 bypass */
-+ u32 reserved_1 :2;
-+ u32 p_par :3; /* PLL 3 P parameter */
-+ u32 reserved_2 :1;
-+
-+ u32 n_par :5; /* PLL 3 N parameter */
-+ u32 reserved_3 :3;
-+
-+ u32 m_par :8; /* PLL 3 M parameter */
-+
-+ u32 reserved_4 :4;
-+ u32 trim :4; /* PLL 3 trim value */
-+ } part;
-+ u32 whole;
-+};
-+
-+
-+
-+/* MIU interface control 1 */
-+union mm00r {
-+ struct {
-+ u32 miu_enbl :1; /* MIU enable bit */
-+ u32 mr_dsbl :1; /* MIU reset disable bit */
-+ u32 edr_dsbl :1; /* embedded DRAM reset disable bit */
-+ u32 reserved_1 :29;
-+ } part;
-+ u32 whole;
-+};
-+
-+/* MIU interface control 2 */
-+union mm01r {
-+ struct {
-+ u32 mc_src :1; /* memory clock source */
-+ u32 msr_enbl :1; /* memory slow refresh enable bit */
-+ u32 pb_cpu :1; /* page break enable for CPU */
-+ u32 pb_gc1 :1; /* page break enable for GC1 */
-+ u32 pb_gc2 :1; /* page break enable for GC2 */
-+ u32 pb_stn_r :1; /* page break enable for STN read */
-+ u32 pb_stn_w :1; /* page break enable for STN write */
-+ u32 pb_ge :1; /* page break enable for GE */
-+ u32 reserved_1 :4;
-+ u32 mr_interval :14; /* normal memory refresh time interval */
-+ u32 reserved_2 :4;
-+ u32 edarm_enbl :1; /* embedded DRAM auto-refresh mode enable */
-+ u32 eds_enbl :1; /* EDRAM standby enable for EDRAM normal
-+ mode operation */
-+ } part;
-+ u32 whole;
-+};
-+
-+/* memory interface control 3 */
-+union mm02r {
-+ struct {
-+ u32 bs_ :2;
-+ u32 bs_stnr :2; /* burst count for STN read memory cycles */
-+ u32 bs_stnw :2; /* burst count for STN write memroy cycles */
-+ u32 bs_ge :2; /* burst count for graphics engine
-+ read/write memroy cycles */
-+ u32 bs_cpuw :2; /* burst count for CPU write memory cycles */
-+ u32 fifo_gc1 :4; /* GC1 display refresh FIFO threshold */
-+ u32 fifo_gc2 :4; /* GC2 display refresh FIFO threshold */
-+ u32 fifo_stnr :4; /* STN read FIFO threshold */
-+ u32 fifo_stnw :4; /* STN write FIFO threshold */
-+ u32 fifo_ge_src :3; /* GE source read FIFO threshold */
-+ u32 fifo_ge_dst :3; /* GE destination read FIFO threshold */
-+ } part;
-+ u32 whole;
-+};
-+
-+/* memory interface control 4 */
-+union mm03r {
-+ struct {
-+ u32 rd_late_req :1; /* read latency request */
-+ u32 reserved_1 :31;
-+ } part;
-+ u32 whole;
-+};
-+
-+/* memory interface control 5 */
-+union mm04r {
-+ struct {
-+ u32 latency :3; /* EDRAM latency */
-+ u32 dmm_cyc :1; /* enable for the dummy cycle insertion
-+ between read and write cycles */
-+ u32 pre_dmm_cyc :1; /* enable for the dummy cycle insertion
-+ between read/write and precharge cycles
-+ for the same bank */
-+ u32 reserved_1 :3;
-+ u32 bnk_act_cls :2; /* bank activate command to bank close
-+ command timing interval control */
-+ u32 bnk_act_rw :1; /* bank activate command to read/wirte
-+ command timing interval control */
-+ u32 bnk_cls_act :1; /* bank close command to bank activate
-+ command timing interval control */
-+ u32 trc :1; /* row cycle time */
-+ u32 reserved_2 :3;
-+ u32 delay_r :2; /* programmable delay for read clock */
-+ u32 delay_m :2; /* programmable delay for internal memory
-+ clock */
-+ } part;
-+ u32 whole;
-+};
-+
-+/* graphics controller 1 register */
-+union gc00r {
-+ struct {
-+ u32 ctl_enbl :1; /* Controller 1 Enable */
-+ u32 hc_reset :1; /* Horizontal Counter 1 Reset */
-+ u32 vc_reset :1; /* Vertical Counter 1 Reset */
-+ u32 iwin_enbl :1; /* Image Window 1 Enable */
-+ u32 gcd :4; /* Graphics Color Depth (GCD) */
-+
-+ u32 hc_enbl :1; /* Hardware Cursor 1 Enable */
-+ u32 reserved_1 :2;
-+ u32 aiwin_enbl :1; /* Alternate Image Window Enable */
-+ u32 agcd :4; /* Alternate Graphics Color Depth (AGCD) */
-+
-+ u32 g1rclk_src :2; /* G1RCLK Source */
-+ u32 tm0 :1; /* Test Mode 0 */
-+ u32 tm1 :1; /* Test Mode 1 */
-+ u32 fd :3; /* G1MCLK First Clock Divisor (FD1) */
-+ u32 reserved_2 :1;
-+
-+ u32 sd :8; /* G1MCLK Second Clock Divisor (SD1) */
-+ } part;
-+ u32 whole;
-+};
-+
-+/* graphics controller CRT control */
-+union gc01r {
-+ struct {
-+ u32 dac_enbl :2; /* CRT DAC enable */
-+ u32 hsync_out :1; /* CRT HSYNC output during power down mode */
-+ u32 vsync_out :1; /* CRT VSYNC output during power down mode */
-+ u32 hsync_ctl :2; /* CRT HSYNC control */
-+ u32 vsync_ctl :2; /* CRT VSYNC control */
-+ /**/
-+ u32 hsync_pol :1; /* CRT HSYNC polarity */
-+ u32 vsync_pol :1; /* CRT VSYNC polarity */
-+ u32 sync_p_enbl :1; /* sync pedestal enable */
-+ u32 blnk_p_enbl :1; /* blank pedestal enable */
-+ u32 c_sync_enbl :1; /* composite sync enable */
-+ u32 vref_sel :1; /* VREF select */
-+ u32 mn_sns_enbl :1; /* monitor sense enable */
-+ u32 ct_out_enbl :1; /* constant output enable */
-+ /**/
-+ u32 dac_out_lvl :8; /* monitor sense DAC output level */
-+ /**/
-+ u32 blue_dac_r :1; /* blue DAC sense result */
-+ u32 green_dac_r :1; /* green DAC sense result */
-+ u32 red_dac_r :1; /* red DAC sense result */
-+ u32 reserved_1 :1;
-+ u32 mon_col_sel :1; /* mono/color monitor select */
-+ u32 reserved_2 :3;
-+ } part;
-+ u32 whole;
-+};
-+
-+/* horizontal display 1 control */
-+union gc02r {
-+ struct {
-+ u32 hd1t :12; /* horizontal display 1 total */
-+ u32 reserved_1 :4;
-+
-+ u32 hd1e :12; /* horizontal display 1 end */
-+ u32 reserved_2 :4;
-+ } part;
-+ u32 whole;
-+};
-+
-+/* vertical display 1 control */
-+union gc03r {
-+ struct {
-+ u32 vd1t :12; /* vertical display 1 total */
-+ u32 reserved_1 :4;
-+
-+ u32 vd1e :12; /* vertical display 1 end */
-+ u32 reserved_2 :4;
-+ } part;
-+ u32 whole;
-+};
-+
-+/* horizontal sync 1 control */
-+union gc04r {
-+ struct {
-+ u32 hs1s :12; /* horizontal sync 1 start */
-+ u32 reserved_1 :4;
-+
-+ u32 hs1e :12; /* horizontal sync 1 end */
-+ u32 reserved_2 :4;
-+ } part;
-+ u32 whole;
-+};
-+
-+/* vertical sync 1 control */
-+union gc05r {
-+ struct {
-+ u32 vs1s :12; /* vertical sync 1 start */
-+ u32 reserved_1 :4;
-+
-+ u32 vs1e :12; /* vertical sync 1 end */
-+ u32 reserved_2 :4;
-+ } part;
-+ u32 whole;
-+};
-+
-+/* vertical display 1 count */
-+union gc07r {
-+ struct {
-+ u32 vd_cnt :12; /* vertical display 1 count */
-+ u32 reverved_1 :20;
-+ } part;
-+ u32 whole;
-+};
-+
-+/* horizontal window 1 control */
-+union gc08r {
-+ struct {
-+ u32 hw1s :12; /* horizontal window 1 start (HW1S) */
-+ u32 reserved_1 :4;
-+
-+ u32 hw1w :12; /* horizontal window 1 width (HW1W) */
-+ u32 w1ald :4; /* window 1 additional line data */
-+ } part;
-+ u32 whole;
-+};
-+
-+/* vertical window 1 control */
-+union gc09r {
-+ struct {
-+ u32 vw1s :12; /* vertical window 1 start */
-+ u32 reserved_1 :4;
-+ u32 vw1h :12; /* vertical window 1 height */
-+ u32 reserved_2 :4;
-+ } part;
-+ u32 whole;
-+};
-+
-+/* window 1 start address */
-+union gc0cr {
-+ struct {
-+ u32 w1sa :21; /* window 1 start address */
-+ u32 reserved_1 :11;
-+ } part;
-+ u32 whole;
-+};
-+
-+/* window 1 stride */
-+union gc0er {
-+ struct {
-+ s16 w1st; /* window 1 stride */
-+ s16 aw1st; /* alternate window 1 stride */
-+ } part;
-+ u32 whole;
-+};
-+
-+/* hardware cursor 1 position */
-+union gc10r {
-+ struct {
-+ u32 hc1s :12; /* horizontal cursor 1 start */
-+ u32 reserved_1 :4;
-+ u32 vc1s :12; /* vertical cursor 1 start */
-+ u32 reserved_2 :4;
-+ } part;
-+ u32 whole;
-+};
-+
-+/* hardware cursor 1 start address and offset */
-+union gc11r {
-+ struct {
-+ u32 hc1sa :11; /* hardware cursor 1 start address */
-+ u32 reserved_1 :5;
-+ u32 hc1o :6; /* horizontal cursor 1 offset */
-+ u32 reserved_2 :2;
-+ u32 vc1o :6; /* vertical cursor 1 offset */
-+ u32 reserved_3 :2;
-+ } part;
-+ u32 whole;
-+};
-+
-+/* hardware cursor 1 foreground color */
-+union gc12r {
-+ struct {
-+ u32 hc1fc :24; /* hardware cursor 1 foreground color */
-+ u32 reserved_1 :8;
-+ } part;
-+ u32 whole;
-+};
-+
-+/* hardware cursor 1 background color */
-+union gc13r {
-+ struct {
-+ u32 hc1bc :24; /* hardware cursor 1 background color */
-+ u32 reserved_1 :8;
-+ } part;
-+ u32 whole;
-+};
-+
-+
-+/* graphics controller 2 register */
-+union gc20r {
-+ struct {
-+ u32 ctl_enbl :1; /* Controller 2 Enable */
-+ u32 hc_reset :1; /* Horizontal Counter 2 Reset */
-+ u32 vc_reset :1; /* Vertical Counter 2 Reset */
-+ u32 iwin_enbl :1; /* Image Window 2 Enable */
-+ u32 gcd :4; /* Graphics Color Depth (GCD) */
-+
-+ u32 hc_enbl :1; /* Hardware Cursor 2 Enable */
-+ u32 reserved_1 :2;
-+ u32 aiwin_enbl :1; /* Alternate Image Window Enable */
-+ u32 agcd :4; /* Alternate Graphics Color Depth (AGCD) */
-+
-+ u32 g2rclk_src :2; /* G2RCLK Source */
-+ u32 tm0 :1; /* Test Mode 0 */
-+ u32 tm1 :1; /* Test Mode 1 */
-+ u32 fd :3; /* G2MCLK First Clock Divisor (FD1) */
-+ u32 reserved_2 :1;
-+
-+ u32 sd :8; /* G2MCLK Second Clock Divisor (SD1) */
-+ } part;
-+ u32 whole;
-+};
-+
-+/* graphics controller CRC control */
-+union gc21r {
-+ struct {
-+ u32 crc_enbl :1; /* CRC enable */
-+ u32 vsync_wait :1; /* CRC input data control waitime of VSYNC */
-+ u32 crc_o_sel :2; /* CRC output select */
-+ u32 reserved_1 :4;
-+ u32 crc_result :22; /* CRC result (read only) */
-+ u32 reserved_2 :2;
-+ } part;
-+ u32 whole;
-+};
-+
-+/* horizontal display 2 control */
-+union gc22r {
-+ struct {
-+ u32 hd2t :12; /* horizontal display 2 total */
-+ u32 reserved_1 :4;
-+
-+ u32 hd2e :12; /* horizontal display 2 end */
-+ u32 reserved_2 :4;
-+ } part;
-+ u32 whole;
-+};
-+
-+/* vertical display 2 control */
-+union gc23r {
-+ struct {
-+ u32 vd2t :12; /* vertical display 2 total */
-+ u32 reserved_1 :4;
-+
-+ u32 vd2e :12; /* vertical display 2 end */
-+ u32 reserved_2 :4;
-+ } part;
-+ u32 whole;
-+};
-+
-+/* horizontal sync 2 control */
-+union gc24r {
-+ struct {
-+ u32 hs2s :12; /* horizontal sync 2 start */
-+ u32 reserved_1 :4;
-+
-+ u32 hs2e :12; /* horizontal sync 2 end */
-+ u32 reserved_2 :4;
-+ } part;
-+ u32 whole;
-+};
-+
-+/* vertical sync 2 control */
-+union gc25r {
-+ struct {
-+ u32 vs2s :12; /* vertical sync 2 start */
-+ u32 reserved_1 :4;
-+
-+ u32 vs2e :12; /* vertical sync 2 end */
-+ u32 reserved_2 :4;
-+ } part;
-+ u32 whole;
-+};
-+
-+/* vertical display 2 count */
-+union gc27r {
-+ struct {
-+ u32 vd_cnt :12; /* vertical display 2 count */
-+ u32 reverved_1 :20;
-+ } part;
-+ u32 whole;
-+};
-+
-+/* horizontal window 2 control */
-+union gc28r {
-+ struct {
-+ u32 hw2s :12; /* horizontal window 2 start (HW2S) */
-+ u32 reserved_1 :4;
-+
-+ u32 hw2w :12; /* horizontal window 2 width (HW2W) */
-+ u32 w2ald :4; /* window 2 additional line data */
-+ } part;
-+ u32 whole;
-+};
-+
-+/* vertical window 2 control */
-+union gc29r {
-+ struct {
-+ u32 vw2s :12; /* vertical window 2 start */
-+ u32 reserved_1 :4;
-+ u32 vw2h :12; /* vertical window 2 height */
-+ u32 reserved_2 :4;
-+ } part;
-+ u32 whole;
-+};
-+
-+/* window 2 start address */
-+union gc2cr {
-+ struct {
-+ u32 w2sa :21; /* window 2 start address */
-+ u32 reserved_1 :11;
-+ } part;
-+ u32 whole;
-+};
-+
-+/* window 2 stride */
-+union gc2er {
-+ struct {
-+ s16 w2st; /* window 2 stride */
-+ s16 aw2st; /* alternate window 2 stride */
-+ } part;
-+ u32 whole;
-+};
-+
-+/* hardware cursor 2 position */
-+union gc30r {
-+ struct {
-+ u32 hc2s :12; /* horizontal cursor 2 start */
-+ u32 reserved_1 :4;
-+ u32 vc2s :12; /* vertical cursor 2 start */
-+ u32 reserved_2 :4;
-+ } part;
-+ u32 whole;
-+};
-+
-+/* hardware cursor 2 start address and offset */
-+union gc31r {
-+ struct {
-+ u32 hc2sa :11; /* hardware cursor 2 start address */
-+ u32 reserved_1 :5;
-+ u32 hc2o :6; /* horizontal cursor 2 offset */
-+ u32 reserved_2 :2;
-+ u32 vc2o :6; /* vertical cursor 2 offset */
-+ u32 reserved_3 :2;
-+ } part;
-+ u32 whole;
-+};
-+
-+/* hardware cursor 2 foreground color */
-+union gc32r {
-+ struct {
-+ u32 hc2fc :24; /* hardware cursor 2 foreground color */
-+ u32 reserved_1 :8;
-+ } part;
-+ u32 whole;
-+};
-+
-+/* hardware cursor 2 background color */
-+union gc33r {
-+ struct {
-+ u32 hc2bc :24; /* hardware cursor 2 background color */
-+ u32 reserved_1 :8;
-+ } part;
-+ u32 whole;
-+};
-+
-+
-+/* primary drawing command register */
-+union ge00r {
-+ struct {
-+ u32 rop :8; /* raster operation */
-+ /**/
-+ u32 cmd_typ :3; /* command type */
-+ u32 x_dir :1; /* x direction */
-+ u32 y_dir :1; /* y direction */
-+ u32 src_mem :1; /* source memory */
-+ u32 mon_src :1; /* mono source */
-+ u32 mon_ptn :1; /* mono pattern */
-+ /**/
-+ u32 dst_trns_e :1; /* destination transparency enable */
-+ u32 dst_trns_p :1; /* destination transparency polarity */
-+ u32 mon_trns_e :1; /* mono source or mono pattern transparency
-+ enable */
-+ u32 mon_trns_p :1; /* mono transparency polarity */
-+ u32 mod_sel :1; /* memory to screen or off screen to screen
-+ mode select */
-+ u32 alpha_sel :2; /* Alpha byte mask selection */
-+ u32 sol_col :1; /* solid color */
-+ /**/
-+ u32 stride_eq :1; /* source stride is equal to destination
-+ stride */
-+ u32 rop2_sel :1; /* ROP2 code selection */
-+ u32 clipping :1; /* enable clipping */
-+ u32 auto_exec :1; /* auto execute */
-+ u32 reserved_1 :4;
-+ } part;
-+ u32 whole;
-+};
-+
-+/* primary width and height register */
-+union ge01r {
-+ struct {
-+ u32 width :12; /* source/destination window width */
-+ u32 reserved_1 :4;
-+
-+ u32 height :12; /* source/destination window height */
-+ u32 reserved_2 :1;
-+ u32 reserved_3 :3;
-+ } bitblt;
-+ struct {
-+ u32 dm :17;
-+ u32 axis_major :12;
-+ u32 x_y :1; /* x-major or y-major */
-+ u32 last_pix :1; /* decision to draw or not to draw the last
-+ pixel of the line */
-+ u32 reserved_1 :1;
-+ } bresenham;
-+ u32 whole;
-+};
-+
-+/* primary destination address register */
-+union ge02r {
-+ struct {
-+ u32 dst_x :12; /* destination x position */
-+ u32 reserved_1 :1;
-+ u32 h_offset :3; /* mono/color pattern horizontal offset */
-+
-+ u32 dst_y :12; /* destination y position */
-+ u32 reserved_2 :1;
-+ u32 v_offset :3; /* mono/color pattern vertical offset */
-+ } window;
-+ struct {
-+ u32 x :12; /* starting x coordinate */
-+ u32 dm :17; /* 17 bits major-axis delta */
-+ u32 reserved_1 :3;
-+ } line;
-+ u32 whole;
-+};
-+
-+/* source XY register/line draw starting Y coordinate and mintor axis delta */
-+union ge03r {
-+ struct {
-+ u32 src_x :12; /* source X position */
-+ u32 reserved_1 :4;
-+
-+ u32 src_y :12; /* source Y position */
-+ u32 reserved_2 :4;
-+ } window;
-+ struct {
-+ u32 start_y :12; /* starting Y coordinate */
-+ u32 dn :17; /* 17 bits minor-axis delta */
-+ u32 reserved_1 :3;
-+ } line;
-+ u32 whole;
-+};
-+
-+/* clip left/top register */
-+union ge05r {
-+ struct {
-+ u32 left :12; /* left edge of clipping rectangle */
-+ u32 reserved_1 :4;
-+
-+ u32 top :12; /* top edge of clipping rectangle */
-+ u32 reserved_2 :4;
-+ } part;
-+ u32 whole;
-+};
-+
-+/* source stride/offset register */
-+union ge09r {
-+ struct {
-+ u32 src_strid :12; /* source line stride */
-+ u32 reserved_1 :13;
-+ u32 strt_bit :3; /* initial mono source bit offset */
-+ u32 strt_byte :3; /* initial mono/color source byte offset */
-+ u32 reserved_2 :1;
-+ } line;
-+ struct {
-+ u32 strt_bit :5; /* initial mono source bit offset */
-+ u32 reserved_1 :1;
-+ u32 amount :10; /* number of 16 bytes amount that MIU need
-+ to fetch from frame buffer */
-+
-+ u32 reserved_2 :9;
-+ u32 bit_spc :7; /* bit space between lines */
-+ } pack_mono;
-+ struct {
-+ u32 strt_bit :3; /* initial mono source bit offset */
-+ u32 strt_byte :3; /* initial mono/color source byte offset */
-+ u32 amount :10; /* number of 16 bytes amount that MIU need
-+ to fetch from frame buffer */
-+
-+ u32 reserved_1 :9;
-+ u32 bit_spc :3; /* bit space between lines */
-+ u32 byt_spc :4; /* byte space between lines */
-+ } pack_color;
-+ u32 whole;
-+};
-+
-+/* destination stride register and color depth */
-+union ge0ar {
-+ struct {
-+ u32 dst_strid :12; /* destination line stride and color depth */
-+ u32 reserved_1 :18;
-+ u32 col_dpth :2; /* color depth */
-+ } part;
-+ u32 whole;
-+};
-+
-+/* graphics controller color pallete */
-+union c1xxr {
-+ struct {
-+ u8 red; /* red color pallete */
-+ u8 green; /* green/gray color pallete */
-+ u8 blue; /* blue color palette */
-+ u8 reserved_1;
-+ } part;
-+ u32 whole;
-+};
-+
-+/* devicee configuration register 0 */
-+union dc00r {
-+ struct {
-+ u32 osc_bypass :1; /* oscillator bypass */
-+ u32 osc_enbl :1; /* oscillator enable */
-+ u32 pll1_bypass :1; /* PLL1 bypass */
-+ u32 pll1_enbl :1; /* PLL1 enable */
-+ u32 pll1_p_par :3; /* PLL1 P parameter */
-+ u32 cpu_div :1; /* CPU interface clock divisor */
-+ u32 pll1_n_par :5; /* PLL1 N parameter */
-+ u32 saisc :1; /* StrongARM interface synchronizer control */
-+ u32 s_chp_reset :1; /* software chip reset */
-+ u32 mem_enbl :1; /* memory standby enable */
-+ u32 pll1_m_par :8; /* PLL 1 M parameter */
-+ u32 osc_shaper :1; /* oscillator shaper disable */
-+ u32 fast_pwr :1; /* fast power sequencing */
-+ u32 osc_frq :2; /* oscillator frequency select */
-+ u32 pll1_trim :4; /* PLL 1 trim value */
-+ } part;
-+ u32 whole;
-+};
-+
-+/* device ID/vendor ID register */
-+union pc00r {
-+ struct {
-+ u16 device; /* device ID */
-+ u16 vendor; /* vendor ID */
-+ } part;
-+ u32 whole;
-+};
-+
-+/* Flat Panel Control Register */
-+union fp00r {
-+ struct {
-+ u32 flatp_enbl : 2; /* Flat Panel Interface Enable */
-+ u32 flatp_type : 2; /* Flat Panel Type */
-+ u32 mono : 1; /* Mono/Color Panel Select */
-+ u32 flatp_intf : 3; /* Flat Panel Interface */
-+ u32 dither_pat : 2; /* Dither Pattern */
-+ u32 reserved : 2; /* Reserved Must Be 0*/
-+ u32 dither_col : 3; /* Dither Base Color */
-+ u32 alt_win_ctl: 1; /* Alternate Window Control */
-+ u32 frc_ctl : 2; /* FRC Control */
-+ u32 dither_adj1: 6; /* Dither Pattern Adjust 1 */
-+ u32 dither_adj2: 3; /* Dither Pattern Adjust 2 */
-+ u32 dither_adj3: 1; /* Dither Pattern Adjust 3 */
-+ u32 test_mode0 : 1; /* Test Mode 0 */
-+ u32 test_mode1 : 1; /* Test Mode 1 */
-+ u32 test_mode2 : 1; /* Test Mode 2 */
-+ u32 test_mode3 : 1; /* Test Mode 3 */
-+ } part;
-+ u32 whole;
-+};
-+
-+union fp01r {
-+ struct {
-+ u32 dummy;
-+ } part;
-+ u32 whole;
-+};
-+
-+union fp02r {
-+ struct {
-+ u32 dummy;
-+ } part;
-+ u32 whole;
-+};
-+
-+union fp03r {
-+ struct {
-+ u32 dummy;
-+ } part;
-+ u32 whole;
-+};
-+
-+union fp04r {
-+ struct {
-+ u32 dummy;
-+ } part;
-+ u32 whole;
-+};
-+
-+union fp05r {
-+ struct {
-+ u32 dummy;
-+ } part;
-+ u32 whole;
-+};
-+
-+union fp0fr {
-+ struct {
-+ u32 dummy;
-+ } part;
-+ u32 whole;
-+};
-+
-+
-+
-+
-+/****
-+ * Others
-+ */
-+
-+#define CHIPNAME "MQ-200"
-+
-+extern void mq200_external_setpal(unsigned regno, unsigned long color, unsigned long addr);
-+extern void mq200_external_setqmode(struct mq200_monitor_info*, unsigned long, spinlock_t *);
-+extern void mq200_external_offdisplay(unsigned long);
-+extern void mq200_external_ondisplay (unsigned long);
-+extern int mq200_external_probe(unsigned long);
-+
-+
-+
-+#endif
-diff -Nur linux-2.6.24.vanilla/drivers/video/mq200/mq_external.c linux-2.6.24/drivers/video/mq200/mq_external.c
---- linux-2.6.24.vanilla/drivers/video/mq200/mq_external.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.24/drivers/video/mq200/mq_external.c 2008-02-20 21:51:22.000000000 +0100
-@@ -0,0 +1,513 @@
-+/*
-+ * Copyright (C) 2005 Holger Hans Peter Freyther
-+ *
-+ * Based ON:
-+ *
-+ * linux/drivers/video/mq200fb.c -- MQ-200 for a frame buffer device
-+ * based on linux/driver/video/pm2fb.c
-+ *
-+ * 2007/03/11 mrdata:
-+ * bug found in gc1_reset(), renaming to gc1_gc2_reset()
-+ * extend mq200_external_ondisplay() -> LCD for GC2 and CRT for GC1
-+ *
-+ * Copyright (C) 2000 Lineo, Japan
-+ *
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License. See the file COPYING in the main directory of this archive
-+ * for more details.
-+ */
-+
-+#include <asm/types.h>
-+#include <asm/io.h>
-+#include <linux/delay.h>
-+#include <linux/spinlock.h>
-+
-+#include <asm/hardware.h>
-+
-+#include "mq200_data.h"
-+
-+
-+#if 1
-+#define PRINTK(args...) printk(args)
-+#else
-+#define PRINTK(args...)
-+#endif
-+
-+
-+/****
-+ * power state transition to "state".
-+ */
-+static void
-+power_state_transition(unsigned long register_base, int state)
-+{
-+ int i;
-+ writel(state, PMCSR(register_base));
-+ mdelay(300);
-+ for (i = 1; ; i++) {
-+ udelay(100);
-+ if ((readl(PMCSR(register_base)) & 0x3) == state) {
-+ break;
-+ }
-+ }
-+}
-+
-+
-+/****
-+ * device configuration initialization.
-+ */
-+static void
-+dc_reset(unsigned long register_base)
-+{
-+ union dc00r dc00r;
-+
-+ /* Reset First */
-+ dc00r.whole = DC_RESET;
-+ writel(dc00r.whole, DC00R(register_base));
-+ mdelay(100);
-+
-+ dc00r.whole = 0xEF2082A;
-+ writel(dc00r.whole, DC00R(register_base));
-+ mdelay(300);
-+ PRINTK(CHIPNAME ": DC00R = 0x%08X\n", readl(DC00R(register_base)));
-+}
-+
-+
-+/****
-+ * initialize memory interface unit.
-+ */
-+static void
-+miu_reset(unsigned long register_base)
-+{
-+ union mm00r mm00r;
-+ union mm01r mm01r;
-+ union mm02r mm02r;
-+ union mm03r mm03r;
-+ union mm04r mm04r;
-+
-+ /* MIU interface control 1 */
-+ mm00r.whole = 0x4;
-+ writel(mm00r.whole, MM00R(register_base));
-+ mdelay(50);
-+ writel(0, MM00R(register_base));
-+ mdelay(50);
-+
-+ /* MIU interface control 2
-+ * o PLL 1 output is used as memory clock source.
-+ */
-+ mm01r.whole = 0x4143e086;
-+ writel(mm01r.whole, MM01R(register_base));
-+
-+ /* memory interface control 3 */
-+ mm02r.whole = 0x6d6aabff;
-+ writel(mm02r.whole, MM02R(register_base));
-+
-+ /* memory interface control 5 */
-+ mm04r.whole = 0x10d;
-+ writel(mm04r.whole, MM04R(register_base));
-+
-+ /* memory interface control 4 */
-+ mm03r.whole = 0x1;
-+ writel(mm03r.whole, MM03R(register_base));
-+ mdelay(50);
-+
-+ /* MIU interface control 1 */
-+ mm00r.whole = 0x3;
-+ writel(mm00r.whole, MM00R(register_base));
-+ mdelay(50);
-+}
-+
-+/****
-+ *
-+ */
-+static
-+void fpctrl_reset(unsigned long addr)
-+{
-+ /*
-+ * We're in D0 State, let us set the FPCTRL
-+ */
-+ union fp00r fp00r;
-+ union fp01r fp01r;
-+ union fp02r fp02r;
-+ union fp03r fp03r;
-+ union fp04r fp04r;
-+ union fp0fr fp0fr;
-+
-+ fp00r.whole = 0x6320;
-+ writel(fp00r.whole, FP00R(addr));
-+
-+ fp01r.whole = 0x20;
-+ writel(fp01r.whole, FP01R(addr));
-+
-+ fp04r.whole = 0xBD0001;
-+ writel(fp04r.whole, FP04R(addr));
-+
-+ /* Set Flat Panel General Purpose register first */
-+ fp02r.whole = 0x0;
-+ writel(fp02r.whole, FP02R(addr));
-+
-+ fp03r.whole = 0x0;
-+ writel(fp03r.whole, FP03R(addr));
-+
-+ fp0fr.whole = 0xA16c44;
-+ writel(fp0fr.whole, FP0FR(addr));
-+
-+ /* Set them again */
-+ fp02r.whole = 0x0;
-+ writel(fp02r.whole, FP02R(addr));
-+
-+ fp03r.whole = 0x0;
-+ writel(fp03r.whole, FP03R(addr));
-+}
-+
-+
-+/****
-+ * initialize power management unit.
-+ */
-+static void
-+pmu_reset(unsigned long register_base)
-+{
-+ union pm00r pm00r;
-+ union pm01r pm01r;
-+ union pm02r pm02r;
-+
-+ /* power management miscellaneous control
-+ * o GE is driven by PLL 1 clock.
-+ */
-+ pm00r.whole = 0xc0900;
-+ writel(pm00r.whole, PM00R(register_base));
-+
-+ /* D1 state control */
-+ pm01r.whole = 0x5000271;
-+ writel(pm01r.whole, PM01R(register_base));
-+
-+ /* D2 state control */
-+ pm02r.whole = 0x271;
-+ writel(pm02r.whole, PM02R(register_base));
-+}
-+
-+/****
-+ * initialize graphics controller 1
-+ * and graphics controller 2
-+ */
-+static void
-+gc1_gc2_reset(unsigned long register_base, spinlock_t *lock )
-+{
-+ unsigned long flags;
-+ union gc00r gc00r;
-+ union gc01r gc01r;
-+ union gc02r gc02r;
-+ union gc03r gc03r;
-+ union gc04r gc04r;
-+ union gc05r gc05r;
-+ union gc08r gc08r;
-+ union gc09r gc09r;
-+ union gc0cr gc0cr;
-+ union gc0er gc0er;
-+ union gc20r gc20r;
-+ union gc22r gc22r;
-+ union gc23r gc23r;
-+ union gc24r gc24r;
-+ union gc25r gc25r;
-+ union gc28r gc28r;
-+ union gc29r gc29r;
-+ union gc2cr gc2cr;
-+ union gc2er gc2er;
-+
-+ union pm00r pm00r;
-+ union pm06r pm06r;
-+ union pm06r pm07r;
-+
-+ spin_lock_irqsave(lock, flags);
-+
-+ /* alternate window 1 stride */
-+ gc0er.whole = 0x640;
-+ writel(gc0er.whole, GC0ER(register_base));
-+
-+ /* image window 1 start address */
-+ gc0cr.whole = 0x0;
-+ writel(gc0cr.whole, GC0CR(register_base));
-+
-+ /* alternate window 2 stride */
-+ gc2er.whole = 0x640;
-+ writel(gc0er.whole, GC2ER(register_base));
-+
-+ /* image window 2 start address */
-+ gc2cr.whole = 0x0;
-+ writel(gc2cr.whole, GC2CR(register_base));
-+
-+ /* read PM Register */
-+ pm00r.whole = readl(PM00R(register_base));
-+
-+ /* horizontal window 1 control */
-+ gc08r.whole = 0x131f0000;
-+ writel(gc08r.whole, GC08R(register_base));
-+
-+ /* vertical window 1 control */
-+ gc09r.whole = 0x12570000;
-+ writel(gc09r.whole, GC09R(register_base));
-+
-+ /* horizontal display 1 control */
-+ gc02r.whole = 0x320041e;
-+ writel(gc02r.whole, GC02R(register_base));
-+
-+ /* vertical display 1 control */
-+ gc03r.whole = 0x2570273;
-+ writel(gc03r.whole, GC03R(register_base));
-+
-+ /* horizontal sync 1 control */
-+ gc04r.whole = 0x3c70347;
-+ writel(gc04r.whole, GC04R(register_base));
-+
-+ /* vertical sync 1 control */
-+ gc05r.whole = 0x25d0259;
-+ writel(gc05r.whole, GC05R(register_base));
-+
-+ /* graphics controller CRT control */
-+ gc01r.whole = 0x800;
-+ writel(gc01r.whole, GC01R(register_base));
-+
-+ /* PLL 2 programming */
-+ pm06r.whole = 0xE90830;
-+ writel(pm06r.whole, PM06R(register_base));
-+
-+ /* graphics controller 1 register
-+ * o GC1 clock source is PLL 2.
-+ * o hardware cursor is disabled.
-+ */
-+ gc00r.whole = 0x10000C8 | 0x20000;
-+ writel(gc00r.whole, GC00R(register_base));
-+
-+#if 0
-+ /* alternate horizontal window 1 control */
-+ writel(0, GC0AR(register_base));
-+
-+ /* alternate vertical window 1 control */
-+ writel(0, GC0BR(register_base));
-+
-+ /* window 1 start address */
-+ writel(0x2004100, GC0CR(register_base));
-+
-+ /* alternate window 1 start address */
-+ writel(0, GC0DR(register_base));
-+
-+ /* window 1 stride */
-+ gc0er.whole = 0x5100048;
-+ writel(gc0er.whole, GC0ER(register_base));
-+
-+ /* reserved register - ??? - */
-+ writel(0x31f, GC0FR(register_base));
-+#endif
-+
-+#if 0
-+ /* hardware cursor 1 position */
-+ writel(0, GC10R(register_base));
-+
-+ /* hardware cursor 1 start address and offset */
-+ gc11r.whole = 0x5100048;
-+ writel(gc11r.whole, GC11R(register_base));
-+
-+ /* hardware cursor 1 foreground color */
-+ writel(0x00ffffff, GC12R(register_base));
-+
-+ /* hardware cursor 1 background color */
-+ writel(0x00000000, GC13R(register_base));
-+#endif
-+
-+ /* horizontal window 2 control */
-+ gc28r.whole = 0x31f0000;
-+ writel(gc28r.whole, GC28R(register_base));
-+
-+ /* vertical window 2 control */
-+ gc29r.whole = 0x2570000;
-+ writel(gc29r.whole, GC29R(register_base));
-+
-+ /* horizontal display 2 control */
-+ gc22r.whole = 0x320041e;
-+ writel(gc22r.whole, GC22R(register_base));
-+
-+ /* vertical display 2 control */
-+ gc23r.whole = 0x2570273;
-+ writel(gc23r.whole, GC23R(register_base));
-+
-+ /* horizontal sync 2 control */
-+ gc24r.whole = 0x3c70347;
-+ writel(gc24r.whole, GC24R(register_base));
-+
-+ /* vertical sync 2 control */
-+ gc25r.whole = 0x25d0259;
-+ writel(gc25r.whole, GC25R(register_base));
-+
-+ /* graphics controller CRT control */
-+ gc01r.whole = 0x800;
-+ writel(gc01r.whole, GC01R(register_base));
-+
-+ /* PLL 3 programming */
-+ pm07r.whole = 0xE90830;
-+ writel(pm07r.whole, PM07R(register_base));
-+
-+ /* graphics controller 2 register
-+ * o GC2 clock source is PLL 3.
-+ * o hardware cursor is disabled.
-+ */
-+ gc20r.whole = 0x10000C8 | 0x30000;
-+ writel(gc20r.whole, GC20R(register_base));
-+
-+ /*
-+ * Enable PLL2 and PLL3 in the PM Register
-+ */
-+ pm00r.part.pll2_enbl = 0x1;
-+ pm00r.part.pll3_enbl = 0x1;
-+ writel(pm00r.whole, PM00R(register_base));
-+
-+ spin_unlock_irqrestore(lock, flags);
-+}
-+
-+
-+/****
-+ * initialize graphics engine.
-+ */
-+static void
-+ge_reset(unsigned long register_base)
-+{
-+ /* drawing command register */
-+ writel(0, GE00R(register_base));
-+
-+ /* promary width and height register */
-+ writel(0, GE01R(register_base));
-+
-+ /* primary destination address register */
-+ writel(0, GE02R(register_base));
-+
-+ /* primary source XY register */
-+ writel(0, GE03R(register_base));
-+
-+ /* primary color compare register */
-+ writel(0, GE04R(register_base));
-+
-+ /* primary clip left/top register */
-+ writel(0, GE05R(register_base));
-+
-+ /* primary clip right/bottom register */
-+ writel(0, GE06R(register_base));
-+
-+ /* primary source and pattern offset register */
-+ writel(0, GE07R(register_base));
-+
-+ /* primary foreground color register/rectangle fill color depth */
-+ writel(0, GE08R(register_base));
-+
-+ /* source stride/offset register */
-+ writel(0, GE09R(register_base));
-+
-+ /* destination stride register and color depth */
-+ writel(0, GE0AR(register_base));
-+
-+ /* image base address register */
-+ writel(0, GE0BR(register_base));
-+}
-+
-+/****
-+ * initialize Color Palette 1.
-+ */
-+static void
-+cp1_reset(unsigned long addr_info)
-+{
-+ int i;
-+
-+ for (i = 0; i < 256; i++)
-+ writel(0, C1xxR(addr_info, i));
-+}
-+
-+
-+/*
-+ * Below functions are called from the skeleton
-+ */
-+void mq200_external_setpal(unsigned regno, unsigned long color, unsigned long addr)
-+{
-+ writel(color,C1xxR(addr,regno));
-+}
-+
-+void mq200_external_setqmode(struct mq200_monitor_info* info,
-+ unsigned long addr, spinlock_t *lock)
-+{
-+ dc_reset(addr); /* device configuration */
-+
-+ power_state_transition(addr, 0); /* transition to D0 state */
-+
-+ pmu_reset(addr); /* power management unit */
-+
-+ miu_reset(addr); /* memory interface unit */
-+
-+ ge_reset(addr); /* graphics engine */
-+
-+ fpctrl_reset(addr); /* reset the panel settings */
-+
-+ gc1_gc2_reset(addr, lock); /* graphics controller 1 and 2 */
-+
-+ cp1_reset(addr); /* color palette 1 */
-+
-+ mq200_external_ondisplay(addr); /* LCD and CRT */
-+}
-+
-+void mq200_external_offdisplay(unsigned long addr)
-+{
-+ /*
-+ * Move the MQ200 to D3 mode
-+ */
-+ power_state_transition(addr, 3);
-+}
-+
-+/**
-+ * to be called after mq200_external_setqmode
-+ */
-+void mq200_external_ondisplay (unsigned long addr)
-+{
-+ /*
-+ * Set the framebuffer details
-+ */
-+ union gc00r gc00r;
-+ union gc01r gc01r;
-+ union gc20r gc20r;
-+ union fp00r fp00r;
-+
-+ /* enable LCD for GC2 */
-+ fp00r.whole = readl(FP00R(addr));
-+ fp00r.whole &= 0xfffffffc;
-+
-+ gc20r.whole = readl(GC20R(addr));
-+
-+ if(!(gc20r.whole & 0x1)) {
-+ gc20r.whole |= 0x1;
-+ writel(gc20r.whole, GC20R(addr));
-+ }
-+
-+ fp00r.whole |= 0x3;
-+ writel(fp00r.whole, FP00R(addr));
-+
-+ /* enable CRT for GC1 */
-+ gc00r.whole = readl(GC00R(addr));
-+
-+ if(!(gc00r.whole & 0x1)) {
-+ gc00r.whole |= 0x1;
-+ writel(gc00r.whole, GC00R(addr));
-+ }
-+
-+ gc01r.whole = readl(GC01R(addr));
-+ gc01r.whole &= 0xfffffffc;
-+
-+ gc01r.whole |= 0x1;
-+ writel(gc01r.whole, GC01R(addr));
-+
-+}
-+
-+int mq200_external_probe(unsigned long addr)
-+{
-+ union pc00r pc00r;
-+ if(readl(PMR(addr)) != PMR_VALUE)
-+ return 0;
-+
-+ pc00r.whole = readl(PC00R(addr));
-+ printk(KERN_INFO "mq200 video driver found Vendor: 0x%X Device: 0x%X\n",
-+ pc00r.part.device, pc00r.part.vendor);
-+ return 1;
-+}
-diff -Nur linux-2.6.24.vanilla/drivers/video/mq200/mq_skeleton.c linux-2.6.24/drivers/video/mq200/mq_skeleton.c
---- linux-2.6.24.vanilla/drivers/video/mq200/mq_skeleton.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.24/drivers/video/mq200/mq_skeleton.c 2008-02-20 21:51:22.000000000 +0100
-@@ -0,0 +1,398 @@
-+/*
-+ * Author: Holger Hans Peter Freyther
-+ *
-+ *
-+ * This implements the frame buffer driver interface to communicate
-+ * with the kernel.
-+ * It uses the mq200 routines from the ucLinux driver from Lineo
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+
-+#include <linux/autoconf.h>
-+#include <linux/platform_device.h>
-+#include <linux/module.h>
-+#include <linux/fb.h>
-+#include <linux/types.h>
-+#include <linux/spinlock.h>
-+
-+#include "mq200_data.h"
-+
-+#if CONFIG_SA1100_SIMPAD
-+/*
-+ * Siemens SIMpad specefic data
-+ */
-+#include <asm/arch/simpad.h>
-+#include <asm/arch/hardware.h>
-+
-+#define MQ200_REGIONS simpad_mq200_regions
-+#define MQ200_MONITOR simpad_mq200_panel
-+
-+static struct mq200_io_regions simpad_mq200_regions = {
-+ .fb_size = MQ200_FB_SIZE,
-+ .phys_mmio_base = 0x4be00000,
-+ .virt_mmio_base = 0xf2e00000,
-+ .phys_fb_base = 0x4b800000,
-+ .virt_fb_base = 0xf2800000,
-+};
-+
-+static struct mq200_monitor_info simpad_mq200_panel = {
-+ .horizontal_res = 800,
-+ .vertical_res = 600,
-+ .depth = 16,
-+ .refresh = 60,
-+ .line_length = 1600,
-+ .flags = 0x00130004,
-+};
-+
-+extern long get_cs3_shadow(void);
-+extern void set_cs3_bit(int value);
-+extern void clear_cs3_bit(int value);
-+#endif
-+
-+
-+
-+struct mq200_info {
-+ struct fb_info fb_info;
-+ struct mq200_io_regions io_regions;
-+ struct mq200_monitor_info monitor_info;
-+
-+ /* palette */
-+ u32 pseudo_palette[17]; /* 16 colors + 1 in reserve not that well documented... */
-+ spinlock_t lock;
-+};
-+
-+
-+
-+static int mq200_blank( int blank_mode, struct fb_info *info )
-+{
-+#ifdef CONFIG_SA1100_SIMPAD
-+ if(blank_mode ){
-+ clear_cs3_bit(DISPLAY_ON);
-+ }else {
-+ set_cs3_bit(DISPLAY_ON);
-+ }
-+#endif
-+ return 0;
-+}
-+
-+
-+static int mq200_check_var(struct fb_var_screeninfo *var,
-+ struct fb_info *info )
-+{ /* TODO do we need sanity checks here */
-+ return 0;
-+}
-+
-+
-+static int mq200_set_par( struct fb_info *info )
-+{
-+ /* TODO set paraemeter */
-+ return 0;
-+}
-+
-+static int mq200_setcolreg(unsigned regno, unsigned red, unsigned green,
-+ unsigned blue, unsigned transp,
-+ struct fb_info *info )
-+{
-+ struct mq200_info *p;
-+ unsigned long color;
-+ u32* pal = info->pseudo_palette;
-+
-+ p = info->par;
-+
-+ if(regno > 255 )
-+ return 1;
-+
-+ switch( info->var.bits_per_pixel ){
-+ case 16:
-+ pal[regno] =
-+ ((red & 0xf800) >> 0) |
-+ ((green & 0xf800) >> 5) | ((blue & 0xf800) >> 11);
-+ break;
-+ case 24:
-+ pal[regno] =
-+ ((red & 0xff00) << 8) |
-+ ((green & 0xff00)) | ((blue & 0xff00) >> 8);
-+ break;
-+ case 32:
-+ pal[regno] =
-+ ((red & 0xff00) >> 8) |
-+ ((green & 0xff00)) | ((blue & 0xff00) << 8);
-+ break;
-+ default:
-+ break;
-+ }
-+
-+ red &= 0xFF;
-+ green &= 0xFF;
-+ blue &= 0xFF;
-+
-+ color = red | (green << 8) | (blue << 16);
-+ mq200_external_setpal(regno, color, p->io_regions.virt_mmio_base);
-+
-+ return 0;
-+}
-+
-+
-+static struct fb_ops mq200_ops = {
-+ .owner = THIS_MODULE,
-+ .fb_check_var = mq200_check_var,
-+ .fb_set_par = mq200_set_par,
-+ .fb_setcolreg = mq200_setcolreg,
-+#ifdef FB_SOFT_CURSOR
-+ .fb_cursor = soft_cursor, /* FIXME use hardware cursor */
-+#endif
-+ .fb_fillrect = cfb_fillrect,
-+ .fb_copyarea = cfb_copyarea,
-+ .fb_imageblit = cfb_imageblit,
-+ .fb_blank = mq200_blank,
-+};
-+
-+
-+/*********************************************************************
-+ *
-+ * Device driver and module init code
-+ * this will register to the fb layer later
-+ *
-+ *********************************************************************/
-+static void mq200_internal_init_color( struct fb_bitfield* red,
-+ struct fb_bitfield* green,
-+ struct fb_bitfield* blue,
-+ int bpp )
-+{
-+ switch ( bpp )
-+ {
-+ case 16:
-+ red->offset = 11;
-+ green->offset = 5;
-+ blue->offset = 0;
-+
-+ red->length = 5;
-+ green->length = 6;
-+ blue->length = 5;
-+ break;
-+ case 24:
-+ red->offset = 16;
-+ green->offset = 8;
-+ blue->offset = 0;
-+
-+ red->length = 8;
-+ green->length = 8;
-+ blue->length = 8;
-+ break;
-+ case 32:
-+ red->offset = 0;
-+ green->offset = 8;
-+ blue->offset = 16;
-+
-+ red->length = 8;
-+ green->length = 8;
-+ blue->length = 8;
-+ case 8: /* fall through */
-+ default:
-+ red->offset = green->offset = blue->offset = 0;
-+ red->length = green->length = blue->length = bpp;
-+ break;
-+ }
-+
-+}
-+
-+
-+static struct mq200_info* __init mq200_internal_init_fbinfo(void)
-+{
-+ struct mq200_info *info = NULL;
-+
-+ info = (struct mq200_info*)kmalloc(sizeof(*info), GFP_KERNEL);
-+ if(!info)
-+ return NULL;
-+
-+ /*
-+ * Initialize memory
-+ */
-+ memset(info, 0, sizeof(struct mq200_info) );
-+ spin_lock_init(&info->lock);
-+
-+ /* set the base IO addresses */
-+ info->io_regions = MQ200_REGIONS;
-+ info->monitor_info = MQ200_MONITOR;
-+
-+ info->fb_info.screen_base = (char *)info->io_regions.virt_fb_base;
-+
-+ /* fb_fix_screeninfo filling */
-+ strcpy(info->fb_info.fix.id, "MQ200_FB" );
-+ info->fb_info.fix.smem_start = info->io_regions.phys_fb_base;
-+ info->fb_info.fix.smem_len = info->io_regions.fb_size; /* - CURSOR_IMAGE */
-+ info->fb_info.fix.mmio_start = info->io_regions.phys_mmio_base;
-+ info->fb_info.fix.mmio_len = MQ200_REGS_SIZE;
-+ info->fb_info.fix.type = FB_TYPE_PACKED_PIXELS;
-+ info->fb_info.fix.accel = FB_ACCEL_NONE;
-+ info->fb_info.fix.line_length = MQ200_MONITOR_LINE_LENGTH(info);
-+
-+ if(MQ200_MONITOR_DEPTH(info) <= 8 )
-+ info->fb_info.fix.visual = FB_VISUAL_PSEUDOCOLOR;
-+ else if( MQ200_MONITOR_DEPTH(info) >= 16 )
-+ info->fb_info.fix.visual = FB_VISUAL_DIRECTCOLOR;
-+ else
-+ panic("Calling mq200 with wrong display data\n");
-+
-+ /* set the variable screen info */
-+ info->fb_info.var.xres = MQ200_MONITOR_HORI_RES(info);
-+ info->fb_info.var.yres = MQ200_MONITOR_VERT_RES(info);
-+ info->fb_info.var.xres_virtual = MQ200_MONITOR_HORI_RES(info);
-+ info->fb_info.var.yres_virtual = MQ200_MONITOR_VERT_RES(info);
-+ info->fb_info.var.bits_per_pixel = MQ200_MONITOR_DEPTH(info);
-+
-+ mq200_internal_init_color(&info->fb_info.var.red,
-+ &info->fb_info.var.green,
-+ &info->fb_info.var.blue,
-+ MQ200_MONITOR_DEPTH(info) );
-+
-+ info->fb_info.var.transp.length = info->fb_info.var.transp.offset = 0;
-+ info->fb_info.var.height = info->fb_info.var.width = -1;
-+
-+ info->fb_info.var.vmode = FB_VMODE_NONINTERLACED;
-+ info->fb_info.var.pixclock = 10000;
-+ info->fb_info.var.left_margin = info->fb_info.var.right_margin = 16;
-+ info->fb_info.var.upper_margin = info->fb_info.var.lower_margin = 16;
-+ info->fb_info.var.hsync_len = info->fb_info.var.vsync_len = 8;
-+
-+ info->fb_info.var.nonstd = 0;
-+ info->fb_info.var.activate = FB_ACTIVATE_NOW;
-+ info->fb_info.var.accel_flags = 0;
-+
-+ return info;
-+}
-+
-+
-+extern void mq200_register_attributes(struct device* );
-+/*
-+ * gets called from the bus
-+ * we will register our framebuffer from here
-+ */
-+static int __init mq200_probe(struct device *dev)
-+{
-+ struct mq200_info *info = NULL;
-+ int retv= 0;
-+
-+ info = mq200_internal_init_fbinfo();
-+ if(!mq200_external_probe(info->io_regions.virt_mmio_base))
-+ goto error_out;
-+
-+ GPDR |= (1<<3);
-+ GAFR &= ~(1<<3);
-+ GPSR |= (1<<3);
-+
-+ mq200_external_setqmode(&info->monitor_info,
-+ info->io_regions.virt_mmio_base,
-+ &info->lock);
-+
-+ info->fb_info.fbops = &mq200_ops;
-+ info->fb_info.flags = FBINFO_FLAG_DEFAULT;
-+
-+ mq200_check_var(&info->fb_info.var, &info->fb_info );
-+
-+ fb_alloc_cmap(&info->fb_info.cmap, 1 << MQ200_MONITOR_DEPTH(info), 0 );
-+
-+ info->fb_info.pseudo_palette = (void*)info->pseudo_palette;
-+
-+ /* save the pointer to the mq200 struct in var */
-+ info->fb_info.par = info;
-+
-+ retv = register_framebuffer(&info->fb_info );
-+ if(retv < 0)
-+ goto error_out;
-+
-+
-+ /* will get unset if retv != 0 */
-+ dev_set_drvdata(dev, info );
-+ return retv;
-+
-+/*
-+ * Free the info and exit
-+ */
-+error_out:
-+ kfree(info);
-+ return -EINVAL;
-+}
-+
-+#ifdef CONFIG_PM
-+static struct mq200_info* get_mq200_info( struct device *dev)
-+{
-+ return dev_get_drvdata(dev);
-+}
-+
-+static unsigned long get_mmio_base( struct device *dev )
-+{
-+ struct mq200_info *info = get_mq200_info(dev);
-+ return info->io_regions.virt_mmio_base;
-+}
-+
-+static struct mq200_monitor_info* get_monitor_info( struct device *dev)
-+{
-+ struct mq200_info *info = get_mq200_info(dev);
-+ return &info->monitor_info;
-+}
-+
-+static spinlock_t* get_spinlock( struct device *dev)
-+{
-+ return &get_mq200_info(dev)->lock;
-+}
-+
-+/*
-+ * FIXME: make sure we only call mq200_external_offdisplay only once
-+ * a 2nd time will hang the kernel -zecke
-+ *
-+ * FIXME: save the content of the framebuffer inside dev->saved_state
-+ * so on resume we can memcpy it back into the buffer and userspace
-+ * does not need to redraw
-+ *
-+ * functions for suspending and resuming
-+ */
-+static int mq200_suspend(struct device *dev, pm_message_t state)
-+{
-+
-+ mq200_external_offdisplay( get_mmio_base(dev) );
-+ clear_cs3_bit(DISPLAY_ON);
-+
-+
-+ return 0;
-+}
-+
-+static int mq200_resume(struct device *dev)
-+{
-+ unsigned long mem = get_mmio_base(dev);
-+ struct mq200_monitor_info *monitor = get_monitor_info(dev);
-+ mq200_external_setqmode(monitor, mem, get_spinlock(dev) );
-+
-+
-+ /*
-+ * Set display on if it was on
-+ */
-+ set_cs3_bit(DISPLAY_ON);
-+
-+ return 0;
-+}
-+
-+
-+#endif
-+
-+
-+static struct device_driver mq200fb_driver = {
-+ .name = "simpad-mq200",
-+ .bus = &platform_bus_type,
-+ .probe = mq200_probe, /* will be called after we've registered the driver */
-+ .suspend = mq200_suspend,
-+ .resume = mq200_resume
-+};
-+
-+int __devinit mq200_init(void)
-+{
-+ return driver_register(&mq200fb_driver);
-+}
-+
-+module_init(mq200_init);
-+MODULE_DESCRIPTION("MQ200 framebuffer driver");
-+MODULE_LICENSE("GPL");
-+MODULE_AUTHOR("Holger Hans Peter Freyther");
+++ /dev/null
-diff -Nur linux-2.6.24.vanilla/drivers/net/wireless/orinoco_cs.c linux-2.6.24/drivers/net/wireless/orinoco_cs.c
---- linux-2.6.24.vanilla/drivers/net/wireless/orinoco_cs.c 2008-01-24 23:58:37.000000000 +0100
-+++ linux-2.6.24/drivers/net/wireless/orinoco_cs.c 2008-02-22 21:23:51.000000000 +0100
-@@ -8,6 +8,8 @@
- * cards such as the 3Com AirConnect and Ericsson WLAN.
- *
- * Copyright notice & release notes in file orinoco.c
-+ *
-+ * mrdata: added shared irq
- */
-
- #define DRIVER_NAME "orinoco_cs"
-@@ -120,7 +122,7 @@
- link->priv = dev;
-
- /* Interrupt setup */
-- link->irq.Attributes = IRQ_TYPE_EXCLUSIVE | IRQ_HANDLE_PRESENT;
-+ link->irq.Attributes = IRQ_TYPE_DYNAMIC_SHARING | IRQ_FIRST_SHARED | IRQ_HANDLE_PRESENT;
- link->irq.IRQInfo1 = IRQ_LEVEL_ID;
- link->irq.Handler = orinoco_interrupt;
- link->irq.Instance = dev;
+++ /dev/null
-diff -Nur linux-2.6.24.vanilla/drivers/pcmcia/cs.c linux-2.6.24/drivers/pcmcia/cs.c
---- linux-2.6.24.vanilla/drivers/pcmcia/cs.c 2008-01-24 23:58:37.000000000 +0100
-+++ linux-2.6.24/drivers/pcmcia/cs.c 2008-02-22 20:53:06.000000000 +0100
-@@ -10,6 +10,8 @@
- * are Copyright (C) 1999 David A. Hinds. All Rights Reserved.
- *
- * (C) 1999 David A. Hinds
-+ *
-+ * mrdata: -added suspend fix
- */
-
- #include <linux/module.h>
-@@ -59,6 +61,10 @@
- INT_MODULE_PARM(unreset_delay, 10); /* centiseconds */
- INT_MODULE_PARM(unreset_check, 10); /* centiseconds */
- INT_MODULE_PARM(unreset_limit, 30); /* unreset_check's */
-+// INT_MODULE_PARM(unreset_delay, 20); /* centiseconds */
-+// INT_MODULE_PARM(unreset_check, 100); /* centiseconds */
-+// INT_MODULE_PARM(unreset_limit, 300); /* unreset_check's */
-+
-
- /* Access speed for attribute memory windows */
- INT_MODULE_PARM(cis_speed, 300); /* ns */
-@@ -366,6 +372,7 @@
- skt->ops->set_socket(skt, &skt->socket);
-
- msleep(unreset_delay * 10);
-+
- for (i = 0; i < unreset_limit; i++) {
- skt->ops->get_status(skt, &status);
-
-@@ -434,7 +441,7 @@
-
- msleep(initial_delay * 10);
-
-- for (i = 0; i < 100; i++) {
-+ for (i = 0; i < 100; i++) {
- skt->ops->get_status(skt, &status);
- if (!(status & SS_DETECT))
- return CS_NO_CARD;
-diff -Nur linux-2.6.24.vanilla/drivers/pcmcia/sa1100_generic.c linux-2.6.24/drivers/pcmcia/sa1100_generic.c
---- linux-2.6.24.vanilla/drivers/pcmcia/sa1100_generic.c 2008-01-24 23:58:37.000000000 +0100
-+++ linux-2.6.24/drivers/pcmcia/sa1100_generic.c 2008-02-22 20:53:06.000000000 +0100
-@@ -28,6 +28,9 @@
- the provisions above, a recipient may use your version of this
- file under either the MPL or the GPL.
-
-+ 2007 mrnice: added thesings changes from device_driver
-+ to platform_driver - many thx to thesing
-+
- ======================================================================*/
-
- #include <linux/module.h>
-@@ -81,13 +84,15 @@
- return ret;
- }
-
--static struct device_driver sa11x0_pcmcia_driver = {
-- .probe = sa11x0_drv_pcmcia_probe,
-- .remove = soc_common_drv_pcmcia_remove,
-- .name = "sa11x0-pcmcia",
-- .bus = &platform_bus_type,
-- .suspend = pcmcia_socket_dev_suspend,
-- .resume = pcmcia_socket_dev_resume,
-+static struct platform_driver sa11x0_pcmcia_driver = {
-+ .driver = {
-+ .name = "sa11x0-pcmcia",
-+ .probe = sa11x0_drv_pcmcia_probe,
-+ .remove = soc_common_drv_pcmcia_remove,
-+ .suspend= pcmcia_socket_dev_suspend,
-+ .resume = pcmcia_socket_dev_resume,
-+ //.bus = &platform_bus_type,
-+ },
- };
-
- /* sa11x0_pcmcia_init()
-@@ -100,7 +105,7 @@
- */
- static int __init sa11x0_pcmcia_init(void)
- {
-- return driver_register(&sa11x0_pcmcia_driver);
-+ return platform_driver_register(&sa11x0_pcmcia_driver);
- }
-
- /* sa11x0_pcmcia_exit()
-@@ -110,7 +115,7 @@
- */
- static void __exit sa11x0_pcmcia_exit(void)
- {
-- driver_unregister(&sa11x0_pcmcia_driver);
-+ platform_driver_unregister(&sa11x0_pcmcia_driver);
- }
-
- MODULE_AUTHOR("John Dorsey <john+@cs.cmu.edu>");
-diff -Nur linux-2.6.24.vanilla/drivers/pcmcia/sa1100_simpad.c linux-2.6.24/drivers/pcmcia/sa1100_simpad.c
---- linux-2.6.24.vanilla/drivers/pcmcia/sa1100_simpad.c 2008-01-24 23:58:37.000000000 +0100
-+++ linux-2.6.24/drivers/pcmcia/sa1100_simpad.c 2008-02-22 20:53:32.000000000 +0100
-@@ -8,13 +8,15 @@
- #include <linux/kernel.h>
- #include <linux/device.h>
- #include <linux/init.h>
-+#include <linux/delay.h>
-
- #include <asm/hardware.h>
- #include <asm/mach-types.h>
- #include <asm/irq.h>
- #include <asm/arch/simpad.h>
- #include "sa1100_generic.h"
--
-+
-+extern long get_cs3_ro(void);
- extern long get_cs3_shadow(void);
- extern void set_cs3_bit(int value);
- extern void clear_cs3_bit(int value);
-@@ -25,8 +27,15 @@
-
- static int simpad_pcmcia_hw_init(struct soc_pcmcia_socket *skt)
- {
--
-- clear_cs3_bit(VCC_3V_EN|VCC_5V_EN|EN0|EN1);
-+ clear_cs3_bit(VCC_3V_EN|VCC_5V_EN|EN0|EN1|PCMCIA_RESET);
-+
-+ set_cs3_bit(PCMCIA_BUFF_DIS);
-+
-+ msleep(10);
-+
-+ clear_cs3_bit(PCMCIA_BUFF_DIS);
-+
-+ msleep(5);
-
- skt->irq = IRQ_GPIO_CF_IRQ;
-
-@@ -38,7 +47,7 @@
- soc_pcmcia_free_irqs(skt, irqs, ARRAY_SIZE(irqs));
-
- /* Disable CF bus: */
-- //set_cs3_bit(PCMCIA_BUFF_DIS);
-+ set_cs3_bit(PCMCIA_BUFF_DIS);
- clear_cs3_bit(PCMCIA_RESET);
- }
-
-@@ -47,21 +56,17 @@
- struct pcmcia_state *state)
- {
- unsigned long levels = GPLR;
-- long cs3reg = get_cs3_shadow();
--
-- state->detect=((levels & GPIO_CF_CD)==0)?1:0;
-- state->ready=(levels & GPIO_CF_IRQ)?1:0;
-- state->bvd1=1; /* Not available on Simpad. */
-- state->bvd2=1; /* Not available on Simpad. */
-- state->wrprot=0; /* Not available on Simpad. */
--
-- if((cs3reg & 0x0c) == 0x0c) {
-- state->vs_3v=0;
-- state->vs_Xv=0;
-- } else {
-- state->vs_3v=1;
-- state->vs_Xv=0;
-- }
-+
-+ state->detect = ((levels & GPIO_CF_CD) == 0) ? 1 : 0 ;
-+ state->ready = (levels & GPIO_CF_IRQ) ? 1 : 0 ;
-+
-+ long cs3_ro_reg = get_cs3_ro();
-+
-+ state->bvd1 = (cs3_ro_reg & PCMCIA_BVD1) ? 1 : 0 ; /* old: =1 Not available on Simpad. */
-+ state->bvd2 = (cs3_ro_reg & PCMCIA_BVD2) ? 1 : 0 ; /* old: =1 Not available on Simpad. */
-+ state->wrprot = 0 ; /* Not available on Simpad. */
-+ state->vs_3v = (cs3_ro_reg & PCMCIA_VS1) ? 0 : 1 ;
-+ state->vs_Xv = (cs3_ro_reg & PCMCIA_VS2) ? 0 : 1 ;
- }
-
- static int
-@@ -95,7 +100,11 @@
- local_irq_restore(flags);
- return -1;
- }
--
-+
-+ if (state->flags & SS_RESET)
-+ set_cs3_bit(PCMCIA_RESET);
-+ else
-+ clear_cs3_bit(PCMCIA_RESET);
-
- local_irq_restore(flags);
-
-@@ -104,6 +113,7 @@
-
- static void simpad_pcmcia_socket_init(struct soc_pcmcia_socket *skt)
- {
-+ clear_cs3_bit(PCMCIA_RESET);
- soc_pcmcia_enable_irqs(skt, irqs, ARRAY_SIZE(irqs));
- }
-
-diff -Nur linux-2.6.24.vanilla/drivers/pcmcia/soc_common.c linux-2.6.24/drivers/pcmcia/soc_common.c
---- linux-2.6.24.vanilla/drivers/pcmcia/soc_common.c 2008-01-24 23:58:37.000000000 +0100
-+++ linux-2.6.24/drivers/pcmcia/soc_common.c 2008-02-22 20:53:06.000000000 +0100
-@@ -747,7 +747,9 @@
-
- add_timer(&skt->poll_timer);
-
-- device_create_file(&skt->socket.dev, &dev_attr_status);
-+ ret = device_create_file(&skt->socket.dev, &dev_attr_status);
-+ if (ret)
-+ goto out_err_7;
- }
-
- dev_set_drvdata(dev, sinfo);
+++ /dev/null
-diff -Nur linux-2.6.24.vanilla/arch/arm/mach-sa1100/simpad.c linux-2.6.24/arch/arm/mach-sa1100/simpad.c
---- linux-2.6.24.vanilla/arch/arm/mach-sa1100/simpad.c 2008-01-24 23:58:37.000000000 +0100
-+++ linux-2.6.24/arch/arm/mach-sa1100/simpad.c 2008-02-20 21:10:00.000000000 +0100
-@@ -1,5 +1,15 @@
- /*
- * linux/arch/arm/mach-sa1100/simpad.c
-+ *
-+ * 2007/04/11 mrdata:
-+ * - insert simpad_uart_set_mctrl()
-+ * simpad_uart_get_mctrl()
-+ * - internal RS232/DECT/Bluetooth
-+ * works again (based on 2.4 simpad-serial.patch)
-+ * - added cs3_ro
-+ *
-+ * 2007/04/12 Bernhard Guillon:
-+ * -added gpio_keys (based on h3000.c from hh.org)
- */
-
- #include <linux/module.h>
-@@ -9,6 +19,9 @@
- #include <linux/proc_fs.h>
- #include <linux/string.h>
- #include <linux/pm.h>
-+
-+#include <linux/apm-emulation.h>
-+
- #include <linux/platform_device.h>
- #include <linux/mtd/mtd.h>
- #include <linux/mtd/partitions.h>
-@@ -27,12 +40,21 @@
-
- #include <linux/serial_core.h>
- #include <linux/ioport.h>
-+#include <linux/input.h>
-+#include <linux/gpio_keys.h>
- #include <asm/io.h>
-
- #include "generic.h"
-
-+long cs3_ro;
- long cs3_shadow;
-
-+long get_cs3_ro(void)
-+{
-+ cs3_ro = *(CS3BUSTYPE *)(CS3_BASE);
-+ return cs3_ro;
-+}
-+
- long get_cs3_shadow(void)
- {
- return cs3_shadow;
-@@ -55,9 +77,12 @@
- *(CS3BUSTYPE *)(CS3_BASE) = cs3_shadow;
- }
-
-+EXPORT_SYMBOL(get_cs3_ro);
-+EXPORT_SYMBOL(get_cs3_shadow);
- EXPORT_SYMBOL(set_cs3_bit);
- EXPORT_SYMBOL(clear_cs3_bit);
-
-+
- static struct map_desc simpad_io_desc[] __initdata = {
- { /* MQ200 */
- .virtual = 0xf2800000,
-@@ -73,23 +98,71 @@
- };
-
-
-+static void simpad_uart_set_mctrl(struct uart_port *port, u_int mctrl)
-+{
-+ if (port->mapbase == _Ser1UTCR0) {
-+ /* internal serial port (ttySA1, DECT/Bluetooth) */
-+ if (mctrl & TIOCM_RTS) GPCR = GPIO_UART1_RTS;
-+ else GPSR = GPIO_UART1_RTS;
-+
-+ if (mctrl & TIOCM_DTR) GPCR = GPIO_UART1_DTR;
-+ else GPSR = GPIO_UART1_DTR;
-+ }
-+
-+ else if (port->mapbase == _Ser3UTCR0) {
-+ /* external serial port (ttySA0, RS232) */
-+ if (mctrl & TIOCM_RTS) GPCR = GPIO_UART3_RTS;
-+ else GPSR = GPIO_UART3_RTS;
-+
-+ if (mctrl & TIOCM_DTR) GPCR = GPIO_UART3_DTR;
-+ else GPSR = GPIO_UART3_DTR;
-+ }
-+}
-+
-+
-+static u_int simpad_uart_get_mctrl(struct uart_port *port)
-+{
-+ u_int ret = TIOCM_CD | TIOCM_CTS | TIOCM_DSR;
-+
-+ if (port->mapbase == _Ser1UTCR0) {
-+ /* internal serial port (ttySA1, DECT/Bluetooth) */
-+ int gplr = GPLR;
-+ if (gplr & GPIO_UART1_DCD) ret &= ~TIOCM_CD;
-+ if (gplr & GPIO_UART1_CTS) ret &= ~TIOCM_CTS;
-+ if (gplr & GPIO_UART1_DSR) ret &= ~TIOCM_DSR;
-+ }
-+
-+ else if (port->mapbase == _Ser3UTCR0) {
-+ /* external serial port (ttySA0, RS232) */
-+ int gplr = GPLR;
-+ if (gplr & GPIO_UART3_DCD) ret &= ~TIOCM_CD;
-+ if (gplr & GPIO_UART3_CTS) ret &= ~TIOCM_CTS;
-+ if (gplr & GPIO_UART3_DSR) ret &= ~TIOCM_DSR;
-+ }
-+ return ret;
-+}
-+
-+
- static void simpad_uart_pm(struct uart_port *port, u_int state, u_int oldstate)
- {
-- if (port->mapbase == (u_int)&Ser1UTCR0) {
-- if (state)
-- {
-- clear_cs3_bit(RS232_ON);
-- clear_cs3_bit(DECT_POWER_ON);
-- }else
-- {
-- set_cs3_bit(RS232_ON);
-- set_cs3_bit(DECT_POWER_ON);
-- }
-- }
-+ if (port->mapbase == (u_int)&Ser3UTCR0) {
-+ if (state)
-+ {
-+ clear_cs3_bit(RS232_ON);
-+ /* clear_cs3_bit(DECT_POWER_ON); */
-+ }else
-+ {
-+ set_cs3_bit(RS232_ON);
-+ /* set_cs3_bit(DECT_POWER_ON); */
-+ }
-+ }
- }
-
-+
- static struct sa1100_port_fns simpad_port_fns __initdata = {
-- .pm = simpad_uart_pm,
-+ .set_mctrl = simpad_uart_set_mctrl,
-+ .get_mctrl = simpad_uart_get_mctrl,
-+ .pm = simpad_uart_pm,
- };
-
-
-@@ -135,7 +208,6 @@
- };
-
-
--
- static void __init simpad_map_io(void)
- {
- sa1100_map_io();
-@@ -144,13 +216,12 @@
-
- set_cs3_bit (EN1 | EN0 | LED2_ON | DISPLAY_ON | RS232_ON |
- ENABLE_5V | RESET_SIMCARD | DECT_POWER_ON);
--
--
-+
- sa1100_register_uart_fns(&simpad_port_fns);
- sa1100_register_uart(0, 3); /* serial interface */
- sa1100_register_uart(1, 1); /* DECT */
-
-- // Reassign UART 1 pins
-+ /* Reassign UART 1 pins */
- GAFR |= GPIO_UART_TXD | GPIO_UART_RXD;
- GPDR |= GPIO_UART_TXD | GPIO_LDD13 | GPIO_LDD15;
- GPDR &= ~GPIO_UART_RXD;
-@@ -160,7 +231,6 @@
- * Set up registers for sleep mode.
- */
-
--
- PWER = PWER_GPIO0| PWER_RTC;
- PGSR = 0x818;
- PCFR = 0;
-@@ -171,9 +241,10 @@
- sa11x0_set_mcp_data(&simpad_mcp_data);
- }
-
-+
- static void simpad_power_off(void)
- {
-- local_irq_disable(); // was cli
-+ local_irq_disable(); /* was cli */
- set_cs3(0x800); /* only SD_MEDIAQ */
-
- /* disable internal oscillator, float CS lines */
-@@ -191,31 +262,52 @@
- while(1);
-
- local_irq_enable(); /* we won't ever call it */
-+}
-
-
--}
-+/*
-+ * gpio_keys
-+*/
-+
-+static struct gpio_keys_button simpad_button_table[] = {
-+ { KEY_POWER, IRQ_GPIO_POWER_BUTTON, 1, "power button" },
-+};
-+
-+static struct gpio_keys_platform_data simpad_keys_data = {
-+ .buttons = simpad_button_table,
-+ .nbuttons = ARRAY_SIZE(simpad_button_table),
-+};
-+
-+static struct platform_device simpad_keys = {
-+ .name = "gpio-keys",
-+ .dev = {
-+ .platform_data = &simpad_keys_data,
-+ },
-+};
-
-
- /*
- * MediaQ Video Device
- */
-+
- static struct platform_device simpad_mq200fb = {
- .name = "simpad-mq200",
- .id = 0,
- };
-
-+
- static struct platform_device *devices[] __initdata = {
-- &simpad_mq200fb
-+ &simpad_keys,
-+ &simpad_mq200fb,
- };
-
-
--
- static int __init simpad_init(void)
- {
- int ret;
-
- pm_power_off = simpad_power_off;
--
-+
- ret = platform_add_devices(devices, ARRAY_SIZE(devices));
- if(ret)
- printk(KERN_WARNING "simpad: Unable to register mq200 framebuffer device");
-diff -Nur linux-2.6.24.vanilla/include/asm-arm/arch-sa1100/simpad.h linux-2.6.24/include/asm-arm/arch-sa1100/simpad.h
---- linux-2.6.24.vanilla/include/asm-arm/arch-sa1100/simpad.h 2008-01-24 23:58:37.000000000 +0100
-+++ linux-2.6.24/include/asm-arm/arch-sa1100/simpad.h 2008-02-20 21:10:00.000000000 +0100
-@@ -12,11 +12,12 @@
- #define __ASM_ARCH_SIMPAD_H
-
-
--#define GPIO_UART1_RTS GPIO_GPIO14
-+#define GPIO_UART1_RTS GPIO_GPIO9
- #define GPIO_UART1_DTR GPIO_GPIO7
- #define GPIO_UART1_CTS GPIO_GPIO8
- #define GPIO_UART1_DCD GPIO_GPIO23
- #define GPIO_UART1_DSR GPIO_GPIO6
-+#define GPIO_UART1_RI GPIO_GPIO19
-
- #define GPIO_UART3_RTS GPIO_GPIO12
- #define GPIO_UART3_DTR GPIO_GPIO16
-@@ -48,9 +49,9 @@
- #define GPIO_SMART_CARD GPIO_GPIO10
- #define IRQ_GPIO_SMARD_CARD IRQ_GPIO10
-
--// CS3 Latch is write only, a shadow is necessary
-+// CS3 Latch is write only 16-bit , a shadow is necessary
-
--#define CS3BUSTYPE unsigned volatile long
-+#define CS3BUSTYPE unsigned volatile long
- #define CS3_BASE 0xf1000000
-
- #define VCC_5V_EN 0x0001 // For 5V PCMCIA
-@@ -70,43 +71,17 @@
- #define ENABLE_5V 0x4000 // Enable 5V circuit
- #define RESET_SIMCARD 0x8000
-
--#define RS232_ENABLE 0x0440
--#define PCMCIAMASK 0x402f
-+// CS3 Latch is readable only 8-bit interest
-
-+#define PCMCIA_BVD1 0x0001
-+#define PCMCIA_BVD2 0x0002
-+#define PCMCIA_VS1 0x0004 // PCMCIA card voltage select
-+#define PCMCIA_VS2 0x0008 // PCMCIA card voltage select, if both are in high state -> 5V PCMCIA card
-+#define LOCK_IND 0x0010
-+#define CHARGING_STATE 0x0020 // Ladestatus
-+#define PCMCIA_SHORT 0x0040 // low active
-
--struct simpad_battery {
-- unsigned char ac_status; /* line connected yes/no */
-- unsigned char status; /* battery loading yes/no */
-- unsigned char percentage; /* percentage loaded */
-- unsigned short life; /* life till empty */
--};
--
--/* These should match the apm_bios.h definitions */
--#define SIMPAD_AC_STATUS_AC_OFFLINE 0x00
--#define SIMPAD_AC_STATUS_AC_ONLINE 0x01
--#define SIMPAD_AC_STATUS_AC_BACKUP 0x02 /* What does this mean? */
--#define SIMPAD_AC_STATUS_AC_UNKNOWN 0xff
--
--/* These bitfields are rarely "or'd" together */
--#define SIMPAD_BATT_STATUS_HIGH 0x01
--#define SIMPAD_BATT_STATUS_LOW 0x02
--#define SIMPAD_BATT_STATUS_CRITICAL 0x04
--#define SIMPAD_BATT_STATUS_CHARGING 0x08
--#define SIMPAD_BATT_STATUS_CHARGE_MAIN 0x10
--#define SIMPAD_BATT_STATUS_DEAD 0x20 /* Battery will not charge */
--#define SIMPAD_BATT_NOT_INSTALLED 0x20 /* For expansion pack batteries */
--#define SIMPAD_BATT_STATUS_FULL 0x40 /* Battery fully charged (and connected to AC) */
--#define SIMPAD_BATT_STATUS_NOBATT 0x80
--#define SIMPAD_BATT_STATUS_UNKNOWN 0xff
--
--extern int simpad_get_battery(struct simpad_battery* );
-+#define RS232_ENABLE 0x0440
-+#define PCMCIAMASK 0x402f
-
- #endif // __ASM_ARCH_SIMPAD_H
--
--
--
--
--
--
--
--
+++ /dev/null
-diff -Nur linux-2.6.24.vanilla/drivers/mfd/Kconfig linux-2.6.24/drivers/mfd/Kconfig
---- linux-2.6.24.vanilla/drivers/mfd/Kconfig 2008-01-24 23:58:37.000000000 +0100
-+++ linux-2.6.24/drivers/mfd/Kconfig 2008-02-20 21:17:07.000000000 +0100
-@@ -38,4 +38,7 @@
- tristate "Touchscreen interface support"
- depends on MCP_UCB1200 && INPUT
-
-+config MCP_UCB1200_SWITCHES
-+ tristate "SIMpad Switches support"
-+ depends on MCP_UCB1200 && INPUT
- endmenu
-diff -Nur linux-2.6.24.vanilla/drivers/mfd/Makefile linux-2.6.24/drivers/mfd/Makefile
---- linux-2.6.24.vanilla/drivers/mfd/Makefile 2008-01-24 23:58:37.000000000 +0100
-+++ linux-2.6.24/drivers/mfd/Makefile 2008-02-20 21:17:07.000000000 +0100
-@@ -8,7 +8,7 @@
- obj-$(CONFIG_MCP_SA11X0) += mcp-sa11x0.o
- obj-$(CONFIG_MCP_UCB1200) += ucb1x00-core.o
- obj-$(CONFIG_MCP_UCB1200_TS) += ucb1x00-ts.o
--
-+obj-$(CONFIG_MCP_UCB1200_SWITCHES) += ucb1x00-switches.o
- ifeq ($(CONFIG_SA1100_ASSABET),y)
- obj-$(CONFIG_MCP_UCB1200) += ucb1x00-assabet.o
- endif
-diff -Nur linux-2.6.24.vanilla/drivers/mfd/ucb1x00-switches.c linux-2.6.24/drivers/mfd/ucb1x00-switches.c
---- linux-2.6.24.vanilla/drivers/mfd/ucb1x00-switches.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.24/drivers/mfd/ucb1x00-switches.c 2008-02-20 21:17:07.000000000 +0100
-@@ -0,0 +1,332 @@
-+/*
-+ * linux/drivers/mfd/ucb1x00-switches.c
-+ *
-+ * Copyright (C) 2007 Bernhard Guillon.
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License.
-+ *
-+ * This driver is for the Switches of Siemens SIMpad (CL4,SL4,SLC), T-Sinus-Pad and
-+ * Swisscom WP50 devices.
-+ *
-+ * Six switches are routed to GPIO pins on the UCB1300: S3 -- S8.
-+ *
-+ * This driver is based on the 2.4 ucb1x00-switches, the 2.6 ucb1x00-assabet
-+ * and the ucb1x00-ts driver.
-+ *
-+ * 2007/06/21 mrdata:
-+ * - create new thread kswd() to handle irq_events for ucb1300-gpio's
-+ * - found out, that not every key-press or key-release
-+ * generate a irq_event
-+ * -> establish key_state handling
-+ * key_state, key_state_last <-> KEY_PRESS, KEY_RELEASE
-+ * -> after irq_event polling the ucb1300-gpio's till all keys
-+ * in key_state = KEY_RELEASE
-+ *
-+ */
-+#include <linux/module.h>
-+#include <linux/init.h>
-+#include <linux/input.h>
-+#include <linux/device.h>
-+#include <linux/sched.h>
-+#include <linux/freezer.h>
-+#include <linux/kthread.h>
-+
-+#include <asm/dma.h>
-+
-+#include "ucb1x00.h"
-+
-+#define KEY_PRESS 1
-+#define KEY_RELEASE 0
-+
-+static int key [6] = { KEY_PROG1,KEY_PROG2,KEY_UP,KEY_DOWN,KEY_LEFT,KEY_RIGHT };
-+
-+static unsigned short int key_state [6] = { 0, 0, 0, 0, 0, 0};
-+static unsigned short int key_state_last [6] = { 1, 1, 1, 1, 1, 1};
-+
-+struct ucb1x00_switches {
-+ struct input_dev *idev;
-+ struct ucb1x00 *ucb;
-+
-+ wait_queue_head_t irq_wait;
-+ struct task_struct *rtask;
-+
-+ int idx;
-+
-+ unsigned int valid:1;
-+};
-+
-+static int ucb1x00_thread(void *_switches_id)
-+{
-+ unsigned short int this;
-+ int idx_tmp;
-+ int i;
-+ struct ucb1x00_switches *switches = _switches_id;
-+ struct input_dev *idev = switches->idev;
-+ struct task_struct *tsk = current;
-+ DECLARE_WAITQUEUE(wait, tsk);
-+
-+ add_wait_queue(&switches->irq_wait, &wait);
-+
-+ while (!kthread_should_stop())
-+ {
-+ signed long timeout;
-+
-+ if ((switches->idx >= 0) && (switches->idx <= 5) && (switches->valid == 1))
-+ {
-+ switches->valid = 0;
-+
-+ idx_tmp = switches->idx;
-+
-+ ucb1x00_enable(switches->ucb);
-+
-+ this = ~ucb1x00_io_read(switches->ucb);
-+
-+ ucb1x00_disable(switches->ucb);
-+
-+ if (key_state[idx_tmp] == KEY_RELEASE)
-+ {
-+ key_state_last[idx_tmp] = KEY_RELEASE;
-+ key_state[idx_tmp] = KEY_PRESS;
-+
-+ input_report_key(idev, key[idx_tmp], KEY_PRESS);
-+ input_sync(idev);
-+ }
-+
-+ for (i = 0; i < 6; i++)
-+ {
-+ if ((key_state[i] == KEY_RELEASE) && (((this & (1 << i)) ? 1 : 0) == KEY_PRESS))
-+ {
-+ key_state_last[i] = KEY_RELEASE;
-+ key_state[i] = KEY_PRESS;
-+
-+ input_report_key(idev, key[i], KEY_PRESS);
-+ input_sync(idev);
-+ }
-+ }
-+
-+ for(;;)
-+ {
-+ ucb1x00_enable(switches->ucb);
-+ this = ~ucb1x00_io_read(switches->ucb);
-+ ucb1x00_disable(switches->ucb);
-+
-+ for (i = 0; i < 6; i++)
-+ {
-+ if ((key_state[i] == KEY_PRESS) && (((this & (1 << i)) ? 1 : 0) == KEY_RELEASE))
-+ {
-+ key_state_last[i] = KEY_PRESS;
-+ key_state[i] = KEY_RELEASE;
-+
-+ input_report_key(idev, key[i], KEY_RELEASE);
-+ input_sync(idev);
-+ }
-+
-+ if ((key_state[i] == KEY_RELEASE) && (((this & (1 << i)) ? 1 : 0) == KEY_PRESS))
-+ {
-+ key_state_last[i] = KEY_RELEASE;
-+ key_state[i] = KEY_PRESS;
-+
-+ input_report_key(idev, key[i], KEY_PRESS);
-+ input_sync(idev);
-+ }
-+
-+ }
-+
-+ // left loop, if no key press detect
-+ if ((this | 0xff80) == 0xff80)
-+ {
-+ break;
-+ }
-+
-+ set_task_state(tsk, TASK_INTERRUPTIBLE);
-+
-+ try_to_freeze();
-+
-+ timeout = HZ / 100;
-+
-+ schedule_timeout(timeout);
-+ }
-+ }
-+
-+ set_task_state(tsk, TASK_INTERRUPTIBLE);
-+
-+ try_to_freeze();
-+
-+ timeout = MAX_SCHEDULE_TIMEOUT;
-+
-+ schedule_timeout(timeout);
-+ }
-+
-+ remove_wait_queue(&switches->irq_wait, &wait);
-+
-+ switches->rtask = NULL;
-+
-+ return 0;
-+}
-+
-+
-+static void ucb1x00_dev_irq(int idx, void *id)
-+{
-+ struct ucb1x00_switches *switches = id;
-+
-+ switches->idx = idx;
-+ switches->valid = 1;
-+
-+ wake_up(&switches->irq_wait);
-+}
-+
-+static int ucb1x00_switches_add(struct ucb1x00_dev *dev)
-+{
-+ struct ucb1x00_switches *switches;
-+ struct input_dev *idev;
-+ int err,i;
-+
-+ switches = kzalloc(sizeof(struct ucb1x00_switches), GFP_KERNEL);
-+ idev = input_allocate_device();
-+
-+ if (!switches || !idev) {
-+ err = -ENOMEM;
-+ goto fail;
-+ }
-+
-+ switches->ucb = dev->ucb;
-+
-+ idev->private = switches;
-+ idev->name = "SIMpad Switches";
-+ idev->id.product = switches->ucb->id;
-+
-+ __set_bit(EV_KEY, idev->evbit);
-+ __set_bit(EV_REP, idev->evbit);
-+ __set_bit(KEY_PROG1, idev->keybit);
-+ __set_bit(KEY_PROG2, idev->keybit);
-+ __set_bit(KEY_UP, idev->keybit);
-+ __set_bit(KEY_DOWN, idev->keybit);
-+ __set_bit(KEY_LEFT, idev->keybit);
-+ __set_bit(KEY_RIGHT, idev->keybit);
-+
-+ err = input_register_device(idev);
-+ if (err)
-+ goto fail;
-+ switches->idev = idev;
-+ dev->priv = switches;
-+
-+ BUG_ON(switches->rtask);
-+
-+ init_waitqueue_head(&switches->irq_wait);
-+
-+ ucb1x00_enable(switches->ucb);
-+
-+ ucb1x00_io_set_dir(switches->ucb,
-+ UCB_IO_0 | UCB_IO_1 | UCB_IO_2 |
-+ UCB_IO_3 | UCB_IO_4 | UCB_IO_5,
-+ UCB_IO_8 | UCB_IO_9);
-+
-+ ucb1x00_disable(switches->ucb);
-+
-+ for (i = 0; i < 6; ++i) {
-+ ucb1x00_enable_irq(switches->ucb, i, UCB_RISING | UCB_FALLING);
-+
-+ if (ucb1x00_hook_irq(switches->ucb, i, ucb1x00_dev_irq, switches) < 0) {
-+ printk(KERN_ERR "unable to hook IRQ for "
-+ "UCB1300 SWITCH_%d\n", i);
-+ return -EBUSY;
-+ }
-+ }
-+
-+ switches->rtask = kthread_run(ucb1x00_thread, switches, "kswd");
-+ if (!IS_ERR(switches->rtask))
-+ {
-+ return 0;
-+ }
-+ else
-+ {
-+ input_unregister_device(switches->idev);
-+
-+ for (i = 5; i >= 0; --i) {
-+ ucb1x00_disable_irq(switches->ucb, i, UCB_RISING | UCB_FALLING);
-+
-+ /* Only error conditions are ENOENT and EINVAL; silently
-+ * ignore:
-+ */
-+ ucb1x00_free_irq(switches->ucb, i, NULL);
-+ }
-+ switches->rtask = NULL;
-+ ucb1x00_disable(switches->ucb);
-+ kfree(switches);
-+
-+ return -EFAULT;
-+ }
-+
-+fail:
-+ input_free_device(idev);
-+ kfree(switches);
-+ return err;
-+
-+}
-+
-+static void ucb1x00_switches_remove(struct ucb1x00_dev *dev)
-+{
-+ int i;
-+ struct ucb1x00_switches *switches = dev->priv;
-+
-+ if (switches->rtask)
-+ kthread_stop(switches->rtask);
-+
-+ switches->rtask = NULL;
-+
-+ input_unregister_device(switches->idev);
-+
-+ for (i = 5; i >= 0; --i) {
-+ ucb1x00_disable_irq(switches->ucb, i, UCB_RISING | UCB_FALLING);
-+
-+ /* Only error conditions are ENOENT and EINVAL; silently
-+ * ignore:
-+ */
-+ ucb1x00_free_irq(switches->ucb, i, NULL);
-+ }
-+ ucb1x00_disable(switches->ucb);
-+ kfree(switches);
-+}
-+
-+#ifdef CONFIG_PM
-+static int ucb1x00_switches_resume(struct ucb1x00_dev *dev)
-+{
-+ struct ucb1x00_switches *switches = dev->priv;
-+
-+ if (switches->rtask != NULL)
-+ {
-+ switches->valid = 0;
-+ wake_up(&switches->irq_wait);
-+
-+ printk(KERN_DEBUG "ucb1x00-switches.c -> _switches_resume() kswd - restart *DONE*\n");
-+ }
-+ return 0;
-+}
-+#else
-+#define ucb1x00_switches_resume NULL
-+#endif
-+
-+static struct ucb1x00_driver ucb1x00_switches_driver = {
-+ .add = ucb1x00_switches_add,
-+ .remove = ucb1x00_switches_remove,
-+ .resume = ucb1x00_switches_resume,
-+};
-+
-+static int __init ucb1x00_switches_init(void)
-+{
-+ return ucb1x00_register_driver(&ucb1x00_switches_driver);
-+}
-+
-+static void __exit ucb1x00_switches_exit(void)
-+{
-+ ucb1x00_unregister_driver(&ucb1x00_switches_driver);
-+}
-+
-+module_init(ucb1x00_switches_init);
-+module_exit(ucb1x00_switches_exit);
-+
-+MODULE_AUTHOR("Bernhard Guillon <Bernhard.Guillon@opensimpad.org>");
-+MODULE_DESCRIPTION("UCB1x00 Switches driver for Siemens SIMpad");
-+MODULE_LICENSE("GPL");
+++ /dev/null
-diff -Nur linux-2.6.24.vanilla/drivers/mfd/ucb1x00-ts.c linux-2.6.24/drivers/mfd/ucb1x00-ts.c
---- linux-2.6.24.vanilla/drivers/mfd/ucb1x00-ts.c 2008-01-24 23:58:37.000000000 +0100
-+++ linux-2.6.24/drivers/mfd/ucb1x00-ts.c 2008-02-20 21:21:51.000000000 +0100
-@@ -16,6 +16,10 @@
- * It is important to note that the signal connected to the ADCSYNC
- * pin should provide pulses even when the LCD is blanked, otherwise
- * a pen touch needed to unblank the LCD will never be read.
-+ *
-+ * mrdata: -added some accuracy improvement based on thesings collie patch
-+ * -added suspend fix
-+ *
- */
- #include <linux/module.h>
- #include <linux/moduleparam.h>
-@@ -104,6 +108,8 @@
- UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_GND |
- UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
-
-+ udelay(55);
-+
- return ucb1x00_adc_read(ts->ucb, UCB_ADC_INP_TSPY, ts->adcsync);
- }
- }
-@@ -130,7 +136,7 @@
- UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW |
- UCB_TS_CR_MODE_POS | UCB_TS_CR_BIAS_ENA);
-
-- udelay(55);
-+ udelay(165);
-
- return ucb1x00_adc_read(ts->ucb, UCB_ADC_INP_TSPY, ts->adcsync);
- }
-@@ -158,7 +164,7 @@
- UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW |
- UCB_TS_CR_MODE_POS | UCB_TS_CR_BIAS_ENA);
-
-- udelay(55);
-+ udelay(165);
-
- return ucb1x00_adc_read(ts->ucb, UCB_ADC_INP_TSPX, ts->adcsync);
- }
-@@ -216,13 +222,17 @@
- signed long timeout;
-
- ts->restart = 0;
--
-+
- ucb1x00_adc_enable(ts->ucb);
-
- x = ucb1x00_ts_read_xpos(ts);
-+ ucb1x00_adc_disable(ts->ucb);
-+ ucb1x00_adc_enable(ts->ucb);
- y = ucb1x00_ts_read_ypos(ts);
-+ ucb1x00_adc_disable(ts->ucb);
-+ ucb1x00_adc_enable(ts->ucb);
- p = ucb1x00_ts_read_pressure(ts);
--
-+
- /*
- * Switch back to interrupt mode.
- */
-@@ -231,15 +241,19 @@
-
- msleep(10);
-
-+ if ((x < 60) || (y < 60)) {
-+ p = 0;
-+ }
-+
- ucb1x00_enable(ts->ucb);
-
--
- if (ucb1x00_ts_pen_down(ts)) {
-+
- set_task_state(tsk, TASK_INTERRUPTIBLE);
-
- ucb1x00_enable_irq(ts->ucb, UCB_IRQ_TSPX, machine_is_collie() ? UCB_RISING : UCB_FALLING);
- ucb1x00_disable(ts->ucb);
--
-+
- /*
- * If we spat out a valid sample set last time,
- * spit out a "pen off" sample here.
-@@ -250,7 +264,9 @@
- }
-
- timeout = MAX_SCHEDULE_TIMEOUT;
-+
- } else {
-+
- ucb1x00_disable(ts->ucb);
-
- /*
-@@ -269,6 +285,14 @@
-
- try_to_freeze();
-
-+ /*
-+ * While suspend the ktsd-thread goes sleep -> try_to_freeze()
-+ * While resume the ktsd-thread do wakup and must rune one time
-+ * again to do a clean re-setup -> enable_irq: UCB_IRQ_TSPX
-+ */
-+ if(ts->restart)
-+ timeout = HZ / 100;
-+
- schedule_timeout(timeout);
- }
-
-@@ -351,8 +375,12 @@
- * TS interrupt mode is set up again
- * after sleep.
- */
-+
- ts->restart = 1;
- wake_up(&ts->irq_wait);
-+
-+ printk(KERN_INFO "ucb1x00-ts.c -> ucb1x00_ts_resume() ktsd - restart *DONE*\n");
-+
- }
- return 0;
- }
projects / vuplus_openembedded / commitdiff