dreambox: use backported DVB API from mercurial for kernel 2.6.18

diff --git a/conf/checksums.ini b/conf/checksums.ini
index 0f3c9c4..2dfab61 100644 (file)
--- a/conf/checksums.ini
+++ b/conf/checksums.ini
@@ -18522,6 +18522,10 @@ sha256=f5dba6366e87e91234d1b0069cfea655b0a4cb37ea97f899226f16998e6ab9f1
 md5=84fef49cc39ff2605204246666f65864
 sha256=a812816ee1742bf3bf8977a391b369a7351f54a1917dc90b27e666679dd1742a
 
+[http://sources.dreamboxupdate.com/download/kernel-patches/linux-dm500hd-2.6.18-05d2029d517f6a1e9e8d1dcacbbe0d41095bdbfb.patch.bz2]
+md5=db0ac9aa7f2957cb9bab79f42f838836
+sha256=34e8273d3bc9d53c5cfb6f9f7d6cfa370dff1905b4c82f8025d99d6cbeaeb633
+
 [http://sources.dreamboxupdate.com/download/kernel-patches/linux-dm500hd-2.6.18-791f9cc7d5e91e43ad6ea42c364d7e3e7f097cbe.patch.bz2]
 md5=3106cea3d7b12de08de13d92450469a1
 sha256=0664d7b8227484628dc9ce2012c873aa6fbc5675821943b07d911fa5e56a31d4
@@ -18538,6 +18542,10 @@ sha256=4aeb82c5ec8a3b4bead0275fbfaecfdbeda12b01cb6654eec1ce9791b5003807
 md5=70fee839e5067529f3430b9341cf1878
 sha256=66e4c54ef6dd390a82a9fd910e09440475c01152e51e9ced66d9df2322cb6d06
 
+[http://sources.dreamboxupdate.com/download/kernel-patches/linux-dm800-2.6.18-05d2029d517f6a1e9e8d1dcacbbe0d41095bdbfb.patch.bz2]
+md5=db0ac9aa7f2957cb9bab79f42f838836
+sha256=34e8273d3bc9d53c5cfb6f9f7d6cfa370dff1905b4c82f8025d99d6cbeaeb633
+
 [http://sources.dreamboxupdate.com/download/kernel-patches/linux-dm800-2.6.18-791f9cc7d5e91e43ad6ea42c364d7e3e7f097cbe.patch.bz2]
 md5=3106cea3d7b12de08de13d92450469a1
 sha256=0664d7b8227484628dc9ce2012c873aa6fbc5675821943b07d911fa5e56a31d4
@@ -18554,6 +18562,10 @@ sha256=4aeb82c5ec8a3b4bead0275fbfaecfdbeda12b01cb6654eec1ce9791b5003807
 md5=b96a5c472eeb6e6af467a690540c6d9f
 sha256=42ca87a04ad9664cd4774f4b9c483e6fd145893af783028ce07e00ce36a8b34a
 
+[http://sources.dreamboxupdate.com/download/kernel-patches/linux-dm8000-2.6.18-05d2029d517f6a1e9e8d1dcacbbe0d41095bdbfb.patch.bz2]
+md5=db0ac9aa7f2957cb9bab79f42f838836
+sha256=34e8273d3bc9d53c5cfb6f9f7d6cfa370dff1905b4c82f8025d99d6cbeaeb633
+
 [http://sources.dreamboxupdate.com/download/kernel-patches/linux-dm8000-2.6.18-791f9cc7d5e91e43ad6ea42c364d7e3e7f097cbe.patch.bz2]
 md5=3106cea3d7b12de08de13d92450469a1
 sha256=0664d7b8227484628dc9ce2012c873aa6fbc5675821943b07d911fa5e56a31d4
@@ -18570,6 +18582,10 @@ sha256=4aeb82c5ec8a3b4bead0275fbfaecfdbeda12b01cb6654eec1ce9791b5003807
 md5=0a3d170cbfd6f63d4b582774cbedefb1
 sha256=df0d3f72292c01a457b07ca4f1f3e891aceba802a2cdaef0e09d0fce91cb47d1
 
+[http://sources.dreamboxupdate.com/download/kernel-patches/linux-dm800se-2.6.18-05d2029d517f6a1e9e8d1dcacbbe0d41095bdbfb.patch.bz2]
+md5=db0ac9aa7f2957cb9bab79f42f838836
+sha256=34e8273d3bc9d53c5cfb6f9f7d6cfa370dff1905b4c82f8025d99d6cbeaeb633
+
 [http://sources.dreamboxupdate.com/download/kernel-patches/linux-dm800se-2.6.18-97b869e710d741d3eda4f7c915d6190b4054d290.patch.bz2]
 md5=a8716935614c6ed3d062f1a12b6c969b
 sha256=0152ebb1b9ceaefdd85c85fd468a2b6506b8b8df9e0bc66c308d3b0feaca4950

diff --git a/conf/machine/dm500hd.conf b/conf/machine/dm500hd.conf
index ef42fb4..5f3c1b2 100644 (file)
--- a/conf/machine/dm500hd.conf
+++ b/conf/machine/dm500hd.conf
@@ -18,6 +18,7 @@ MACHINE_ESSENTIAL_EXTRA_RDEPENDS_2.6.18 = "\
        kernel-module-nls-cp437 \
        kernel-module-nls-cp850 \
        kernel-module-nls-utf8 \
+       v4l-dvb-module-dvb-core \
 "
 
 MACHINE_ESSENTIAL_EXTRA_RRECOMMENDS_2.6.18 = "\
@@ -36,7 +37,6 @@ MACHINE_ESSENTIAL_EXTRA_RDEPENDS_2.6.3x = "\
        kernel-module-snd-pcm \
        kernel-module-snd \
        kernel-module-sr-mod \
-       kernel-module-stv0299 \
        kernel-module-usbhid \
 "
 

diff --git a/conf/machine/dm800.conf b/conf/machine/dm800.conf
index eb6a885..0d077e5 100644 (file)
--- a/conf/machine/dm800.conf
+++ b/conf/machine/dm800.conf
@@ -18,6 +18,8 @@ MACHINE_ESSENTIAL_EXTRA_RDEPENDS_2.6.18 = "\
        kernel-module-nls-cp437 \
        kernel-module-nls-cp850 \
        kernel-module-nls-utf8 \
+       v4l-dvb-module-dvb-core \
+       v4l-dvb-module-stv0299 \
 "
 
 MACHINE_ESSENTIAL_EXTRA_RRECOMMENDS_2.6.18 = "\

diff --git a/conf/machine/dm8000.conf b/conf/machine/dm8000.conf
index f659a18..cae2321 100644 (file)
--- a/conf/machine/dm8000.conf
+++ b/conf/machine/dm8000.conf
@@ -16,8 +16,6 @@ COMBINED_FEATURES_append = "${@base_contains('PREFERRED_VERSION_linux-dm8000', '
 #take care when you do changes on MACHINE_ESSENTIAL_EXTRA_RDEPENDS/RRECOMMENDS you have to increment the recipes/tasks/task-boot.bb PR
 
 MACHINE_ESSENTIAL_EXTRA_RDEPENDS_2.6.18 = "\
-       kernel-module-dvb-core \
-       kernel-module-stv0299 \
        kernel-module-fb \
        kernel-module-snd-pcm \
        kernel-module-snd \
@@ -26,6 +24,8 @@ MACHINE_ESSENTIAL_EXTRA_RDEPENDS_2.6.18 = "\
        kernel-module-nls-cp437 \
        kernel-module-nls-cp850 \
        kernel-module-nls-utf8 \
+       v4l-dvb-module-dvb-core \
+       v4l-dvb-module-stv0299 \
 "
 
 MACHINE_ESSENTIAL_EXTRA_RRECOMMENDS_2.6.18 = "\

diff --git a/conf/machine/dm800se.conf b/conf/machine/dm800se.conf
index 5ba784e..ec0c341 100644 (file)
--- a/conf/machine/dm800se.conf
+++ b/conf/machine/dm800se.conf
@@ -18,6 +18,8 @@ MACHINE_ESSENTIAL_EXTRA_RDEPENDS_2.6.18 = "\
        kernel-module-nls-cp437 \
        kernel-module-nls-cp850 \
        kernel-module-nls-utf8 \
+       v4l-dvb-module-dvb-core \
+       v4l-dvb-module-stv0299 \
 "
 
 MACHINE_ESSENTIAL_EXTRA_RRECOMMENDS_2.6.18 = "\

diff --git a/recipes/linux-libc-headers/linux-libc-headers-2.6.18/dvb-api-2.6.18-5.3.patch b/recipes/linux-libc-headers/linux-libc-headers-2.6.18/dvb-api-2.6.18-5.3.patch
new file mode 100644 (file)
index 0000000..90a33c9
--- /dev/null
+++ b/recipes/linux-libc-headers/linux-libc-headers-2.6.18/dvb-api-2.6.18-5.3.patch
@@ -0,0 +1,499 @@
+diff -Naur linux-2.6.18/include/linux/dvb.orig/audio.h linux-2.6.18/include/linux/dvb/audio.h
+--- linux-2.6.18/include/linux/dvb.orig/audio.h        2010-09-09 17:37:09.000000000 +0000
++++ linux-2.6.18/include/linux/dvb/audio.h     2010-09-09 17:40:56.000000000 +0000
+@@ -24,12 +24,7 @@
+ #ifndef _DVBAUDIO_H_
+ #define _DVBAUDIO_H_
+ 
+-#ifdef __KERNEL__
+-#include <linux/types.h>
+-#else
+-#include <stdint.h>
+-#endif
+-
++#include <asm/types.h>
+ 
+ typedef enum {
+       AUDIO_SOURCE_DEMUX, /* Select the demux as the main source */
+@@ -47,7 +42,9 @@
+ typedef enum {
+       AUDIO_STEREO,
+       AUDIO_MONO_LEFT,
+-      AUDIO_MONO_RIGHT
++      AUDIO_MONO_RIGHT,
++      AUDIO_MONO,
++      AUDIO_STEREO_SWAPPED
+ } audio_channel_select_t;
+ 
+ 
+@@ -79,7 +76,7 @@
+ } audio_karaoke_t;     /* into left and right  */
+ 
+ 
+-typedef uint16_t audio_attributes_t;
++typedef __u16 audio_attributes_t;
+ /*   bits: descr. */
+ /*   15-13 audio coding mode (0=ac3, 2=mpeg1, 3=mpeg2ext, 4=LPCM, 6=DTS, */
+ /*   12    multichannel extension */
+@@ -133,5 +130,6 @@
+  * extracted by the PES parser.
+  */
+ #define AUDIO_GET_PTS              _IOR('o', 19, __u64)
++#define AUDIO_BILINGUAL_CHANNEL_SELECT _IO('o', 20)
+ 
+ #endif /* _DVBAUDIO_H_ */
+diff -Naur linux-2.6.18/include/linux/dvb.orig/dmx.h linux-2.6.18/include/linux/dvb/dmx.h
+--- linux-2.6.18/include/linux/dvb.orig/dmx.h  2006-09-20 03:42:06.000000000 +0000
++++ linux-2.6.18/include/linux/dvb/dmx.h       2010-09-09 17:41:08.000000000 +0000
+@@ -39,9 +39,10 @@
+       DMX_OUT_DECODER, /* Streaming directly to decoder. */
+       DMX_OUT_TAP,     /* Output going to a memory buffer */
+                        /* (to be retrieved via the read command).*/
+-      DMX_OUT_TS_TAP   /* Output multiplexed into a new TS  */
++      DMX_OUT_TS_TAP,  /* Output multiplexed into a new TS  */
+                        /* (to be retrieved by reading from the */
+                        /* logical DVR device).                 */
++      DMX_OUT_TSDEMUX_TAP /* Like TS_TAP but retrieved from the DMX device */
+ } dmx_output_t;
+ 
+ 
+@@ -150,5 +151,7 @@
+ #define DMX_GET_CAPS             _IOR('o', 48, dmx_caps_t)
+ #define DMX_SET_SOURCE           _IOW('o', 49, dmx_source_t)
+ #define DMX_GET_STC              _IOWR('o', 50, struct dmx_stc)
++#define DMX_ADD_PID              _IOW('o', 51, __u16)
++#define DMX_REMOVE_PID           _IOW('o', 52, __u16)
+ 
+ #endif /*_DVBDMX_H_*/
+diff -Naur linux-2.6.18/include/linux/dvb.orig/frontend.h linux-2.6.18/include/linux/dvb/frontend.h
+--- linux-2.6.18/include/linux/dvb.orig/frontend.h     2006-09-20 03:42:06.000000000 +0000
++++ linux-2.6.18/include/linux/dvb/frontend.h  2010-09-09 17:41:14.000000000 +0000
+@@ -28,7 +28,6 @@
+ 
+ #include <asm/types.h>
+ 
+-
+ typedef enum fe_type {
+       FE_QPSK,
+       FE_QAM,
+@@ -62,9 +61,12 @@
+       FE_CAN_HIERARCHY_AUTO           = 0x100000,
+       FE_CAN_8VSB                     = 0x200000,
+       FE_CAN_16VSB                    = 0x400000,
+-      FE_NEEDS_BENDING                = 0x20000000, // not supported anymore, don't use (frontend requires frequency bending)
+-      FE_CAN_RECOVER                  = 0x40000000, // frontend can recover from a cable unplug automatically
+-      FE_CAN_MUTE_TS                  = 0x80000000  // frontend can stop spurious TS data output
++      FE_HAS_EXTENDED_CAPS            = 0x800000,   /* We need more bitspace for newer APIs, indicate this. */
++      FE_CAN_TURBO_FEC                = 0x8000000,  /* frontend supports "turbo fec modulation" */
++      FE_CAN_2G_MODULATION            = 0x10000000, /* frontend supports "2nd generation modulation" (DVB-S2) */
++      FE_NEEDS_BENDING                = 0x20000000, /* not supported anymore, don't use (frontend requires frequency bending) */
++      FE_CAN_RECOVER                  = 0x40000000, /* frontend can recover from a cable unplug automatically */
++      FE_CAN_MUTE_TS                  = 0x80000000  /* frontend can stop spurious TS data output */
+ } fe_caps_t;
+ 
+ 
+@@ -120,15 +122,15 @@
+ 
+ 
+ typedef enum fe_status {
+-      FE_HAS_SIGNAL   = 0x01,   /*  found something above the noise level */
+-      FE_HAS_CARRIER  = 0x02,   /*  found a DVB signal  */
+-      FE_HAS_VITERBI  = 0x04,   /*  FEC is stable  */
+-      FE_HAS_SYNC     = 0x08,   /*  found sync bytes  */
+-      FE_HAS_LOCK     = 0x10,   /*  everything's working... */
+-      FE_TIMEDOUT     = 0x20,   /*  no lock within the last ~2 seconds */
+-      FE_REINIT       = 0x40    /*  frontend was reinitialized,  */
+-} fe_status_t;                          /*  application is recommended to reset */
+-                                /*  DiSEqC, tone and parameters */
++      FE_HAS_SIGNAL   = 0x01,   /* found something above the noise level */
++      FE_HAS_CARRIER  = 0x02,   /* found a DVB signal  */
++      FE_HAS_VITERBI  = 0x04,   /* FEC is stable  */
++      FE_HAS_SYNC     = 0x08,   /* found sync bytes  */
++      FE_HAS_LOCK     = 0x10,   /* everything's working... */
++      FE_TIMEDOUT     = 0x20,   /* no lock within the last ~2 seconds */
++      FE_REINIT       = 0x40    /* frontend was reinitialized,  */
++} fe_status_t;                          /* application is recommended to reset */
++                                /* DiSEqC, tone and parameters */
+ 
+ typedef enum fe_spectral_inversion {
+       INVERSION_OFF,
+@@ -147,7 +149,9 @@
+       FEC_6_7,
+       FEC_7_8,
+       FEC_8_9,
+-      FEC_AUTO
++      FEC_AUTO,
++      FEC_3_5,
++      FEC_9_10,
+ } fe_code_rate_t;
+ 
+ 
+@@ -160,20 +164,31 @@
+       QAM_256,
+       QAM_AUTO,
+       VSB_8,
+-      VSB_16
++      VSB_16,
++      PSK_8,
++      APSK_16,
++      APSK_32,
++      DQPSK,
+ } fe_modulation_t;
+ 
+ typedef enum fe_transmit_mode {
+       TRANSMISSION_MODE_2K,
+       TRANSMISSION_MODE_8K,
+-      TRANSMISSION_MODE_AUTO
++      TRANSMISSION_MODE_AUTO,
++      TRANSMISSION_MODE_4K,
++      TRANSMISSION_MODE_1K,
++      TRANSMISSION_MODE_16K,
++      TRANSMISSION_MODE_32K,
+ } fe_transmit_mode_t;
+ 
+ typedef enum fe_bandwidth {
+       BANDWIDTH_8_MHZ,
+       BANDWIDTH_7_MHZ,
+       BANDWIDTH_6_MHZ,
+-      BANDWIDTH_AUTO
++      BANDWIDTH_AUTO,
++      BANDWIDTH_5_MHZ,
++      BANDWIDTH_10_MHZ,
++      BANDWIDTH_1_712_MHZ,
+ } fe_bandwidth_t;
+ 
+ 
+@@ -182,7 +197,10 @@
+       GUARD_INTERVAL_1_16,
+       GUARD_INTERVAL_1_8,
+       GUARD_INTERVAL_1_4,
+-      GUARD_INTERVAL_AUTO
++      GUARD_INTERVAL_AUTO,
++      GUARD_INTERVAL_1_128,
++      GUARD_INTERVAL_19_128,
++      GUARD_INTERVAL_19_256,
+ } fe_guard_interval_t;
+ 
+ 
+@@ -239,6 +257,137 @@
+       struct dvb_frontend_parameters parameters;
+ };
+ 
++/* S2API Commands */
++#define DTV_UNDEFINED         0
++#define DTV_TUNE              1
++#define DTV_CLEAR             2
++#define DTV_FREQUENCY         3
++#define DTV_MODULATION                4
++#define DTV_BANDWIDTH_HZ      5
++#define DTV_INVERSION         6
++#define DTV_DISEQC_MASTER     7
++#define DTV_SYMBOL_RATE               8
++#define DTV_INNER_FEC         9
++#define DTV_VOLTAGE           10
++#define DTV_TONE              11
++#define DTV_PILOT             12
++#define DTV_ROLLOFF           13
++#define DTV_DISEQC_SLAVE_REPLY        14
++
++/* Basic enumeration set for querying unlimited capabilities */
++#define DTV_FE_CAPABILITY_COUNT       15
++#define DTV_FE_CAPABILITY     16
++#define DTV_DELIVERY_SYSTEM   17
++
++/* ISDB-T and ISDB-Tsb */
++#define DTV_ISDBT_PARTIAL_RECEPTION   18
++#define DTV_ISDBT_SOUND_BROADCASTING  19
++
++#define DTV_ISDBT_SB_SUBCHANNEL_ID    20
++#define DTV_ISDBT_SB_SEGMENT_IDX      21
++#define DTV_ISDBT_SB_SEGMENT_COUNT    22
++
++#define DTV_ISDBT_LAYERA_FEC                  23
++#define DTV_ISDBT_LAYERA_MODULATION           24
++#define DTV_ISDBT_LAYERA_SEGMENT_COUNT                25
++#define DTV_ISDBT_LAYERA_TIME_INTERLEAVING    26
++
++#define DTV_ISDBT_LAYERB_FEC                  27
++#define DTV_ISDBT_LAYERB_MODULATION           28
++#define DTV_ISDBT_LAYERB_SEGMENT_COUNT                29
++#define DTV_ISDBT_LAYERB_TIME_INTERLEAVING    30
++
++#define DTV_ISDBT_LAYERC_FEC                  31
++#define DTV_ISDBT_LAYERC_MODULATION           32
++#define DTV_ISDBT_LAYERC_SEGMENT_COUNT                33
++#define DTV_ISDBT_LAYERC_TIME_INTERLEAVING    34
++
++#define DTV_API_VERSION               35
++
++#define DTV_CODE_RATE_HP      36
++#define DTV_CODE_RATE_LP      37
++#define DTV_GUARD_INTERVAL    38
++#define DTV_TRANSMISSION_MODE 39
++#define DTV_HIERARCHY         40
++
++#define DTV_ISDBT_LAYER_ENABLED       41
++
++#define DTV_ISDBS_TS_ID               42
++
++#define DTV_DVBT2_PLP_ID      43
++
++#define DTV_MAX_COMMAND                               DTV_DVBT2_PLP_ID
++
++typedef enum fe_pilot {
++      PILOT_ON,
++      PILOT_OFF,
++      PILOT_AUTO,
++} fe_pilot_t;
++
++typedef enum fe_rolloff {
++      ROLLOFF_35, /* Implied value in DVB-S, default for DVB-S2 */
++      ROLLOFF_20,
++      ROLLOFF_25,
++      ROLLOFF_AUTO,
++} fe_rolloff_t;
++
++typedef enum fe_delivery_system {
++      SYS_UNDEFINED,
++      SYS_DVBC_ANNEX_AC,
++      SYS_DVBC_ANNEX_B,
++      SYS_DVBT,
++      SYS_DSS,
++      SYS_DVBS,
++      SYS_DVBS2,
++      SYS_DVBH,
++      SYS_ISDBT,
++      SYS_ISDBS,
++      SYS_ISDBC,
++      SYS_ATSC,
++      SYS_ATSCMH,
++      SYS_DMBTH,
++      SYS_CMMB,
++      SYS_DAB,
++      SYS_DVBT2,
++} fe_delivery_system_t;
++
++struct dtv_cmds_h {
++      char    *name;          /* A display name for debugging purposes */
++
++      __u32   cmd;            /* A unique ID */
++
++      /* Flags */
++      __u32   set:1;          /* Either a set or get property */
++      __u32   buffer:1;       /* Does this property use the buffer? */
++      __u32   reserved:30;    /* Align */
++};
++
++struct dtv_property {
++      __u32 cmd;
++      __u32 reserved[3];
++      union {
++              __u32 data;
++              struct {
++                      __u8 data[32];
++                      __u32 len;
++                      __u32 reserved1[3];
++                      void *reserved2;
++              } buffer;
++      } u;
++      int result;
++} __attribute__ ((packed));
++
++/* num of properties cannot exceed DTV_IOCTL_MAX_MSGS per ioctl */
++#define DTV_IOCTL_MAX_MSGS 64
++
++struct dtv_properties {
++      __u32 num;
++      struct dtv_property *props;
++};
++
++#define FE_SET_PROPERTY                  _IOW('o', 82, struct dtv_properties)
++#define FE_GET_PROPERTY                  _IOR('o', 83, struct dtv_properties)
++
+ 
+ /**
+  * When set, this flag will disable any zigzagging or other "normal" tuning
+diff -Naur linux-2.6.18/include/linux/dvb.orig/net.h linux-2.6.18/include/linux/dvb/net.h
+--- linux-2.6.18/include/linux/dvb.orig/net.h  2006-09-20 03:42:06.000000000 +0000
++++ linux-2.6.18/include/linux/dvb/net.h       2010-09-09 17:41:19.000000000 +0000
+@@ -26,7 +26,6 @@
+ 
+ #include <asm/types.h>
+ 
+-
+ struct dvb_net_if {
+       __u16 pid;
+       __u16 if_num;
+diff -Naur linux-2.6.18/include/linux/dvb.orig/version.h linux-2.6.18/include/linux/dvb/version.h
+--- linux-2.6.18/include/linux/dvb.orig/version.h      2006-09-20 03:42:06.000000000 +0000
++++ linux-2.6.18/include/linux/dvb/version.h   2010-09-09 17:37:58.000000000 +0000
+@@ -23,7 +23,7 @@
+ #ifndef _DVBVERSION_H_
+ #define _DVBVERSION_H_
+ 
+-#define DVB_API_VERSION 3
+-#define DVB_API_VERSION_MINOR 1
++#define DVB_API_VERSION 5
++#define DVB_API_VERSION_MINOR 3
+ 
+ #endif /*_DVBVERSION_H_*/
+diff -Naur linux-2.6.18/include/linux/dvb.orig/video.h linux-2.6.18/include/linux/dvb/video.h
+--- linux-2.6.18/include/linux/dvb.orig/video.h        2010-09-09 17:37:09.000000000 +0000
++++ linux-2.6.18/include/linux/dvb/video.h     2010-09-09 17:41:25.000000000 +0000
+@@ -24,16 +24,14 @@
+ #ifndef _DVBVIDEO_H_
+ #define _DVBVIDEO_H_
+ 
+-#include <linux/compiler.h>
+-
++#include <asm/types.h>
+ #ifdef __KERNEL__
+-#include <linux/types.h>
++#include <linux/compiler.h>
+ #else
+ #include <stdint.h>
+ #include <time.h>
+ #endif
+ 
+-
+ typedef enum {
+       VIDEO_FORMAT_4_3,     /* Select 4:3 format */
+       VIDEO_FORMAT_16_9,    /* Select 16:9 format. */
+@@ -80,14 +78,70 @@
+ } video_play_state_t;
+ 
+ 
++/* Decoder commands */
++#define VIDEO_CMD_PLAY        (0)
++#define VIDEO_CMD_STOP        (1)
++#define VIDEO_CMD_FREEZE      (2)
++#define VIDEO_CMD_CONTINUE    (3)
++
++/* Flags for VIDEO_CMD_FREEZE */
++#define VIDEO_CMD_FREEZE_TO_BLACK             (1 << 0)
++
++/* Flags for VIDEO_CMD_STOP */
++#define VIDEO_CMD_STOP_TO_BLACK       (1 << 0)
++#define VIDEO_CMD_STOP_IMMEDIATELY            (1 << 1)
++
++/* Play input formats: */
++/* The decoder has no special format requirements */
++#define VIDEO_PLAY_FMT_NONE         (0)
++/* The decoder requires full GOPs */
++#define VIDEO_PLAY_FMT_GOP          (1)
++
++/* The structure must be zeroed before use by the application
++   This ensures it can be extended safely in the future. */
++struct video_command {
++      __u32 cmd;
++      __u32 flags;
++      union {
++              struct {
++                      __u64 pts;
++              } stop;
++
++              struct {
++                      /* 0 or 1000 specifies normal speed,
++                         1 specifies forward single stepping,
++                         -1 specifies backward single stepping,
++                         >1: playback at speed/1000 of the normal speed,
++                         <-1: reverse playback at (-speed/1000) of the normal speed. */
++                      __s32 speed;
++                      __u32 format;
++              } play;
++
++              struct {
++                      __u32 data[16];
++              } raw;
++      };
++};
++
++/* FIELD_UNKNOWN can be used if the hardware does not know whether
++   the Vsync is for an odd, even or progressive (i.e. non-interlaced)
++   field. */
++#define VIDEO_VSYNC_FIELD_UNKNOWN     (0)
++#define VIDEO_VSYNC_FIELD_ODD                 (1)
++#define VIDEO_VSYNC_FIELD_EVEN                (2)
++#define VIDEO_VSYNC_FIELD_PROGRESSIVE (3)
++
+ struct video_event {
+-      int32_t type;
++      __s32 type;
+ #define VIDEO_EVENT_SIZE_CHANGED      1
+ #define VIDEO_EVENT_FRAME_RATE_CHANGED        2
+-      time_t timestamp;
++#define VIDEO_EVENT_DECODER_STOPPED   3
++#define VIDEO_EVENT_VSYNC             4
++      __time_t timestamp;
+       union {
+               video_size_t size;
+               unsigned int frame_rate;        /* in frames per 1000sec */
++              unsigned char vsync_field;      /* unknown/odd/even/progressive */
+       } u;
+ };
+ 
+@@ -103,25 +157,25 @@
+ 
+ struct video_still_picture {
+       char __user *iFrame;        /* pointer to a single iframe in memory */
+-      int32_t size;
++      __s32 size;
+ };
+ 
+ 
+ typedef
+ struct video_highlight {
+       int     active;      /*    1=show highlight, 0=hide highlight */
+-      uint8_t contrast1;   /*    7- 4  Pattern pixel contrast */
++      __u8    contrast1;   /*    7- 4  Pattern pixel contrast */
+                            /*    3- 0  Background pixel contrast */
+-      uint8_t contrast2;   /*    7- 4  Emphasis pixel-2 contrast */
++      __u8    contrast2;   /*    7- 4  Emphasis pixel-2 contrast */
+                            /*    3- 0  Emphasis pixel-1 contrast */
+-      uint8_t color1;      /*    7- 4  Pattern pixel color */
++      __u8    color1;      /*    7- 4  Pattern pixel color */
+                            /*    3- 0  Background pixel color */
+-      uint8_t color2;      /*    7- 4  Emphasis pixel-2 color */
++      __u8    color2;      /*    7- 4  Emphasis pixel-2 color */
+                            /*    3- 0  Emphasis pixel-1 color */
+-      uint32_t ypos;       /*   23-22  auto action mode */
++      __u32    ypos;       /*   23-22  auto action mode */
+                            /*   21-12  start y */
+                            /*    9- 0  end y */
+-      uint32_t xpos;       /*   23-22  button color number */
++      __u32    xpos;       /*   23-22  button color number */
+                            /*   21-12  start x */
+                            /*    9- 0  end x */
+ } video_highlight_t;
+@@ -135,17 +189,17 @@
+ 
+ typedef struct video_spu_palette {      /* SPU Palette information */
+       int length;
+-      uint8_t __user *palette;
++      __u8 __user *palette;
+ } video_spu_palette_t;
+ 
+ 
+ typedef struct video_navi_pack {
+       int length;          /* 0 ... 1024 */
+-      uint8_t data[1024];
++      __u8 data[1024];
+ } video_navi_pack_t;
+ 
+ 
+-typedef uint16_t video_attributes_t;
++typedef __u16 video_attributes_t;
+ /*   bits: descr. */
+ /*   15-14 Video compression mode (0=MPEG-1, 1=MPEG-2) */
+ /*   13-12 TV system (0=525/60, 1=625/50) */
+@@ -213,4 +267,10 @@
+  */
+ #define VIDEO_GET_PTS              _IOR('o', 57, __u64)
+ 
++/* Read the number of displayed frames since the decoder was started */
++#define VIDEO_GET_FRAME_COUNT            _IOR('o', 58, __u64)
++
++#define VIDEO_COMMAND            _IOWR('o', 59, struct video_command)
++#define VIDEO_TRY_COMMAND        _IOWR('o', 60, struct video_command)
++
+ #endif /*_DVBVIDEO_H_*/

diff --git a/recipes/linux-libc-headers/linux-libc-headers_2.6.18.bb b/recipes/linux-libc-headers/linux-libc-headers_2.6.18.bb
index 4637739..c98de93 100644 (file)
--- a/recipes/linux-libc-headers/linux-libc-headers_2.6.18.bb
+++ b/recipes/linux-libc-headers/linux-libc-headers_2.6.18.bb
@@ -2,16 +2,16 @@ require linux-libc-headers.inc
 
 INHIBIT_DEFAULT_DEPS = "1"
 DEPENDS += "unifdef-native"
-PR = "r3"
+PR = "r4"
 
 SRC_URI = "${KERNELORG_MIRROR}/pub/linux/kernel/v2.6/linux-2.6.18.tar.bz2 \
-           file://arm-syscall-define.patch;patch=1 \
-           file://fix-dvb-headers.patch;patch=1"
+           file://arm-syscall-define.patch;patch=1"
 
 SRC_URI_append_mipsel = " file://mips-add-missing-headers.patch;patch=1 \
            file://mips-fix-ptrace-header.patch;patch=1"
 
-SRC_URI_append_opendreambox = " file://mips-brcm-add-missing-syscalls.patch;patch=1"
+SRC_URI_append_opendreambox = " file://mips-brcm-add-missing-syscalls.patch;patch=1 \
+           file://dvb-api-2.6.18-5.3.patch;patch=1"
 
 S = "${WORKDIR}/linux-2.6.18"
 

diff --git a/recipes/linux/files/opendreambox/dvb-api-2.6.18-5.3.patch b/recipes/linux/files/opendreambox/dvb-api-2.6.18-5.3.patch
new file mode 100644 (file)
index 0000000..89eb60d
--- /dev/null
+++ b/recipes/linux/files/opendreambox/dvb-api-2.6.18-5.3.patch
@@ -0,0 +1,499 @@
+diff -Naur linux-2.6.18/include/linux/dvb.orig/audio.h linux-2.6.18/include/linux/dvb/audio.h
+--- linux-2.6.18/include/linux/dvb.orig/audio.h        2010-09-09 17:37:09.000000000 +0000
++++ linux-2.6.18/include/linux/dvb/audio.h     2010-09-09 17:40:56.000000000 +0000
+@@ -24,12 +24,7 @@
+ #ifndef _DVBAUDIO_H_
+ #define _DVBAUDIO_H_
+ 
+-#ifdef __KERNEL__
+-#include <linux/types.h>
+-#else
+-#include <stdint.h>
+-#endif
+-
++#include <asm/types.h>
+ 
+ typedef enum {
+       AUDIO_SOURCE_DEMUX, /* Select the demux as the main source */
+@@ -47,7 +42,9 @@
+ typedef enum {
+       AUDIO_STEREO,
+       AUDIO_MONO_LEFT,
+-      AUDIO_MONO_RIGHT
++      AUDIO_MONO_RIGHT,
++      AUDIO_MONO,
++      AUDIO_STEREO_SWAPPED
+ } audio_channel_select_t;
+ 
+ 
+@@ -79,7 +76,7 @@
+ } audio_karaoke_t;     /* into left and right  */
+ 
+ 
+-typedef uint16_t audio_attributes_t;
++typedef __u16 audio_attributes_t;
+ /*   bits: descr. */
+ /*   15-13 audio coding mode (0=ac3, 2=mpeg1, 3=mpeg2ext, 4=LPCM, 6=DTS, */
+ /*   12    multichannel extension */
+@@ -133,5 +130,6 @@
+  * extracted by the PES parser.
+  */
+ #define AUDIO_GET_PTS              _IOR('o', 19, __u64)
++#define AUDIO_BILINGUAL_CHANNEL_SELECT _IO('o', 20)
+ 
+ #endif /* _DVBAUDIO_H_ */
+diff -Naur linux-2.6.18/include/linux/dvb.orig/dmx.h linux-2.6.18/include/linux/dvb/dmx.h
+--- linux-2.6.18/include/linux/dvb.orig/dmx.h  2006-09-20 03:42:06.000000000 +0000
++++ linux-2.6.18/include/linux/dvb/dmx.h       2010-09-09 17:41:08.000000000 +0000
+@@ -39,9 +39,10 @@
+       DMX_OUT_DECODER, /* Streaming directly to decoder. */
+       DMX_OUT_TAP,     /* Output going to a memory buffer */
+                        /* (to be retrieved via the read command).*/
+-      DMX_OUT_TS_TAP   /* Output multiplexed into a new TS  */
++      DMX_OUT_TS_TAP,  /* Output multiplexed into a new TS  */
+                        /* (to be retrieved by reading from the */
+                        /* logical DVR device).                 */
++      DMX_OUT_TSDEMUX_TAP /* Like TS_TAP but retrieved from the DMX device */
+ } dmx_output_t;
+ 
+ 
+@@ -150,5 +151,7 @@
+ #define DMX_GET_CAPS             _IOR('o', 48, dmx_caps_t)
+ #define DMX_SET_SOURCE           _IOW('o', 49, dmx_source_t)
+ #define DMX_GET_STC              _IOWR('o', 50, struct dmx_stc)
++#define DMX_ADD_PID              _IOW('o', 51, __u16)
++#define DMX_REMOVE_PID           _IOW('o', 52, __u16)
+ 
+ #endif /*_DVBDMX_H_*/
+diff -Naur linux-2.6.18/include/linux/dvb.orig/frontend.h linux-2.6.18/include/linux/dvb/frontend.h
+--- linux-2.6.18/include/linux/dvb.orig/frontend.h     2006-09-20 03:42:06.000000000 +0000
++++ linux-2.6.18/include/linux/dvb/frontend.h  2010-09-09 17:41:14.000000000 +0000
+@@ -28,7 +28,6 @@
+ 
+ #include <asm/types.h>
+ 
+-
+ typedef enum fe_type {
+       FE_QPSK,
+       FE_QAM,
+@@ -62,9 +61,12 @@
+       FE_CAN_HIERARCHY_AUTO           = 0x100000,
+       FE_CAN_8VSB                     = 0x200000,
+       FE_CAN_16VSB                    = 0x400000,
+-      FE_NEEDS_BENDING                = 0x20000000, // not supported anymore, don't use (frontend requires frequency bending)
+-      FE_CAN_RECOVER                  = 0x40000000, // frontend can recover from a cable unplug automatically
+-      FE_CAN_MUTE_TS                  = 0x80000000  // frontend can stop spurious TS data output
++      FE_HAS_EXTENDED_CAPS            = 0x800000,   /* We need more bitspace for newer APIs, indicate this. */
++      FE_CAN_TURBO_FEC                = 0x8000000,  /* frontend supports "turbo fec modulation" */
++      FE_CAN_2G_MODULATION            = 0x10000000, /* frontend supports "2nd generation modulation" (DVB-S2) */
++      FE_NEEDS_BENDING                = 0x20000000, /* not supported anymore, don't use (frontend requires frequency bending) */
++      FE_CAN_RECOVER                  = 0x40000000, /* frontend can recover from a cable unplug automatically */
++      FE_CAN_MUTE_TS                  = 0x80000000  /* frontend can stop spurious TS data output */
+ } fe_caps_t;
+ 
+ 
+@@ -120,15 +122,15 @@
+ 
+ 
+ typedef enum fe_status {
+-      FE_HAS_SIGNAL   = 0x01,   /*  found something above the noise level */
+-      FE_HAS_CARRIER  = 0x02,   /*  found a DVB signal  */
+-      FE_HAS_VITERBI  = 0x04,   /*  FEC is stable  */
+-      FE_HAS_SYNC     = 0x08,   /*  found sync bytes  */
+-      FE_HAS_LOCK     = 0x10,   /*  everything's working... */
+-      FE_TIMEDOUT     = 0x20,   /*  no lock within the last ~2 seconds */
+-      FE_REINIT       = 0x40    /*  frontend was reinitialized,  */
+-} fe_status_t;                          /*  application is recommended to reset */
+-                                /*  DiSEqC, tone and parameters */
++      FE_HAS_SIGNAL   = 0x01,   /* found something above the noise level */
++      FE_HAS_CARRIER  = 0x02,   /* found a DVB signal  */
++      FE_HAS_VITERBI  = 0x04,   /* FEC is stable  */
++      FE_HAS_SYNC     = 0x08,   /* found sync bytes  */
++      FE_HAS_LOCK     = 0x10,   /* everything's working... */
++      FE_TIMEDOUT     = 0x20,   /* no lock within the last ~2 seconds */
++      FE_REINIT       = 0x40    /* frontend was reinitialized,  */
++} fe_status_t;                          /* application is recommended to reset */
++                                /* DiSEqC, tone and parameters */
+ 
+ typedef enum fe_spectral_inversion {
+       INVERSION_OFF,
+@@ -147,7 +149,9 @@
+       FEC_6_7,
+       FEC_7_8,
+       FEC_8_9,
+-      FEC_AUTO
++      FEC_AUTO,
++      FEC_3_5,
++      FEC_9_10,
+ } fe_code_rate_t;
+ 
+ 
+@@ -160,20 +164,31 @@
+       QAM_256,
+       QAM_AUTO,
+       VSB_8,
+-      VSB_16
++      VSB_16,
++      PSK_8,
++      APSK_16,
++      APSK_32,
++      DQPSK,
+ } fe_modulation_t;
+ 
+ typedef enum fe_transmit_mode {
+       TRANSMISSION_MODE_2K,
+       TRANSMISSION_MODE_8K,
+-      TRANSMISSION_MODE_AUTO
++      TRANSMISSION_MODE_AUTO,
++      TRANSMISSION_MODE_4K,
++      TRANSMISSION_MODE_1K,
++      TRANSMISSION_MODE_16K,
++      TRANSMISSION_MODE_32K,
+ } fe_transmit_mode_t;
+ 
+ typedef enum fe_bandwidth {
+       BANDWIDTH_8_MHZ,
+       BANDWIDTH_7_MHZ,
+       BANDWIDTH_6_MHZ,
+-      BANDWIDTH_AUTO
++      BANDWIDTH_AUTO,
++      BANDWIDTH_5_MHZ,
++      BANDWIDTH_10_MHZ,
++      BANDWIDTH_1_712_MHZ,
+ } fe_bandwidth_t;
+ 
+ 
+@@ -182,7 +197,10 @@
+       GUARD_INTERVAL_1_16,
+       GUARD_INTERVAL_1_8,
+       GUARD_INTERVAL_1_4,
+-      GUARD_INTERVAL_AUTO
++      GUARD_INTERVAL_AUTO,
++      GUARD_INTERVAL_1_128,
++      GUARD_INTERVAL_19_128,
++      GUARD_INTERVAL_19_256,
+ } fe_guard_interval_t;
+ 
+ 
+@@ -239,6 +257,137 @@
+       struct dvb_frontend_parameters parameters;
+ };
+ 
++/* S2API Commands */
++#define DTV_UNDEFINED         0
++#define DTV_TUNE              1
++#define DTV_CLEAR             2
++#define DTV_FREQUENCY         3
++#define DTV_MODULATION                4
++#define DTV_BANDWIDTH_HZ      5
++#define DTV_INVERSION         6
++#define DTV_DISEQC_MASTER     7
++#define DTV_SYMBOL_RATE               8
++#define DTV_INNER_FEC         9
++#define DTV_VOLTAGE           10
++#define DTV_TONE              11
++#define DTV_PILOT             12
++#define DTV_ROLLOFF           13
++#define DTV_DISEQC_SLAVE_REPLY        14
++
++/* Basic enumeration set for querying unlimited capabilities */
++#define DTV_FE_CAPABILITY_COUNT       15
++#define DTV_FE_CAPABILITY     16
++#define DTV_DELIVERY_SYSTEM   17
++
++/* ISDB-T and ISDB-Tsb */
++#define DTV_ISDBT_PARTIAL_RECEPTION   18
++#define DTV_ISDBT_SOUND_BROADCASTING  19
++
++#define DTV_ISDBT_SB_SUBCHANNEL_ID    20
++#define DTV_ISDBT_SB_SEGMENT_IDX      21
++#define DTV_ISDBT_SB_SEGMENT_COUNT    22
++
++#define DTV_ISDBT_LAYERA_FEC                  23
++#define DTV_ISDBT_LAYERA_MODULATION           24
++#define DTV_ISDBT_LAYERA_SEGMENT_COUNT                25
++#define DTV_ISDBT_LAYERA_TIME_INTERLEAVING    26
++
++#define DTV_ISDBT_LAYERB_FEC                  27
++#define DTV_ISDBT_LAYERB_MODULATION           28
++#define DTV_ISDBT_LAYERB_SEGMENT_COUNT                29
++#define DTV_ISDBT_LAYERB_TIME_INTERLEAVING    30
++
++#define DTV_ISDBT_LAYERC_FEC                  31
++#define DTV_ISDBT_LAYERC_MODULATION           32
++#define DTV_ISDBT_LAYERC_SEGMENT_COUNT                33
++#define DTV_ISDBT_LAYERC_TIME_INTERLEAVING    34
++
++#define DTV_API_VERSION               35
++
++#define DTV_CODE_RATE_HP      36
++#define DTV_CODE_RATE_LP      37
++#define DTV_GUARD_INTERVAL    38
++#define DTV_TRANSMISSION_MODE 39
++#define DTV_HIERARCHY         40
++
++#define DTV_ISDBT_LAYER_ENABLED       41
++
++#define DTV_ISDBS_TS_ID               42
++
++#define DTV_DVBT2_PLP_ID      43
++
++#define DTV_MAX_COMMAND                               DTV_DVBT2_PLP_ID
++
++typedef enum fe_pilot {
++      PILOT_ON,
++      PILOT_OFF,
++      PILOT_AUTO,
++} fe_pilot_t;
++
++typedef enum fe_rolloff {
++      ROLLOFF_35, /* Implied value in DVB-S, default for DVB-S2 */
++      ROLLOFF_20,
++      ROLLOFF_25,
++      ROLLOFF_AUTO,
++} fe_rolloff_t;
++
++typedef enum fe_delivery_system {
++      SYS_UNDEFINED,
++      SYS_DVBC_ANNEX_AC,
++      SYS_DVBC_ANNEX_B,
++      SYS_DVBT,
++      SYS_DSS,
++      SYS_DVBS,
++      SYS_DVBS2,
++      SYS_DVBH,
++      SYS_ISDBT,
++      SYS_ISDBS,
++      SYS_ISDBC,
++      SYS_ATSC,
++      SYS_ATSCMH,
++      SYS_DMBTH,
++      SYS_CMMB,
++      SYS_DAB,
++      SYS_DVBT2,
++} fe_delivery_system_t;
++
++struct dtv_cmds_h {
++      char    *name;          /* A display name for debugging purposes */
++
++      __u32   cmd;            /* A unique ID */
++
++      /* Flags */
++      __u32   set:1;          /* Either a set or get property */
++      __u32   buffer:1;       /* Does this property use the buffer? */
++      __u32   reserved:30;    /* Align */
++};
++
++struct dtv_property {
++      __u32 cmd;
++      __u32 reserved[3];
++      union {
++              __u32 data;
++              struct {
++                      __u8 data[32];
++                      __u32 len;
++                      __u32 reserved1[3];
++                      void *reserved2;
++              } buffer;
++      } u;
++      int result;
++} __attribute__ ((packed));
++
++/* num of properties cannot exceed DTV_IOCTL_MAX_MSGS per ioctl */
++#define DTV_IOCTL_MAX_MSGS 64
++
++struct dtv_properties {
++      __u32 num;
++      struct dtv_property *props;
++};
++
++#define FE_SET_PROPERTY                  _IOW('o', 82, struct dtv_properties)
++#define FE_GET_PROPERTY                  _IOR('o', 83, struct dtv_properties)
++
+ 
+ /**
+  * When set, this flag will disable any zigzagging or other "normal" tuning
+diff -Naur linux-2.6.18/include/linux/dvb.orig/net.h linux-2.6.18/include/linux/dvb/net.h
+--- linux-2.6.18/include/linux/dvb.orig/net.h  2006-09-20 03:42:06.000000000 +0000
++++ linux-2.6.18/include/linux/dvb/net.h       2010-09-09 17:41:19.000000000 +0000
+@@ -26,7 +26,6 @@
+ 
+ #include <asm/types.h>
+ 
+-
+ struct dvb_net_if {
+       __u16 pid;
+       __u16 if_num;
+diff -Naur linux-2.6.18/include/linux/dvb.orig/version.h linux-2.6.18/include/linux/dvb/version.h
+--- linux-2.6.18/include/linux/dvb.orig/version.h      2006-09-20 03:42:06.000000000 +0000
++++ linux-2.6.18/include/linux/dvb/version.h   2010-09-09 17:37:58.000000000 +0000
+@@ -23,7 +23,7 @@
+ #ifndef _DVBVERSION_H_
+ #define _DVBVERSION_H_
+ 
+-#define DVB_API_VERSION 3
+-#define DVB_API_VERSION_MINOR 1
++#define DVB_API_VERSION 5
++#define DVB_API_VERSION_MINOR 3
+ 
+ #endif /*_DVBVERSION_H_*/
+diff -Naur linux-2.6.18/include/linux/dvb.orig/video.h linux-2.6.18/include/linux/dvb/video.h
+--- linux-2.6.18/include/linux/dvb.orig/video.h        2010-09-09 17:37:09.000000000 +0000
++++ linux-2.6.18/include/linux/dvb/video.h     2010-09-09 17:41:25.000000000 +0000
+@@ -24,16 +24,14 @@
+ #ifndef _DVBVIDEO_H_
+ #define _DVBVIDEO_H_
+ 
+-#include <linux/compiler.h>
+-
++#include <linux/types.h>
+ #ifdef __KERNEL__
+-#include <linux/types.h>
++#include <linux/compiler.h>
+ #else
+ #include <stdint.h>
+ #include <time.h>
+ #endif
+ 
+-
+ typedef enum {
+       VIDEO_FORMAT_4_3,     /* Select 4:3 format */
+       VIDEO_FORMAT_16_9,    /* Select 16:9 format. */
+@@ -80,14 +78,70 @@
+ } video_play_state_t;
+ 
+ 
++/* Decoder commands */
++#define VIDEO_CMD_PLAY        (0)
++#define VIDEO_CMD_STOP        (1)
++#define VIDEO_CMD_FREEZE      (2)
++#define VIDEO_CMD_CONTINUE    (3)
++
++/* Flags for VIDEO_CMD_FREEZE */
++#define VIDEO_CMD_FREEZE_TO_BLACK             (1 << 0)
++
++/* Flags for VIDEO_CMD_STOP */
++#define VIDEO_CMD_STOP_TO_BLACK       (1 << 0)
++#define VIDEO_CMD_STOP_IMMEDIATELY            (1 << 1)
++
++/* Play input formats: */
++/* The decoder has no special format requirements */
++#define VIDEO_PLAY_FMT_NONE         (0)
++/* The decoder requires full GOPs */
++#define VIDEO_PLAY_FMT_GOP          (1)
++
++/* The structure must be zeroed before use by the application
++   This ensures it can be extended safely in the future. */
++struct video_command {
++      __u32 cmd;
++      __u32 flags;
++      union {
++              struct {
++                      __u64 pts;
++              } stop;
++
++              struct {
++                      /* 0 or 1000 specifies normal speed,
++                         1 specifies forward single stepping,
++                         -1 specifies backward single stepping,
++                         >1: playback at speed/1000 of the normal speed,
++                         <-1: reverse playback at (-speed/1000) of the normal speed. */
++                      __s32 speed;
++                      __u32 format;
++              } play;
++
++              struct {
++                      __u32 data[16];
++              } raw;
++      };
++};
++
++/* FIELD_UNKNOWN can be used if the hardware does not know whether
++   the Vsync is for an odd, even or progressive (i.e. non-interlaced)
++   field. */
++#define VIDEO_VSYNC_FIELD_UNKNOWN     (0)
++#define VIDEO_VSYNC_FIELD_ODD                 (1)
++#define VIDEO_VSYNC_FIELD_EVEN                (2)
++#define VIDEO_VSYNC_FIELD_PROGRESSIVE (3)
++
+ struct video_event {
+-      int32_t type;
++      __s32 type;
+ #define VIDEO_EVENT_SIZE_CHANGED      1
+ #define VIDEO_EVENT_FRAME_RATE_CHANGED        2
+-      time_t timestamp;
++#define VIDEO_EVENT_DECODER_STOPPED   3
++#define VIDEO_EVENT_VSYNC             4
++      time_t timestamp;
+       union {
+               video_size_t size;
+               unsigned int frame_rate;        /* in frames per 1000sec */
++              unsigned char vsync_field;      /* unknown/odd/even/progressive */
+       } u;
+ };
+ 
+@@ -103,25 +157,25 @@
+ 
+ struct video_still_picture {
+       char __user *iFrame;        /* pointer to a single iframe in memory */
+-      int32_t size;
++      __s32 size;
+ };
+ 
+ 
+ typedef
+ struct video_highlight {
+       int     active;      /*    1=show highlight, 0=hide highlight */
+-      uint8_t contrast1;   /*    7- 4  Pattern pixel contrast */
++      __u8    contrast1;   /*    7- 4  Pattern pixel contrast */
+                            /*    3- 0  Background pixel contrast */
+-      uint8_t contrast2;   /*    7- 4  Emphasis pixel-2 contrast */
++      __u8    contrast2;   /*    7- 4  Emphasis pixel-2 contrast */
+                            /*    3- 0  Emphasis pixel-1 contrast */
+-      uint8_t color1;      /*    7- 4  Pattern pixel color */
++      __u8    color1;      /*    7- 4  Pattern pixel color */
+                            /*    3- 0  Background pixel color */
+-      uint8_t color2;      /*    7- 4  Emphasis pixel-2 color */
++      __u8    color2;      /*    7- 4  Emphasis pixel-2 color */
+                            /*    3- 0  Emphasis pixel-1 color */
+-      uint32_t ypos;       /*   23-22  auto action mode */
++      __u32    ypos;       /*   23-22  auto action mode */
+                            /*   21-12  start y */
+                            /*    9- 0  end y */
+-      uint32_t xpos;       /*   23-22  button color number */
++      __u32    xpos;       /*   23-22  button color number */
+                            /*   21-12  start x */
+                            /*    9- 0  end x */
+ } video_highlight_t;
+@@ -135,17 +189,17 @@
+ 
+ typedef struct video_spu_palette {      /* SPU Palette information */
+       int length;
+-      uint8_t __user *palette;
++      __u8 __user *palette;
+ } video_spu_palette_t;
+ 
+ 
+ typedef struct video_navi_pack {
+       int length;          /* 0 ... 1024 */
+-      uint8_t data[1024];
++      __u8 data[1024];
+ } video_navi_pack_t;
+ 
+ 
+-typedef uint16_t video_attributes_t;
++typedef __u16 video_attributes_t;
+ /*   bits: descr. */
+ /*   15-14 Video compression mode (0=MPEG-1, 1=MPEG-2) */
+ /*   13-12 TV system (0=525/60, 1=625/50) */
+@@ -213,4 +267,10 @@
+  */
+ #define VIDEO_GET_PTS              _IOR('o', 57, __u64)
+ 
++/* Read the number of displayed frames since the decoder was started */
++#define VIDEO_GET_FRAME_COUNT            _IOR('o', 58, __u64)
++
++#define VIDEO_COMMAND            _IOWR('o', 59, struct video_command)
++#define VIDEO_TRY_COMMAND        _IOWR('o', 60, struct video_command)
++
+ #endif /*_DVBVIDEO_H_*/

diff --git a/recipes/linux/files/opendreambox/linux-2.6.18-dvb-core-headers-20100904.patch b/recipes/linux/files/opendreambox/linux-2.6.18-dvb-core-headers-20100904.patch
new file mode 100644 (file)
index 0000000..10356f3
--- /dev/null
+++ b/recipes/linux/files/opendreambox/linux-2.6.18-dvb-core-headers-20100904.patch
@@ -0,0 +1,674 @@
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/dvb-core/compat.h linux-2.6.18/drivers/media/dvb/dvb-core/compat.h
+--- linux-2.6.18/drivers/media/dvb.orig/dvb-core/compat.h      2010-09-10 02:00:59.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/dvb-core/compat.h   2010-09-15 00:00:00.000000000 +0000
+@@ -1,19 +0,1 @@
+-#ifndef _COMPAT_H
+-#define _COMPAT_H
+-
+-#include <linux/i2c-id.h>
+-#include <linux/version.h>
+-#include <linux/utsname.h>
+-
+-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,13)
+-# define class_device_create(a, b, c, d, e, f, g, h) class_simple_device_add(a, c, d, e, f, g, h)
+-# define class_device_destroy(a, b...) class_simple_device_remove(b)
+-# define class_create class_simple_create
+-# define class_destroy class_simple_destroy
+-# define class class_simple
+-# define try_to_freeze() do { if (current->flags & PF_FREEZE) refrigerator(PF_FREEZE); } while(0)
+-#elif LINUX_VERSION_CODE < KERNEL_VERSION(2,6,15)
+-# define class_device_create(a, b, c, d, e, f, g, h) class_device_create(a, c, d, e, f, g, h)
+-#endif
+-
+-#endif
++
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/dvb-core/demux.h linux-2.6.18/drivers/media/dvb/dvb-core/demux.h
+--- linux-2.6.18/drivers/media/dvb.orig/dvb-core/demux.h       2006-09-20 03:42:06.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/dvb-core/demux.h    2010-09-09 12:38:50.000000000 +0000
+@@ -80,6 +80,8 @@
+ #define       TS_PAYLOAD_ONLY 2   /* in case TS_PACKET is set, only send the TS
+                              payload (<=184 bytes per packet) to callback */
+ #define TS_DECODER      4   /* send stream to built-in decoder (if present) */
++#define TS_DEMUX        8   /* in case TS_PACKET is set, send the TS to
++                             the demux device, not to the dvr device */
+ 
+ /* PES type for filters which write to built-in decoder */
+ /* these should be kept identical to the types in dmx.h */
+@@ -245,7 +247,7 @@
+       void* priv;                  /* Pointer to private data of the API client */
+       int (*open) (struct dmx_demux* demux);
+       int (*close) (struct dmx_demux* demux);
+-      int (*write) (struct dmx_demux* demux, const char* buf, size_t count);
++      int (*write) (struct dmx_demux* demux, const char __user *buf, size_t count);
+       int (*allocate_ts_feed) (struct dmx_demux* demux,
+                                struct dmx_ts_feed** feed,
+                                dmx_ts_cb callback);
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/dvb-core/dmxdev.h linux-2.6.18/drivers/media/dvb/dvb-core/dmxdev.h
+--- linux-2.6.18/drivers/media/dvb.orig/dvb-core/dmxdev.h      2006-09-20 03:42:06.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/dvb-core/dmxdev.h   2010-09-09 12:38:50.000000000 +0000
+@@ -30,7 +30,9 @@
+ #include <linux/wait.h>
+ #include <linux/fs.h>
+ #include <linux/string.h>
++#include "compat.h"
+ #include <linux/mutex.h>
++#include <linux/slab.h>
+ 
+ #include <linux/dvb/dmx.h>
+ 
+@@ -53,13 +55,20 @@
+       DMXDEV_STATE_TIMEDOUT
+ };
+ 
++struct dmxdev_feed {
++      u16 pid;
++      struct dmx_ts_feed *ts;
++      struct list_head next;
++};
++
+ struct dmxdev_filter {
+       union {
+               struct dmx_section_filter *sec;
+       } filter;
+ 
+       union {
+-              struct dmx_ts_feed *ts;
++              /* list of TS and PES feeds (struct dmxdev_feed) */
++              struct list_head ts;
+               struct dmx_section_feed *sec;
+       } feed;
+ 
+@@ -91,6 +100,8 @@
+ 
+       int filternum;
+       int capabilities;
++
++      unsigned int exit:1;
+ #define DMXDEV_CAP_DUPLEX 1
+       struct dmx_frontend *dvr_orig_fe;
+ 
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/dvb-core/dvb_ca_en50221.h linux-2.6.18/drivers/media/dvb/dvb-core/dvb_ca_en50221.h
+--- linux-2.6.18/drivers/media/dvb.orig/dvb-core/dvb_ca_en50221.h      2006-09-20 03:42:06.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/dvb-core/dvb_ca_en50221.h   2010-09-09 12:38:50.000000000 +0000
+@@ -45,8 +45,10 @@
+       /* the module owning this structure */
+       struct module* owner;
+ 
+-      /* NOTE: the read_*, write_* and poll_slot_status functions must use locks as
+-       * they may be called from several threads at once */
++      /* NOTE: the read_*, write_* and poll_slot_status functions will be
++       * called for different slots concurrently and need to use locks where
++       * and if appropriate. There will be no concurrent access to one slot.
++       */
+ 
+       /* functions for accessing attribute memory on the CAM */
+       int (*read_attribute_mem)(struct dvb_ca_en50221* ca, int slot, int address);
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/dvb-core/dvb_demux.h linux-2.6.18/drivers/media/dvb/dvb-core/dvb_demux.h
+--- linux-2.6.18/drivers/media/dvb.orig/dvb-core/dvb_demux.h   2006-09-20 03:42:06.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/dvb-core/dvb_demux.h        2010-09-09 12:38:50.000000000 +0000
+@@ -26,6 +26,7 @@
+ #include <linux/time.h>
+ #include <linux/timer.h>
+ #include <linux/spinlock.h>
++#include "compat.h"
+ #include <linux/mutex.h>
+ 
+ #include "demux.h"
+@@ -42,6 +43,10 @@
+ 
+ #define DVB_DEMUX_MASK_MAX 18
+ 
++#define MAX_PID 0x1fff
++
++#define SPEED_PKTS_INTERVAL 50000
++
+ struct dvb_demux_filter {
+       struct dmx_section_filter filter;
+       u8 maskandmode[DMX_MAX_FILTER_SIZE];
+@@ -127,6 +132,11 @@
+ 
+       struct mutex mutex;
+       spinlock_t lock;
++
++      uint8_t *cnt_storage; /* for TS continuity check */
++
++      struct timespec speed_last_time; /* for TS speed check */
++      uint32_t speed_pkts_cnt; /* for TS speed check */
+ };
+ 
+ int dvb_dmx_init(struct dvb_demux *dvbdemux);
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/dvb-core/dvbdev.h linux-2.6.18/drivers/media/dvb/dvb-core/dvbdev.h
+--- linux-2.6.18/drivers/media/dvb.orig/dvb-core/dvbdev.h      2006-09-20 03:42:06.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/dvb-core/dvbdev.h   2010-09-09 12:38:50.000000000 +0000
+@@ -27,10 +27,17 @@
+ #include <linux/poll.h>
+ #include <linux/fs.h>
+ #include <linux/list.h>
+-#include <linux/smp_lock.h>
+ 
+ #define DVB_MAJOR 212
+ 
++#if defined(CONFIG_DVB_MAX_ADAPTERS) && CONFIG_DVB_MAX_ADAPTERS > 0
++  #define DVB_MAX_ADAPTERS CONFIG_DVB_MAX_ADAPTERS
++#else
++  #define DVB_MAX_ADAPTERS 8
++#endif
++
++#define DVB_UNSET (-1)
++
+ #define DVB_DEVICE_VIDEO      0
+ #define DVB_DEVICE_AUDIO      1
+ #define DVB_DEVICE_SEC        2
+@@ -41,6 +48,13 @@
+ #define DVB_DEVICE_NET        7
+ #define DVB_DEVICE_OSD        8
+ 
++#define DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr) \
++      static short adapter_nr[] = \
++              {[0 ... (DVB_MAX_ADAPTERS - 1)] = DVB_UNSET }; \
++      module_param_array(adapter_nr, short, NULL, 0444); \
++      MODULE_PARM_DESC(adapter_nr, "DVB adapter numbers")
++
++struct dvb_frontend;
+ 
+ struct dvb_adapter {
+       int num;
+@@ -53,14 +67,45 @@
+       struct device *device;
+ 
+       struct module *module;
++
++      int mfe_shared;                 /* indicates mutually exclusive frontends */
++      struct dvb_device *mfe_dvbdev;  /* frontend device in use */
++      struct mutex mfe_lock;          /* access lock for thread creation */
++
++      /* Allow the adapter/bridge driver to perform an action before and/or
++       * after the core handles an ioctl:
++       *
++       * DVB_FE_IOCTL_PRE indicates that the ioctl has not yet been handled.
++       * DVB_FE_IOCTL_POST indicates that the ioctl has been handled.
++       *
++       * When DVB_FE_IOCTL_PRE is passed to the callback as the stage arg:
++       *
++       * return 0 to allow dvb-core to handle the ioctl.
++       * return a positive int to prevent dvb-core from handling the ioctl,
++       *      and exit without error.
++       * return a negative int to prevent dvb-core from handling the ioctl,
++       *      and return that value as an error.
++       *
++       * When DVB_FE_IOCTL_POST is passed to the callback as the stage arg:
++       *
++       * return 0 to allow the dvb_frontend ioctl handler to exit normally.
++       * return a negative int to cause the dvb_frontend ioctl handler to
++       *      return that value as an error.
++       */
++#define DVB_FE_IOCTL_PRE 0
++#define DVB_FE_IOCTL_POST 1
++      int (*fe_ioctl_override)(struct dvb_frontend *fe,
++                               unsigned int cmd, void *parg,
++                               unsigned int stage);
+ };
+ 
+ 
+ struct dvb_device {
+       struct list_head list_head;
+-      struct file_operations *fops;
++      const struct file_operations *fops;
+       struct dvb_adapter *adapter;
+       int type;
++      int minor;
+       u32 id;
+ 
+       /* in theory, 'users' can vanish now,
+@@ -69,6 +114,7 @@
+       int writers;
+       int users;
+ 
++      wait_queue_head_t         wait_queue;
+       /* don't really need those !? -- FIXME: use video_usercopy  */
+       int (*kernel_ioctl)(struct inode *inode, struct file *file,
+                           unsigned int cmd, void *arg);
+@@ -77,7 +123,9 @@
+ };
+ 
+ 
+-extern int dvb_register_adapter (struct dvb_adapter *adap, const char *name, struct module *module, struct device *device);
++extern int dvb_register_adapter(struct dvb_adapter *adap, const char *name,
++                              struct module *module, struct device *device,
++                              short *adapter_nums);
+ extern int dvb_unregister_adapter (struct dvb_adapter *adap);
+ 
+ extern int dvb_register_device (struct dvb_adapter *adap,
+@@ -102,4 +150,26 @@
+                           int (*func)(struct inode *inode, struct file *file,
+                           unsigned int cmd, void *arg));
+ 
++/** generic DVB attach function. */
++#ifdef CONFIG_MEDIA_ATTACH
++#define dvb_attach(FUNCTION, ARGS...) ({ \
++      void *__r = NULL; \
++      typeof(&FUNCTION) __a = symbol_request(FUNCTION); \
++      if (__a) { \
++              __r = (void *) __a(ARGS); \
++              if (__r == NULL) \
++                      symbol_put(FUNCTION); \
++      } else { \
++              printk(KERN_ERR "DVB: Unable to find symbol "#FUNCTION"()\n"); \
++      } \
++      __r; \
++})
++
++#else
++#define dvb_attach(FUNCTION, ARGS...) ({ \
++      FUNCTION(ARGS); \
++})
++
++#endif
++
+ #endif /* #ifndef _DVBDEV_H_ */
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/dvb-core/dvb_frontend.h linux-2.6.18/drivers/media/dvb/dvb-core/dvb_frontend.h
+--- linux-2.6.18/drivers/media/dvb.orig/dvb-core/dvb_frontend.h        2006-09-20 03:42:06.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/dvb-core/dvb_frontend.h     2010-09-09 12:38:50.000000000 +0000
+@@ -35,6 +35,8 @@
+ #include <linux/module.h>
+ #include <linux/errno.h>
+ #include <linux/delay.h>
++#include <linux/mutex.h>
++#include <linux/slab.h>
+ 
+ #include <linux/dvb/frontend.h>
+ 
+@@ -61,6 +63,132 @@
+       u32 bandwidth_step;
+ };
+ 
++struct analog_parameters {
++      unsigned int frequency;
++      unsigned int mode;
++      unsigned int audmode;
++      u64 std;
++};
++
++enum dvbfe_modcod {
++      DVBFE_MODCOD_DUMMY_PLFRAME      = 0,
++      DVBFE_MODCOD_QPSK_1_4,
++      DVBFE_MODCOD_QPSK_1_3,
++      DVBFE_MODCOD_QPSK_2_5,
++      DVBFE_MODCOD_QPSK_1_2,
++      DVBFE_MODCOD_QPSK_3_5,
++      DVBFE_MODCOD_QPSK_2_3,
++      DVBFE_MODCOD_QPSK_3_4,
++      DVBFE_MODCOD_QPSK_4_5,
++      DVBFE_MODCOD_QPSK_5_6,
++      DVBFE_MODCOD_QPSK_8_9,
++      DVBFE_MODCOD_QPSK_9_10,
++      DVBFE_MODCOD_8PSK_3_5,
++      DVBFE_MODCOD_8PSK_2_3,
++      DVBFE_MODCOD_8PSK_3_4,
++      DVBFE_MODCOD_8PSK_5_6,
++      DVBFE_MODCOD_8PSK_8_9,
++      DVBFE_MODCOD_8PSK_9_10,
++      DVBFE_MODCOD_16APSK_2_3,
++      DVBFE_MODCOD_16APSK_3_4,
++      DVBFE_MODCOD_16APSK_4_5,
++      DVBFE_MODCOD_16APSK_5_6,
++      DVBFE_MODCOD_16APSK_8_9,
++      DVBFE_MODCOD_16APSK_9_10,
++      DVBFE_MODCOD_32APSK_3_4,
++      DVBFE_MODCOD_32APSK_4_5,
++      DVBFE_MODCOD_32APSK_5_6,
++      DVBFE_MODCOD_32APSK_8_9,
++      DVBFE_MODCOD_32APSK_9_10,
++      DVBFE_MODCOD_RESERVED_1,
++      DVBFE_MODCOD_BPSK_1_3,
++      DVBFE_MODCOD_BPSK_1_4,
++      DVBFE_MODCOD_RESERVED_2
++};
++
++enum tuner_param {
++      DVBFE_TUNER_FREQUENCY           = (1 <<  0),
++      DVBFE_TUNER_TUNERSTEP           = (1 <<  1),
++      DVBFE_TUNER_IFFREQ              = (1 <<  2),
++      DVBFE_TUNER_BANDWIDTH           = (1 <<  3),
++      DVBFE_TUNER_REFCLOCK            = (1 <<  4),
++      DVBFE_TUNER_IQSENSE             = (1 <<  5),
++      DVBFE_TUNER_DUMMY               = (1 << 31)
++};
++
++/*
++ * ALGO_HW: (Hardware Algorithm)
++ * ----------------------------------------------------------------
++ * Devices that support this algorithm do everything in hardware
++ * and no software support is needed to handle them.
++ * Requesting these devices to LOCK is the only thing required,
++ * device is supposed to do everything in the hardware.
++ *
++ * ALGO_SW: (Software Algorithm)
++ * ----------------------------------------------------------------
++ * These are dumb devices, that require software to do everything
++ *
++ * ALGO_CUSTOM: (Customizable Agorithm)
++ * ----------------------------------------------------------------
++ * Devices having this algorithm can be customized to have specific
++ * algorithms in the frontend driver, rather than simply doing a
++ * software zig-zag. In this case the zigzag maybe hardware assisted
++ * or it maybe completely done in hardware. In all cases, usage of
++ * this algorithm, in conjunction with the search and track
++ * callbacks, utilizes the driver specific algorithm.
++ *
++ * ALGO_RECOVERY: (Recovery Algorithm)
++ * ----------------------------------------------------------------
++ * These devices have AUTO recovery capabilities from LOCK failure
++ */
++enum dvbfe_algo {
++      DVBFE_ALGO_HW                   = (1 <<  0),
++      DVBFE_ALGO_SW                   = (1 <<  1),
++      DVBFE_ALGO_CUSTOM               = (1 <<  2),
++      DVBFE_ALGO_RECOVERY             = (1 << 31)
++};
++
++struct tuner_state {
++      u32 frequency;
++      u32 tunerstep;
++      u32 ifreq;
++      u32 bandwidth;
++      u32 iqsense;
++      u32 refclock;
++};
++
++/*
++ * search callback possible return status
++ *
++ * DVBFE_ALGO_SEARCH_SUCCESS
++ * The frontend search algorithm completed and returned successfully
++ *
++ * DVBFE_ALGO_SEARCH_ASLEEP
++ * The frontend search algorithm is sleeping
++ *
++ * DVBFE_ALGO_SEARCH_FAILED
++ * The frontend search for a signal failed
++ *
++ * DVBFE_ALGO_SEARCH_INVALID
++ * The frontend search algorith was probably supplied with invalid
++ * parameters and the search is an invalid one
++ *
++ * DVBFE_ALGO_SEARCH_ERROR
++ * The frontend search algorithm failed due to some error
++ *
++ * DVBFE_ALGO_SEARCH_AGAIN
++ * The frontend search algorithm was requested to search again
++ */
++enum dvbfe_search {
++      DVBFE_ALGO_SEARCH_SUCCESS       = (1 <<  0),
++      DVBFE_ALGO_SEARCH_ASLEEP        = (1 <<  1),
++      DVBFE_ALGO_SEARCH_FAILED        = (1 <<  2),
++      DVBFE_ALGO_SEARCH_INVALID       = (1 <<  3),
++      DVBFE_ALGO_SEARCH_AGAIN         = (1 <<  4),
++      DVBFE_ALGO_SEARCH_ERROR         = (1 << 31),
++};
++
++
+ struct dvb_tuner_ops {
+ 
+       struct dvb_tuner_info info;
+@@ -71,20 +199,55 @@
+ 
+       /** This is for simple PLLs - set all parameters in one go. */
+       int (*set_params)(struct dvb_frontend *fe, struct dvb_frontend_parameters *p);
++      int (*set_analog_params)(struct dvb_frontend *fe, struct analog_parameters *p);
+ 
+       /** This is support for demods like the mt352 - fills out the supplied buffer with what to write. */
+       int (*calc_regs)(struct dvb_frontend *fe, struct dvb_frontend_parameters *p, u8 *buf, int buf_len);
+ 
++      /** This is to allow setting tuner-specific configs */
++      int (*set_config)(struct dvb_frontend *fe, void *priv_cfg);
++
+       int (*get_frequency)(struct dvb_frontend *fe, u32 *frequency);
+       int (*get_bandwidth)(struct dvb_frontend *fe, u32 *bandwidth);
+ 
+ #define TUNER_STATUS_LOCKED 1
++#define TUNER_STATUS_STEREO 2
+       int (*get_status)(struct dvb_frontend *fe, u32 *status);
++      int (*get_rf_strength)(struct dvb_frontend *fe, u16 *strength);
+ 
+-      /** These are provided seperately from set_params in order to facilitate silicon
+-       * tuners which require sophisticated tuning loops, controlling each parameter seperately. */
++      /** These are provided separately from set_params in order to facilitate silicon
++       * tuners which require sophisticated tuning loops, controlling each parameter separately. */
+       int (*set_frequency)(struct dvb_frontend *fe, u32 frequency);
+       int (*set_bandwidth)(struct dvb_frontend *fe, u32 bandwidth);
++
++      /*
++       * These are provided separately from set_params in order to facilitate silicon
++       * tuners which require sophisticated tuning loops, controlling each parameter separately.
++       */
++      int (*set_state)(struct dvb_frontend *fe, enum tuner_param param, struct tuner_state *state);
++      int (*get_state)(struct dvb_frontend *fe, enum tuner_param param, struct tuner_state *state);
++};
++
++struct analog_demod_info {
++      char *name;
++};
++
++struct analog_demod_ops {
++
++      struct analog_demod_info info;
++
++      void (*set_params)(struct dvb_frontend *fe,
++                         struct analog_parameters *params);
++      int  (*has_signal)(struct dvb_frontend *fe);
++      int  (*is_stereo)(struct dvb_frontend *fe);
++      int  (*get_afc)(struct dvb_frontend *fe);
++      void (*tuner_status)(struct dvb_frontend *fe);
++      void (*standby)(struct dvb_frontend *fe);
++      void (*release)(struct dvb_frontend *fe);
++      int  (*i2c_gate_ctrl)(struct dvb_frontend *fe, int enable);
++
++      /** This is to allow setting tuner-specific configuration */
++      int (*set_config)(struct dvb_frontend *fe, void *priv_cfg);
+ };
+ 
+ struct dvb_frontend_ops {
+@@ -92,18 +255,21 @@
+       struct dvb_frontend_info info;
+ 
+       void (*release)(struct dvb_frontend* fe);
++      void (*release_sec)(struct dvb_frontend* fe);
+ 
+       int (*init)(struct dvb_frontend* fe);
+       int (*sleep)(struct dvb_frontend* fe);
+ 
++      int (*write)(struct dvb_frontend* fe, u8* buf, int len);
++
+       /* if this is set, it overrides the default swzigzag */
+       int (*tune)(struct dvb_frontend* fe,
+                   struct dvb_frontend_parameters* params,
+                   unsigned int mode_flags,
+-                  int *delay,
++                  unsigned int *delay,
+                   fe_status_t *status);
+       /* get frontend tuning algorithm from the module */
+-      int (*get_frontend_algo)(struct dvb_frontend *fe);
++      enum dvbfe_algo (*get_frontend_algo)(struct dvb_frontend *fe);
+ 
+       /* these two are only used for the swzigzag code */
+       int (*set_frontend)(struct dvb_frontend* fe, struct dvb_frontend_parameters* params);
+@@ -126,8 +292,19 @@
+       int (*enable_high_lnb_voltage)(struct dvb_frontend* fe, long arg);
+       int (*dishnetwork_send_legacy_command)(struct dvb_frontend* fe, unsigned long cmd);
+       int (*i2c_gate_ctrl)(struct dvb_frontend* fe, int enable);
++      int (*ts_bus_ctrl)(struct dvb_frontend* fe, int acquire);
++
++      /* These callbacks are for devices that implement their own
++       * tuning algorithms, rather than a simple swzigzag
++       */
++      enum dvbfe_search (*search)(struct dvb_frontend *fe, struct dvb_frontend_parameters *p);
++      int (*track)(struct dvb_frontend *fe, struct dvb_frontend_parameters *p);
+ 
+       struct dvb_tuner_ops tuner_ops;
++      struct analog_demod_ops analog_ops;
++
++      int (*set_property)(struct dvb_frontend* fe, struct dtv_property* tvp);
++      int (*get_property)(struct dvb_frontend* fe, struct dtv_property* tvp);
+ };
+ 
+ #define MAX_EVENT 8
+@@ -138,22 +315,72 @@
+       int                       eventr;
+       int                       overflow;
+       wait_queue_head_t         wait_queue;
+-      struct semaphore          sem;
++      struct mutex              mtx;
++};
++
++struct dtv_frontend_properties {
++
++      /* Cache State */
++      u32                     state;
++
++      u32                     frequency;
++      fe_modulation_t         modulation;
++
++      fe_sec_voltage_t        voltage;
++      fe_sec_tone_mode_t      sectone;
++      fe_spectral_inversion_t inversion;
++      fe_code_rate_t          fec_inner;
++      fe_transmit_mode_t      transmission_mode;
++      u32                     bandwidth_hz;   /* 0 = AUTO */
++      fe_guard_interval_t     guard_interval;
++      fe_hierarchy_t          hierarchy;
++      u32                     symbol_rate;
++      fe_code_rate_t          code_rate_HP;
++      fe_code_rate_t          code_rate_LP;
++
++      fe_pilot_t              pilot;
++      fe_rolloff_t            rolloff;
++
++      fe_delivery_system_t    delivery_system;
++
++      /* ISDB-T specifics */
++      u8                      isdbt_partial_reception;
++      u8                      isdbt_sb_mode;
++      u8                      isdbt_sb_subchannel;
++      u32                     isdbt_sb_segment_idx;
++      u32                     isdbt_sb_segment_count;
++      u8                      isdbt_layer_enabled;
++      struct {
++          u8                  segment_count;
++          fe_code_rate_t      fec;
++          fe_modulation_t     modulation;
++          u8                  interleaving;
++      } layer[3];
++
++      /* ISDB-T specifics */
++      u32                     isdbs_ts_id;
+ };
+ 
+ struct dvb_frontend {
+       struct dvb_frontend_ops ops;
+       struct dvb_adapter *dvb;
+-      void* demodulator_priv;
+-      void* tuner_priv;
+-      void* frontend_priv;
+-      void* misc_priv;
++      void *demodulator_priv;
++      void *tuner_priv;
++      void *frontend_priv;
++      void *sec_priv;
++      void *analog_demod_priv;
++      struct dtv_frontend_properties dtv_property_cache;
++#define DVB_FRONTEND_COMPONENT_TUNER 0
++      int (*callback)(void *adapter_priv, int component, int cmd, int arg);
++      int id;
+ };
+ 
+-extern int dvb_register_frontend(struct dvb_adapter* dvb,
+-                               struct dvb_frontend* fe);
++extern int dvb_register_frontend(struct dvb_adapter *dvb,
++                               struct dvb_frontend *fe);
++
++extern int dvb_unregister_frontend(struct dvb_frontend *fe);
+ 
+-extern int dvb_unregister_frontend(struct dvb_frontend* fe);
++extern void dvb_frontend_detach(struct dvb_frontend *fe);
+ 
+ extern void dvb_frontend_reinitialise(struct dvb_frontend *fe);
+ 
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/dvb-core/dvb_net.h linux-2.6.18/drivers/media/dvb/dvb-core/dvb_net.h
+--- linux-2.6.18/drivers/media/dvb.orig/dvb-core/dvb_net.h     2006-09-20 03:42:06.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/dvb-core/dvb_net.h  2010-09-09 12:38:50.000000000 +0000
+@@ -36,6 +36,7 @@
+       struct dvb_device *dvbdev;
+       struct net_device *device[DVB_NET_DEVICES_MAX];
+       int state[DVB_NET_DEVICES_MAX];
++      unsigned int exit:1;
+       struct dmx_demux *demux;
+ };
+ 
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/dvb-core/dvb_ringbuffer.h linux-2.6.18/drivers/media/dvb/dvb-core/dvb_ringbuffer.h
+--- linux-2.6.18/drivers/media/dvb.orig/dvb-core/dvb_ringbuffer.h      2006-09-20 03:42:06.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/dvb-core/dvb_ringbuffer.h   2010-09-10 11:57:24.000000000 +0000
+@@ -38,6 +38,7 @@
+       int               error;
+ 
+       wait_queue_head_t queue;
++      int               do_wait;
+       spinlock_t        lock;
+ };
+ 
+@@ -61,7 +62,7 @@
+ **     *** read min. 1000, max. <bufsize> bytes ***
+ **     avail = dvb_ringbuffer_avail(rbuf);
+ **     if (avail >= 1000)
+-**         count = dvb_ringbuffer_read(rbuf, buffer, min(avail, bufsize), 0);
++**         count = dvb_ringbuffer_read(rbuf, buffer, min(avail, bufsize));
+ **     else
+ **         ...
+ **
+@@ -69,6 +70,7 @@
+ **     to lock read or write operations.
+ **     Two or more readers must be locked against each other.
+ **     Flushing the buffer counts as a read operation.
++**     Resetting the buffer counts as a read and write operation.
+ **     Two or more writers must be locked against each other.
+ */
+ 
+@@ -85,6 +87,13 @@
+ extern ssize_t dvb_ringbuffer_avail(struct dvb_ringbuffer *rbuf);
+ 
+ 
++/*
++** Reset the read and write pointers to zero and flush the buffer
++** This counts as a read and write operation
++*/
++extern void dvb_ringbuffer_reset(struct dvb_ringbuffer *rbuf);
++
++
+ /* read routines & macros */
+ /* ---------------------- */
+ /* flush buffer */
+@@ -106,8 +115,10 @@
+ ** <usermem> specifies whether <buf> resides in user space
+ ** returns number of bytes transferred or -EFAULT
+ */
+-extern ssize_t dvb_ringbuffer_read(struct dvb_ringbuffer *rbuf, u8 *buf,
+-                                 size_t len, int usermem);
++extern ssize_t dvb_ringbuffer_read_user(struct dvb_ringbuffer *rbuf,
++                                 u8 __user *buf, size_t len);
++extern void dvb_ringbuffer_read(struct dvb_ringbuffer *rbuf,
++                                 u8 *buf, size_t len);
+ 
+ 
+ /* write routines & macros */
+@@ -149,8 +160,10 @@
+  * <usermem> Set to 1 if <buf> is in userspace.
+  * returns Number of bytes read, or -EFAULT.
+  */
++extern ssize_t dvb_ringbuffer_pkt_read_user(struct dvb_ringbuffer *rbuf, size_t idx,
++                                     int offset, u8 __user *buf, size_t len);
+ extern ssize_t dvb_ringbuffer_pkt_read(struct dvb_ringbuffer *rbuf, size_t idx,
+-                                     int offset, u8* buf, size_t len, int usermem);
++                                     int offset, u8 *buf, size_t len);
+ 
+ /**
+  * Dispose of a packet in the ring buffer.

diff --git a/recipes/linux/files/opendreambox/linux-2.6.18-dvb-frontends-headers-20100904.patch b/recipes/linux/files/opendreambox/linux-2.6.18-dvb-frontends-headers-20100904.patch
new file mode 100644 (file)
index 0000000..7ed02d2
--- /dev/null
+++ b/recipes/linux/files/opendreambox/linux-2.6.18-dvb-frontends-headers-20100904.patch
@@ -0,0 +1,19289 @@
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/af9013.h linux-2.6.18/drivers/media/dvb/frontends/af9013.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/af9013.h     1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/af9013.h  2010-09-09 12:38:50.000000000 +0000
+@@ -0,0 +1,108 @@
++/*
++ * DVB USB Linux driver for Afatech AF9015 DVB-T USB2.0 receiver
++ *
++ * Copyright (C) 2007 Antti Palosaari <crope@iki.fi>
++ *
++ * Thanks to Afatech who kindly provided information.
++ *
++ *    This program is free software; you can redistribute it and/or modify
++ *    it under the terms of the GNU General Public License as published by
++ *    the Free Software Foundation; either version 2 of the License, or
++ *    (at your option) any later version.
++ *
++ *    This program is distributed in the hope that it will be useful,
++ *    but WITHOUT ANY WARRANTY; without even the implied warranty of
++ *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ *    GNU General Public License for more details.
++ *
++ *    You should have received a copy of the GNU General Public License
++ *    along with this program; if not, write to the Free Software
++ *    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++ *
++ */
++
++#ifndef _AF9013_H_
++#define _AF9013_H_
++
++#include <linux/dvb/frontend.h>
++
++enum af9013_ts_mode {
++      AF9013_OUTPUT_MODE_PARALLEL,
++      AF9013_OUTPUT_MODE_SERIAL,
++      AF9013_OUTPUT_MODE_USB, /* only for AF9015 */
++};
++
++enum af9013_tuner {
++      AF9013_TUNER_MXL5003D   =   3, /* MaxLinear */
++      AF9013_TUNER_MXL5005D   =  13, /* MaxLinear */
++      AF9013_TUNER_MXL5005R   =  30, /* MaxLinear */
++      AF9013_TUNER_ENV77H11D5 = 129, /* Panasonic */
++      AF9013_TUNER_MT2060     = 130, /* Microtune */
++      AF9013_TUNER_MC44S803   = 133, /* Freescale */
++      AF9013_TUNER_QT1010     = 134, /* Quantek */
++      AF9013_TUNER_UNKNOWN    = 140, /* for can tuners ? */
++      AF9013_TUNER_MT2060_2   = 147, /* Microtune */
++      AF9013_TUNER_TDA18271   = 156, /* NXP */
++      AF9013_TUNER_QT1010A    = 162, /* Quantek */
++      AF9013_TUNER_TDA18218   = 179, /* NXP */
++};
++
++/* AF9013/5 GPIOs (mostly guessed)
++   demod#1-gpio#0 - set demod#2 i2c-addr for dual devices
++   demod#1-gpio#1 - xtal setting (?)
++   demod#1-gpio#3 - tuner#1
++   demod#2-gpio#0 - tuner#2
++   demod#2-gpio#1 - xtal setting (?)
++*/
++#define AF9013_GPIO_ON (1 << 0)
++#define AF9013_GPIO_EN (1 << 1)
++#define AF9013_GPIO_O  (1 << 2)
++#define AF9013_GPIO_I  (1 << 3)
++
++#define AF9013_GPIO_LO (AF9013_GPIO_ON|AF9013_GPIO_EN)
++#define AF9013_GPIO_HI (AF9013_GPIO_ON|AF9013_GPIO_EN|AF9013_GPIO_O)
++
++#define AF9013_GPIO_TUNER_ON  (AF9013_GPIO_ON|AF9013_GPIO_EN)
++#define AF9013_GPIO_TUNER_OFF (AF9013_GPIO_ON|AF9013_GPIO_EN|AF9013_GPIO_O)
++
++struct af9013_config {
++      /* demodulator's I2C address */
++      u8 demod_address;
++
++      /* frequencies in kHz */
++      u32 adc_clock;
++
++      /* tuner ID */
++      u8 tuner;
++
++      /* tuner IF */
++      u16 tuner_if;
++
++      /* TS data output mode */
++      u8 output_mode:2;
++
++      /* RF spectrum inversion */
++      u8 rf_spec_inv:1;
++
++      /* API version */
++      u8 api_version[4];
++
++      /* GPIOs */
++      u8 gpio[4];
++};
++
++
++#if defined(CONFIG_DVB_AF9013) || \
++      (defined(CONFIG_DVB_AF9013_MODULE) && defined(MODULE))
++extern struct dvb_frontend *af9013_attach(const struct af9013_config *config,
++      struct i2c_adapter *i2c);
++#else
++static inline struct dvb_frontend *af9013_attach(
++const struct af9013_config *config, struct i2c_adapter *i2c)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return NULL;
++}
++#endif /* CONFIG_DVB_AF9013 */
++
++#endif /* _AF9013_H_ */
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/af9013_priv.h linux-2.6.18/drivers/media/dvb/frontends/af9013_priv.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/af9013_priv.h        1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/af9013_priv.h     2010-09-09 12:38:50.000000000 +0000
+@@ -0,0 +1,869 @@
++/*
++ * DVB USB Linux driver for Afatech AF9015 DVB-T USB2.0 receiver
++ *
++ * Copyright (C) 2007 Antti Palosaari <crope@iki.fi>
++ *
++ * Thanks to Afatech who kindly provided information.
++ *
++ *    This program is free software; you can redistribute it and/or modify
++ *    it under the terms of the GNU General Public License as published by
++ *    the Free Software Foundation; either version 2 of the License, or
++ *    (at your option) any later version.
++ *
++ *    This program is distributed in the hope that it will be useful,
++ *    but WITHOUT ANY WARRANTY; without even the implied warranty of
++ *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ *    GNU General Public License for more details.
++ *
++ *    You should have received a copy of the GNU General Public License
++ *    along with this program; if not, write to the Free Software
++ *    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++ *
++ */
++
++#ifndef _AF9013_PRIV_
++#define _AF9013_PRIV_
++
++#define LOG_PREFIX "af9013"
++extern int af9013_debug;
++
++#define dprintk(var, level, args...) \
++          do { if ((var & level)) printk(args); } while (0)
++
++#define debug_dump(b, l, func) {\
++      int loop_; \
++      for (loop_ = 0; loop_ < l; loop_++) \
++              func("%02x ", b[loop_]); \
++      func("\n");\
++}
++
++#define deb_info(args...) dprintk(af9013_debug, 0x01, args)
++
++#undef err
++#define err(f, arg...)  printk(KERN_ERR     LOG_PREFIX": " f "\n" , ## arg)
++#undef info
++#define info(f, arg...) printk(KERN_INFO    LOG_PREFIX": " f "\n" , ## arg)
++#undef warn
++#define warn(f, arg...) printk(KERN_WARNING LOG_PREFIX": " f "\n" , ## arg)
++
++#define AF9013_DEFAULT_FIRMWARE     "dvb-fe-af9013.fw"
++
++struct regdesc {
++      u16 addr;
++      u8  pos:4;
++      u8  len:4;
++      u8  val;
++};
++
++struct snr_table {
++      u32 val;
++      u8 snr;
++};
++
++/* QPSK SNR lookup table */
++static struct snr_table qpsk_snr_table[] = {
++      { 0x0b4771,  0 },
++      { 0x0c1aed,  1 },
++      { 0x0d0d27,  2 },
++      { 0x0e4d19,  3 },
++      { 0x0e5da8,  4 },
++      { 0x107097,  5 },
++      { 0x116975,  6 },
++      { 0x1252d9,  7 },
++      { 0x131fa4,  8 },
++      { 0x13d5e1,  9 },
++      { 0x148e53, 10 },
++      { 0x15358b, 11 },
++      { 0x15dd29, 12 },
++      { 0x168112, 13 },
++      { 0x170b61, 14 },
++      { 0xffffff, 15 },
++};
++
++/* QAM16 SNR lookup table */
++static struct snr_table qam16_snr_table[] = {
++      { 0x05eb62,  5 },
++      { 0x05fecf,  6 },
++      { 0x060b80,  7 },
++      { 0x062501,  8 },
++      { 0x064865,  9 },
++      { 0x069604, 10 },
++      { 0x06f356, 11 },
++      { 0x07706a, 12 },
++      { 0x0804d3, 13 },
++      { 0x089d1a, 14 },
++      { 0x093e3d, 15 },
++      { 0x09e35d, 16 },
++      { 0x0a7c3c, 17 },
++      { 0x0afaf8, 18 },
++      { 0x0b719d, 19 },
++      { 0xffffff, 20 },
++};
++
++/* QAM64 SNR lookup table */
++static struct snr_table qam64_snr_table[] = {
++      { 0x03109b, 12 },
++      { 0x0310d4, 13 },
++      { 0x031920, 14 },
++      { 0x0322d0, 15 },
++      { 0x0339fc, 16 },
++      { 0x0364a1, 17 },
++      { 0x038bcc, 18 },
++      { 0x03c7d3, 19 },
++      { 0x0408cc, 20 },
++      { 0x043bed, 21 },
++      { 0x048061, 22 },
++      { 0x04be95, 23 },
++      { 0x04fa7d, 24 },
++      { 0x052405, 25 },
++      { 0x05570d, 26 },
++      { 0xffffff, 27 },
++};
++
++static struct regdesc ofsm_init[] = {
++      { 0xd73a, 0, 8, 0xa1 },
++      { 0xd73b, 0, 8, 0x1f },
++      { 0xd73c, 4, 4, 0x0a },
++      { 0xd732, 3, 1, 0x00 },
++      { 0xd731, 4, 2, 0x03 },
++      { 0xd73d, 7, 1, 0x01 },
++      { 0xd740, 0, 1, 0x00 },
++      { 0xd740, 1, 1, 0x00 },
++      { 0xd740, 2, 1, 0x00 },
++      { 0xd740, 3, 1, 0x01 },
++      { 0xd3c1, 4, 1, 0x01 },
++      { 0xd3a2, 0, 8, 0x00 },
++      { 0xd3a3, 0, 8, 0x04 },
++      { 0xd305, 0, 8, 0x32 },
++      { 0xd306, 0, 8, 0x10 },
++      { 0xd304, 0, 8, 0x04 },
++      { 0x9112, 0, 1, 0x01 },
++      { 0x911d, 0, 1, 0x01 },
++      { 0x911a, 0, 1, 0x01 },
++      { 0x911b, 0, 1, 0x01 },
++      { 0x9bce, 0, 4, 0x02 },
++      { 0x9116, 0, 1, 0x01 },
++      { 0x9bd1, 0, 1, 0x01 },
++      { 0xd2e0, 0, 8, 0xd0 },
++      { 0xd2e9, 0, 4, 0x0d },
++      { 0xd38c, 0, 8, 0xfc },
++      { 0xd38d, 0, 8, 0x00 },
++      { 0xd38e, 0, 8, 0x7e },
++      { 0xd38f, 0, 8, 0x00 },
++      { 0xd390, 0, 8, 0x2f },
++      { 0xd145, 4, 1, 0x01 },
++      { 0xd1a9, 4, 1, 0x01 },
++      { 0xd158, 5, 3, 0x01 },
++      { 0xd159, 0, 6, 0x06 },
++      { 0xd167, 0, 8, 0x00 },
++      { 0xd168, 0, 4, 0x07 },
++      { 0xd1c3, 5, 3, 0x00 },
++      { 0xd1c4, 0, 6, 0x00 },
++      { 0xd1c5, 0, 7, 0x10 },
++      { 0xd1c6, 0, 3, 0x02 },
++      { 0xd080, 2, 5, 0x03 },
++      { 0xd081, 4, 4, 0x09 },
++      { 0xd098, 4, 4, 0x0f },
++      { 0xd098, 0, 4, 0x03 },
++      { 0xdbc0, 3, 1, 0x01 },
++      { 0xdbc0, 4, 1, 0x01 },
++      { 0xdbc7, 0, 8, 0x08 },
++      { 0xdbc8, 4, 4, 0x00 },
++      { 0xdbc9, 0, 5, 0x01 },
++      { 0xd280, 0, 8, 0xe0 },
++      { 0xd281, 0, 8, 0xff },
++      { 0xd282, 0, 8, 0xff },
++      { 0xd283, 0, 8, 0xc3 },
++      { 0xd284, 0, 8, 0xff },
++      { 0xd285, 0, 4, 0x01 },
++      { 0xd0f0, 0, 7, 0x1a },
++      { 0xd0f1, 4, 1, 0x01 },
++      { 0xd0f2, 0, 8, 0x0c },
++      { 0xd103, 0, 4, 0x08 },
++      { 0xd0f8, 0, 7, 0x20 },
++      { 0xd111, 5, 1, 0x00 },
++      { 0xd111, 6, 1, 0x00 },
++      { 0x910b, 0, 8, 0x0a },
++      { 0x9115, 0, 8, 0x02 },
++      { 0x910c, 0, 8, 0x02 },
++      { 0x910d, 0, 8, 0x08 },
++      { 0x910e, 0, 8, 0x0a },
++      { 0x9bf6, 0, 8, 0x06 },
++      { 0x9bf8, 0, 8, 0x02 },
++      { 0x9bf7, 0, 8, 0x05 },
++      { 0x9bf9, 0, 8, 0x0f },
++      { 0x9bfc, 0, 8, 0x13 },
++      { 0x9bd3, 0, 8, 0xff },
++      { 0x9bbe, 0, 1, 0x01 },
++      { 0x9bcc, 0, 1, 0x01 },
++};
++
++/* Panasonic ENV77H11D5 tuner init
++   AF9013_TUNER_ENV77H11D5 = 129 */
++static struct regdesc tuner_init_env77h11d5[] = {
++      { 0x9bd5, 0, 8, 0x01 },
++      { 0x9bd6, 0, 8, 0x03 },
++      { 0x9bbe, 0, 8, 0x01 },
++      { 0xd1a0, 1, 1, 0x01 },
++      { 0xd000, 0, 1, 0x01 },
++      { 0xd000, 1, 1, 0x00 },
++      { 0xd001, 1, 1, 0x01 },
++      { 0xd001, 0, 1, 0x00 },
++      { 0xd001, 5, 1, 0x00 },
++      { 0xd002, 0, 5, 0x19 },
++      { 0xd003, 0, 5, 0x1a },
++      { 0xd004, 0, 5, 0x19 },
++      { 0xd005, 0, 5, 0x1a },
++      { 0xd00e, 0, 5, 0x10 },
++      { 0xd00f, 0, 3, 0x04 },
++      { 0xd00f, 3, 3, 0x05 },
++      { 0xd010, 0, 3, 0x04 },
++      { 0xd010, 3, 3, 0x05 },
++      { 0xd016, 4, 4, 0x03 },
++      { 0xd01f, 0, 6, 0x0a },
++      { 0xd020, 0, 6, 0x0a },
++      { 0x9bda, 0, 8, 0x00 },
++      { 0x9be3, 0, 8, 0x00 },
++      { 0xd015, 0, 8, 0x50 },
++      { 0xd016, 0, 1, 0x00 },
++      { 0xd044, 0, 8, 0x46 },
++      { 0xd045, 0, 1, 0x00 },
++      { 0xd008, 0, 8, 0xdf },
++      { 0xd009, 0, 2, 0x02 },
++      { 0xd006, 0, 8, 0x44 },
++      { 0xd007, 0, 2, 0x01 },
++      { 0xd00c, 0, 8, 0xeb },
++      { 0xd00d, 0, 2, 0x02 },
++      { 0xd00a, 0, 8, 0xf4 },
++      { 0xd00b, 0, 2, 0x01 },
++      { 0x9bba, 0, 8, 0xf9 },
++      { 0x9bc3, 0, 8, 0xdf },
++      { 0x9bc4, 0, 8, 0x02 },
++      { 0x9bc5, 0, 8, 0xeb },
++      { 0x9bc6, 0, 8, 0x02 },
++      { 0x9bc9, 0, 8, 0x52 },
++      { 0xd011, 0, 8, 0x3c },
++      { 0xd012, 0, 2, 0x01 },
++      { 0xd013, 0, 8, 0xf7 },
++      { 0xd014, 0, 2, 0x02 },
++      { 0xd040, 0, 8, 0x0b },
++      { 0xd041, 0, 2, 0x02 },
++      { 0xd042, 0, 8, 0x4d },
++      { 0xd043, 0, 2, 0x00 },
++      { 0xd045, 1, 1, 0x00 },
++      { 0x9bcf, 0, 1, 0x01 },
++      { 0xd045, 2, 1, 0x01 },
++      { 0xd04f, 0, 8, 0x9a },
++      { 0xd050, 0, 1, 0x01 },
++      { 0xd051, 0, 8, 0x5a },
++      { 0xd052, 0, 1, 0x01 },
++      { 0xd053, 0, 8, 0x50 },
++      { 0xd054, 0, 8, 0x46 },
++      { 0x9bd7, 0, 8, 0x0a },
++      { 0x9bd8, 0, 8, 0x14 },
++      { 0x9bd9, 0, 8, 0x08 },
++};
++
++/* Microtune MT2060 tuner init
++   AF9013_TUNER_MT2060     = 130 */
++static struct regdesc tuner_init_mt2060[] = {
++      { 0x9bd5, 0, 8, 0x01 },
++      { 0x9bd6, 0, 8, 0x07 },
++      { 0xd1a0, 1, 1, 0x01 },
++      { 0xd000, 0, 1, 0x01 },
++      { 0xd000, 1, 1, 0x00 },
++      { 0xd001, 1, 1, 0x01 },
++      { 0xd001, 0, 1, 0x00 },
++      { 0xd001, 5, 1, 0x00 },
++      { 0xd002, 0, 5, 0x19 },
++      { 0xd003, 0, 5, 0x1a },
++      { 0xd004, 0, 5, 0x19 },
++      { 0xd005, 0, 5, 0x1a },
++      { 0xd00e, 0, 5, 0x10 },
++      { 0xd00f, 0, 3, 0x04 },
++      { 0xd00f, 3, 3, 0x05 },
++      { 0xd010, 0, 3, 0x04 },
++      { 0xd010, 3, 3, 0x05 },
++      { 0xd016, 4, 4, 0x03 },
++      { 0xd01f, 0, 6, 0x0a },
++      { 0xd020, 0, 6, 0x0a },
++      { 0x9bda, 0, 8, 0x00 },
++      { 0x9be3, 0, 8, 0x00 },
++      { 0x9bbe, 0, 1, 0x00 },
++      { 0x9bcc, 0, 1, 0x00 },
++      { 0x9bb9, 0, 8, 0x75 },
++      { 0x9bcd, 0, 8, 0x24 },
++      { 0x9bff, 0, 8, 0x30 },
++      { 0xd015, 0, 8, 0x46 },
++      { 0xd016, 0, 1, 0x00 },
++      { 0xd044, 0, 8, 0x46 },
++      { 0xd045, 0, 1, 0x00 },
++      { 0xd008, 0, 8, 0x0f },
++      { 0xd009, 0, 2, 0x02 },
++      { 0xd006, 0, 8, 0x32 },
++      { 0xd007, 0, 2, 0x01 },
++      { 0xd00c, 0, 8, 0x36 },
++      { 0xd00d, 0, 2, 0x03 },
++      { 0xd00a, 0, 8, 0x35 },
++      { 0xd00b, 0, 2, 0x01 },
++      { 0x9bc7, 0, 8, 0x07 },
++      { 0x9bc8, 0, 8, 0x90 },
++      { 0x9bc3, 0, 8, 0x0f },
++      { 0x9bc4, 0, 8, 0x02 },
++      { 0x9bc5, 0, 8, 0x36 },
++      { 0x9bc6, 0, 8, 0x03 },
++      { 0x9bba, 0, 8, 0xc9 },
++      { 0x9bc9, 0, 8, 0x79 },
++      { 0xd011, 0, 8, 0x10 },
++      { 0xd012, 0, 2, 0x01 },
++      { 0xd013, 0, 8, 0x45 },
++      { 0xd014, 0, 2, 0x03 },
++      { 0xd040, 0, 8, 0x98 },
++      { 0xd041, 0, 2, 0x00 },
++      { 0xd042, 0, 8, 0xcf },
++      { 0xd043, 0, 2, 0x03 },
++      { 0xd045, 1, 1, 0x00 },
++      { 0x9bcf, 0, 1, 0x01 },
++      { 0xd045, 2, 1, 0x01 },
++      { 0xd04f, 0, 8, 0x9a },
++      { 0xd050, 0, 1, 0x01 },
++      { 0xd051, 0, 8, 0x5a },
++      { 0xd052, 0, 1, 0x01 },
++      { 0xd053, 0, 8, 0x50 },
++      { 0xd054, 0, 8, 0x46 },
++      { 0x9bd7, 0, 8, 0x0a },
++      { 0x9bd8, 0, 8, 0x14 },
++      { 0x9bd9, 0, 8, 0x08 },
++      { 0x9bd0, 0, 8, 0xcc },
++      { 0x9be4, 0, 8, 0xa0 },
++      { 0x9bbd, 0, 8, 0x8e },
++      { 0x9be2, 0, 8, 0x4d },
++      { 0x9bee, 0, 1, 0x01 },
++};
++
++/* Microtune MT2060 tuner init
++   AF9013_TUNER_MT2060_2   = 147 */
++static struct regdesc tuner_init_mt2060_2[] = {
++      { 0x9bd5, 0, 8, 0x01 },
++      { 0x9bd6, 0, 8, 0x06 },
++      { 0x9bbe, 0, 8, 0x01 },
++      { 0xd1a0, 1, 1, 0x01 },
++      { 0xd000, 0, 1, 0x01 },
++      { 0xd000, 1, 1, 0x00 },
++      { 0xd001, 1, 1, 0x01 },
++      { 0xd001, 0, 1, 0x00 },
++      { 0xd001, 5, 1, 0x00 },
++      { 0xd002, 0, 5, 0x19 },
++      { 0xd003, 0, 5, 0x1a },
++      { 0xd004, 0, 5, 0x19 },
++      { 0xd005, 0, 5, 0x1a },
++      { 0xd00e, 0, 5, 0x10 },
++      { 0xd00f, 0, 3, 0x04 },
++      { 0xd00f, 3, 3, 0x05 },
++      { 0xd010, 0, 3, 0x04 },
++      { 0xd010, 3, 3, 0x05 },
++      { 0xd016, 4, 4, 0x03 },
++      { 0xd01f, 0, 6, 0x0a },
++      { 0xd020, 0, 6, 0x0a },
++      { 0xd015, 0, 8, 0x46 },
++      { 0xd016, 0, 1, 0x00 },
++      { 0xd044, 0, 8, 0x46 },
++      { 0xd045, 0, 1, 0x00 },
++      { 0xd008, 0, 8, 0x0f },
++      { 0xd009, 0, 2, 0x02 },
++      { 0xd006, 0, 8, 0x32 },
++      { 0xd007, 0, 2, 0x01 },
++      { 0xd00c, 0, 8, 0x36 },
++      { 0xd00d, 0, 2, 0x03 },
++      { 0xd00a, 0, 8, 0x35 },
++      { 0xd00b, 0, 2, 0x01 },
++      { 0x9bc7, 0, 8, 0x07 },
++      { 0x9bc8, 0, 8, 0x90 },
++      { 0x9bc3, 0, 8, 0x0f },
++      { 0x9bc4, 0, 8, 0x02 },
++      { 0x9bc5, 0, 8, 0x36 },
++      { 0x9bc6, 0, 8, 0x03 },
++      { 0x9bba, 0, 8, 0xc9 },
++      { 0x9bc9, 0, 8, 0x79 },
++      { 0xd011, 0, 8, 0x10 },
++      { 0xd012, 0, 2, 0x01 },
++      { 0xd013, 0, 8, 0x45 },
++      { 0xd014, 0, 2, 0x03 },
++      { 0xd040, 0, 8, 0x98 },
++      { 0xd041, 0, 2, 0x00 },
++      { 0xd042, 0, 8, 0xcf },
++      { 0xd043, 0, 2, 0x03 },
++      { 0xd045, 1, 1, 0x00 },
++      { 0x9bcf, 0, 8, 0x01 },
++      { 0xd045, 2, 1, 0x01 },
++      { 0xd04f, 0, 8, 0x9a },
++      { 0xd050, 0, 1, 0x01 },
++      { 0xd051, 0, 8, 0x5a },
++      { 0xd052, 0, 1, 0x01 },
++      { 0xd053, 0, 8, 0x96 },
++      { 0xd054, 0, 8, 0x46 },
++      { 0xd045, 7, 1, 0x00 },
++      { 0x9bd7, 0, 8, 0x0a },
++      { 0x9bd8, 0, 8, 0x14 },
++      { 0x9bd9, 0, 8, 0x08 },
++};
++
++/* MaxLinear MXL5003 tuner init
++   AF9013_TUNER_MXL5003D   =   3 */
++static struct regdesc tuner_init_mxl5003d[] = {
++      { 0x9bd5, 0, 8, 0x01 },
++      { 0x9bd6, 0, 8, 0x09 },
++      { 0xd1a0, 1, 1, 0x01 },
++      { 0xd000, 0, 1, 0x01 },
++      { 0xd000, 1, 1, 0x00 },
++      { 0xd001, 1, 1, 0x01 },
++      { 0xd001, 0, 1, 0x00 },
++      { 0xd001, 5, 1, 0x00 },
++      { 0xd002, 0, 5, 0x19 },
++      { 0xd003, 0, 5, 0x1a },
++      { 0xd004, 0, 5, 0x19 },
++      { 0xd005, 0, 5, 0x1a },
++      { 0xd00e, 0, 5, 0x10 },
++      { 0xd00f, 0, 3, 0x04 },
++      { 0xd00f, 3, 3, 0x05 },
++      { 0xd010, 0, 3, 0x04 },
++      { 0xd010, 3, 3, 0x05 },
++      { 0xd016, 4, 4, 0x03 },
++      { 0xd01f, 0, 6, 0x0a },
++      { 0xd020, 0, 6, 0x0a },
++      { 0x9bda, 0, 8, 0x00 },
++      { 0x9be3, 0, 8, 0x00 },
++      { 0x9bfc, 0, 8, 0x0f },
++      { 0x9bf6, 0, 8, 0x01 },
++      { 0x9bbe, 0, 1, 0x01 },
++      { 0xd015, 0, 8, 0x33 },
++      { 0xd016, 0, 1, 0x00 },
++      { 0xd044, 0, 8, 0x40 },
++      { 0xd045, 0, 1, 0x00 },
++      { 0xd008, 0, 8, 0x0f },
++      { 0xd009, 0, 2, 0x02 },
++      { 0xd006, 0, 8, 0x6c },
++      { 0xd007, 0, 2, 0x00 },
++      { 0xd00c, 0, 8, 0x3d },
++      { 0xd00d, 0, 2, 0x00 },
++      { 0xd00a, 0, 8, 0x45 },
++      { 0xd00b, 0, 2, 0x01 },
++      { 0x9bc7, 0, 8, 0x07 },
++      { 0x9bc8, 0, 8, 0x52 },
++      { 0x9bc3, 0, 8, 0x0f },
++      { 0x9bc4, 0, 8, 0x02 },
++      { 0x9bc5, 0, 8, 0x3d },
++      { 0x9bc6, 0, 8, 0x00 },
++      { 0x9bba, 0, 8, 0xa2 },
++      { 0x9bc9, 0, 8, 0xa0 },
++      { 0xd011, 0, 8, 0x56 },
++      { 0xd012, 0, 2, 0x00 },
++      { 0xd013, 0, 8, 0x50 },
++      { 0xd014, 0, 2, 0x00 },
++      { 0xd040, 0, 8, 0x56 },
++      { 0xd041, 0, 2, 0x00 },
++      { 0xd042, 0, 8, 0x50 },
++      { 0xd043, 0, 2, 0x00 },
++      { 0xd045, 1, 1, 0x00 },
++      { 0x9bcf, 0, 8, 0x01 },
++      { 0xd045, 2, 1, 0x01 },
++      { 0xd04f, 0, 8, 0x9a },
++      { 0xd050, 0, 1, 0x01 },
++      { 0xd051, 0, 8, 0x5a },
++      { 0xd052, 0, 1, 0x01 },
++      { 0xd053, 0, 8, 0x50 },
++      { 0xd054, 0, 8, 0x46 },
++      { 0x9bd7, 0, 8, 0x0a },
++      { 0x9bd8, 0, 8, 0x14 },
++      { 0x9bd9, 0, 8, 0x08 },
++};
++
++/* MaxLinear MXL5005 tuner init
++   AF9013_TUNER_MXL5005D   =  13
++   AF9013_TUNER_MXL5005R   =  30 */
++static struct regdesc tuner_init_mxl5005[] = {
++      { 0x9bd5, 0, 8, 0x01 },
++      { 0x9bd6, 0, 8, 0x07 },
++      { 0xd1a0, 1, 1, 0x01 },
++      { 0xd000, 0, 1, 0x01 },
++      { 0xd000, 1, 1, 0x00 },
++      { 0xd001, 1, 1, 0x01 },
++      { 0xd001, 0, 1, 0x00 },
++      { 0xd001, 5, 1, 0x00 },
++      { 0xd002, 0, 5, 0x19 },
++      { 0xd003, 0, 5, 0x1a },
++      { 0xd004, 0, 5, 0x19 },
++      { 0xd005, 0, 5, 0x1a },
++      { 0xd00e, 0, 5, 0x10 },
++      { 0xd00f, 0, 3, 0x04 },
++      { 0xd00f, 3, 3, 0x05 },
++      { 0xd010, 0, 3, 0x04 },
++      { 0xd010, 3, 3, 0x05 },
++      { 0xd016, 4, 4, 0x03 },
++      { 0xd01f, 0, 6, 0x0a },
++      { 0xd020, 0, 6, 0x0a },
++      { 0x9bda, 0, 8, 0x01 },
++      { 0x9be3, 0, 8, 0x01 },
++      { 0x9bbe, 0, 1, 0x01 },
++      { 0x9bcc, 0, 1, 0x01 },
++      { 0x9bb9, 0, 8, 0x00 },
++      { 0x9bcd, 0, 8, 0x28 },
++      { 0x9bff, 0, 8, 0x24 },
++      { 0xd015, 0, 8, 0x40 },
++      { 0xd016, 0, 1, 0x00 },
++      { 0xd044, 0, 8, 0x40 },
++      { 0xd045, 0, 1, 0x00 },
++      { 0xd008, 0, 8, 0x0f },
++      { 0xd009, 0, 2, 0x02 },
++      { 0xd006, 0, 8, 0x73 },
++      { 0xd007, 0, 2, 0x01 },
++      { 0xd00c, 0, 8, 0xfa },
++      { 0xd00d, 0, 2, 0x01 },
++      { 0xd00a, 0, 8, 0xff },
++      { 0xd00b, 0, 2, 0x01 },
++      { 0x9bc7, 0, 8, 0x23 },
++      { 0x9bc8, 0, 8, 0x55 },
++      { 0x9bc3, 0, 8, 0x01 },
++      { 0x9bc4, 0, 8, 0x02 },
++      { 0x9bc5, 0, 8, 0xfa },
++      { 0x9bc6, 0, 8, 0x01 },
++      { 0x9bba, 0, 8, 0xff },
++      { 0x9bc9, 0, 8, 0xff },
++      { 0x9bd3, 0, 8, 0x95 },
++      { 0xd011, 0, 8, 0x70 },
++      { 0xd012, 0, 2, 0x01 },
++      { 0xd013, 0, 8, 0xfb },
++      { 0xd014, 0, 2, 0x01 },
++      { 0xd040, 0, 8, 0x70 },
++      { 0xd041, 0, 2, 0x01 },
++      { 0xd042, 0, 8, 0xfb },
++      { 0xd043, 0, 2, 0x01 },
++      { 0xd045, 1, 1, 0x00 },
++      { 0x9bcf, 0, 1, 0x01 },
++      { 0xd045, 2, 1, 0x01 },
++      { 0xd04f, 0, 8, 0x9a },
++      { 0xd050, 0, 1, 0x01 },
++      { 0xd051, 0, 8, 0x5a },
++      { 0xd052, 0, 1, 0x01 },
++      { 0xd053, 0, 8, 0x50 },
++      { 0xd054, 0, 8, 0x46 },
++      { 0x9bd7, 0, 8, 0x0a },
++      { 0x9bd8, 0, 8, 0x14 },
++      { 0x9bd9, 0, 8, 0x08 },
++      { 0x9bd0, 0, 8, 0x93 },
++      { 0x9be4, 0, 8, 0xfe },
++      { 0x9bbd, 0, 8, 0x63 },
++      { 0x9be2, 0, 8, 0xfe },
++      { 0x9bee, 0, 1, 0x01 },
++};
++
++/* Quantek QT1010 tuner init
++   AF9013_TUNER_QT1010     = 134
++   AF9013_TUNER_QT1010A    = 162 */
++static struct regdesc tuner_init_qt1010[] = {
++      { 0x9bd5, 0, 8, 0x01 },
++      { 0x9bd6, 0, 8, 0x09 },
++      { 0xd1a0, 1, 1, 0x01 },
++      { 0xd000, 0, 1, 0x01 },
++      { 0xd000, 1, 1, 0x00 },
++      { 0xd001, 1, 1, 0x01 },
++      { 0xd001, 0, 1, 0x00 },
++      { 0xd001, 5, 1, 0x00 },
++      { 0xd002, 0, 5, 0x19 },
++      { 0xd003, 0, 5, 0x1a },
++      { 0xd004, 0, 5, 0x19 },
++      { 0xd005, 0, 5, 0x1a },
++      { 0xd00e, 0, 5, 0x10 },
++      { 0xd00f, 0, 3, 0x04 },
++      { 0xd00f, 3, 3, 0x05 },
++      { 0xd010, 0, 3, 0x04 },
++      { 0xd010, 3, 3, 0x05 },
++      { 0xd016, 4, 4, 0x03 },
++      { 0xd01f, 0, 6, 0x0a },
++      { 0xd020, 0, 6, 0x0a },
++      { 0x9bda, 0, 8, 0x01 },
++      { 0x9be3, 0, 8, 0x01 },
++      { 0xd015, 0, 8, 0x46 },
++      { 0xd016, 0, 1, 0x00 },
++      { 0xd044, 0, 8, 0x46 },
++      { 0xd045, 0, 1, 0x00 },
++      { 0x9bbe, 0, 1, 0x01 },
++      { 0x9bcc, 0, 1, 0x01 },
++      { 0x9bb9, 0, 8, 0x00 },
++      { 0x9bcd, 0, 8, 0x28 },
++      { 0x9bff, 0, 8, 0x20 },
++      { 0xd008, 0, 8, 0x0f },
++      { 0xd009, 0, 2, 0x02 },
++      { 0xd006, 0, 8, 0x99 },
++      { 0xd007, 0, 2, 0x01 },
++      { 0xd00c, 0, 8, 0x0f },
++      { 0xd00d, 0, 2, 0x02 },
++      { 0xd00a, 0, 8, 0x50 },
++      { 0xd00b, 0, 2, 0x01 },
++      { 0x9bc7, 0, 8, 0x00 },
++      { 0x9bc8, 0, 8, 0x00 },
++      { 0x9bc3, 0, 8, 0x0f },
++      { 0x9bc4, 0, 8, 0x02 },
++      { 0x9bc5, 0, 8, 0x0f },
++      { 0x9bc6, 0, 8, 0x02 },
++      { 0x9bba, 0, 8, 0xc5 },
++      { 0x9bc9, 0, 8, 0xff },
++      { 0xd011, 0, 8, 0x58 },
++      { 0xd012, 0, 2, 0x02 },
++      { 0xd013, 0, 8, 0x89 },
++      { 0xd014, 0, 2, 0x01 },
++      { 0xd040, 0, 8, 0x58 },
++      { 0xd041, 0, 2, 0x02 },
++      { 0xd042, 0, 8, 0x89 },
++      { 0xd043, 0, 2, 0x01 },
++      { 0xd045, 1, 1, 0x00 },
++      { 0x9bcf, 0, 1, 0x01 },
++      { 0xd045, 2, 1, 0x01 },
++      { 0xd04f, 0, 8, 0x9a },
++      { 0xd050, 0, 1, 0x01 },
++      { 0xd051, 0, 8, 0x5a },
++      { 0xd052, 0, 1, 0x01 },
++      { 0xd053, 0, 8, 0x50 },
++      { 0xd054, 0, 8, 0x46 },
++      { 0x9bd7, 0, 8, 0x0a },
++      { 0x9bd8, 0, 8, 0x14 },
++      { 0x9bd9, 0, 8, 0x08 },
++      { 0x9bd0, 0, 8, 0xcd },
++      { 0x9be4, 0, 8, 0xbb },
++      { 0x9bbd, 0, 8, 0x93 },
++      { 0x9be2, 0, 8, 0x80 },
++      { 0x9bee, 0, 1, 0x01 },
++};
++
++/* Freescale MC44S803 tuner init
++   AF9013_TUNER_MC44S803   = 133 */
++static struct regdesc tuner_init_mc44s803[] = {
++      { 0x9bd5, 0, 8, 0x01 },
++      { 0x9bd6, 0, 8, 0x06 },
++      { 0xd1a0, 1, 1, 0x01 },
++      { 0xd000, 0, 1, 0x01 },
++      { 0xd000, 1, 1, 0x00 },
++      { 0xd001, 1, 1, 0x01 },
++      { 0xd001, 0, 1, 0x00 },
++      { 0xd001, 5, 1, 0x00 },
++      { 0xd002, 0, 5, 0x19 },
++      { 0xd003, 0, 5, 0x1a },
++      { 0xd004, 0, 5, 0x19 },
++      { 0xd005, 0, 5, 0x1a },
++      { 0xd00e, 0, 5, 0x10 },
++      { 0xd00f, 0, 3, 0x04 },
++      { 0xd00f, 3, 3, 0x05 },
++      { 0xd010, 0, 3, 0x04 },
++      { 0xd010, 3, 3, 0x05 },
++      { 0xd016, 4, 4, 0x03 },
++      { 0xd01f, 0, 6, 0x0a },
++      { 0xd020, 0, 6, 0x0a },
++      { 0x9bda, 0, 8, 0x00 },
++      { 0x9be3, 0, 8, 0x00 },
++      { 0x9bf6, 0, 8, 0x01 },
++      { 0x9bf8, 0, 8, 0x02 },
++      { 0x9bf9, 0, 8, 0x02 },
++      { 0x9bfc, 0, 8, 0x1f },
++      { 0x9bbe, 0, 1, 0x01 },
++      { 0x9bcc, 0, 1, 0x01 },
++      { 0x9bb9, 0, 8, 0x00 },
++      { 0x9bcd, 0, 8, 0x24 },
++      { 0x9bff, 0, 8, 0x24 },
++      { 0xd015, 0, 8, 0x46 },
++      { 0xd016, 0, 1, 0x00 },
++      { 0xd044, 0, 8, 0x46 },
++      { 0xd045, 0, 1, 0x00 },
++      { 0xd008, 0, 8, 0x01 },
++      { 0xd009, 0, 2, 0x02 },
++      { 0xd006, 0, 8, 0x7b },
++      { 0xd007, 0, 2, 0x00 },
++      { 0xd00c, 0, 8, 0x7c },
++      { 0xd00d, 0, 2, 0x02 },
++      { 0xd00a, 0, 8, 0xfe },
++      { 0xd00b, 0, 2, 0x01 },
++      { 0x9bc7, 0, 8, 0x08 },
++      { 0x9bc8, 0, 8, 0x9a },
++      { 0x9bc3, 0, 8, 0x01 },
++      { 0x9bc4, 0, 8, 0x02 },
++      { 0x9bc5, 0, 8, 0x7c },
++      { 0x9bc6, 0, 8, 0x02 },
++      { 0x9bba, 0, 8, 0xfc },
++      { 0x9bc9, 0, 8, 0xaa },
++      { 0xd011, 0, 8, 0x6b },
++      { 0xd012, 0, 2, 0x00 },
++      { 0xd013, 0, 8, 0x88 },
++      { 0xd014, 0, 2, 0x02 },
++      { 0xd040, 0, 8, 0x6b },
++      { 0xd041, 0, 2, 0x00 },
++      { 0xd042, 0, 8, 0x7c },
++      { 0xd043, 0, 2, 0x02 },
++      { 0xd045, 1, 1, 0x00 },
++      { 0x9bcf, 0, 1, 0x01 },
++      { 0xd045, 2, 1, 0x01 },
++      { 0xd04f, 0, 8, 0x9a },
++      { 0xd050, 0, 1, 0x01 },
++      { 0xd051, 0, 8, 0x5a },
++      { 0xd052, 0, 1, 0x01 },
++      { 0xd053, 0, 8, 0x50 },
++      { 0xd054, 0, 8, 0x46 },
++      { 0x9bd7, 0, 8, 0x0a },
++      { 0x9bd8, 0, 8, 0x14 },
++      { 0x9bd9, 0, 8, 0x08 },
++      { 0x9bd0, 0, 8, 0x9e },
++      { 0x9be4, 0, 8, 0xff },
++      { 0x9bbd, 0, 8, 0x9e },
++      { 0x9be2, 0, 8, 0x25 },
++      { 0x9bee, 0, 1, 0x01 },
++      { 0xd73b, 3, 1, 0x00 },
++};
++
++/* unknown, probably for tin can tuner, tuner init
++   AF9013_TUNER_UNKNOWN   = 140 */
++static struct regdesc tuner_init_unknown[] = {
++      { 0x9bd5, 0, 8, 0x01 },
++      { 0x9bd6, 0, 8, 0x02 },
++      { 0xd1a0, 1, 1, 0x01 },
++      { 0xd000, 0, 1, 0x01 },
++      { 0xd000, 1, 1, 0x00 },
++      { 0xd001, 1, 1, 0x01 },
++      { 0xd001, 0, 1, 0x00 },
++      { 0xd001, 5, 1, 0x00 },
++      { 0xd002, 0, 5, 0x19 },
++      { 0xd003, 0, 5, 0x1a },
++      { 0xd004, 0, 5, 0x19 },
++      { 0xd005, 0, 5, 0x1a },
++      { 0xd00e, 0, 5, 0x10 },
++      { 0xd00f, 0, 3, 0x04 },
++      { 0xd00f, 3, 3, 0x05 },
++      { 0xd010, 0, 3, 0x04 },
++      { 0xd010, 3, 3, 0x05 },
++      { 0xd016, 4, 4, 0x03 },
++      { 0xd01f, 0, 6, 0x0a },
++      { 0xd020, 0, 6, 0x0a },
++      { 0x9bda, 0, 8, 0x01 },
++      { 0x9be3, 0, 8, 0x01 },
++      { 0xd1a0, 1, 1, 0x00 },
++      { 0x9bbe, 0, 1, 0x01 },
++      { 0x9bcc, 0, 1, 0x01 },
++      { 0x9bb9, 0, 8, 0x00 },
++      { 0x9bcd, 0, 8, 0x18 },
++      { 0x9bff, 0, 8, 0x2c },
++      { 0xd015, 0, 8, 0x46 },
++      { 0xd016, 0, 1, 0x00 },
++      { 0xd044, 0, 8, 0x46 },
++      { 0xd045, 0, 1, 0x00 },
++      { 0xd008, 0, 8, 0xdf },
++      { 0xd009, 0, 2, 0x02 },
++      { 0xd006, 0, 8, 0x44 },
++      { 0xd007, 0, 2, 0x01 },
++      { 0xd00c, 0, 8, 0x00 },
++      { 0xd00d, 0, 2, 0x02 },
++      { 0xd00a, 0, 8, 0xf6 },
++      { 0xd00b, 0, 2, 0x01 },
++      { 0x9bba, 0, 8, 0xf9 },
++      { 0x9bc8, 0, 8, 0xaa },
++      { 0x9bc3, 0, 8, 0xdf },
++      { 0x9bc4, 0, 8, 0x02 },
++      { 0x9bc5, 0, 8, 0x00 },
++      { 0x9bc6, 0, 8, 0x02 },
++      { 0x9bc9, 0, 8, 0xf0 },
++      { 0xd011, 0, 8, 0x3c },
++      { 0xd012, 0, 2, 0x01 },
++      { 0xd013, 0, 8, 0xf7 },
++      { 0xd014, 0, 2, 0x02 },
++      { 0xd040, 0, 8, 0x0b },
++      { 0xd041, 0, 2, 0x02 },
++      { 0xd042, 0, 8, 0x4d },
++      { 0xd043, 0, 2, 0x00 },
++      { 0xd045, 1, 1, 0x00 },
++      { 0x9bcf, 0, 1, 0x01 },
++      { 0xd045, 2, 1, 0x01 },
++      { 0xd04f, 0, 8, 0x9a },
++      { 0xd050, 0, 1, 0x01 },
++      { 0xd051, 0, 8, 0x5a },
++      { 0xd052, 0, 1, 0x01 },
++      { 0xd053, 0, 8, 0x50 },
++      { 0xd054, 0, 8, 0x46 },
++      { 0x9bd7, 0, 8, 0x0a },
++      { 0x9bd8, 0, 8, 0x14 },
++      { 0x9bd9, 0, 8, 0x08 },
++};
++
++/* NXP TDA18271 tuner init
++   AF9013_TUNER_TDA18271   = 156 */
++static struct regdesc tuner_init_tda18271[] = {
++      { 0x9bd5, 0, 8, 0x01 },
++      { 0x9bd6, 0, 8, 0x04 },
++      { 0xd1a0, 1, 1, 0x01 },
++      { 0xd000, 0, 1, 0x01 },
++      { 0xd000, 1, 1, 0x00 },
++      { 0xd001, 1, 1, 0x01 },
++      { 0xd001, 0, 1, 0x00 },
++      { 0xd001, 5, 1, 0x00 },
++      { 0xd002, 0, 5, 0x19 },
++      { 0xd003, 0, 5, 0x1a },
++      { 0xd004, 0, 5, 0x19 },
++      { 0xd005, 0, 5, 0x1a },
++      { 0xd00e, 0, 5, 0x10 },
++      { 0xd00f, 0, 3, 0x04 },
++      { 0xd00f, 3, 3, 0x05 },
++      { 0xd010, 0, 3, 0x04 },
++      { 0xd010, 3, 3, 0x05 },
++      { 0xd016, 4, 4, 0x03 },
++      { 0xd01f, 0, 6, 0x0a },
++      { 0xd020, 0, 6, 0x0a },
++      { 0x9bda, 0, 8, 0x01 },
++      { 0x9be3, 0, 8, 0x01 },
++      { 0xd1a0, 1, 1, 0x00 },
++      { 0x9bbe, 0, 1, 0x01 },
++      { 0x9bcc, 0, 1, 0x01 },
++      { 0x9bb9, 0, 8, 0x00 },
++      { 0x9bcd, 0, 8, 0x18 },
++      { 0x9bff, 0, 8, 0x2c },
++      { 0xd015, 0, 8, 0x46 },
++      { 0xd016, 0, 1, 0x00 },
++      { 0xd044, 0, 8, 0x46 },
++      { 0xd045, 0, 1, 0x00 },
++      { 0xd008, 0, 8, 0xdf },
++      { 0xd009, 0, 2, 0x02 },
++      { 0xd006, 0, 8, 0x44 },
++      { 0xd007, 0, 2, 0x01 },
++      { 0xd00c, 0, 8, 0x00 },
++      { 0xd00d, 0, 2, 0x02 },
++      { 0xd00a, 0, 8, 0xf6 },
++      { 0xd00b, 0, 2, 0x01 },
++      { 0x9bba, 0, 8, 0xf9 },
++      { 0x9bc8, 0, 8, 0xaa },
++      { 0x9bc3, 0, 8, 0xdf },
++      { 0x9bc4, 0, 8, 0x02 },
++      { 0x9bc5, 0, 8, 0x00 },
++      { 0x9bc6, 0, 8, 0x02 },
++      { 0x9bc9, 0, 8, 0xf0 },
++      { 0xd011, 0, 8, 0x3c },
++      { 0xd012, 0, 2, 0x01 },
++      { 0xd013, 0, 8, 0xf7 },
++      { 0xd014, 0, 2, 0x02 },
++      { 0xd040, 0, 8, 0x0b },
++      { 0xd041, 0, 2, 0x02 },
++      { 0xd042, 0, 8, 0x4d },
++      { 0xd043, 0, 2, 0x00 },
++      { 0xd045, 1, 1, 0x00 },
++      { 0x9bcf, 0, 1, 0x01 },
++      { 0xd045, 2, 1, 0x01 },
++      { 0xd04f, 0, 8, 0x9a },
++      { 0xd050, 0, 1, 0x01 },
++      { 0xd051, 0, 8, 0x5a },
++      { 0xd052, 0, 1, 0x01 },
++      { 0xd053, 0, 8, 0x50 },
++      { 0xd054, 0, 8, 0x46 },
++      { 0x9bd7, 0, 8, 0x0a },
++      { 0x9bd8, 0, 8, 0x14 },
++      { 0x9bd9, 0, 8, 0x08 },
++      { 0x9bd0, 0, 8, 0xa8 },
++      { 0x9be4, 0, 8, 0x7f },
++      { 0x9bbd, 0, 8, 0xa8 },
++      { 0x9be2, 0, 8, 0x20 },
++      { 0x9bee, 0, 1, 0x01 },
++};
++
++#endif /* _AF9013_PRIV_ */
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/at76c651.h linux-2.6.18/drivers/media/dvb/frontends/at76c651.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/at76c651.h   1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/at76c651.h        2010-09-09 12:38:50.000000000 +0000
+@@ -0,0 +1,52 @@
++/*
++ * at76c651.c
++ *
++ * Atmel DVB-C Frontend Driver (at76c651)
++ *
++ * Copyright (C) 2001 fnbrd <fnbrd@gmx.de>
++ *             & 2002-2004 Andreas Oberritter <obi@linuxtv.org>
++ *             & 2003 Wolfram Joost <dbox2@frokaschwei.de>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++ *
++ * AT76C651
++ * http://www.nalanda.nitc.ac.in/industry/datasheets/atmel/acrobat/doc1293.pdf
++ * http://www.atmel.com/atmel/acrobat/doc1320.pdf
++ */
++
++#ifndef AT76C651_H
++#define AT76C651_H
++
++#include <linux/dvb/frontend.h>
++
++struct at76c651_config
++{
++      /* the demodulator's i2c address */
++      u8 demod_address;
++};
++
++#if defined(CONFIG_DVB_AT76C651) || (defined(CONFIG_DVB_AT76C651_MODULE) && defined(MODULE))
++extern struct dvb_frontend* at76c651_attach(const struct at76c651_config* config,
++                                          struct i2c_adapter* i2c);
++#else
++static inline struct dvb_frontend* at76c651_attach(const struct at76c651_config* config,
++                                                 struct i2c_adapter* i2c)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __FUNCTION__);
++      return NULL;
++}
++#endif // CONFIG_DVB_AT76C651
++
++#endif // AT76C651_H
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/atbm8830.h linux-2.6.18/drivers/media/dvb/frontends/atbm8830.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/atbm8830.h   1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/atbm8830.h        2010-09-09 12:38:50.000000000 +0000
+@@ -0,0 +1,76 @@
++/*
++ *    Support for AltoBeam GB20600 (a.k.a DMB-TH) demodulator
++ *    ATBM8830, ATBM8831
++ *
++ *    Copyright (C) 2009 David T.L. Wong <davidtlwong@gmail.com>
++ *
++ *    This program is free software; you can redistribute it and/or modify
++ *    it under the terms of the GNU General Public License as published by
++ *    the Free Software Foundation; either version 2 of the License, or
++ *    (at your option) any later version.
++ *
++ *    This program is distributed in the hope that it will be useful,
++ *    but WITHOUT ANY WARRANTY; without even the implied warranty of
++ *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ *    GNU General Public License for more details.
++ *
++ *    You should have received a copy of the GNU General Public License
++ *    along with this program; if not, write to the Free Software
++ *    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++ */
++
++#ifndef __ATBM8830_H__
++#define __ATBM8830_H__
++
++#include <linux/dvb/frontend.h>
++#include <linux/i2c.h>
++
++#define ATBM8830_PROD_8830 0
++#define ATBM8830_PROD_8831 1
++
++struct atbm8830_config {
++
++      /* product type */
++      u8 prod;
++
++      /* the demodulator's i2c address */
++      u8 demod_address;
++
++      /* parallel or serial transport stream */
++      u8 serial_ts;
++
++      /* transport stream clock output only when receving valid stream */
++      u8 ts_clk_gated;
++
++      /* Decoder sample TS data at rising edge of clock */
++      u8 ts_sampling_edge;
++
++      /* Oscillator clock frequency */
++      u32 osc_clk_freq; /* in kHz */
++
++      /* IF frequency */
++      u32 if_freq; /* in kHz */
++
++      /* Swap I/Q for zero IF */
++      u8 zif_swap_iq;
++
++      /* Tuner AGC settings */
++      u8 agc_min;
++      u8 agc_max;
++      u8 agc_hold_loop;
++};
++
++#if defined(CONFIG_DVB_ATBM8830) || \
++      (defined(CONFIG_DVB_ATBM8830_MODULE) && defined(MODULE))
++extern struct dvb_frontend *atbm8830_attach(const struct atbm8830_config *config,
++              struct i2c_adapter *i2c);
++#else
++static inline
++struct dvb_frontend *atbm8830_attach(const struct atbm8830_config *config,
++              struct i2c_adapter *i2c) {
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return NULL;
++}
++#endif /* CONFIG_DVB_ATBM8830 */
++
++#endif /* __ATBM8830_H__ */
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/atbm8830_priv.h linux-2.6.18/drivers/media/dvb/frontends/atbm8830_priv.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/atbm8830_priv.h      1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/atbm8830_priv.h   2010-09-09 12:38:50.000000000 +0000
+@@ -0,0 +1,75 @@
++/*
++ *    Support for AltoBeam GB20600 (a.k.a DMB-TH) demodulator
++ *    ATBM8830, ATBM8831
++ *
++ *    Copyright (C) 2009 David T.L. Wong <davidtlwong@gmail.com>
++ *
++ *    This program is free software; you can redistribute it and/or modify
++ *    it under the terms of the GNU General Public License as published by
++ *    the Free Software Foundation; either version 2 of the License, or
++ *    (at your option) any later version.
++ *
++ *    This program is distributed in the hope that it will be useful,
++ *    but WITHOUT ANY WARRANTY; without even the implied warranty of
++ *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ *    GNU General Public License for more details.
++ *
++ *    You should have received a copy of the GNU General Public License
++ *    along with this program; if not, write to the Free Software
++ *    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++ */
++
++#ifndef __ATBM8830_PRIV_H
++#define __ATBM8830_PRIV_H
++
++struct atbm_state {
++      struct i2c_adapter *i2c;
++      /* configuration settings */
++      const struct atbm8830_config *config;
++      struct dvb_frontend frontend;
++};
++
++#define REG_CHIP_ID   0x0000
++#define REG_TUNER_BASEBAND    0x0001
++#define REG_DEMOD_RUN 0x0004
++#define REG_DSP_RESET 0x0005
++#define REG_RAM_RESET 0x0006
++#define REG_ADC_RESET 0x0007
++#define REG_TSPORT_RESET      0x0008
++#define REG_BLKERR_POL        0x000C
++#define REG_I2C_GATE  0x0103
++#define REG_TS_SAMPLE_EDGE    0x0301
++#define REG_TS_PKT_LEN_204    0x0302
++#define REG_TS_PKT_LEN_AUTO   0x0303
++#define REG_TS_SERIAL 0x0305
++#define REG_TS_CLK_FREERUN    0x0306
++#define REG_TS_VALID_MODE     0x0307
++#define REG_TS_CLK_MODE       0x030B /* 1 for serial, 0 for parallel */
++
++#define REG_TS_ERRBIT_USE     0x030C
++#define REG_LOCK_STATUS       0x030D
++#define REG_ADC_CONFIG        0x0602
++#define REG_CARRIER_OFFSET    0x0827 /* 0x0827-0x0829 little endian */
++#define REG_DETECTED_PN_MODE  0x082D
++#define REG_READ_LATCH        0x084D
++#define REG_IF_FREQ   0x0A00 /* 0x0A00-0x0A02 little endian */
++#define REG_OSC_CLK   0x0A03 /* 0x0A03-0x0A05 little endian */
++#define REG_BYPASS_CCI        0x0A06
++#define REG_ANALOG_LUMA_DETECTED      0x0A25
++#define REG_ANALOG_AUDIO_DETECTED     0x0A26
++#define REG_ANALOG_CHROMA_DETECTED    0x0A39
++#define REG_FRAME_ERR_CNT     0x0B04
++#define REG_USE_EXT_ADC       0x0C00
++#define REG_SWAP_I_Q  0x0C01
++#define REG_TPS_MANUAL        0x0D01
++#define REG_TPS_CONFIG        0x0D02
++#define REG_BYPASS_DEINTERLEAVER      0x0E00
++#define REG_AGC_TARGET        0x1003 /* 0x1003-0x1005 little endian */
++#define REG_AGC_MIN   0x1020
++#define REG_AGC_MAX   0x1023
++#define REG_AGC_LOCK  0x1027
++#define REG_AGC_PWM_VAL       0x1028 /* 0x1028-0x1029 little endian */
++#define REG_AGC_HOLD_LOOP     0x1031
++
++#endif
++
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/au8522.h linux-2.6.18/drivers/media/dvb/frontends/au8522.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/au8522.h     1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/au8522.h  2010-09-09 12:38:50.000000000 +0000
+@@ -0,0 +1,98 @@
++/*
++    Auvitek AU8522 QAM/8VSB demodulator driver
++
++    Copyright (C) 2008 Steven Toth <stoth@linuxtv.org>
++
++    This program is free software; you can redistribute it and/or modify
++    it under the terms of the GNU General Public License as published by
++    the Free Software Foundation; either version 2 of the License, or
++    (at your option) any later version.
++
++    This program is distributed in the hope that it will be useful,
++    but WITHOUT ANY WARRANTY; without even the implied warranty of
++    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++    GNU General Public License for more details.
++
++    You should have received a copy of the GNU General Public License
++    along with this program; if not, write to the Free Software
++    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++
++*/
++
++#ifndef __AU8522_H__
++#define __AU8522_H__
++
++#include <linux/dvb/frontend.h>
++
++enum au8522_if_freq {
++      AU8522_IF_6MHZ = 0,
++      AU8522_IF_4MHZ,
++      AU8522_IF_3_25MHZ,
++};
++
++struct au8522_led_config {
++      u16 vsb8_strong;
++      u16 qam64_strong;
++      u16 qam256_strong;
++
++      u16 gpio_output;
++      /* unset hi bits, set low bits */
++      u16 gpio_output_enable;
++      u16 gpio_output_disable;
++
++      u16 gpio_leds;
++      u8 *led_states;
++      unsigned int num_led_states;
++};
++
++struct au8522_config {
++      /* the demodulator's i2c address */
++      u8 demod_address;
++
++      /* Return lock status based on tuner lock, or demod lock */
++#define AU8522_TUNERLOCKING 0
++#define AU8522_DEMODLOCKING 1
++      u8 status_mode;
++
++      struct au8522_led_config *led_cfg;
++
++      enum au8522_if_freq vsb_if;
++      enum au8522_if_freq qam_if;
++};
++
++#if defined(CONFIG_DVB_AU8522) ||                             \
++          (defined(CONFIG_DVB_AU8522_MODULE) && defined(MODULE))
++extern struct dvb_frontend *au8522_attach(const struct au8522_config *config,
++                                        struct i2c_adapter *i2c);
++#else
++static inline
++struct dvb_frontend *au8522_attach(const struct au8522_config *config,
++                                 struct i2c_adapter *i2c)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return NULL;
++}
++#endif /* CONFIG_DVB_AU8522 */
++
++/* Other modes may need to be added later */
++enum au8522_video_input {
++      AU8522_COMPOSITE_CH1 = 1,
++      AU8522_COMPOSITE_CH2,
++      AU8522_COMPOSITE_CH3,
++      AU8522_COMPOSITE_CH4,
++      AU8522_COMPOSITE_CH4_SIF,
++      AU8522_SVIDEO_CH13,
++      AU8522_SVIDEO_CH24,
++};
++
++enum au8522_audio_input {
++      AU8522_AUDIO_NONE,
++      AU8522_AUDIO_SIF,
++};
++
++#endif /* __AU8522_H__ */
++
++/*
++ * Local variables:
++ * c-basic-offset: 8
++ */
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/au8522_priv.h linux-2.6.18/drivers/media/dvb/frontends/au8522_priv.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/au8522_priv.h        1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/au8522_priv.h     2010-09-09 12:38:50.000000000 +0000
+@@ -0,0 +1,419 @@
++/*
++    Auvitek AU8522 QAM/8VSB demodulator driver
++
++    Copyright (C) 2008 Steven Toth <stoth@linuxtv.org>
++    Copyright (C) 2008 Devin Heitmueller <dheitmueller@linuxtv.org>
++    Copyright (C) 2005-2008 Auvitek International, Ltd.
++
++    This program is free software; you can redistribute it and/or modify
++    it under the terms of the GNU General Public License as published by
++    the Free Software Foundation; either version 2 of the License, or
++    (at your option) any later version.
++
++    This program is distributed in the hope that it will be useful,
++    but WITHOUT ANY WARRANTY; without even the implied warranty of
++    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++    GNU General Public License for more details.
++
++    You should have received a copy of the GNU General Public License
++    along with this program; if not, write to the Free Software
++    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++
++*/
++
++#include <linux/kernel.h>
++#include <linux/init.h>
++#include <linux/module.h>
++#include <linux/string.h>
++#include <linux/slab.h>
++#include <linux/delay.h>
++#include <linux/videodev2.h>
++#include <media/v4l2-device.h>
++#include <linux/i2c.h>
++#include "dvb_frontend.h"
++#include "au8522.h"
++#include "tuner-i2c.h"
++
++#define AU8522_ANALOG_MODE 0
++#define AU8522_DIGITAL_MODE 1
++
++struct au8522_state {
++      struct i2c_client *c;
++      struct i2c_adapter *i2c;
++
++      u8 operational_mode;
++
++      /* Used for sharing of the state between analog and digital mode */
++      struct tuner_i2c_props i2c_props;
++      struct list_head hybrid_tuner_instance_list;
++
++      /* configuration settings */
++      const struct au8522_config *config;
++
++      struct dvb_frontend frontend;
++
++      u32 current_frequency;
++      fe_modulation_t current_modulation;
++
++      u32 fe_status;
++      unsigned int led_state;
++
++      /* Analog settings */
++      struct v4l2_subdev sd;
++      v4l2_std_id std;
++      int vid_input;
++      int aud_input;
++      u32 id;
++      u32 rev;
++      u8 brightness;
++      u8 contrast;
++      u8 saturation;
++      s16 hue;
++};
++
++/* These are routines shared by both the VSB/QAM demodulator and the analog
++   decoder */
++int au8522_writereg(struct au8522_state *state, u16 reg, u8 data);
++u8 au8522_readreg(struct au8522_state *state, u16 reg);
++int au8522_init(struct dvb_frontend *fe);
++int au8522_sleep(struct dvb_frontend *fe);
++
++int au8522_get_state(struct au8522_state **state, struct i2c_adapter *i2c,
++                   u8 client_address);
++void au8522_release_state(struct au8522_state *state);
++
++/* REGISTERS */
++#define AU8522_INPUT_CONTROL_REG081H                  0x081
++#define AU8522_PGA_CONTROL_REG082H                    0x082
++#define AU8522_CLAMPING_CONTROL_REG083H                       0x083
++
++#define AU8522_MODULE_CLOCK_CONTROL_REG0A3H           0x0A3
++#define AU8522_SYSTEM_MODULE_CONTROL_0_REG0A4H                0x0A4
++#define AU8522_SYSTEM_MODULE_CONTROL_1_REG0A5H                0x0A5
++#define AU8522_AGC_CONTROL_RANGE_REG0A6H              0x0A6
++#define AU8522_SYSTEM_GAIN_CONTROL_REG0A7H            0x0A7
++#define AU8522_TUNER_AGC_RF_STOP_REG0A8H              0x0A8
++#define AU8522_TUNER_AGC_RF_START_REG0A9H             0x0A9
++#define AU8522_TUNER_RF_AGC_DEFAULT_REG0AAH           0x0AA
++#define AU8522_TUNER_AGC_IF_STOP_REG0ABH              0x0AB
++#define AU8522_TUNER_AGC_IF_START_REG0ACH             0x0AC
++#define AU8522_TUNER_AGC_IF_DEFAULT_REG0ADH           0x0AD
++#define AU8522_TUNER_AGC_STEP_REG0AEH                 0x0AE
++#define AU8522_TUNER_GAIN_STEP_REG0AFH                        0x0AF
++
++/* Receiver registers */
++#define AU8522_FRMREGTHRD1_REG0B0H                    0x0B0
++#define AU8522_FRMREGAGC1H_REG0B1H                    0x0B1
++#define AU8522_FRMREGSHIFT1_REG0B2H                   0x0B2
++#define AU8522_TOREGAGC1_REG0B3H                      0x0B3
++#define AU8522_TOREGASHIFT1_REG0B4H                   0x0B4
++#define AU8522_FRMREGBBH_REG0B5H                      0x0B5
++#define AU8522_FRMREGBBM_REG0B6H                      0x0B6
++#define AU8522_FRMREGBBL_REG0B7H                      0x0B7
++/* 0xB8 TO 0xD7 are the filter coefficients */
++#define AU8522_FRMREGTHRD2_REG0D8H                    0x0D8
++#define AU8522_FRMREGAGC2H_REG0D9H                    0x0D9
++#define AU8522_TOREGAGC2_REG0DAH                      0x0DA
++#define AU8522_TOREGSHIFT2_REG0DBH                    0x0DB
++#define AU8522_FRMREGPILOTH_REG0DCH                   0x0DC
++#define AU8522_FRMREGPILOTM_REG0DDH                   0x0DD
++#define AU8522_FRMREGPILOTL_REG0DEH                   0x0DE
++#define AU8522_TOREGFREQ_REG0DFH                      0x0DF
++
++#define AU8522_RX_PGA_RFOUT_REG0EBH                   0x0EB
++#define AU8522_RX_PGA_IFOUT_REG0ECH                   0x0EC
++#define AU8522_RX_PGA_PGAOUT_REG0EDH                  0x0ED
++
++#define AU8522_CHIP_MODE_REG0FEH                      0x0FE
++
++/* I2C bus control registers */
++#define AU8522_I2C_CONTROL_REG0_REG090H               0x090
++#define AU8522_I2C_CONTROL_REG1_REG091H               0x091
++#define AU8522_I2C_STATUS_REG092H                     0x092
++#define AU8522_I2C_WR_DATA0_REG093H                   0x093
++#define AU8522_I2C_WR_DATA1_REG094H                   0x094
++#define AU8522_I2C_WR_DATA2_REG095H                   0x095
++#define AU8522_I2C_WR_DATA3_REG096H                   0x096
++#define AU8522_I2C_WR_DATA4_REG097H                   0x097
++#define AU8522_I2C_WR_DATA5_REG098H                   0x098
++#define AU8522_I2C_WR_DATA6_REG099H                   0x099
++#define AU8522_I2C_WR_DATA7_REG09AH                   0x09A
++#define AU8522_I2C_RD_DATA0_REG09BH                   0x09B
++#define AU8522_I2C_RD_DATA1_REG09CH                   0x09C
++#define AU8522_I2C_RD_DATA2_REG09DH                   0x09D
++#define AU8522_I2C_RD_DATA3_REG09EH                   0x09E
++#define AU8522_I2C_RD_DATA4_REG09FH                   0x09F
++#define AU8522_I2C_RD_DATA5_REG0A0H                   0x0A0
++#define AU8522_I2C_RD_DATA6_REG0A1H                   0x0A1
++#define AU8522_I2C_RD_DATA7_REG0A2H                   0x0A2
++
++#define AU8522_ENA_USB_REG101H                                0x101
++
++#define AU8522_I2S_CTRL_0_REG110H                     0x110
++#define AU8522_I2S_CTRL_1_REG111H                     0x111
++#define AU8522_I2S_CTRL_2_REG112H                     0x112
++
++#define AU8522_FRMREGFFECONTROL_REG121H               0x121
++#define AU8522_FRMREGDFECONTROL_REG122H               0x122
++
++#define AU8522_CARRFREQOFFSET0_REG201H                        0x201
++#define AU8522_CARRFREQOFFSET1_REG202H                        0x202
++
++#define AU8522_DECIMATION_GAIN_REG21AH                        0x21A
++#define AU8522_FRMREGIFSLP_REG21BH                    0x21B
++#define AU8522_FRMREGTHRDL2_REG21CH                   0x21C
++#define AU8522_FRMREGSTEP3DB_REG21DH                  0x21D
++#define AU8522_DAGC_GAIN_ADJUSTMENT_REG21EH           0x21E
++#define AU8522_FRMREGPLLMODE_REG21FH                  0x21F
++#define AU8522_FRMREGCSTHRD_REG220H                   0x220
++#define AU8522_FRMREGCRLOCKDMAX_REG221H               0x221
++#define AU8522_FRMREGCRPERIODMASK_REG222H             0x222
++#define AU8522_FRMREGCRLOCK0THH_REG223H               0x223
++#define AU8522_FRMREGCRLOCK1THH_REG224H               0x224
++#define AU8522_FRMREGCRLOCK0THL_REG225H               0x225
++#define AU8522_FRMREGCRLOCK1THL_REG226H               0x226
++#define AU_FRMREGPLLACQPHASESCL_REG227H                       0x227
++#define AU8522_FRMREGFREQFBCTRL_REG228H               0x228
++
++/* Analog TV Decoder */
++#define AU8522_TVDEC_STATUS_REG000H                   0x000
++#define AU8522_TVDEC_INT_STATUS_REG001H                       0x001
++#define AU8522_TVDEC_MACROVISION_STATUS_REG002H       0x002
++#define AU8522_TVDEC_SHARPNESSREG009H                 0x009
++#define AU8522_TVDEC_BRIGHTNESS_REG00AH                       0x00A
++#define AU8522_TVDEC_CONTRAST_REG00BH                 0x00B
++#define AU8522_TVDEC_SATURATION_CB_REG00CH            0x00C
++#define AU8522_TVDEC_SATURATION_CR_REG00DH            0x00D
++#define AU8522_TVDEC_HUE_H_REG00EH                    0x00E
++#define AU8522_TVDEC_HUE_L_REG00FH                    0x00F
++#define AU8522_TVDEC_INT_MASK_REG010H                 0x010
++#define AU8522_VIDEO_MODE_REG011H                     0x011
++#define AU8522_TVDEC_PGA_REG012H                      0x012
++#define AU8522_TVDEC_COMB_MODE_REG015H                        0x015
++#define AU8522_REG016H                                0x016
++#define AU8522_TVDED_DBG_MODE_REG060H                 0x060
++#define AU8522_TVDEC_FORMAT_CTRL1_REG061H             0x061
++#define AU8522_TVDEC_FORMAT_CTRL2_REG062H             0x062
++#define AU8522_TVDEC_VCR_DET_LLIM_REG063H             0x063
++#define AU8522_TVDEC_VCR_DET_HLIM_REG064H             0x064
++#define AU8522_TVDEC_COMB_VDIF_THR1_REG065H           0x065
++#define AU8522_TVDEC_COMB_VDIF_THR2_REG066H           0x066
++#define AU8522_TVDEC_COMB_VDIF_THR3_REG067H           0x067
++#define AU8522_TVDEC_COMB_NOTCH_THR_REG068H           0x068
++#define AU8522_TVDEC_COMB_HDIF_THR1_REG069H                   0x069
++#define AU8522_TVDEC_COMB_HDIF_THR2_REG06AH           0x06A
++#define AU8522_TVDEC_COMB_HDIF_THR3_REG06BH                   0x06B
++#define AU8522_TVDEC_COMB_DCDIF_THR1_REG06CH                  0x06C
++#define AU8522_TVDEC_COMB_DCDIF_THR2_REG06DH          0x06D
++#define AU8522_TVDEC_COMB_DCDIF_THR3_REG06EH          0x06E
++#define AU8522_TVDEC_UV_SEP_THR_REG06FH               0x06F
++#define AU8522_TVDEC_COMB_DC_THR1_NTSC_REG070H                0x070
++#define AU8522_TVDEC_COMB_DC_THR2_NTSC_REG073H                0x073
++#define AU8522_TVDEC_DCAGC_CTRL_REG077H                       0x077
++#define AU8522_TVDEC_PIC_START_ADJ_REG078H            0x078
++#define AU8522_TVDEC_AGC_HIGH_LIMIT_REG079H           0x079
++#define AU8522_TVDEC_MACROVISION_SYNC_THR_REG07AH     0x07A
++#define AU8522_TVDEC_INTRP_CTRL_REG07BH                       0x07B
++#define AU8522_TVDEC_PLL_STATUS_REG07EH                       0x07E
++#define AU8522_TVDEC_FSC_FREQ_REG07FH                 0x07F
++
++#define AU8522_TVDEC_AGC_LOW_LIMIT_REG0E4H            0x0E4
++#define AU8522_TOREGAAGC_REG0E5H                      0x0E5
++
++#define AU8522_TVDEC_CHROMA_AGC_REG401H               0x401
++#define AU8522_TVDEC_CHROMA_SFT_REG402H               0x402
++#define AU8522_FILTER_COEF_R410               0x410
++#define AU8522_FILTER_COEF_R411               0x411
++#define AU8522_FILTER_COEF_R412               0x412
++#define AU8522_FILTER_COEF_R413               0x413
++#define AU8522_FILTER_COEF_R414               0x414
++#define AU8522_FILTER_COEF_R415               0x415
++#define AU8522_FILTER_COEF_R416               0x416
++#define AU8522_FILTER_COEF_R417               0x417
++#define AU8522_FILTER_COEF_R418               0x418
++#define AU8522_FILTER_COEF_R419               0x419
++#define AU8522_FILTER_COEF_R41A               0x41A
++#define AU8522_FILTER_COEF_R41B               0x41B
++#define AU8522_FILTER_COEF_R41C               0x41C
++#define AU8522_FILTER_COEF_R41D               0x41D
++#define AU8522_FILTER_COEF_R41E               0x41E
++#define AU8522_FILTER_COEF_R41F               0x41F
++#define AU8522_FILTER_COEF_R420               0x420
++#define AU8522_FILTER_COEF_R421               0x421
++#define AU8522_FILTER_COEF_R422               0x422
++#define AU8522_FILTER_COEF_R423               0x423
++#define AU8522_FILTER_COEF_R424               0x424
++#define AU8522_FILTER_COEF_R425               0x425
++#define AU8522_FILTER_COEF_R426               0x426
++#define AU8522_FILTER_COEF_R427               0x427
++#define AU8522_FILTER_COEF_R428               0x428
++#define AU8522_FILTER_COEF_R429               0x429
++#define AU8522_FILTER_COEF_R42A               0x42A
++#define AU8522_FILTER_COEF_R42B               0x42B
++#define AU8522_FILTER_COEF_R42C               0x42C
++#define AU8522_FILTER_COEF_R42D               0x42D
++
++/* VBI Control Registers */
++#define AU8522_TVDEC_VBI_RX_FIFO_CONTAIN_REG004H      0x004
++#define AU8522_TVDEC_VBI_TX_FIFO_CONTAIN_REG005H      0x005
++#define AU8522_TVDEC_VBI_RX_FIFO_READ_REG006H         0x006
++#define AU8522_TVDEC_VBI_FIFO_STATUS_REG007H          0x007
++#define AU8522_TVDEC_VBI_CTRL_H_REG017H                       0x017
++#define AU8522_TVDEC_VBI_CTRL_L_REG018H                       0x018
++#define AU8522_TVDEC_VBI_USER_TOTAL_BITS_REG019H      0x019
++#define AU8522_TVDEC_VBI_USER_TUNIT_H_REG01AH         0x01A
++#define AU8522_TVDEC_VBI_USER_TUNIT_L_REG01BH         0x01B
++#define AU8522_TVDEC_VBI_USER_THRESH1_REG01CH         0x01C
++#define AU8522_TVDEC_VBI_USER_FRAME_PAT2_REG01EH      0x01E
++#define AU8522_TVDEC_VBI_USER_FRAME_PAT1_REG01FH      0x01F
++#define AU8522_TVDEC_VBI_USER_FRAME_PAT0_REG020H      0x020
++#define AU8522_TVDEC_VBI_USER_FRAME_MASK2_REG021H     0x021
++#define AU8522_TVDEC_VBI_USER_FRAME_MASK1_REG022H     0x022
++#define AU8522_TVDEC_VBI_USER_FRAME_MASK0_REG023H     0x023
++
++#define AU8522_REG071H                                        0x071
++#define AU8522_REG072H                                        0x072
++#define AU8522_REG074H                                        0x074
++#define AU8522_REG075H                                        0x075
++
++/* Digital Demodulator Registers */
++#define AU8522_FRAME_COUNT0_REG084H                   0x084
++#define AU8522_RS_STATUS_G0_REG085H                   0x085
++#define AU8522_RS_STATUS_B0_REG086H                   0x086
++#define AU8522_RS_STATUS_E_REG087H                    0x087
++#define AU8522_DEMODULATION_STATUS_REG088H            0x088
++#define AU8522_TOREGTRESTATUS_REG0E6H                 0x0E6
++#define AU8522_TSPORT_CONTROL_REG10BH                 0x10B
++#define AU8522_TSTHES_REG10CH                         0x10C
++#define AU8522_FRMREGDFEKEEP_REG301H                  0x301
++#define AU8522_DFE_AVERAGE_REG302H                    0x302
++#define AU8522_FRMREGEQLERRWIN_REG303H                        0x303
++#define AU8522_FRMREGFFEKEEP_REG304H                  0x304
++#define AU8522_FRMREGDFECONTROL1_REG305H              0x305
++#define AU8522_FRMREGEQLERRLOW_REG306H                        0x306
++
++#define AU8522_REG42EH                                0x42E
++#define AU8522_REG42FH                                0x42F
++#define AU8522_REG430H                                0x430
++#define AU8522_REG431H                                0x431
++#define AU8522_REG432H                                0x432
++#define AU8522_REG433H                                0x433
++#define AU8522_REG434H                                0x434
++#define AU8522_REG435H                                0x435
++#define AU8522_REG436H                                0x436
++
++/* GPIO Registers */
++#define AU8522_GPIO_CONTROL_REG0E0H                   0x0E0
++#define AU8522_GPIO_STATUS_REG0E1H                    0x0E1
++#define AU8522_GPIO_DATA_REG0E2H                      0x0E2
++
++/* Audio Control Registers */
++#define AU8522_AUDIOAGC_REG0EEH                       0x0EE
++#define AU8522_AUDIO_STATUS_REG0F0H                   0x0F0
++#define AU8522_AUDIO_MODE_REG0F1H                     0x0F1
++#define AU8522_AUDIO_VOLUME_L_REG0F2H                         0x0F2
++#define AU8522_AUDIO_VOLUME_R_REG0F3H                         0x0F3
++#define AU8522_AUDIO_VOLUME_REG0F4H                   0x0F4
++#define AU8522_FRMREGAUPHASE_REG0F7H                  0x0F7
++#define AU8522_REG0F9H                                        0x0F9
++
++#define AU8522_AUDIOAGC2_REG605H                      0x605
++#define AU8522_AUDIOFREQ_REG606H                      0x606
++
++
++/**************************************************************/
++
++#define AU8522_INPUT_CONTROL_REG081H_ATSC                     0xC4
++#define AU8522_INPUT_CONTROL_REG081H_ATVRF                    0xC4
++#define AU8522_INPUT_CONTROL_REG081H_ATVRF13                  0xC4
++#define AU8522_INPUT_CONTROL_REG081H_J83B64                   0xC4
++#define AU8522_INPUT_CONTROL_REG081H_J83B256                  0xC4
++#define AU8522_INPUT_CONTROL_REG081H_CVBS                     0x20
++#define AU8522_INPUT_CONTROL_REG081H_CVBS_CH1                 0xA2
++#define AU8522_INPUT_CONTROL_REG081H_CVBS_CH2                 0xA0
++#define AU8522_INPUT_CONTROL_REG081H_CVBS_CH3                 0x69
++#define AU8522_INPUT_CONTROL_REG081H_CVBS_CH4                 0x68
++#define AU8522_INPUT_CONTROL_REG081H_CVBS_CH4_SIF             0x28
++/* CH1 AS Y,CH3 AS C */
++#define AU8522_INPUT_CONTROL_REG081H_SVIDEO_CH13              0x23
++/* CH2 AS Y,CH4 AS C */
++#define AU8522_INPUT_CONTROL_REG081H_SVIDEO_CH24              0x20
++#define AU8522_MODULE_CLOCK_CONTROL_REG0A3H_ATSC              0x0C
++#define AU8522_MODULE_CLOCK_CONTROL_REG0A3H_J83B64            0x09
++#define AU8522_MODULE_CLOCK_CONTROL_REG0A3H_J83B256                   0x09
++#define AU8522_MODULE_CLOCK_CONTROL_REG0A3H_CVBS              0x12
++#define AU8522_MODULE_CLOCK_CONTROL_REG0A3H_ATVRF             0x1A
++#define AU8522_MODULE_CLOCK_CONTROL_REG0A3H_ATVRF13           0x1A
++#define AU8522_MODULE_CLOCK_CONTROL_REG0A3H_SVIDEO            0x02
++
++#define AU8522_SYSTEM_MODULE_CONTROL_0_REG0A4H_CLEAR          0x00
++#define AU8522_SYSTEM_MODULE_CONTROL_0_REG0A4H_SVIDEO         0x9C
++#define AU8522_SYSTEM_MODULE_CONTROL_0_REG0A4H_CVBS           0x9D
++#define AU8522_SYSTEM_MODULE_CONTROL_0_REG0A4H_ATSC           0xE8
++#define AU8522_SYSTEM_MODULE_CONTROL_0_REG0A4H_J83B256                0xCA
++#define AU8522_SYSTEM_MODULE_CONTROL_0_REG0A4H_J83B64                 0xCA
++#define AU8522_SYSTEM_MODULE_CONTROL_0_REG0A4H_ATVRF                  0xDD
++#define AU8522_SYSTEM_MODULE_CONTROL_0_REG0A4H_ATVRF13                0xDD
++#define AU8522_SYSTEM_MODULE_CONTROL_0_REG0A4H_PAL            0xDD
++#define AU8522_SYSTEM_MODULE_CONTROL_0_REG0A4H_FM             0xDD
++
++#define AU8522_SYSTEM_MODULE_CONTROL_1_REG0A5H_ATSC           0x80
++#define AU8522_SYSTEM_MODULE_CONTROL_1_REG0A5H_J83B256                0x80
++#define AU8522_SYSTEM_MODULE_CONTROL_1_REG0A5H_J83B64                 0x80
++#define AU8522_SYSTEM_MODULE_CONTROL_1_REG0A5H_DONGLE_ATSC    0x40
++#define AU8522_SYSTEM_MODULE_CONTROL_1_REG0A5H_DONGLE_J83B256 0x40
++#define AU8522_SYSTEM_MODULE_CONTROL_1_REG0A5H_DONGLE_J83B64  0x40
++#define AU8522_SYSTEM_MODULE_CONTROL_1_REG0A5H_DONGLE_CLEAR   0x00
++#define AU8522_SYSTEM_MODULE_CONTROL_1_REG0A5H_ATVRF          0x01
++#define AU8522_SYSTEM_MODULE_CONTROL_1_REG0A5H_ATVRF13                0x01
++#define AU8522_SYSTEM_MODULE_CONTROL_1_REG0A5H_SVIDEO                 0x04
++#define AU8522_SYSTEM_MODULE_CONTROL_1_REG0A5H_CVBS           0x01
++#define AU8522_SYSTEM_MODULE_CONTROL_1_REG0A5H_PWM                    0x03
++#define AU8522_SYSTEM_MODULE_CONTROL_1_REG0A5H_IIS            0x09
++#define AU8522_SYSTEM_MODULE_CONTROL_1_REG0A5H_PAL            0x01
++#define AU8522_SYSTEM_MODULE_CONTROL_1_REG0A5H_FM             0x01
++
++/* STILL NEED TO BE REFACTORED @@@@@@@@@@@@@@ */
++#define AU8522_TVDEC_CONTRAST_REG00BH_CVBS                    0x79
++#define AU8522_TVDEC_SATURATION_CB_REG00CH_CVBS                       0x80
++#define AU8522_TVDEC_SATURATION_CR_REG00DH_CVBS                       0x80
++#define AU8522_TVDEC_HUE_H_REG00EH_CVBS                               0x00
++#define AU8522_TVDEC_HUE_L_REG00FH_CVBS                               0x00
++#define AU8522_TVDEC_PGA_REG012H_CVBS                         0x0F
++#define AU8522_TVDEC_COMB_MODE_REG015H_CVBS                   0x00
++#define AU8522_REG016H_CVBS                                   0x00
++#define AU8522_TVDED_DBG_MODE_REG060H_CVBS                    0x00
++#define AU8522_TVDEC_FORMAT_CTRL1_REG061H_CVBS                        0x0B
++#define AU8522_TVDEC_FORMAT_CTRL1_REG061H_CVBS13              0x03
++#define AU8522_TVDEC_FORMAT_CTRL2_REG062H_CVBS13              0x00
++#define AU8522_TVDEC_VCR_DET_LLIM_REG063H_CVBS                        0x19
++#define AU8522_REG0F9H_AUDIO                                  0x20
++#define AU8522_TVDEC_VCR_DET_HLIM_REG064H_CVBS                        0xA7
++#define AU8522_TVDEC_COMB_VDIF_THR1_REG065H_CVBS              0x0A
++#define AU8522_TVDEC_COMB_VDIF_THR2_REG066H_CVBS              0x32
++#define AU8522_TVDEC_COMB_VDIF_THR3_REG067H_CVBS              0x19
++#define AU8522_TVDEC_COMB_NOTCH_THR_REG068H_CVBS              0x23
++#define AU8522_TVDEC_COMB_HDIF_THR1_REG069H_CVBS              0x41
++#define AU8522_TVDEC_COMB_HDIF_THR2_REG06AH_CVBS              0x0A
++#define AU8522_TVDEC_COMB_HDIF_THR3_REG06BH_CVBS              0x32
++#define AU8522_TVDEC_COMB_DCDIF_THR1_REG06CH_CVBS             0x34
++#define AU8522_TVDEC_COMB_DCDIF_THR2_REG06DH_CVBS             0x05
++#define AU8522_TVDEC_COMB_DCDIF_THR3_REG06EH_CVBS             0x6E
++#define AU8522_TVDEC_UV_SEP_THR_REG06FH_CVBS                  0x0F
++#define AU8522_TVDEC_COMB_DC_THR1_NTSC_REG070H_CVBS           0x80
++#define AU8522_REG071H_CVBS                                   0x18
++#define AU8522_REG072H_CVBS                                   0x30
++#define AU8522_TVDEC_COMB_DC_THR2_NTSC_REG073H_CVBS           0xF0
++#define AU8522_REG074H_CVBS                                   0x80
++#define AU8522_REG075H_CVBS                                   0xF0
++#define AU8522_TVDEC_DCAGC_CTRL_REG077H_CVBS                  0xFB
++#define AU8522_TVDEC_PIC_START_ADJ_REG078H_CVBS                       0x04
++#define AU8522_TVDEC_AGC_HIGH_LIMIT_REG079H_CVBS              0x00
++#define AU8522_TVDEC_MACROVISION_SYNC_THR_REG07AH_CVBS                0x00
++#define AU8522_TVDEC_INTRP_CTRL_REG07BH_CVBS                  0xEE
++#define AU8522_TVDEC_AGC_LOW_LIMIT_REG0E4H_CVBS                       0xFE
++#define AU8522_TOREGAAGC_REG0E5H_CVBS                         0x00
++#define AU8522_TVDEC_VBI6A_REG035H_CVBS                               0x40
++
++/* Enables Closed captioning */
++#define AU8522_TVDEC_VBI_CTRL_H_REG017H_CCON                  0x21
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/bcm3510.h linux-2.6.18/drivers/media/dvb/frontends/bcm3510.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/bcm3510.h    2006-09-20 03:42:06.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/bcm3510.h 2010-09-09 12:38:50.000000000 +0000
+@@ -34,7 +34,16 @@
+       int (*request_firmware)(struct dvb_frontend* fe, const struct firmware **fw, char* name);
+ };
+ 
++#if defined(CONFIG_DVB_BCM3510) || (defined(CONFIG_DVB_BCM3510_MODULE) && defined(MODULE))
+ extern struct dvb_frontend* bcm3510_attach(const struct bcm3510_config* config,
+                                          struct i2c_adapter* i2c);
++#else
++static inline struct dvb_frontend* bcm3510_attach(const struct bcm3510_config* config,
++                                                struct i2c_adapter* i2c)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return NULL;
++}
++#endif // CONFIG_DVB_BCM3510
+ 
+ #endif
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/bsbe1.h linux-2.6.18/drivers/media/dvb/frontends/bsbe1.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/bsbe1.h      2006-09-20 03:42:06.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/bsbe1.h   2010-09-09 12:38:50.000000000 +0000
+@@ -1,5 +1,5 @@
+ /*
+- * bsbe1.h - ALPS BSBE1 tuner support (moved from av7110.c)
++ * bsbe1.h - ALPS BSBE1 tuner support
+  *
+  * This program is free software; you can redistribute it and/or
+  * modify it under the terms of the GNU General Public License
+@@ -26,44 +26,24 @@
+ #define BSBE1_H
+ 
+ static u8 alps_bsbe1_inittab[] = {
+-      0x01, 0x15,
+-      0x02, 0x30,
+-      0x03, 0x00,
++      0x01, 0x15,   /* XTAL = 4MHz, VCO = 352 MHz */
++      0x02, 0x30,   /* MCLK = 88 MHz */
++      0x03, 0x00,   /* ACR output 0 */
+       0x04, 0x7d,   /* F22FR = 0x7d, F22 = f_VCO / 128 / 0x7d = 22 kHz */
+-      0x05, 0x35,   /* I2CT = 0, SCLT = 1, SDAT = 1 */
+-      0x06, 0x40,   /* DAC not used, set to high impendance mode */
+-      0x07, 0x00,   /* DAC LSB */
++      0x05, 0x05,   /* I2CT = 0, SCLT = 1, SDAT = 1 */
++      0x06, 0x00,   /* DAC output 0 */
+       0x08, 0x40,   /* DiSEqC off, LNB power on OP2/LOCK pin on */
+       0x09, 0x00,   /* FIFO */
+-      0x0c, 0x51,   /* OP1 ctl = Normal, OP1 val = 1 (LNB Power ON) */
+-      0x0d, 0x82,   /* DC offset compensation = ON, beta_agc1 = 2 */
+-      0x0e, 0x23,   /* alpha_tmg = 2, beta_tmg = 3 */
+-      0x10, 0x3f,   // AGC2  0x3d
+-      0x11, 0x84,
+-      0x12, 0xb9,
+-      0x15, 0xc9,   // lock detector threshold
+-      0x16, 0x00,
+-      0x17, 0x00,
+-      0x18, 0x00,
+-      0x19, 0x00,
+-      0x1a, 0x00,
+-      0x1f, 0x50,
+-      0x20, 0x00,
+-      0x21, 0x00,
+-      0x22, 0x00,
+-      0x23, 0x00,
+-      0x28, 0x00,  // out imp: normal  out type: parallel FEC mode:0
+-      0x29, 0x1e,  // 1/2 threshold
+-      0x2a, 0x14,  // 2/3 threshold
+-      0x2b, 0x0f,  // 3/4 threshold
+-      0x2c, 0x09,  // 5/6 threshold
+-      0x2d, 0x05,  // 7/8 threshold
+-      0x2e, 0x01,
+-      0x31, 0x1f,  // test all FECs
+-      0x32, 0x19,  // viterbi and synchro search
+-      0x33, 0xfc,  // rs control
+-      0x34, 0x93,  // error control
+-      0x0f, 0x92,
++      0x0c, 0x51,   /* OP1/OP0 normal, val = 1 (LNB power on) */
++      0x0d, 0x82,   /* DC offset compensation = on, beta_agc1 = 2 */
++      0x0f, 0x92,   /* AGC1R */
++      0x10, 0x34,   /* AGC2O */
++      0x11, 0x84,   /* TLSR */
++      0x12, 0xb9,   /* CFD */
++      0x15, 0xc9,   /* lock detector threshold */
++      0x28, 0x00,   /* out imp: normal, type: parallel, FEC mode: QPSK */
++      0x33, 0xfc,   /* RS control */
++      0x34, 0x93,   /* count viterbi bit errors per 2E18 bytes */
+       0xff, 0xff
+ };
+ 
+@@ -100,11 +80,11 @@
+       if ((params->frequency < 950000) || (params->frequency > 2150000))
+               return -EINVAL;
+ 
+-      div = (params->frequency + (125 - 1)) / 125; // round correctly
++      div = params->frequency / 1000;
+       data[0] = (div >> 8) & 0x7f;
+       data[1] = div & 0xff;
+-      data[2] = 0x80 | ((div & 0x18000) >> 10) | 4;
+-      data[3] = (params->frequency > 1530000) ? 0xE0 : 0xE4;
++      data[2] = 0x80 | ((div & 0x18000) >> 10) | 0x1;
++      data[3] = 0xe0;
+ 
+       if (fe->ops.i2c_gate_ctrl)
+               fe->ops.i2c_gate_ctrl(fe, 1);
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/bsru6.h linux-2.6.18/drivers/media/dvb/frontends/bsru6.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/bsru6.h      2006-09-20 03:42:06.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/bsru6.h   2010-09-09 12:38:50.000000000 +0000
+@@ -133,7 +133,7 @@
+       .mclk = 88000000UL,
+       .invert = 1,
+       .skip_reinit = 0,
+-      .lock_output = STV0229_LOCKOUTPUT_1,
++      .lock_output = STV0299_LOCKOUTPUT_1,
+       .volt13_op0_op1 = STV0299_VOLT13_OP1,
+       .min_delay_ms = 100,
+       .set_symbol_rate = alps_bsru6_set_symbol_rate,
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/cx22700.h linux-2.6.18/drivers/media/dvb/frontends/cx22700.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/cx22700.h    2006-09-20 03:42:06.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/cx22700.h 2010-09-09 12:38:50.000000000 +0000
+@@ -31,7 +31,16 @@
+       u8 demod_address;
+ };
+ 
++#if defined(CONFIG_DVB_CX22700) || (defined(CONFIG_DVB_CX22700_MODULE) && defined(MODULE))
+ extern struct dvb_frontend* cx22700_attach(const struct cx22700_config* config,
+                                          struct i2c_adapter* i2c);
++#else
++static inline struct dvb_frontend* cx22700_attach(const struct cx22700_config* config,
++                                         struct i2c_adapter* i2c)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return NULL;
++}
++#endif // CONFIG_DVB_CX22700
+ 
+ #endif // CX22700_H
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/cx22702.h linux-2.6.18/drivers/media/dvb/frontends/cx22702.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/cx22702.h    2006-09-20 03:42:06.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/cx22702.h 2010-09-09 12:38:50.000000000 +0000
+@@ -7,7 +7,7 @@
+     Copyright (C) 2001-2002 Convergence Integrated Media GmbH
+         Holger Waechtler <holger@convergence.de>
+ 
+-    Copyright (C) 2004 Steven Toth <stoth@hauppauge.com>
++    Copyright (C) 2004 Steven Toth <stoth@linuxtv.org>
+ 
+     This program is free software; you can redistribute it and/or modify
+     it under the terms of the GNU General Public License as published by
+@@ -30,8 +30,7 @@
+ 
+ #include <linux/dvb/frontend.h>
+ 
+-struct cx22702_config
+-{
++struct cx22702_config {
+       /* the demodulator's i2c address */
+       u8 demod_address;
+ 
+@@ -41,7 +40,19 @@
+       u8 output_mode;
+ };
+ 
+-extern struct dvb_frontend* cx22702_attach(const struct cx22702_config* config,
+-                                         struct i2c_adapter* i2c);
++#if defined(CONFIG_DVB_CX22702) || (defined(CONFIG_DVB_CX22702_MODULE) \
++      && defined(MODULE))
++extern struct dvb_frontend *cx22702_attach(
++      const struct cx22702_config *config,
++      struct i2c_adapter *i2c);
++#else
++static inline struct dvb_frontend *cx22702_attach(
++      const struct cx22702_config *config,
++      struct i2c_adapter *i2c)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return NULL;
++}
++#endif
+ 
+-#endif // CX22702_H
++#endif
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/cx24110.h linux-2.6.18/drivers/media/dvb/frontends/cx24110.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/cx24110.h    2006-09-20 03:42:06.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/cx24110.h 2010-09-09 12:38:50.000000000 +0000
+@@ -33,9 +33,29 @@
+       u8 demod_address;
+ };
+ 
++static inline int cx24110_pll_write(struct dvb_frontend *fe, u32 val)
++{
++      u8 buf[] = {
++              (u8)((val >> 24) & 0xff),
++              (u8)((val >> 16) & 0xff),
++              (u8)((val >> 8) & 0xff)
++      };
++
++      if (fe->ops.write)
++              return fe->ops.write(fe, buf, 3);
++      return 0;
++}
++
++#if defined(CONFIG_DVB_CX24110) || (defined(CONFIG_DVB_CX24110_MODULE) && defined(MODULE))
+ extern struct dvb_frontend* cx24110_attach(const struct cx24110_config* config,
+                                          struct i2c_adapter* i2c);
+-
+-extern int cx24110_pll_write(struct dvb_frontend* fe, u32 data);
++#else
++static inline struct dvb_frontend* cx24110_attach(const struct cx24110_config* config,
++                                                struct i2c_adapter* i2c)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return NULL;
++}
++#endif // CONFIG_DVB_CX24110
+ 
+ #endif // CX24110_H
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/cx24113.h linux-2.6.18/drivers/media/dvb/frontends/cx24113.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/cx24113.h    1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/cx24113.h 2010-09-09 12:38:50.000000000 +0000
+@@ -0,0 +1,53 @@
++/*
++ *  Driver for Conexant CX24113/CX24128 Tuner (Satelite)
++ *
++ *  Copyright (C) 2007-8 Patrick Boettcher <pb@linuxtv.org>
++ *
++ *  This program is free software; you can redistribute it and/or modify
++ *  it under the terms of the GNU General Public License as published by
++ *  the Free Software Foundation; either version 2 of the License, or
++ *  (at your option) any later version.
++ *
++ *  This program is distributed in the hope that it will be useful,
++ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
++ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ *
++ *  GNU General Public License for more details.
++ *
++ *  You should have received a copy of the GNU General Public License
++ *  along with this program; if not, write to the Free Software
++ *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++ */
++
++#ifndef CX24113_H
++#define CX24113_H
++
++struct dvb_frontend;
++
++struct cx24113_config {
++      u8 i2c_addr; /* 0x14 or 0x54 */
++
++      u32 xtal_khz;
++};
++
++#if defined(CONFIG_DVB_TUNER_CX24113) || \
++      (defined(CONFIG_DVB_TUNER_CX24113_MODULE) && defined(MODULE))
++extern struct dvb_frontend *cx24113_attach(struct dvb_frontend *,
++      const struct cx24113_config *config, struct i2c_adapter *i2c);
++
++extern void cx24113_agc_callback(struct dvb_frontend *fe);
++#else
++static inline struct dvb_frontend *cx24113_attach(struct dvb_frontend *fe,
++      const struct cx24113_config *config, struct i2c_adapter *i2c)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return NULL;
++}
++
++static inline void cx24113_agc_callback(struct dvb_frontend *fe)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++}
++#endif
++
++#endif /* CX24113_H */
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/cx24116.h linux-2.6.18/drivers/media/dvb/frontends/cx24116.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/cx24116.h    1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/cx24116.h 2010-09-09 12:38:50.000000000 +0000
+@@ -0,0 +1,55 @@
++/*
++    Conexant cx24116/cx24118 - DVBS/S2 Satellite demod/tuner driver
++
++    Copyright (C) 2006 Steven Toth <stoth@linuxtv.com>
++
++    This program is free software; you can redistribute it and/or modify
++    it under the terms of the GNU General Public License as published by
++    the Free Software Foundation; either version 2 of the License, or
++    (at your option) any later version.
++
++    This program is distributed in the hope that it will be useful,
++    but WITHOUT ANY WARRANTY; without even the implied warranty of
++    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++    GNU General Public License for more details.
++
++    You should have received a copy of the GNU General Public License
++    along with this program; if not, write to the Free Software
++    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++*/
++
++#ifndef CX24116_H
++#define CX24116_H
++
++#include <linux/dvb/frontend.h>
++
++struct cx24116_config {
++      /* the demodulator's i2c address */
++      u8 demod_address;
++
++      /* Need to set device param for start_dma */
++      int (*set_ts_params)(struct dvb_frontend *fe, int is_punctured);
++
++      /* Need to reset device during firmware loading */
++      int (*reset_device)(struct dvb_frontend *fe);
++
++      /* Need to set MPEG parameters */
++      u8 mpg_clk_pos_pol:0x02;
++};
++
++#if defined(CONFIG_DVB_CX24116) || \
++      (defined(CONFIG_DVB_CX24116_MODULE) && defined(MODULE))
++extern struct dvb_frontend *cx24116_attach(
++      const struct cx24116_config *config,
++      struct i2c_adapter *i2c);
++#else
++static inline struct dvb_frontend *cx24116_attach(
++      const struct cx24116_config *config,
++      struct i2c_adapter *i2c)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return NULL;
++}
++#endif
++
++#endif /* CX24116_H */
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/cx24123.h linux-2.6.18/drivers/media/dvb/frontends/cx24123.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/cx24123.h    2006-09-20 03:42:06.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/cx24123.h 2010-09-09 12:38:50.000000000 +0000
+@@ -1,7 +1,7 @@
+ /*
+     Conexant cx24123/cx24109 - DVB QPSK Satellite demod/tuner driver
+ 
+-    Copyright (C) 2005 Steven Toth <stoth@hauppauge.com>
++    Copyright (C) 2005 Steven Toth <stoth@linuxtv.org>
+ 
+     This program is free software; you can redistribute it and/or modify
+     it under the terms of the GNU General Public License as published by
+@@ -23,16 +23,39 @@
+ 
+ #include <linux/dvb/frontend.h>
+ 
+-struct cx24123_config
+-{
++struct cx24123_config {
+       /* the demodulator's i2c address */
+       u8 demod_address;
+ 
+       /* Need to set device param for start_dma */
+-      int (*set_ts_params)(struct dvb_frontend* fe, int is_punctured);
++      int (*set_ts_params)(struct dvb_frontend *fe, int is_punctured);
++
++      /* 0 = LNB voltage normal, 1 = LNB voltage inverted */
++      int lnb_polarity;
++
++      /* this device has another tuner */
++      u8 dont_use_pll;
++      void (*agc_callback) (struct dvb_frontend *);
+ };
+ 
+-extern struct dvb_frontend* cx24123_attach(const struct cx24123_config* config,
+-                                         struct i2c_adapter* i2c);
++#if defined(CONFIG_DVB_CX24123) || (defined(CONFIG_DVB_CX24123_MODULE) \
++      && defined(MODULE))
++extern struct dvb_frontend *cx24123_attach(const struct cx24123_config *config,
++                                         struct i2c_adapter *i2c);
++extern struct i2c_adapter *cx24123_get_tuner_i2c_adapter(struct dvb_frontend *);
++#else
++static inline struct dvb_frontend *cx24123_attach(
++      const struct cx24123_config *config, struct i2c_adapter *i2c)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return NULL;
++}
++static struct i2c_adapter *
++      cx24123_get_tuner_i2c_adapter(struct dvb_frontend *fe)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return NULL;
++}
++#endif
+ 
+ #endif /* CX24123_H */
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/dib0070.h linux-2.6.18/drivers/media/dvb/frontends/dib0070.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/dib0070.h    1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/dib0070.h 2010-09-09 12:38:50.000000000 +0000
+@@ -0,0 +1,76 @@
++/*
++ * Linux-DVB Driver for DiBcom's DiB0070 base-band RF Tuner.
++ *
++ * Copyright (C) 2005-7 DiBcom (http://www.dibcom.fr/)
++ *
++ * This program is free software; you can redistribute it and/or
++ *    modify it under the terms of the GNU General Public License as
++ *    published by the Free Software Foundation, version 2.
++ */
++#ifndef DIB0070_H
++#define DIB0070_H
++
++struct dvb_frontend;
++struct i2c_adapter;
++
++#define DEFAULT_DIB0070_I2C_ADDRESS 0x60
++
++struct dib0070_wbd_gain_cfg {
++      u16 freq;
++      u16 wbd_gain_val;
++};
++
++struct dib0070_config {
++      u8 i2c_address;
++
++      /* tuner pins controlled externally */
++      int (*reset) (struct dvb_frontend *, int);
++      int (*sleep) (struct dvb_frontend *, int);
++
++      /*  offset in kHz */
++      int freq_offset_khz_uhf;
++      int freq_offset_khz_vhf;
++
++      u8 osc_buffer_state;    /* 0= normal, 1= tri-state */
++      u32 clock_khz;
++      u8 clock_pad_drive;     /* (Drive + 1) * 2mA */
++
++      u8 invert_iq;           /* invert Q - in case I or Q is inverted on the board */
++
++      u8 force_crystal_mode;  /* if == 0 -> decision is made in the driver default: <24 -> 2, >=24 -> 1 */
++
++      u8 flip_chip;
++      u8 enable_third_order_filter;
++      u8 charge_pump;
++
++      const struct dib0070_wbd_gain_cfg *wbd_gain;
++
++      u8 vga_filter;
++};
++
++#if defined(CONFIG_DVB_TUNER_DIB0070) || (defined(CONFIG_DVB_TUNER_DIB0070_MODULE) && defined(MODULE))
++extern struct dvb_frontend *dib0070_attach(struct dvb_frontend *fe, struct i2c_adapter *i2c, struct dib0070_config *cfg);
++extern u16 dib0070_wbd_offset(struct dvb_frontend *);
++extern void dib0070_ctrl_agc_filter(struct dvb_frontend *, u8 open);
++extern u8 dib0070_get_rf_output(struct dvb_frontend *fe);
++extern int dib0070_set_rf_output(struct dvb_frontend *fe, u8 no);
++#else
++static inline struct dvb_frontend *dib0070_attach(struct dvb_frontend *fe, struct i2c_adapter *i2c, struct dib0070_config *cfg)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return NULL;
++}
++
++static inline u16 dib0070_wbd_offset(struct dvb_frontend *fe)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return 0;
++}
++
++static inline void dib0070_ctrl_agc_filter(struct dvb_frontend *fe, u8 open)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++}
++#endif
++
++#endif
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/dib0090.h linux-2.6.18/drivers/media/dvb/frontends/dib0090.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/dib0090.h    1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/dib0090.h 2010-09-09 12:38:50.000000000 +0000
+@@ -0,0 +1,108 @@
++/*
++ * Linux-DVB Driver for DiBcom's DiB0090 base-band RF Tuner.
++ *
++ * Copyright (C) 2005-7 DiBcom (http://www.dibcom.fr/)
++ *
++ * This program is free software; you can redistribute it and/or
++ *    modify it under the terms of the GNU General Public License as
++ *    published by the Free Software Foundation, version 2.
++ */
++#ifndef DIB0090_H
++#define DIB0090_H
++
++struct dvb_frontend;
++struct i2c_adapter;
++
++#define DEFAULT_DIB0090_I2C_ADDRESS 0x60
++
++struct dib0090_io_config {
++      u32 clock_khz;
++
++      u8 pll_bypass:1;
++      u8 pll_range:1;
++      u8 pll_prediv:6;
++      u8 pll_loopdiv:6;
++
++      u8 adc_clock_ratio;     /* valid is 8, 7 ,6 */
++      u16 pll_int_loop_filt;
++};
++
++struct dib0090_config {
++      struct dib0090_io_config io;
++      int (*reset) (struct dvb_frontend *, int);
++      int (*sleep) (struct dvb_frontend *, int);
++
++      /*  offset in kHz */
++      int freq_offset_khz_uhf;
++      int freq_offset_khz_vhf;
++
++      int (*get_adc_power) (struct dvb_frontend *);
++
++      u8 clkouttobamse:1;     /* activate or deactivate clock output */
++      u8 analog_output;
++
++      u8 i2c_address;
++      /* add drives and other things if necessary */
++      u16 wbd_vhf_offset;
++      u16 wbd_cband_offset;
++      u8 use_pwm_agc;
++      u8 clkoutdrive;
++};
++
++#if defined(CONFIG_DVB_TUNER_DIB0090) || (defined(CONFIG_DVB_TUNER_DIB0090_MODULE) && defined(MODULE))
++extern struct dvb_frontend *dib0090_register(struct dvb_frontend *fe, struct i2c_adapter *i2c, const struct dib0090_config *config);
++extern void dib0090_dcc_freq(struct dvb_frontend *fe, u8 fast);
++extern void dib0090_pwm_gain_reset(struct dvb_frontend *fe);
++extern u16 dib0090_get_wbd_offset(struct dvb_frontend *tuner);
++extern int dib0090_gain_control(struct dvb_frontend *fe);
++extern enum frontend_tune_state dib0090_get_tune_state(struct dvb_frontend *fe);
++extern int dib0090_set_tune_state(struct dvb_frontend *fe, enum frontend_tune_state tune_state);
++extern void dib0090_get_current_gain(struct dvb_frontend *fe, u16 * rf, u16 * bb, u16 * rf_gain_limit, u16 * rflt);
++#else
++static inline struct dvb_frontend *dib0090_register(struct dvb_frontend *fe, struct i2c_adapter *i2c, struct dib0090_config *config)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return NULL;
++}
++
++static inline void dib0090_dcc_freq(struct dvb_frontend *fe, u8 fast)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++}
++
++static inline void dib0090_pwm_gain_reset(struct dvb_frontend *fe)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++}
++
++static inline u16 dib0090_get_wbd_offset(struct dvb_frontend *tuner)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return 0;
++}
++
++static inline int dib0090_gain_control(struct dvb_frontend *fe)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return -ENODEV;
++}
++
++static inline enum frontend_tune_state dib0090_get_tune_state(struct dvb_frontend *fe)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return CT_DONE;
++}
++
++static inline int dib0090_set_tune_state(struct dvb_frontend *fe, enum frontend_tune_state tune_state)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return -ENODEV;
++}
++
++static inline void dib0090_get_current_gain(struct dvb_frontend *fe, u16 * rf, u16 * bb, u16 * rf_gain_limit, u16 * rflt)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++}
++#endif
++
++#endif
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/dib3000-common.h linux-2.6.18/drivers/media/dvb/frontends/dib3000-common.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/dib3000-common.h     2006-09-20 03:42:06.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/dib3000-common.h  1970-01-01 00:00:00.000000000 +0000
+@@ -1,135 +0,0 @@
+-/*
+- * .h-files for the common use of the frontend drivers made by DiBcom
+- * DiBcom 3000M-B/C, 3000P
+- *
+- * DiBcom (http://www.dibcom.fr/)
+- *
+- * Copyright (C) 2004-5 Patrick Boettcher (patrick.boettcher@desy.de)
+- *
+- * based on GPL code from DibCom, which has
+- *
+- * Copyright (C) 2004 Amaury Demol for DiBcom (ademol@dibcom.fr)
+- *
+- *    This program is free software; you can redistribute it and/or
+- *    modify it under the terms of the GNU General Public License as
+- *    published by the Free Software Foundation, version 2.
+- *
+- * Acknowledgements
+- *
+- *  Amaury Demol (ademol@dibcom.fr) from DiBcom for providing specs and driver
+- *  sources, on which this driver (and the dvb-dibusb) are based.
+- *
+- * see Documentation/dvb/README.dibusb for more information
+- *
+- */
+-
+-#ifndef DIB3000_COMMON_H
+-#define DIB3000_COMMON_H
+-
+-#include "dvb_frontend.h"
+-#include "dib3000.h"
+-
+-/* info and err, taken from usb.h, if there is anything available like by default. */
+-#define err(format, arg...)  printk(KERN_ERR     "dib3000: " format "\n" , ## arg)
+-#define info(format, arg...) printk(KERN_INFO    "dib3000: " format "\n" , ## arg)
+-#define warn(format, arg...) printk(KERN_WARNING "dib3000: " format "\n" , ## arg)
+-
+-/* frontend state */
+-struct dib3000_state {
+-      struct i2c_adapter* i2c;
+-
+-/* configuration settings */
+-      struct dib3000_config config;
+-
+-      struct dvb_frontend frontend;
+-      int timing_offset;
+-      int timing_offset_comp_done;
+-
+-      fe_bandwidth_t last_tuned_bw;
+-      u32 last_tuned_freq;
+-};
+-
+-/* commonly used methods by the dib3000mb/mc/p frontend */
+-extern int dib3000_read_reg(struct dib3000_state *state, u16 reg);
+-extern int dib3000_write_reg(struct dib3000_state *state, u16 reg, u16 val);
+-
+-extern int dib3000_search_status(u16 irq,u16 lock);
+-
+-/* handy shortcuts */
+-#define rd(reg) dib3000_read_reg(state,reg)
+-
+-#define wr(reg,val) if (dib3000_write_reg(state,reg,val)) \
+-      { err("while sending 0x%04x to 0x%04x.",val,reg); return -EREMOTEIO; }
+-
+-#define wr_foreach(a,v) { int i; \
+-      if (sizeof(a) != sizeof(v)) \
+-              err("sizeof: %zu %zu is different",sizeof(a),sizeof(v));\
+-      for (i=0; i < sizeof(a)/sizeof(u16); i++) \
+-              wr(a[i],v[i]); \
+-      }
+-
+-#define set_or(reg,val) wr(reg,rd(reg) | val)
+-
+-#define set_and(reg,val) wr(reg,rd(reg) & val)
+-
+-
+-/* debug */
+-
+-#ifdef CONFIG_DVB_DIBCOM_DEBUG
+-#define dprintk(level,args...) \
+-    do { if ((debug & level)) { printk(args); } } while (0)
+-#else
+-#define dprintk(args...) do { } while (0)
+-#endif
+-
+-/* mask for enabling a specific pid for the pid_filter */
+-#define DIB3000_ACTIVATE_PID_FILTERING        (0x2000)
+-
+-/* common values for tuning */
+-#define DIB3000_ALPHA_0                                       (     0)
+-#define DIB3000_ALPHA_1                                       (     1)
+-#define DIB3000_ALPHA_2                                       (     2)
+-#define DIB3000_ALPHA_4                                       (     4)
+-
+-#define DIB3000_CONSTELLATION_QPSK            (     0)
+-#define DIB3000_CONSTELLATION_16QAM           (     1)
+-#define DIB3000_CONSTELLATION_64QAM           (     2)
+-
+-#define DIB3000_GUARD_TIME_1_32                       (     0)
+-#define DIB3000_GUARD_TIME_1_16                       (     1)
+-#define DIB3000_GUARD_TIME_1_8                        (     2)
+-#define DIB3000_GUARD_TIME_1_4                        (     3)
+-
+-#define DIB3000_TRANSMISSION_MODE_2K  (     0)
+-#define DIB3000_TRANSMISSION_MODE_8K  (     1)
+-
+-#define DIB3000_SELECT_LP                             (     0)
+-#define DIB3000_SELECT_HP                             (     1)
+-
+-#define DIB3000_FEC_1_2                                       (     1)
+-#define DIB3000_FEC_2_3                                       (     2)
+-#define DIB3000_FEC_3_4                                       (     3)
+-#define DIB3000_FEC_5_6                                       (     5)
+-#define DIB3000_FEC_7_8                                       (     7)
+-
+-#define DIB3000_HRCH_OFF                              (     0)
+-#define DIB3000_HRCH_ON                                       (     1)
+-
+-#define DIB3000_DDS_INVERSION_OFF             (     0)
+-#define DIB3000_DDS_INVERSION_ON              (     1)
+-
+-#define DIB3000_TUNER_WRITE_ENABLE(a) (0xffff & (a << 8))
+-#define DIB3000_TUNER_WRITE_DISABLE(a)        (0xffff & ((a << 8) | (1 << 7)))
+-
+-/* for auto search */
+-extern u16 dib3000_seq[2][2][2];
+-
+-#define DIB3000_REG_MANUFACTOR_ID             (  1025)
+-#define DIB3000_I2C_ID_DIBCOM                 (0x01b3)
+-
+-#define DIB3000_REG_DEVICE_ID                 (  1026)
+-#define DIB3000MB_DEVICE_ID                           (0x3000)
+-#define DIB3000MC_DEVICE_ID                           (0x3001)
+-#define DIB3000P_DEVICE_ID                            (0x3002)
+-
+-#endif // DIB3000_COMMON_H
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/dib3000.h linux-2.6.18/drivers/media/dvb/frontends/dib3000.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/dib3000.h    2006-09-20 03:42:06.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/dib3000.h 2010-09-09 12:38:50.000000000 +0000
+@@ -41,9 +41,16 @@
+       int (*tuner_pass_ctrl)(struct dvb_frontend *fe, int onoff, u8 pll_ctrl);
+ };
+ 
++#if defined(CONFIG_DVB_DIB3000MB) || (defined(CONFIG_DVB_DIB3000MB_MODULE) && defined(MODULE))
+ extern struct dvb_frontend* dib3000mb_attach(const struct dib3000_config* config,
+                                            struct i2c_adapter* i2c, struct dib_fe_xfer_ops *xfer_ops);
++#else
++static inline struct dvb_frontend* dib3000mb_attach(const struct dib3000_config* config,
++                                           struct i2c_adapter* i2c, struct dib_fe_xfer_ops *xfer_ops)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return NULL;
++}
++#endif // CONFIG_DVB_DIB3000MB
+ 
+-extern struct dvb_frontend* dib3000mc_attach(const struct dib3000_config* config,
+-                                           struct i2c_adapter* i2c, struct dib_fe_xfer_ops *xfer_ops);
+ #endif // DIB3000_H
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/dib3000mb_priv.h linux-2.6.18/drivers/media/dvb/frontends/dib3000mb_priv.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/dib3000mb_priv.h     2006-09-20 03:42:06.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/dib3000mb_priv.h  2010-09-09 12:38:50.000000000 +0000
+@@ -13,6 +13,99 @@
+ #ifndef __DIB3000MB_PRIV_H_INCLUDED__
+ #define __DIB3000MB_PRIV_H_INCLUDED__
+ 
++/* info and err, taken from usb.h, if there is anything available like by default. */
++#define err(format, arg...)  printk(KERN_ERR     "dib3000: " format "\n" , ## arg)
++#define info(format, arg...) printk(KERN_INFO    "dib3000: " format "\n" , ## arg)
++#define warn(format, arg...) printk(KERN_WARNING "dib3000: " format "\n" , ## arg)
++
++/* handy shortcuts */
++#define rd(reg) dib3000_read_reg(state,reg)
++
++#define wr(reg,val) if (dib3000_write_reg(state,reg,val)) \
++      { err("while sending 0x%04x to 0x%04x.",val,reg); return -EREMOTEIO; }
++
++#define wr_foreach(a,v) { int i; \
++      if (sizeof(a) != sizeof(v)) \
++              err("sizeof: %zu %zu is different",sizeof(a),sizeof(v));\
++      for (i=0; i < sizeof(a)/sizeof(u16); i++) \
++              wr(a[i],v[i]); \
++      }
++
++#define set_or(reg,val) wr(reg,rd(reg) | val)
++
++#define set_and(reg,val) wr(reg,rd(reg) & val)
++
++/* debug */
++
++#ifdef CONFIG_DVB_DIBCOM_DEBUG
++#define dprintk(level,args...) \
++    do { if ((debug & level)) { printk(args); } } while (0)
++#else
++#define dprintk(args...) do { } while (0)
++#endif
++
++/* mask for enabling a specific pid for the pid_filter */
++#define DIB3000_ACTIVATE_PID_FILTERING        (0x2000)
++
++/* common values for tuning */
++#define DIB3000_ALPHA_0                                       (     0)
++#define DIB3000_ALPHA_1                                       (     1)
++#define DIB3000_ALPHA_2                                       (     2)
++#define DIB3000_ALPHA_4                                       (     4)
++
++#define DIB3000_CONSTELLATION_QPSK            (     0)
++#define DIB3000_CONSTELLATION_16QAM           (     1)
++#define DIB3000_CONSTELLATION_64QAM           (     2)
++
++#define DIB3000_GUARD_TIME_1_32                       (     0)
++#define DIB3000_GUARD_TIME_1_16                       (     1)
++#define DIB3000_GUARD_TIME_1_8                        (     2)
++#define DIB3000_GUARD_TIME_1_4                        (     3)
++
++#define DIB3000_TRANSMISSION_MODE_2K  (     0)
++#define DIB3000_TRANSMISSION_MODE_8K  (     1)
++
++#define DIB3000_SELECT_LP                             (     0)
++#define DIB3000_SELECT_HP                             (     1)
++
++#define DIB3000_FEC_1_2                                       (     1)
++#define DIB3000_FEC_2_3                                       (     2)
++#define DIB3000_FEC_3_4                                       (     3)
++#define DIB3000_FEC_5_6                                       (     5)
++#define DIB3000_FEC_7_8                                       (     7)
++
++#define DIB3000_HRCH_OFF                              (     0)
++#define DIB3000_HRCH_ON                                       (     1)
++
++#define DIB3000_DDS_INVERSION_OFF             (     0)
++#define DIB3000_DDS_INVERSION_ON              (     1)
++
++#define DIB3000_TUNER_WRITE_ENABLE(a) (0xffff & (a << 8))
++#define DIB3000_TUNER_WRITE_DISABLE(a)        (0xffff & ((a << 8) | (1 << 7)))
++
++#define DIB3000_REG_MANUFACTOR_ID             (  1025)
++#define DIB3000_I2C_ID_DIBCOM                 (0x01b3)
++
++#define DIB3000_REG_DEVICE_ID                 (  1026)
++#define DIB3000MB_DEVICE_ID                           (0x3000)
++#define DIB3000MC_DEVICE_ID                           (0x3001)
++#define DIB3000P_DEVICE_ID                            (0x3002)
++
++/* frontend state */
++struct dib3000_state {
++      struct i2c_adapter* i2c;
++
++/* configuration settings */
++      struct dib3000_config config;
++
++      struct dvb_frontend frontend;
++      int timing_offset;
++      int timing_offset_comp_done;
++
++      fe_bandwidth_t last_tuned_bw;
++      u32 last_tuned_freq;
++};
++
+ /* register addresses and some of their default values */
+ 
+ /* restart subsystems */
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/dib3000mc.h linux-2.6.18/drivers/media/dvb/frontends/dib3000mc.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/dib3000mc.h  1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/dib3000mc.h       2010-09-09 12:38:50.000000000 +0000
+@@ -0,0 +1,85 @@
++/*
++ * Driver for DiBcom DiB3000MC/P-demodulator.
++ *
++ * Copyright (C) 2004-6 DiBcom (http://www.dibcom.fr/)
++ * Copyright (C) 2004-5 Patrick Boettcher (patrick.boettcher\@desy.de)
++ *
++ * This code is partially based on the previous dib3000mc.c .
++ *
++ * This program is free software; you can redistribute it and/or
++ *    modify it under the terms of the GNU General Public License as
++ *    published by the Free Software Foundation, version 2.
++ */
++#ifndef DIB3000MC_H
++#define DIB3000MC_H
++
++#include "dibx000_common.h"
++
++struct dib3000mc_config {
++      struct dibx000_agc_config *agc;
++
++      u8 phase_noise_mode;
++      u8 impulse_noise_mode;
++
++      u8  pwm3_inversion;
++      u8  use_pwm3;
++      u16 pwm3_value;
++
++      u16 max_time;
++      u16 ln_adc_level;
++
++      u8 agc_command1 :1;
++      u8 agc_command2 :1;
++
++      u8 mobile_mode;
++
++      u8 output_mpeg2_in_188_bytes;
++};
++
++#define DEFAULT_DIB3000MC_I2C_ADDRESS 16
++#define DEFAULT_DIB3000P_I2C_ADDRESS  24
++
++#if defined(CONFIG_DVB_DIB3000MC) || (defined(CONFIG_DVB_DIB3000MC_MODULE) && \
++                                    defined(MODULE))
++extern struct dvb_frontend *dib3000mc_attach(struct i2c_adapter *i2c_adap,
++                                           u8 i2c_addr,
++                                           struct dib3000mc_config *cfg);
++extern int dib3000mc_i2c_enumeration(struct i2c_adapter *i2c,
++                                   int no_of_demods, u8 default_addr,
++                                   struct dib3000mc_config cfg[]);
++extern
++struct i2c_adapter *dib3000mc_get_tuner_i2c_master(struct dvb_frontend *demod,
++                                                 int gating);
++#else
++static inline
++struct dvb_frontend *dib3000mc_attach(struct i2c_adapter *i2c_adap, u8 i2c_addr,
++                                    struct dib3000mc_config *cfg)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return NULL;
++}
++
++static inline
++int dib3000mc_i2c_enumeration(struct i2c_adapter *i2c,
++                            int no_of_demods, u8 default_addr,
++                            struct dib3000mc_config cfg[])
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return -ENODEV;
++}
++
++static inline
++struct i2c_adapter *dib3000mc_get_tuner_i2c_master(struct dvb_frontend *demod,
++                                                 int gating)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return NULL;
++}
++#endif // CONFIG_DVB_DIB3000MC
++
++extern int dib3000mc_pid_control(struct dvb_frontend *fe, int index, int pid,int onoff);
++extern int dib3000mc_pid_parse(struct dvb_frontend *fe, int onoff);
++
++extern void dib3000mc_set_config(struct dvb_frontend *, struct dib3000mc_config *);
++
++#endif
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/dib3000mc_priv.h linux-2.6.18/drivers/media/dvb/frontends/dib3000mc_priv.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/dib3000mc_priv.h     2006-09-20 03:42:06.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/dib3000mc_priv.h  1970-01-01 00:00:00.000000000 +0000
+@@ -1,428 +0,0 @@
+-/*
+- * dib3000mc_priv.h
+- *
+- * Copyright (C) 2004 Patrick Boettcher (patrick.boettcher@desy.de)
+- *
+- *    This program is free software; you can redistribute it and/or
+- *    modify it under the terms of the GNU General Public License as
+- *    published by the Free Software Foundation, version 2.
+- *
+- * for more information see dib3000mc.c .
+- */
+-
+-#ifndef __DIB3000MC_PRIV_H__
+-#define __DIB3000MC_PRIV_H__
+-
+-/*
+- * Demodulator parameters
+- * reg: 0  1 1  1 11 11 111
+- *         | |  |  |  |  |
+- *         | |  |  |  |  +-- alpha (000=0, 001=1, 010=2, 100=4)
+- *         | |  |  |  +----- constellation (00=QPSK, 01=16QAM, 10=64QAM)
+- *         | |  |  +-------- guard (00=1/32, 01=1/16, 10=1/8, 11=1/4)
+- *         | |  +----------- transmission mode (0=2k, 1=8k)
+- *         | |
+- *         | +-------------- restart autosearch for parameters
+- *         +---------------- restart the demodulator
+- * reg: 181      1 111 1
+- *               |  |  |
+- *               |  |  +- FEC applies for HP or LP (0=LP, 1=HP)
+- *               |  +---- FEC rate (001=1/2, 010=2/3, 011=3/4, 101=5/6, 111=7/8)
+- *               +------- hierarchy on (0=no, 1=yes)
+- */
+-
+-/* demodulator tuning parameter and restart options */
+-#define DIB3000MC_REG_DEMOD_PARM              (     0)
+-#define DIB3000MC_DEMOD_PARM(a,c,g,t) ( \
+-               (0x7 & a) | \
+-              ((0x3 & c) << 3) | \
+-              ((0x3 & g) << 5) | \
+-              ((0x1 & t) << 7) )
+-#define DIB3000MC_DEMOD_RST_AUTO_SRCH_ON      (1 << 8)
+-#define DIB3000MC_DEMOD_RST_AUTO_SRCH_OFF     (0 << 8)
+-#define DIB3000MC_DEMOD_RST_DEMOD_ON          (1 << 9)
+-#define DIB3000MC_DEMOD_RST_DEMOD_OFF         (0 << 9)
+-
+-/* register for hierarchy parameters */
+-#define DIB3000MC_REG_HRCH_PARM                       (   181)
+-#define DIB3000MC_HRCH_PARM(s,f,h)            ( \
+-               (0x1 & s) | \
+-              ((0x7 & f) << 1) | \
+-              ((0x1 & h) << 4) )
+-
+-/* timeout ??? */
+-#define DIB3000MC_REG_UNK_1                           (     1)
+-#define DIB3000MC_UNK_1                                       (  0x04)
+-
+-/* timeout ??? */
+-#define DIB3000MC_REG_UNK_2                           (     2)
+-#define DIB3000MC_UNK_2                                       (  0x04)
+-
+-/* timeout ??? */
+-#define DIB3000MC_REG_UNK_3                           (     3)
+-#define DIB3000MC_UNK_3                                       (0x1000)
+-
+-#define DIB3000MC_REG_UNK_4                           (     4)
+-#define DIB3000MC_UNK_4                                       (0x0814)
+-
+-/* timeout ??? */
+-#define DIB3000MC_REG_SEQ_TPS                 (     5)
+-#define DIB3000MC_SEQ_TPS_DEFAULT             (     1)
+-#define DIB3000MC_SEQ_TPS(s,t)                        ( \
+-              ((s & 0x0f) << 4) | \
+-              ((t & 0x01) << 8) )
+-#define DIB3000MC_IS_TPS(v)                           ((v << 8) & 0x1)
+-#define DIB3000MC_IS_AS(v)                            ((v >> 4) & 0xf)
+-
+-/* parameters for the bandwidth */
+-#define DIB3000MC_REG_BW_TIMOUT_MSB           (     6)
+-#define DIB3000MC_REG_BW_TIMOUT_LSB           (     7)
+-
+-static u16 dib3000mc_reg_bandwidth[] = { 6,7,8,9,10,11,16,17 };
+-
+-/*static u16 dib3000mc_bandwidth_5mhz[] =
+-      { 0x28, 0x9380, 0x87, 0x4100, 0x2a4, 0x4500, 0x1, 0xb0d0 };*/
+-
+-static u16 dib3000mc_bandwidth_6mhz[] =
+-      { 0x21, 0xd040, 0x70, 0xb62b, 0x233, 0x8ed5, 0x1, 0xb0d0 };
+-
+-static u16 dib3000mc_bandwidth_7mhz[] =
+-      { 0x1c, 0xfba5, 0x60, 0x9c25, 0x1e3, 0x0cb7, 0x1, 0xb0d0 };
+-
+-static u16 dib3000mc_bandwidth_8mhz[] =
+-      { 0x19, 0x5c30, 0x54, 0x88a0, 0x1a6, 0xab20, 0x1, 0xb0d0 };
+-
+-static u16 dib3000mc_reg_bandwidth_general[] = { 12,13,14,15 };
+-static u16 dib3000mc_bandwidth_general[] = { 0x0000, 0x03e8, 0x0000, 0x03f2 };
+-
+-/* lock mask */
+-#define DIB3000MC_REG_LOCK_MASK                       (    15)
+-#define DIB3000MC_ACTIVATE_LOCK_MASK  (0x0800)
+-
+-/* reset the uncorrected packet count (??? do it 5 times) */
+-#define DIB3000MC_REG_RST_UNC                 (    18)
+-#define DIB3000MC_RST_UNC_ON                  (     1)
+-#define DIB3000MC_RST_UNC_OFF                 (     0)
+-
+-#define DIB3000MC_REG_UNK_19                  (    19)
+-#define DIB3000MC_UNK_19                              (     0)
+-
+-/* DDS frequency value (IF position) and inversion bit */
+-#define DIB3000MC_REG_INVERSION                       (    21)
+-#define DIB3000MC_REG_SET_DDS_FREQ_MSB        (    21)
+-#define DIB3000MC_DDS_FREQ_MSB_INV_OFF        (0x0164)
+-#define DIB3000MC_DDS_FREQ_MSB_INV_ON (0x0364)
+-
+-#define DIB3000MC_REG_SET_DDS_FREQ_LSB        (    22)
+-#define DIB3000MC_DDS_FREQ_LSB                        (0x463d)
+-
+-/* timing frequencies setting */
+-#define DIB3000MC_REG_TIMING_FREQ_MSB (    23)
+-#define DIB3000MC_REG_TIMING_FREQ_LSB (    24)
+-#define DIB3000MC_CLOCK_REF                           (0x151fd1)
+-
+-//static u16 dib3000mc_reg_timing_freq[] = { 23,24 };
+-
+-//static u16 dib3000mc_timing_freq[][2] = {
+-//    { 0x69, 0x9f18 }, /* 5 MHz */
+-//    { 0x7e ,0xbee9 }, /* 6 MHz */
+-//    { 0x93 ,0xdebb }, /* 7 MHz */
+-//    { 0xa8 ,0xfe8c }, /* 8 MHz */
+-//};
+-
+-/* timeout ??? */
+-static u16 dib3000mc_reg_offset[] = { 26,33 };
+-
+-static u16 dib3000mc_offset[][2] = {
+-      { 26240, 5 }, /* default */
+-      { 30336, 6 }, /* 8K */
+-      { 38528, 8 }, /* 2K */
+-};
+-
+-#define DIB3000MC_REG_ISI                             (    29)
+-#define DIB3000MC_ISI_DEFAULT                 (0x1073)
+-#define DIB3000MC_ISI_ACTIVATE                        (0x0000)
+-#define DIB3000MC_ISI_INHIBIT                 (0x0200)
+-
+-/* impulse noise control */
+-static u16 dib3000mc_reg_imp_noise_ctl[] = { 34,35 };
+-
+-static u16 dib3000mc_imp_noise_ctl[][2] = {
+-      { 0x1294, 0x1ff8 }, /* mode 0 */
+-      { 0x1294, 0x1ff8 }, /* mode 1 */
+-      { 0x1294, 0x1ff8 }, /* mode 2 */
+-      { 0x1294, 0x1ff8 }, /* mode 3 */
+-      { 0x1294, 0x1ff8 }, /* mode 4 */
+-};
+-
+-/* AGC registers */
+-static u16 dib3000mc_reg_agc[] = {
+-      36,37,38,39,42,43,44,45,46,47,48,49
+-};
+-
+-static u16 dib3000mc_agc_tuner[][12] = {
+-      {       0x0051, 0x301d, 0x0000, 0x1cc7, 0xcf5c, 0x6666,
+-              0xbae1, 0xa148, 0x3b5e, 0x3c1c, 0x001a, 0x2019
+-      }, /* TUNER_PANASONIC_ENV77H04D5, */
+-
+-      {       0x0051, 0x301d, 0x0000, 0x1cc7, 0xdc29, 0x570a,
+-              0xbae1, 0x8ccd, 0x3b6d, 0x551d, 0x000a, 0x951e
+-      }, /* TUNER_PANASONIC_ENV57H13D5, TUNER_PANASONIC_ENV57H12D5 */
+-
+-      {       0x0051, 0x301d, 0x0000, 0x1cc7, 0xffff, 0xffff,
+-              0xffff, 0x0000, 0xfdfd, 0x4040, 0x00fd, 0x4040
+-      }, /* TUNER_SAMSUNG_DTOS333IH102, TUNER_RFAGCIN_UNKNOWN */
+-
+-      {       0x0196, 0x301d, 0x0000, 0x1cc7, 0xbd71, 0x5c29,
+-              0xb5c3, 0x6148, 0x6569, 0x5127, 0x0033, 0x3537
+-      }, /* TUNER_PROVIDER_X */
+-      /* TODO TUNER_PANASONIC_ENV57H10D8, TUNER_PANASONIC_ENV57H11D8 */
+-};
+-
+-/* AGC loop bandwidth */
+-static u16 dib3000mc_reg_agc_bandwidth[] = { 40,41 };
+-static u16 dib3000mc_agc_bandwidth[]  = { 0x119,0x330 };
+-
+-static u16 dib3000mc_reg_agc_bandwidth_general[] = { 50,51,52,53,54 };
+-static u16 dib3000mc_agc_bandwidth_general[] =
+-      { 0x8000, 0x91ca, 0x01ba, 0x0087, 0x0087 };
+-
+-#define DIB3000MC_REG_IMP_NOISE_55            (    55)
+-#define DIB3000MC_IMP_NEW_ALGO(w)             (w | (1<<10))
+-
+-/* Impulse noise params */
+-static u16 dib3000mc_reg_impulse_noise[] = { 55,56,57 };
+-static u16 dib3000mc_impluse_noise[][3] = {
+-      { 0x489, 0x89, 0x72 }, /* 5 MHz */
+-      { 0x4a5, 0xa5, 0x89 }, /* 6 MHz */
+-      { 0x4c0, 0xc0, 0xa0 }, /* 7 MHz */
+-      { 0x4db, 0xdb, 0xb7 }, /* 8 Mhz */
+-};
+-
+-static u16 dib3000mc_reg_fft[] = {
+-      58,59,60,61,62,63,64,65,66,67,68,69,
+-      70,71,72,73,74,75,76,77,78,79,80,81,
+-      82,83,84,85,86
+-};
+-
+-static u16 dib3000mc_fft_modes[][29] = {
+-      {       0x38, 0x6d9, 0x3f28, 0x7a7, 0x3a74, 0x196, 0x32a, 0x48c,
+-              0x3ffe, 0x7f3, 0x2d94, 0x76, 0x53d,
+-              0x3ff8, 0x7e3, 0x3320, 0x76, 0x5b3,
+-              0x3feb, 0x7d2, 0x365e, 0x76, 0x48c,
+-              0x3ffe, 0x5b3, 0x3feb, 0x76,   0x0, 0xd
+-      }, /* fft mode 0 */
+-      {       0x3b, 0x6d9, 0x3f28, 0x7a7, 0x3a74, 0x196, 0x32a, 0x48c,
+-              0x3ffe, 0x7f3, 0x2d94, 0x76, 0x53d,
+-              0x3ff8, 0x7e3, 0x3320, 0x76, 0x5b3,
+-              0x3feb, 0x7d2, 0x365e, 0x76, 0x48c,
+-              0x3ffe, 0x5b3, 0x3feb, 0x0,  0x8200, 0xd
+-      }, /* fft mode 1 */
+-};
+-
+-#define DIB3000MC_REG_UNK_88                  (    88)
+-#define DIB3000MC_UNK_88                              (0x0410)
+-
+-static u16 dib3000mc_reg_bw[] = { 93,94,95,96,97,98 };
+-static u16 dib3000mc_bw[][6] = {
+-      { 0,0,0,0,0,0 }, /* 5 MHz */
+-      { 0,0,0,0,0,0 }, /* 6 MHz */
+-      { 0,0,0,0,0,0 }, /* 7 MHz */
+-      { 0x20, 0x21, 0x20, 0x23, 0x20, 0x27 }, /* 8 MHz */
+-};
+-
+-
+-/* phase noise control */
+-#define DIB3000MC_REG_UNK_99                  (    99)
+-#define DIB3000MC_UNK_99                              (0x0220)
+-
+-#define DIB3000MC_REG_SCAN_BOOST              (   100)
+-#define DIB3000MC_SCAN_BOOST_ON                       ((11 << 6) + 6)
+-#define DIB3000MC_SCAN_BOOST_OFF              ((16 << 6) + 9)
+-
+-/* timeout ??? */
+-#define DIB3000MC_REG_UNK_110                 (   110)
+-#define DIB3000MC_UNK_110                             (  3277)
+-
+-#define DIB3000MC_REG_UNK_111                 (   111)
+-#define DIB3000MC_UNK_111_PH_N_MODE_0 (     0)
+-#define DIB3000MC_UNK_111_PH_N_MODE_1 (1 << 1)
+-
+-/* superious rm config */
+-#define DIB3000MC_REG_UNK_120                 (   120)
+-#define DIB3000MC_UNK_120                             (  8207)
+-
+-#define DIB3000MC_REG_UNK_133                 (   133)
+-#define DIB3000MC_UNK_133                             ( 15564)
+-
+-#define DIB3000MC_REG_UNK_134                 (   134)
+-#define DIB3000MC_UNK_134                             (     0)
+-
+-/* adapter config for constellation */
+-static u16 dib3000mc_reg_adp_cfg[] = { 129, 130, 131, 132 };
+-
+-static u16 dib3000mc_adp_cfg[][4] = {
+-      { 0x99a, 0x7fae, 0x333, 0x7ff0 }, /* QPSK  */
+-      { 0x23d, 0x7fdf, 0x0a4, 0x7ff0 }, /* 16-QAM */
+-      { 0x148, 0x7ff0, 0x0a4, 0x7ff8 }, /* 64-QAM */
+-};
+-
+-static u16 dib3000mc_reg_mobile_mode[] = { 139, 140, 141, 175, 1032 };
+-
+-static u16 dib3000mc_mobile_mode[][5] = {
+-      { 0x01, 0x0, 0x0, 0x00, 0x12c }, /* fixed */
+-      { 0x01, 0x0, 0x0, 0x00, 0x12c }, /* portable */
+-      { 0x00, 0x0, 0x0, 0x02, 0x000 }, /* mobile */
+-      { 0x00, 0x0, 0x0, 0x02, 0x000 }, /* auto */
+-};
+-
+-#define DIB3000MC_REG_DIVERSITY1              (   177)
+-#define DIB3000MC_DIVERSITY1_DEFAULT  (     1)
+-
+-#define DIB3000MC_REG_DIVERSITY2              (   178)
+-#define DIB3000MC_DIVERSITY2_DEFAULT  (     1)
+-
+-#define DIB3000MC_REG_DIVERSITY3              (   180)
+-#define DIB3000MC_DIVERSITY3_IN_OFF           (0xfff0)
+-#define DIB3000MC_DIVERSITY3_IN_ON            (0xfff6)
+-
+-#define DIB3000MC_REG_FEC_CFG                 (   195)
+-#define DIB3000MC_FEC_CFG                             (  0x10)
+-
+-/*
+- * reg 206, output mode
+- *              1111 1111
+- *              |||| ||||
+- *              |||| |||+- unk
+- *              |||| ||+-- unk
+- *              |||| |+--- unk (on by default)
+- *              |||| +---- fifo_ctrl (1 = inhibit (flushed), 0 = active (unflushed))
+- *              |||+------ pid_parse (1 = enabled, 0 = disabled)
+- *              ||+------- outp_188  (1 = TS packet size 188, 0 = packet size 204)
+- *              |+-------- unk
+- *              +--------- unk
+- */
+-
+-#define DIB3000MC_REG_SMO_MODE                        (   206)
+-#define DIB3000MC_SMO_MODE_DEFAULT            (1 << 2)
+-#define DIB3000MC_SMO_MODE_FIFO_FLUSH (1 << 3)
+-#define DIB3000MC_SMO_MODE_FIFO_UNFLUSH       (0xfff7)
+-#define DIB3000MC_SMO_MODE_PID_PARSE  (1 << 4)
+-#define DIB3000MC_SMO_MODE_NO_PID_PARSE       (0xffef)
+-#define DIB3000MC_SMO_MODE_188                        (1 << 5)
+-#define DIB3000MC_SMO_MODE_SLAVE              (DIB3000MC_SMO_MODE_DEFAULT | \
+-                      DIB3000MC_SMO_MODE_188 | DIB3000MC_SMO_MODE_PID_PARSE | (1<<1))
+-
+-#define DIB3000MC_REG_FIFO_THRESHOLD  (   207)
+-#define DIB3000MC_FIFO_THRESHOLD_DEFAULT      (  1792)
+-#define DIB3000MC_FIFO_THRESHOLD_SLAVE        (   512)
+-/*
+- * pidfilter
+- * it is not a hardware pidfilter but a filter which drops all pids
+- * except the ones set. When connected to USB1.1 bandwidth this is important.
+- * DiB3000P/M-C can filter up to 32 PIDs
+- */
+-#define DIB3000MC_REG_FIRST_PID                       (   212)
+-#define DIB3000MC_NUM_PIDS                            (    32)
+-
+-#define DIB3000MC_REG_OUTMODE                 (   244)
+-#define DIB3000MC_OM_PARALLEL_GATED_CLK       (     0)
+-#define DIB3000MC_OM_PAR_CONT_CLK             (1 << 11)
+-#define DIB3000MC_OM_SERIAL                           (2 << 11)
+-#define DIB3000MC_OM_DIVOUT_ON                        (4 << 11)
+-#define DIB3000MC_OM_SLAVE                            (DIB3000MC_OM_DIVOUT_ON | DIB3000MC_OM_PAR_CONT_CLK)
+-
+-#define DIB3000MC_REG_RF_POWER                        (   392)
+-
+-#define DIB3000MC_REG_FFT_POSITION            (   407)
+-
+-#define DIB3000MC_REG_DDS_FREQ_MSB            (   414)
+-#define DIB3000MC_REG_DDS_FREQ_LSB            (   415)
+-
+-#define DIB3000MC_REG_TIMING_OFFS_MSB (   416)
+-#define DIB3000MC_REG_TIMING_OFFS_LSB (   417)
+-
+-#define DIB3000MC_REG_TUNING_PARM             (   458)
+-#define DIB3000MC_TP_QAM(v)                           ((v >> 13) & 0x03)
+-#define DIB3000MC_TP_HRCH(v)                  ((v >> 12) & 0x01)
+-#define DIB3000MC_TP_ALPHA(v)                 ((v >> 9) & 0x07)
+-#define DIB3000MC_TP_FFT(v)                           ((v >> 8) & 0x01)
+-#define DIB3000MC_TP_FEC_CR_HP(v)             ((v >> 5) & 0x07)
+-#define DIB3000MC_TP_FEC_CR_LP(v)             ((v >> 2) & 0x07)
+-#define DIB3000MC_TP_GUARD(v)                 (v & 0x03)
+-
+-#define DIB3000MC_REG_SIGNAL_NOISE_MSB        (   483)
+-#define DIB3000MC_REG_SIGNAL_NOISE_LSB        (   484)
+-
+-#define DIB3000MC_REG_MER                             (   485)
+-
+-#define DIB3000MC_REG_BER_MSB                 (   500)
+-#define DIB3000MC_REG_BER_LSB                 (   501)
+-
+-#define DIB3000MC_REG_PACKET_ERRORS           (   503)
+-
+-#define DIB3000MC_REG_PACKET_ERROR_COUNT      (   506)
+-
+-#define DIB3000MC_REG_LOCK_507                        (   507)
+-#define DIB3000MC_LOCK_507                            (0x0002) // ? name correct ?
+-
+-#define DIB3000MC_REG_LOCKING                 (   509)
+-#define DIB3000MC_AGC_LOCK(v)                 (v & 0x8000)
+-#define DIB3000MC_CARRIER_LOCK(v)             (v & 0x2000)
+-#define DIB3000MC_MPEG_SYNC_LOCK(v)           (v & 0x0080)
+-#define DIB3000MC_MPEG_DATA_LOCK(v)           (v & 0x0040)
+-#define DIB3000MC_TPS_LOCK(v)                 (v & 0x0004)
+-
+-#define DIB3000MC_REG_AS_IRQ                  (   511)
+-#define DIB3000MC_AS_IRQ_SUCCESS              (1 << 1)
+-#define DIB3000MC_AS_IRQ_FAIL                 (     1)
+-
+-#define DIB3000MC_REG_TUNER                           (   769)
+-
+-#define DIB3000MC_REG_RST_I2C_ADDR            (  1024)
+-#define DIB3000MC_DEMOD_ADDR_ON                       (     1)
+-#define DIB3000MC_DEMOD_ADDR(a)                       ((a << 4) & 0x03F0)
+-
+-#define DIB3000MC_REG_RESTART                 (  1027)
+-#define DIB3000MC_RESTART_OFF                 (0x0000)
+-#define DIB3000MC_RESTART_AGC                 (0x0800)
+-#define DIB3000MC_RESTART_CONFIG              (0x8000)
+-
+-#define DIB3000MC_REG_RESTART_VIT             (  1028)
+-#define DIB3000MC_RESTART_VIT_OFF             (     0)
+-#define DIB3000MC_RESTART_VIT_ON              (     1)
+-
+-#define DIB3000MC_REG_CLK_CFG_1                       (  1031)
+-#define DIB3000MC_CLK_CFG_1_POWER_UP  (     0)
+-#define DIB3000MC_CLK_CFG_1_POWER_DOWN        (0xffff)
+-
+-#define DIB3000MC_REG_CLK_CFG_2                       (  1032)
+-#define DIB3000MC_CLK_CFG_2_PUP_FIXED (0x012c)
+-#define DIB3000MC_CLK_CFG_2_PUP_PORT  (0x0104)
+-#define DIB3000MC_CLK_CFG_2_PUP_MOBILE  (0x0000)
+-#define DIB3000MC_CLK_CFG_2_POWER_DOWN        (0xffff)
+-
+-#define DIB3000MC_REG_CLK_CFG_3                       (  1033)
+-#define DIB3000MC_CLK_CFG_3_POWER_UP  (     0)
+-#define DIB3000MC_CLK_CFG_3_POWER_DOWN        (0xfff5)
+-
+-#define DIB3000MC_REG_CLK_CFG_7                       (  1037)
+-#define DIB3000MC_CLK_CFG_7_INIT              ( 12592)
+-#define DIB3000MC_CLK_CFG_7_POWER_UP  (~0x0003)
+-#define DIB3000MC_CLK_CFG_7_PWR_DOWN  (0x0003)
+-#define DIB3000MC_CLK_CFG_7_DIV_IN_OFF        (1 << 8)
+-
+-/* was commented out ??? */
+-#define DIB3000MC_REG_CLK_CFG_8                       (  1038)
+-#define DIB3000MC_CLK_CFG_8_POWER_UP  (0x160c)
+-
+-#define DIB3000MC_REG_CLK_CFG_9                       (  1039)
+-#define DIB3000MC_CLK_CFG_9_POWER_UP  (     0)
+-
+-/* also clock ??? */
+-#define DIB3000MC_REG_ELEC_OUT                        (  1040)
+-#define DIB3000MC_ELEC_OUT_HIGH_Z             (     0)
+-#define DIB3000MC_ELEC_OUT_DIV_OUT_ON (     1)
+-#define DIB3000MC_ELEC_OUT_SLAVE              (     3)
+-
+-#endif
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/dib7000m.h linux-2.6.18/drivers/media/dvb/frontends/dib7000m.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/dib7000m.h   1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/dib7000m.h        2010-09-09 12:38:50.000000000 +0000
+@@ -0,0 +1,75 @@
++#ifndef DIB7000M_H
++#define DIB7000M_H
++
++#include "dibx000_common.h"
++
++struct dib7000m_config {
++      u8 dvbt_mode;
++      u8 output_mpeg2_in_188_bytes;
++      u8 hostbus_diversity;
++      u8 tuner_is_baseband;
++      u8 mobile_mode;
++      int (*update_lna) (struct dvb_frontend *, u16 agc_global);
++
++      u8 agc_config_count;
++      struct dibx000_agc_config *agc;
++
++      struct dibx000_bandwidth_config *bw;
++
++#define DIB7000M_GPIO_DEFAULT_DIRECTIONS 0xffff
++      u16 gpio_dir;
++#define DIB7000M_GPIO_DEFAULT_VALUES     0x0000
++      u16 gpio_val;
++#define DIB7000M_GPIO_PWM_POS0(v)        ((v & 0xf) << 12)
++#define DIB7000M_GPIO_PWM_POS1(v)        ((v & 0xf) << 8 )
++#define DIB7000M_GPIO_PWM_POS2(v)        ((v & 0xf) << 4 )
++#define DIB7000M_GPIO_PWM_POS3(v)         (v & 0xf)
++#define DIB7000M_GPIO_DEFAULT_PWM_POS    0xffff
++      u16 gpio_pwm_pos;
++
++      u16 pwm_freq_div;
++
++      u8 quartz_direct;
++
++      u8 input_clk_is_div_2;
++
++      int (*agc_control) (struct dvb_frontend *, u8 before);
++};
++
++#define DEFAULT_DIB7000M_I2C_ADDRESS 18
++
++#if defined(CONFIG_DVB_DIB7000M) || (defined(CONFIG_DVB_DIB7000M_MODULE) && \
++                                   defined(MODULE))
++extern struct dvb_frontend *dib7000m_attach(struct i2c_adapter *i2c_adap,
++                                          u8 i2c_addr,
++                                          struct dib7000m_config *cfg);
++extern struct i2c_adapter *dib7000m_get_i2c_master(struct dvb_frontend *,
++                                                 enum dibx000_i2c_interface,
++                                                 int);
++#else
++static inline
++struct dvb_frontend *dib7000m_attach(struct i2c_adapter *i2c_adap,
++                                   u8 i2c_addr, struct dib7000m_config *cfg)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return NULL;
++}
++
++static inline
++struct i2c_adapter *dib7000m_get_i2c_master(struct dvb_frontend *demod,
++                                          enum dibx000_i2c_interface intf,
++                                          int gating)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return NULL;
++}
++#endif
++
++/* TODO
++extern INT dib7000m_set_gpio(struct dibDemod *demod, UCHAR num, UCHAR dir, UCHAR val);
++extern INT dib7000m_enable_vbg_voltage(struct dibDemod *demod);
++extern void dib7000m_set_hostbus_diversity(struct dibDemod *demod, UCHAR onoff);
++extern USHORT dib7000m_get_current_agc_global(struct dibDemod *demod);
++*/
++
++#endif
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/dib7000p.h linux-2.6.18/drivers/media/dvb/frontends/dib7000p.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/dib7000p.h   1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/dib7000p.h        2010-09-09 12:38:50.000000000 +0000
+@@ -0,0 +1,113 @@
++#ifndef DIB7000P_H
++#define DIB7000P_H
++
++#include "dibx000_common.h"
++
++struct dib7000p_config {
++      u8 output_mpeg2_in_188_bytes;
++      u8 hostbus_diversity;
++      u8 tuner_is_baseband;
++      int (*update_lna) (struct dvb_frontend *, u16 agc_global);
++
++      u8 agc_config_count;
++      struct dibx000_agc_config *agc;
++      struct dibx000_bandwidth_config *bw;
++
++#define DIB7000P_GPIO_DEFAULT_DIRECTIONS 0xffff
++      u16 gpio_dir;
++#define DIB7000P_GPIO_DEFAULT_VALUES     0x0000
++      u16 gpio_val;
++#define DIB7000P_GPIO_PWM_POS0(v)        ((v & 0xf) << 12)
++#define DIB7000P_GPIO_PWM_POS1(v)        ((v & 0xf) << 8 )
++#define DIB7000P_GPIO_PWM_POS2(v)        ((v & 0xf) << 4 )
++#define DIB7000P_GPIO_PWM_POS3(v)         (v & 0xf)
++#define DIB7000P_GPIO_DEFAULT_PWM_POS    0xffff
++      u16 gpio_pwm_pos;
++
++      u16 pwm_freq_div;
++
++      u8 quartz_direct;
++
++      u8 spur_protect;
++
++      int (*agc_control) (struct dvb_frontend *, u8 before);
++
++      u8 output_mode;
++};
++
++#define DEFAULT_DIB7000P_I2C_ADDRESS 18
++
++#if defined(CONFIG_DVB_DIB7000P) || (defined(CONFIG_DVB_DIB7000P_MODULE) && \
++                                   defined(MODULE))
++extern struct dvb_frontend *dib7000p_attach(struct i2c_adapter *i2c_adap,
++                                          u8 i2c_addr,
++                                          struct dib7000p_config *cfg);
++extern struct i2c_adapter *dib7000p_get_i2c_master(struct dvb_frontend *,
++                                                 enum dibx000_i2c_interface,
++                                                 int);
++extern int dib7000p_i2c_enumeration(struct i2c_adapter *i2c,
++                                  int no_of_demods, u8 default_addr,
++                                  struct dib7000p_config cfg[]);
++extern int dib7000p_set_gpio(struct dvb_frontend *, u8 num, u8 dir, u8 val);
++extern int dib7000p_set_wbd_ref(struct dvb_frontend *, u16 value);
++extern int dib7000pc_detection(struct i2c_adapter *i2c_adap);
++extern int dib7000p_pid_filter(struct dvb_frontend *, u8 id, u16 pid, u8 onoff);
++extern int dib7000p_pid_filter_ctrl(struct dvb_frontend *fe, u8 onoff);
++#else
++static inline
++struct dvb_frontend *dib7000p_attach(struct i2c_adapter *i2c_adap, u8 i2c_addr,
++                                   struct dib7000p_config *cfg)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return NULL;
++}
++
++static inline
++struct i2c_adapter *dib7000p_get_i2c_master(struct dvb_frontend *fe,
++                                          enum dibx000_i2c_interface i,
++                                          int x)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return NULL;
++}
++
++static inline int dib7000p_i2c_enumeration(struct i2c_adapter *i2c,
++                                         int no_of_demods, u8 default_addr,
++                                         struct dib7000p_config cfg[])
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return -ENODEV;
++}
++
++static inline int dib7000p_set_gpio(struct dvb_frontend *fe,
++                                  u8 num, u8 dir, u8 val)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return -ENODEV;
++}
++
++static inline int dib7000p_set_wbd_ref(struct dvb_frontend *fe, u16 value)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return -ENODEV;
++}
++
++static inline int dib7000pc_detection(struct i2c_adapter *i2c_adap)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return -ENODEV;
++}
++static inline int dib7000p_pid_filter(struct dvb_frontend *fe, u8 id, u16 pid, u8 onoff)
++{
++    printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++    return -ENODEV;
++}
++
++static inline int dib7000p_pid_filter_ctrl(struct dvb_frontend *fe, uint8_t onoff)
++{
++    printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++    return -ENODEV;
++}
++#endif
++
++#endif
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/dib8000.h linux-2.6.18/drivers/media/dvb/frontends/dib8000.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/dib8000.h    1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/dib8000.h 2010-09-09 12:38:50.000000000 +0000
+@@ -0,0 +1,116 @@
++#ifndef DIB8000_H
++#define DIB8000_H
++
++#include "dibx000_common.h"
++
++struct dib8000_config {
++      u8 output_mpeg2_in_188_bytes;
++      u8 hostbus_diversity;
++      u8 tuner_is_baseband;
++      int (*update_lna) (struct dvb_frontend *, u16 agc_global);
++
++      u8 agc_config_count;
++      struct dibx000_agc_config *agc;
++      struct dibx000_bandwidth_config *pll;
++
++#define DIB8000_GPIO_DEFAULT_DIRECTIONS 0xffff
++      u16 gpio_dir;
++#define DIB8000_GPIO_DEFAULT_VALUES     0x0000
++      u16 gpio_val;
++#define DIB8000_GPIO_PWM_POS0(v)        ((v & 0xf) << 12)
++#define DIB8000_GPIO_PWM_POS1(v)        ((v & 0xf) << 8 )
++#define DIB8000_GPIO_PWM_POS2(v)        ((v & 0xf) << 4 )
++#define DIB8000_GPIO_PWM_POS3(v)         (v & 0xf)
++#define DIB8000_GPIO_DEFAULT_PWM_POS    0xffff
++      u16 gpio_pwm_pos;
++      u16 pwm_freq_div;
++
++      void (*agc_control) (struct dvb_frontend *, u8 before);
++
++      u16 drives;
++      u16 diversity_delay;
++      u8 div_cfg;
++      u8 output_mode;
++      u8 refclksel;
++};
++
++#define DEFAULT_DIB8000_I2C_ADDRESS 18
++
++#if defined(CONFIG_DVB_DIB8000) || (defined(CONFIG_DVB_DIB8000_MODULE) && defined(MODULE))
++extern struct dvb_frontend *dib8000_attach(struct i2c_adapter *i2c_adap, u8 i2c_addr, struct dib8000_config *cfg);
++extern struct i2c_adapter *dib8000_get_i2c_master(struct dvb_frontend *, enum dibx000_i2c_interface, int);
++
++extern int dib8000_i2c_enumeration(struct i2c_adapter *host, int no_of_demods, u8 default_addr, u8 first_addr);
++
++extern int dib8000_set_gpio(struct dvb_frontend *, u8 num, u8 dir, u8 val);
++extern int dib8000_set_wbd_ref(struct dvb_frontend *, u16 value);
++extern int dib8000_pid_filter_ctrl(struct dvb_frontend *, u8 onoff);
++extern int dib8000_pid_filter(struct dvb_frontend *, u8 id, u16 pid, u8 onoff);
++extern int dib8000_set_tune_state(struct dvb_frontend *fe, enum frontend_tune_state tune_state);
++extern enum frontend_tune_state dib8000_get_tune_state(struct dvb_frontend *fe);
++extern void dib8000_pwm_agc_reset(struct dvb_frontend *fe);
++extern s32 dib8000_get_adc_power(struct dvb_frontend *fe, u8 mode);
++#else
++static inline struct dvb_frontend *dib8000_attach(struct i2c_adapter *i2c_adap, u8 i2c_addr, struct dib8000_config *cfg)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return NULL;
++}
++
++static inline struct i2c_adapter *dib8000_get_i2c_master(struct dvb_frontend *fe, enum dibx000_i2c_interface i, int x)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return NULL;
++}
++
++static inline int dib8000_i2c_enumeration(struct i2c_adapter *host, int no_of_demods, u8 default_addr, u8 first_addr)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return -ENODEV;
++}
++
++static inline int dib8000_set_gpio(struct dvb_frontend *fe, u8 num, u8 dir, u8 val)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return -ENODEV;
++}
++
++static inline int dib8000_set_wbd_ref(struct dvb_frontend *fe, u16 value)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return -ENODEV;
++}
++
++static inline int dib8000_pid_filter_ctrl(struct dvb_frontend *fe, u8 onoff)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return -ENODEV;
++}
++
++static inline int dib8000_pid_filter(struct dvb_frontend *fe, u8 id, u16 pid, u8 onoff)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return -ENODEV;
++}
++static inline int dib8000_set_tune_state(struct dvb_frontend *fe, enum frontend_tune_state tune_state)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return -ENODEV;
++}
++static inline enum frontend_tune_state dib8000_get_tune_state(struct dvb_frontend *fe)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return CT_SHUTDOWN;
++}
++static inline void dib8000_pwm_agc_reset(struct dvb_frontend *fe)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++}
++static inline s32 dib8000_get_adc_power(struct dvb_frontend *fe, u8 mode)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return 0;
++}
++#endif
++
++#endif
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/dibx000_common.h linux-2.6.18/drivers/media/dvb/frontends/dibx000_common.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/dibx000_common.h     1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/dibx000_common.h  2010-09-09 12:38:50.000000000 +0000
+@@ -0,0 +1,219 @@
++#ifndef DIBX000_COMMON_H
++#define DIBX000_COMMON_H
++
++enum dibx000_i2c_interface {
++      DIBX000_I2C_INTERFACE_TUNER = 0,
++      DIBX000_I2C_INTERFACE_GPIO_1_2 = 1,
++      DIBX000_I2C_INTERFACE_GPIO_3_4 = 2
++};
++
++struct dibx000_i2c_master {
++#define DIB3000MC 1
++#define DIB7000   2
++#define DIB7000P  11
++#define DIB7000MC 12
++#define DIB8000   13
++      u16 device_rev;
++
++      enum dibx000_i2c_interface selected_interface;
++
++//      struct i2c_adapter  tuner_i2c_adap;
++      struct i2c_adapter gated_tuner_i2c_adap;
++
++      struct i2c_adapter *i2c_adap;
++      u8 i2c_addr;
++
++      u16 base_reg;
++};
++
++extern int dibx000_init_i2c_master(struct dibx000_i2c_master *mst,
++                                 u16 device_rev, struct i2c_adapter *i2c_adap,
++                                 u8 i2c_addr);
++extern struct i2c_adapter *dibx000_get_i2c_adapter(struct dibx000_i2c_master
++                                                 *mst,
++                                                 enum dibx000_i2c_interface
++                                                 intf, int gating);
++extern void dibx000_exit_i2c_master(struct dibx000_i2c_master *mst);
++extern void dibx000_reset_i2c_master(struct dibx000_i2c_master *mst);
++
++extern u32 systime(void);
++
++#define BAND_LBAND 0x01
++#define BAND_UHF   0x02
++#define BAND_VHF   0x04
++#define BAND_SBAND 0x08
++#define BAND_FM    0x10
++#define BAND_CBAND 0x20
++
++#define BAND_OF_FREQUENCY(freq_kHz) ((freq_kHz) <= 170000 ? BAND_CBAND : \
++                                                                      (freq_kHz) <= 115000 ? BAND_FM : \
++                                                                      (freq_kHz) <= 250000 ? BAND_VHF : \
++                                                                      (freq_kHz) <= 863000 ? BAND_UHF : \
++                                                                      (freq_kHz) <= 2000000 ? BAND_LBAND : BAND_SBAND )
++
++struct dibx000_agc_config {
++      /* defines the capabilities of this AGC-setting - using the BAND_-defines */
++      u8 band_caps;
++
++      u16 setup;
++
++      u16 inv_gain;
++      u16 time_stabiliz;
++
++      u8 alpha_level;
++      u16 thlock;
++
++      u8 wbd_inv;
++      u16 wbd_ref;
++      u8 wbd_sel;
++      u8 wbd_alpha;
++
++      u16 agc1_max;
++      u16 agc1_min;
++      u16 agc2_max;
++      u16 agc2_min;
++
++      u8 agc1_pt1;
++      u8 agc1_pt2;
++      u8 agc1_pt3;
++
++      u8 agc1_slope1;
++      u8 agc1_slope2;
++
++      u8 agc2_pt1;
++      u8 agc2_pt2;
++
++      u8 agc2_slope1;
++      u8 agc2_slope2;
++
++      u8 alpha_mant;
++      u8 alpha_exp;
++
++      u8 beta_mant;
++      u8 beta_exp;
++
++      u8 perform_agc_softsplit;
++
++      struct {
++              u16 min;
++              u16 max;
++              u16 min_thres;
++              u16 max_thres;
++      } split;
++};
++
++struct dibx000_bandwidth_config {
++      u32 internal;
++      u32 sampling;
++
++      u8 pll_prediv;
++      u8 pll_ratio;
++      u8 pll_range;
++      u8 pll_reset;
++      u8 pll_bypass;
++
++      u8 enable_refdiv;
++      u8 bypclk_div;
++      u8 IO_CLK_en_core;
++      u8 ADClkSrc;
++      u8 modulo;
++
++      u16 sad_cfg;
++
++      u32 ifreq;
++      u32 timf;
++
++      u32 xtal_hz;
++};
++
++enum dibx000_adc_states {
++      DIBX000_SLOW_ADC_ON = 0,
++      DIBX000_SLOW_ADC_OFF,
++      DIBX000_ADC_ON,
++      DIBX000_ADC_OFF,
++      DIBX000_VBG_ENABLE,
++      DIBX000_VBG_DISABLE,
++};
++
++#define BANDWIDTH_TO_KHZ(v) ( (v) == BANDWIDTH_8_MHZ  ? 8000 : \
++                           (v) == BANDWIDTH_7_MHZ  ? 7000 : \
++                           (v) == BANDWIDTH_6_MHZ  ? 6000 : 8000 )
++
++#define BANDWIDTH_TO_INDEX(v) ( \
++      (v) == 8000 ? BANDWIDTH_8_MHZ : \
++              (v) == 7000 ? BANDWIDTH_7_MHZ : \
++              (v) == 6000 ? BANDWIDTH_6_MHZ : BANDWIDTH_8_MHZ )
++
++/* Chip output mode. */
++#define OUTMODE_HIGH_Z              0
++#define OUTMODE_MPEG2_PAR_GATED_CLK 1
++#define OUTMODE_MPEG2_PAR_CONT_CLK  2
++#define OUTMODE_MPEG2_SERIAL        7
++#define OUTMODE_DIVERSITY           4
++#define OUTMODE_MPEG2_FIFO          5
++#define OUTMODE_ANALOG_ADC          6
++
++enum frontend_tune_state {
++    CT_TUNER_START = 10,
++    CT_TUNER_STEP_0,
++    CT_TUNER_STEP_1,
++    CT_TUNER_STEP_2,
++    CT_TUNER_STEP_3,
++    CT_TUNER_STEP_4,
++    CT_TUNER_STEP_5,
++    CT_TUNER_STEP_6,
++    CT_TUNER_STEP_7,
++    CT_TUNER_STOP,
++
++    CT_AGC_START = 20,
++    CT_AGC_STEP_0,
++    CT_AGC_STEP_1,
++    CT_AGC_STEP_2,
++    CT_AGC_STEP_3,
++    CT_AGC_STEP_4,
++    CT_AGC_STOP,
++
++      CT_DEMOD_START = 30,
++    CT_DEMOD_STEP_1,
++    CT_DEMOD_STEP_2,
++    CT_DEMOD_STEP_3,
++    CT_DEMOD_STEP_4,
++    CT_DEMOD_STEP_5,
++    CT_DEMOD_STEP_6,
++    CT_DEMOD_STEP_7,
++    CT_DEMOD_STEP_8,
++    CT_DEMOD_STEP_9,
++    CT_DEMOD_STEP_10,
++    CT_DEMOD_SEARCH_NEXT = 41,
++    CT_DEMOD_STEP_LOCKED,
++    CT_DEMOD_STOP,
++
++    CT_DONE = 100,
++    CT_SHUTDOWN,
++
++};
++
++struct dvb_frontend_parametersContext {
++#define CHANNEL_STATUS_PARAMETERS_UNKNOWN   0x01
++#define CHANNEL_STATUS_PARAMETERS_SET       0x02
++    u8 status;
++    u32 tune_time_estimation[2];
++    s32 tps_available;
++    u16 tps[9];
++};
++
++#define FE_STATUS_TUNE_FAILED          0
++#define FE_STATUS_TUNE_TIMED_OUT      -1
++#define FE_STATUS_TUNE_TIME_TOO_SHORT -2
++#define FE_STATUS_TUNE_PENDING        -3
++#define FE_STATUS_STD_SUCCESS         -4
++#define FE_STATUS_FFT_SUCCESS         -5
++#define FE_STATUS_DEMOD_SUCCESS       -6
++#define FE_STATUS_LOCKED              -7
++#define FE_STATUS_DATA_LOCKED         -8
++
++#define FE_CALLBACK_TIME_NEVER 0xffffffff
++
++#define ABS(x) ((x < 0) ? (-x) : (x))
++
++#endif
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/drx397xD_fw.h linux-2.6.18/drivers/media/dvb/frontends/drx397xD_fw.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/drx397xD_fw.h        1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/drx397xD_fw.h     2010-09-09 12:38:50.000000000 +0000
+@@ -0,0 +1,40 @@
++/*
++ * Firmware definitions for Micronas drx397xD
++ *
++ * Copyright (C) 2007 Henk Vergonet <Henk.Vergonet@gmail.com>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; If not, see <http://www.gnu.org/licenses/>.
++ */
++
++#ifdef _FW_ENTRY
++      _FW_ENTRY("drx397xD.A2.fw",     DRXD_FW_A2 = 0, DRXD_FW_A2      ),
++      _FW_ENTRY("drx397xD.B1.fw",     DRXD_FW_B1,     DRXD_FW_B1      ),
++#undef _FW_ENTRY
++#endif /* _FW_ENTRY */
++
++#ifdef _BLOB_ENTRY
++      _BLOB_ENTRY("InitAtomicRead",   DRXD_InitAtomicRead = 0 ),
++      _BLOB_ENTRY("InitCE",           DRXD_InitCE             ),
++      _BLOB_ENTRY("InitCP",           DRXD_InitCP             ),
++      _BLOB_ENTRY("InitEC",           DRXD_InitEC             ),
++      _BLOB_ENTRY("InitEQ",           DRXD_InitEQ             ),
++      _BLOB_ENTRY("InitFE_1",         DRXD_InitFE_1           ),
++      _BLOB_ENTRY("InitFE_2",         DRXD_InitFE_2           ),
++      _BLOB_ENTRY("InitFT",           DRXD_InitFT             ),
++      _BLOB_ENTRY("InitSC",           DRXD_InitSC             ),
++      _BLOB_ENTRY("ResetCEFR",        DRXD_ResetCEFR          ),
++      _BLOB_ENTRY("ResetECRAM",       DRXD_ResetECRAM         ),
++      _BLOB_ENTRY("microcode",        DRXD_microcode          ),
++#undef _BLOB_ENTRY
++#endif /* _BLOB_ENTRY */
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/drx397xD.h linux-2.6.18/drivers/media/dvb/frontends/drx397xD.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/drx397xD.h   1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/drx397xD.h        2010-09-09 12:38:50.000000000 +0000
+@@ -0,0 +1,130 @@
++/*
++ *  Driver for Micronas DVB-T drx397xD demodulator
++ *
++ *  Copyright (C) 2007 Henk vergonet <Henk.Vergonet@gmail.com>
++ *
++ *  This program is free software; you can redistribute it and/or modify
++ *  it under the terms of the GNU General Public License as published by
++ *  the Free Software Foundation; either version 2 of the License, or
++ *  (at your option) any later version.
++ *
++ *  This program is distributed in the hope that it will be useful,
++ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
++ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ *
++ *  GNU General Public License for more details.
++ *
++ *  You should have received a copy of the GNU General Public License
++ *  along with this program; if not, write to the Free Software
++ *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.=
++ */
++
++#ifndef _DRX397XD_H_INCLUDED
++#define _DRX397XD_H_INCLUDED
++
++#include <linux/dvb/frontend.h>
++
++#define DRX_F_STEPSIZE        166667
++#define DRX_F_OFFSET  36000000
++
++#define I2C_ADR_C0(x) \
++(     cpu_to_le32( \
++              (u32)( \
++                      (((u32)(x) & (u32)0x000000ffUL)      ) | \
++                      (((u32)(x) & (u32)0x0000ff00UL) << 16) | \
++                      (((u32)(x) & (u32)0x0fff0000UL) >>  8) | \
++                       (           (u32)0x00c00000UL)          \
++                    )) \
++)
++
++#define I2C_ADR_E0(x) \
++(     cpu_to_le32( \
++              (u32)( \
++                      (((u32)(x) & (u32)0x000000ffUL)      ) | \
++                      (((u32)(x) & (u32)0x0000ff00UL) << 16) | \
++                      (((u32)(x) & (u32)0x0fff0000UL) >>  8) | \
++                       (           (u32)0x00e00000UL)          \
++                    )) \
++)
++
++struct drx397xD_CfgRfAgc      /* 0x7c */
++{
++      int d00;        /* 2 */
++      u16 w04;
++      u16 w06;
++};
++
++struct drx397xD_CfgIfAgc      /* 0x68 */
++{
++      int d00;        /* 0 */
++      u16 w04;        /* 0 */
++      u16 w06;
++      u16 w08;
++      u16 w0A;
++      u16 w0C;
++};
++
++struct drx397xD_s20 {
++      int d04;
++      u32 d18;
++      u32 d1C;
++      u32 d20;
++      u32 d14;
++      u32 d24;
++      u32 d0C;
++      u32 d08;
++};
++
++struct drx397xD_config
++{
++      /* demodulator's I2C address */
++      u8      demod_address;          /* 0x0f */
++
++      struct drx397xD_CfgIfAgc  ifagc;  /* 0x68 */
++      struct drx397xD_CfgRfAgc  rfagc;  /* 0x7c */
++      u32     s20d24;
++
++      /* HI_CfgCommand parameters */
++      u16     w50, w52, /* w54, */ w56;
++
++      int     d5C;
++      int     d60;
++      int     d48;
++      int     d28;
++
++      u32     f_if;   /* d14: intermediate frequency [Hz]             */
++                      /*      36000000 on Cinergy 2400i DT            */
++                      /*      42800000 on Pinnacle Hybrid PRO 330e    */
++
++      u16     f_osc;  /* s66: 48000 oscillator frequency [kHz]        */
++
++      u16     w92;    /* 20000 */
++
++      u16     wA0;
++      u16     w98;
++      u16     w9A;
++
++      u16     w9C;    /* 0xe0 */
++      u16     w9E;    /* 0x00 */
++
++      /* used for signal strength calculations in
++         drx397x_read_signal_strength
++      */
++      u16     ss78;   // 2200
++      u16     ss7A;   // 150
++      u16     ss76;   // 820
++};
++
++#if defined(CONFIG_DVB_DRX397XD) || (defined(CONFIG_DVB_DRX397XD_MODULE) && defined(MODULE))
++extern struct dvb_frontend* drx397xD_attach(const struct drx397xD_config *config,
++                                         struct i2c_adapter *i2c);
++#else
++static inline struct dvb_frontend* drx397xD_attach(const struct drx397xD_config *config,
++                                         struct i2c_adapter *i2c)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return NULL;
++}
++#endif /* CONFIG_DVB_DRX397XD */
++
++#endif /* _DRX397XD_H_INCLUDED */
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/ds3000.h linux-2.6.18/drivers/media/dvb/frontends/ds3000.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/ds3000.h     1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/ds3000.h  2010-09-09 12:38:50.000000000 +0000
+@@ -0,0 +1,45 @@
++/*
++    Montage Technology DS3000/TS2020 - DVBS/S2 Satellite demod/tuner driver
++    Copyright (C) 2009 Konstantin Dimitrov <kosio.dimitrov@gmail.com>
++
++    Copyright (C) 2009 TurboSight.com
++
++    This program is free software; you can redistribute it and/or modify
++    it under the terms of the GNU General Public License as published by
++    the Free Software Foundation; either version 2 of the License, or
++    (at your option) any later version.
++
++    This program is distributed in the hope that it will be useful,
++    but WITHOUT ANY WARRANTY; without even the implied warranty of
++    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++    GNU General Public License for more details.
++
++    You should have received a copy of the GNU General Public License
++    along with this program; if not, write to the Free Software
++    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++*/
++
++#ifndef DS3000_H
++#define DS3000_H
++
++#include <linux/dvb/frontend.h>
++
++struct ds3000_config {
++      /* the demodulator's i2c address */
++      u8 demod_address;
++};
++
++#if defined(CONFIG_DVB_DS3000) || \
++                      (defined(CONFIG_DVB_DS3000_MODULE) && defined(MODULE))
++extern struct dvb_frontend *ds3000_attach(const struct ds3000_config *config,
++                                      struct i2c_adapter *i2c);
++#else
++static inline
++struct dvb_frontend *ds3000_attach(const struct ds3000_config *config,
++                                      struct i2c_adapter *i2c)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return NULL;
++}
++#endif /* CONFIG_DVB_DS3000 */
++#endif /* DS3000_H */
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/dvb_dummy_fe.h linux-2.6.18/drivers/media/dvb/frontends/dvb_dummy_fe.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/dvb_dummy_fe.h       2006-09-20 03:42:06.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/dvb_dummy_fe.h    2010-09-09 12:38:50.000000000 +0000
+@@ -25,8 +25,27 @@
+ #include <linux/dvb/frontend.h>
+ #include "dvb_frontend.h"
+ 
++#if defined(CONFIG_DVB_DUMMY_FE) || (defined(CONFIG_DVB_DUMMY_FE_MODULE) && \
++defined(MODULE))
+ extern struct dvb_frontend* dvb_dummy_fe_ofdm_attach(void);
+ extern struct dvb_frontend* dvb_dummy_fe_qpsk_attach(void);
+ extern struct dvb_frontend* dvb_dummy_fe_qam_attach(void);
++#else
++static inline struct dvb_frontend *dvb_dummy_fe_ofdm_attach(void)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return NULL;
++}
++static inline struct dvb_frontend *dvb_dummy_fe_qpsk_attach(void)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return NULL;
++}
++static inline struct dvb_frontend *dvb_dummy_fe_qam_attach(void)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return NULL;
++}
++#endif /* CONFIG_DVB_DUMMY_FE */
+ 
+ #endif // DVB_DUMMY_FE_H
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/dvb-pll.h linux-2.6.18/drivers/media/dvb/frontends/dvb-pll.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/dvb-pll.h    2006-09-20 03:42:06.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/dvb-pll.h 2010-09-09 12:38:50.000000000 +0000
+@@ -8,47 +8,25 @@
+ #include <linux/i2c.h>
+ #include "dvb_frontend.h"
+ 
+-struct dvb_pll_desc {
+-      char *name;
+-      u32  min;
+-      u32  max;
+-      void (*setbw)(u8 *buf, u32 freq, int bandwidth);
+-      int  count;
+-      struct {
+-              u32 limit;
+-              u32 offset;
+-              u32 stepsize;
+-              u8  config;
+-              u8  cb;
+-      } entries[12];
+-};
+-
+-extern struct dvb_pll_desc dvb_pll_thomson_dtt7579;
+-extern struct dvb_pll_desc dvb_pll_thomson_dtt759x;
+-extern struct dvb_pll_desc dvb_pll_thomson_dtt7610;
+-extern struct dvb_pll_desc dvb_pll_lg_z201;
+-extern struct dvb_pll_desc dvb_pll_microtune_4042;
+-extern struct dvb_pll_desc dvb_pll_thomson_dtt761x;
+-extern struct dvb_pll_desc dvb_pll_unknown_1;
+-
+-extern struct dvb_pll_desc dvb_pll_tua6010xs;
+-extern struct dvb_pll_desc dvb_pll_env57h1xd5;
+-extern struct dvb_pll_desc dvb_pll_tua6034;
+-extern struct dvb_pll_desc dvb_pll_lg_tdvs_h06xf;
+-extern struct dvb_pll_desc dvb_pll_tda665x;
+-extern struct dvb_pll_desc dvb_pll_fmd1216me;
+-extern struct dvb_pll_desc dvb_pll_tded4;
+-
+-extern struct dvb_pll_desc dvb_pll_tuv1236d;
+-extern struct dvb_pll_desc dvb_pll_tdhu2;
+-extern struct dvb_pll_desc dvb_pll_samsung_tbmv;
+-extern struct dvb_pll_desc dvb_pll_philips_sd1878_tda8261;
+-extern struct dvb_pll_desc dvb_pll_philips_td1316;
+-
+-extern struct dvb_pll_desc dvb_pll_thomson_fe6600;
+-
+-extern int dvb_pll_configure(struct dvb_pll_desc *desc, u8 *buf,
+-                    u32 freq, int bandwidth);
++#define DVB_PLL_UNDEFINED               0
++#define DVB_PLL_THOMSON_DTT7579         1
++#define DVB_PLL_THOMSON_DTT759X         2
++#define DVB_PLL_LG_Z201                 3
++#define DVB_PLL_UNKNOWN_1               4
++#define DVB_PLL_TUA6010XS               5
++#define DVB_PLL_ENV57H1XD5              6
++#define DVB_PLL_TUA6034                 7
++#define DVB_PLL_TDA665X                 8
++#define DVB_PLL_TDED4                   9
++#define DVB_PLL_TDHU2                  10
++#define DVB_PLL_SAMSUNG_TBMV           11
++#define DVB_PLL_PHILIPS_SD1878_TDA8261 12
++#define DVB_PLL_OPERA1                 13
++#define DVB_PLL_SAMSUNG_DTOS403IH102A  14
++#define DVB_PLL_SAMSUNG_TDTC9251DH0    15
++#define DVB_PLL_SAMSUNG_TBDU18132      16
++#define DVB_PLL_SAMSUNG_TBMU24112      17
++#define DVB_PLL_TDEE4                18
+ 
+ /**
+  * Attach a dvb-pll to the supplied frontend structure.
+@@ -56,9 +34,23 @@
+  * @param fe Frontend to attach to.
+  * @param pll_addr i2c address of the PLL (if used).
+  * @param i2c i2c adapter to use (set to NULL if not used).
+- * @param desc dvb_pll_desc to use.
+- * @return 0 on success, nonzero on failure.
++ * @param pll_desc_id dvb_pll_desc to use.
++ * @return Frontend pointer on success, NULL on failure
+  */
+-extern int dvb_pll_attach(struct dvb_frontend *fe, int pll_addr, struct i2c_adapter *i2c, struct dvb_pll_desc *desc);
++#if defined(CONFIG_DVB_PLL) || (defined(CONFIG_DVB_PLL_MODULE) && defined(MODULE))
++extern struct dvb_frontend *dvb_pll_attach(struct dvb_frontend *fe,
++                                         int pll_addr,
++                                         struct i2c_adapter *i2c,
++                                         unsigned int pll_desc_id);
++#else
++static inline struct dvb_frontend *dvb_pll_attach(struct dvb_frontend *fe,
++                                         int pll_addr,
++                                         struct i2c_adapter *i2c,
++                                         unsigned int pll_desc_id)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return NULL;
++}
++#endif
+ 
+ #endif
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/ec100.h linux-2.6.18/drivers/media/dvb/frontends/ec100.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/ec100.h      1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/ec100.h   2010-09-09 12:38:50.000000000 +0000
+@@ -0,0 +1,46 @@
++/*
++ * E3C EC100 demodulator driver
++ *
++ * Copyright (C) 2009 Antti Palosaari <crope@iki.fi>
++ *
++ *    This program is free software; you can redistribute it and/or modify
++ *    it under the terms of the GNU General Public License as published by
++ *    the Free Software Foundation; either version 2 of the License, or
++ *    (at your option) any later version.
++ *
++ *    This program is distributed in the hope that it will be useful,
++ *    but WITHOUT ANY WARRANTY; without even the implied warranty of
++ *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ *    GNU General Public License for more details.
++ *
++ *    You should have received a copy of the GNU General Public License
++ *    along with this program; if not, write to the Free Software
++ *    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++ *
++ */
++
++#ifndef EC100_H
++#define EC100_H
++
++#include <linux/dvb/frontend.h>
++
++struct ec100_config {
++      /* demodulator's I2C address */
++      u8 demod_address;
++};
++
++
++#if defined(CONFIG_DVB_EC100) || \
++      (defined(CONFIG_DVB_EC100_MODULE) && defined(MODULE))
++extern struct dvb_frontend *ec100_attach(const struct ec100_config *config,
++      struct i2c_adapter *i2c);
++#else
++static inline struct dvb_frontend *ec100_attach(
++      const struct ec100_config *config, struct i2c_adapter *i2c)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return NULL;
++}
++#endif
++
++#endif /* EC100_H */
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/ec100_priv.h linux-2.6.18/drivers/media/dvb/frontends/ec100_priv.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/ec100_priv.h 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/ec100_priv.h      2010-09-09 12:38:50.000000000 +0000
+@@ -0,0 +1,39 @@
++/*
++ * E3C EC100 demodulator driver
++ *
++ * Copyright (C) 2009 Antti Palosaari <crope@iki.fi>
++ *
++ *    This program is free software; you can redistribute it and/or modify
++ *    it under the terms of the GNU General Public License as published by
++ *    the Free Software Foundation; either version 2 of the License, or
++ *    (at your option) any later version.
++ *
++ *    This program is distributed in the hope that it will be useful,
++ *    but WITHOUT ANY WARRANTY; without even the implied warranty of
++ *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ *    GNU General Public License for more details.
++ *
++ *    You should have received a copy of the GNU General Public License
++ *    along with this program; if not, write to the Free Software
++ *    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++ *
++ */
++
++#ifndef EC100_PRIV
++#define EC100_PRIV
++
++#define LOG_PREFIX "ec100"
++
++#define dprintk(var, level, args...) \
++      do { if ((var & level)) printk(args); } while (0)
++
++#define deb_info(args...) dprintk(ec100_debug, 0x01, args)
++
++#undef err
++#define err(f, arg...)  printk(KERN_ERR     LOG_PREFIX": " f "\n" , ## arg)
++#undef info
++#define info(f, arg...) printk(KERN_INFO    LOG_PREFIX": " f "\n" , ## arg)
++#undef warn
++#define warn(f, arg...) printk(KERN_WARNING LOG_PREFIX": " f "\n" , ## arg)
++
++#endif /* EC100_PRIV */
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/eds1547.h linux-2.6.18/drivers/media/dvb/frontends/eds1547.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/eds1547.h    1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/eds1547.h 2010-09-09 12:38:50.000000000 +0000
+@@ -0,0 +1,133 @@
++/* eds1547.h Earda EDS-1547 tuner support
++*
++* Copyright (C) 2008 Igor M. Liplianin (liplianin@me.by)
++*
++*     This program is free software; you can redistribute it and/or modify it
++*     under the terms of the GNU General Public License as published by the
++*     Free Software Foundation, version 2.
++*
++* see Documentation/dvb/README.dvb-usb for more information
++*/
++
++#ifndef EDS1547
++#define EDS1547
++
++static u8 stv0288_earda_inittab[] = {
++      0x01, 0x57,
++      0x02, 0x20,
++      0x03, 0x8e,
++      0x04, 0x8e,
++      0x05, 0x12,
++      0x06, 0x00,
++      0x07, 0x00,
++      0x09, 0x00,
++      0x0a, 0x04,
++      0x0b, 0x00,
++      0x0c, 0x00,
++      0x0d, 0x00,
++      0x0e, 0xd4,
++      0x0f, 0x30,
++      0x11, 0x44,
++      0x12, 0x03,
++      0x13, 0x48,
++      0x14, 0x84,
++      0x15, 0x45,
++      0x16, 0xb7,
++      0x17, 0x9c,
++      0x18, 0x00,
++      0x19, 0xa6,
++      0x1a, 0x88,
++      0x1b, 0x8f,
++      0x1c, 0xf0,
++      0x20, 0x0b,
++      0x21, 0x54,
++      0x22, 0x00,
++      0x23, 0x00,
++      0x2b, 0xff,
++      0x2c, 0xf7,
++      0x30, 0x00,
++      0x31, 0x1e,
++      0x32, 0x14,
++      0x33, 0x0f,
++      0x34, 0x09,
++      0x35, 0x0c,
++      0x36, 0x05,
++      0x37, 0x2f,
++      0x38, 0x16,
++      0x39, 0xbd,
++      0x3a, 0x00,
++      0x3b, 0x13,
++      0x3c, 0x11,
++      0x3d, 0x30,
++      0x40, 0x63,
++      0x41, 0x04,
++      0x42, 0x60,
++      0x43, 0x00,
++      0x44, 0x00,
++      0x45, 0x00,
++      0x46, 0x00,
++      0x47, 0x00,
++      0x4a, 0x00,
++      0x50, 0x10,
++      0x51, 0x36,
++      0x52, 0x09,
++      0x53, 0x94,
++      0x54, 0x62,
++      0x55, 0x29,
++      0x56, 0x64,
++      0x57, 0x2b,
++      0x58, 0x54,
++      0x59, 0x86,
++      0x5a, 0x00,
++      0x5b, 0x9b,
++      0x5c, 0x08,
++      0x5d, 0x7f,
++      0x5e, 0x00,
++      0x5f, 0xff,
++      0x70, 0x00,
++      0x71, 0x00,
++      0x72, 0x00,
++      0x74, 0x00,
++      0x75, 0x00,
++      0x76, 0x00,
++      0x81, 0x00,
++      0x82, 0x3f,
++      0x83, 0x3f,
++      0x84, 0x00,
++      0x85, 0x00,
++      0x88, 0x00,
++      0x89, 0x00,
++      0x8a, 0x00,
++      0x8b, 0x00,
++      0x8c, 0x00,
++      0x90, 0x00,
++      0x91, 0x00,
++      0x92, 0x00,
++      0x93, 0x00,
++      0x94, 0x1c,
++      0x97, 0x00,
++      0xa0, 0x48,
++      0xa1, 0x00,
++      0xb0, 0xb8,
++      0xb1, 0x3a,
++      0xb2, 0x10,
++      0xb3, 0x82,
++      0xb4, 0x80,
++      0xb5, 0x82,
++      0xb6, 0x82,
++      0xb7, 0x82,
++      0xb8, 0x20,
++      0xb9, 0x00,
++      0xf0, 0x00,
++      0xf1, 0x00,
++      0xf2, 0xc0,
++      0xff,0xff,
++};
++
++static struct stv0288_config earda_config = {
++      .demod_address = 0x68,
++      .min_delay_ms = 100,
++      .inittab = stv0288_earda_inittab,
++};
++
++#endif
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/isl6405.h linux-2.6.18/drivers/media/dvb/frontends/isl6405.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/isl6405.h    1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/isl6405.h 2010-09-09 12:38:50.000000000 +0000
+@@ -0,0 +1,74 @@
++/*
++ * isl6405.h - driver for dual lnb supply and control ic ISL6405
++ *
++ * Copyright (C) 2008 Hartmut Hackmann
++ * Copyright (C) 2006 Oliver Endriss
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License
++ * as published by the Free Software Foundation; either version 2
++ * of the License, or (at your option) any later version.
++ *
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ * GNU General Public License for more details.
++ *
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
++ * Or, point your browser to http://www.gnu.org/copyleft/gpl.html
++ *
++ *
++ * the project's page is at http://www.linuxtv.org
++ */
++
++#ifndef _ISL6405_H
++#define _ISL6405_H
++
++#include <linux/dvb/frontend.h>
++
++/* system register bits */
++
++/* this bit selects register (control) 1 or 2
++   note that the bit maps are different */
++
++#define ISL6405_SR    0x80
++
++/* SR = 0 */
++#define ISL6405_OLF1  0x01
++#define ISL6405_EN1   0x02
++#define ISL6405_VSEL1 0x04
++#define ISL6405_LLC1  0x08
++#define ISL6405_ENT1  0x10
++#define ISL6405_ISEL1 0x20
++#define ISL6405_DCL   0x40
++
++/* SR = 1 */
++#define ISL6405_OLF2  0x01
++#define ISL6405_OTF   0x02
++#define ISL6405_EN2   0x04
++#define ISL6405_VSEL2 0x08
++#define ISL6405_LLC2  0x10
++#define ISL6405_ENT2  0x20
++#define ISL6405_ISEL2 0x40
++
++#if defined(CONFIG_DVB_ISL6405) || (defined(CONFIG_DVB_ISL6405_MODULE) && defined(MODULE))
++/* override_set and override_clear control which system register bits (above)
++ * to always set & clear
++ */
++extern struct dvb_frontend *isl6405_attach(struct dvb_frontend *fe, struct i2c_adapter *i2c,
++                                         u8 i2c_addr, u8 override_set, u8 override_clear);
++#else
++static inline struct dvb_frontend *isl6405_attach(struct dvb_frontend *fe,
++                                                struct i2c_adapter *i2c, u8 i2c_addr,
++                                                u8 override_set, u8 override_clear)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return NULL;
++}
++#endif /* CONFIG_DVB_ISL6405 */
++
++#endif
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/isl6421.h linux-2.6.18/drivers/media/dvb/frontends/isl6421.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/isl6421.h    2006-09-20 03:42:06.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/isl6421.h 2010-09-09 12:38:50.000000000 +0000
+@@ -39,8 +39,17 @@
+ #define ISL6421_ISEL1 0x20
+ #define ISL6421_DCL   0x40
+ 
++#if defined(CONFIG_DVB_ISL6421) || (defined(CONFIG_DVB_ISL6421_MODULE) && defined(MODULE))
+ /* override_set and override_clear control which system register bits (above) to always set & clear */
+-extern int isl6421_attach(struct dvb_frontend *fe, struct i2c_adapter *i2c, u8 i2c_addr,
++extern struct dvb_frontend *isl6421_attach(struct dvb_frontend *fe, struct i2c_adapter *i2c, u8 i2c_addr,
+                         u8 override_set, u8 override_clear);
++#else
++static inline struct dvb_frontend *isl6421_attach(struct dvb_frontend *fe, struct i2c_adapter *i2c, u8 i2c_addr,
++                                                u8 override_set, u8 override_clear)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return NULL;
++}
++#endif // CONFIG_DVB_ISL6421
+ 
+ #endif
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/isl6423.h linux-2.6.18/drivers/media/dvb/frontends/isl6423.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/isl6423.h    1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/isl6423.h 2010-09-09 12:38:50.000000000 +0000
+@@ -0,0 +1,63 @@
++/*
++      Intersil ISL6423 SEC and LNB Power supply controller
++
++      Copyright (C) Manu Abraham <abraham.manu@gmail.com>
++
++      This program is free software; you can redistribute it and/or modify
++      it under the terms of the GNU General Public License as published by
++      the Free Software Foundation; either version 2 of the License, or
++      (at your option) any later version.
++
++      This program is distributed in the hope that it will be useful,
++      but WITHOUT ANY WARRANTY; without even the implied warranty of
++      MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++      GNU General Public License for more details.
++
++      You should have received a copy of the GNU General Public License
++      along with this program; if not, write to the Free Software
++      Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++*/
++
++#ifndef __ISL_6423_H
++#define __ISL_6423_H
++
++#include <linux/dvb/frontend.h>
++
++enum isl6423_current {
++      SEC_CURRENT_275m = 0,
++      SEC_CURRENT_515m,
++      SEC_CURRENT_635m,
++      SEC_CURRENT_800m,
++};
++
++enum isl6423_curlim {
++      SEC_CURRENT_LIM_ON = 1,
++      SEC_CURRENT_LIM_OFF
++};
++
++struct isl6423_config {
++      enum isl6423_current current_max;
++      enum isl6423_curlim curlim;
++      u8 addr;
++      u8 mod_extern;
++};
++
++#if defined(CONFIG_DVB_ISL6423) || (defined(CONFIG_DVB_ISL6423_MODULE) && defined(MODULE))
++
++
++extern struct dvb_frontend *isl6423_attach(struct dvb_frontend *fe,
++                                         struct i2c_adapter *i2c,
++                                         const struct isl6423_config *config);
++
++#else
++static inline struct dvb_frontend *isl6423_attach(struct dvb_frontend *fe,
++                                                struct i2c_adapter *i2c,
++                                                const struct isl6423_config *config)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return NULL;
++}
++
++#endif /* CONFIG_DVB_ISL6423 */
++
++#endif /* __ISL_6423_H */
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/itd1000.h linux-2.6.18/drivers/media/dvb/frontends/itd1000.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/itd1000.h    1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/itd1000.h 2010-09-09 12:38:50.000000000 +0000
+@@ -0,0 +1,42 @@
++/*
++ *  Driver for the Integrant ITD1000 "Zero-IF Tuner IC for Direct Broadcast Satellite"
++ *
++ *  Copyright (c) 2007 Patrick Boettcher <pb@linuxtv.org>
++ *
++ *  This program is free software; you can redistribute it and/or modify
++ *  it under the terms of the GNU General Public License as published by
++ *  the Free Software Foundation; either version 2 of the License, or
++ *  (at your option) any later version.
++ *
++ *  This program is distributed in the hope that it will be useful,
++ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
++ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ *
++ *  GNU General Public License for more details.
++ *
++ *  You should have received a copy of the GNU General Public License
++ *  along with this program; if not, write to the Free Software
++ *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.=
++ */
++
++#ifndef ITD1000_H
++#define ITD1000_H
++
++struct dvb_frontend;
++struct i2c_adapter;
++
++struct itd1000_config {
++      u8 i2c_address;
++};
++
++#if defined(CONFIG_DVB_TUNER_ITD1000) || (defined(CONFIG_DVB_TUNER_ITD1000_MODULE) && defined(MODULE))
++extern struct dvb_frontend *itd1000_attach(struct dvb_frontend *fe, struct i2c_adapter *i2c, struct itd1000_config *cfg);
++#else
++static inline struct dvb_frontend *itd1000_attach(struct dvb_frontend *fe, struct i2c_adapter *i2c, struct itd1000_config *cfg)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return NULL;
++}
++#endif
++
++#endif
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/itd1000_priv.h linux-2.6.18/drivers/media/dvb/frontends/itd1000_priv.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/itd1000_priv.h       1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/itd1000_priv.h    2010-09-09 12:38:50.000000000 +0000
+@@ -0,0 +1,88 @@
++/*
++ *  Driver for the Integrant ITD1000 "Zero-IF Tuner IC for Direct Broadcast Satellite"
++ *
++ *  Copyright (c) 2007 Patrick Boettcher <pb@linuxtv.org>
++ *
++ *  This program is free software; you can redistribute it and/or modify
++ *  it under the terms of the GNU General Public License as published by
++ *  the Free Software Foundation; either version 2 of the License, or
++ *  (at your option) any later version.
++ *
++ *  This program is distributed in the hope that it will be useful,
++ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
++ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ *
++ *  GNU General Public License for more details.
++ *
++ *  You should have received a copy of the GNU General Public License
++ *  along with this program; if not, write to the Free Software
++ *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.=
++ */
++
++#ifndef ITD1000_PRIV_H
++#define ITD1000_PRIV_H
++
++struct itd1000_state {
++      struct itd1000_config *cfg;
++      struct i2c_adapter    *i2c;
++
++      u32 frequency; /* contains the value resulting from the LO-setting */
++
++      /* ugly workaround for flexcop's incapable i2c-controller
++       * FIXME, if possible
++       */
++      u8 shadow[256];
++};
++
++enum itd1000_register {
++      VCO_CHP1 = 0x65,
++      VCO_CHP2,
++      PLLCON1,
++      PLLNH,
++      PLLNL,
++      PLLFH,
++      PLLFM,
++      PLLFL,
++      RESERVED_0X6D,
++      PLLLOCK,
++      VCO_CHP2_I2C,
++      VCO_CHP1_I2C,
++      BW,
++      RESERVED_0X73 = 0x73,
++      RESERVED_0X74,
++      RESERVED_0X75,
++      GVBB,
++      GVRF,
++      GVBB_I2C,
++      EXTGVBBRF,
++      DIVAGCCK,
++      BBTR,
++      RFTR,
++      BBGVMIN,
++      RESERVED_0X7E,
++      RESERVED_0X85 = 0x85,
++      RESERVED_0X86,
++      CON1,
++      RESERVED_0X88,
++      RESERVED_0X89,
++      RFST0,
++      RFST1,
++      RFST2,
++      RFST3,
++      RFST4,
++      RFST5,
++      RFST6,
++      RFST7,
++      RFST8,
++      RFST9,
++      RESERVED_0X94,
++      RESERVED_0X95,
++      RESERVED_0X96,
++      RESERVED_0X97,
++      RESERVED_0X98,
++      RESERVED_0X99,
++      RESERVED_0X9A,
++      RESERVED_0X9B,
++};
++
++#endif
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/l64781.h linux-2.6.18/drivers/media/dvb/frontends/l64781.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/l64781.h     2006-09-20 03:42:06.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/l64781.h  2010-09-09 12:38:50.000000000 +0000
+@@ -31,8 +31,16 @@
+       u8 demod_address;
+ };
+ 
+-
++#if defined(CONFIG_DVB_L64781) || (defined(CONFIG_DVB_L64781_MODULE) && defined(MODULE))
+ extern struct dvb_frontend* l64781_attach(const struct l64781_config* config,
+                                         struct i2c_adapter* i2c);
++#else
++static inline struct dvb_frontend* l64781_attach(const struct l64781_config* config,
++                                        struct i2c_adapter* i2c)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return NULL;
++}
++#endif // CONFIG_DVB_L64781
+ 
+ #endif // L64781_H
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/lgdt3304.h linux-2.6.18/drivers/media/dvb/frontends/lgdt3304.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/lgdt3304.h   1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/lgdt3304.h        2010-09-09 12:38:50.000000000 +0000
+@@ -0,0 +1,45 @@
++/*
++ *  Driver for DVB-T lgdt3304 demodulator
++ *
++ *  Copyright (C) 2008 Markus Rechberger <mrechberger@gmail.com>
++ *
++ *  This program is free software; you can redistribute it and/or modify
++ *  it under the terms of the GNU General Public License as published by
++ *  the Free Software Foundation; either version 2 of the License, or
++ *  (at your option) any later version.
++ *
++ *  This program is distributed in the hope that it will be useful,
++ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
++ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ *
++ *  GNU General Public License for more details.
++ *
++ *  You should have received a copy of the GNU General Public License
++ *  along with this program; if not, write to the Free Software
++ *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.=
++ */
++
++#ifndef LGDT3304_H
++#define LGDT3304_H
++
++#include <linux/dvb/frontend.h>
++
++struct lgdt3304_config
++{
++      /* demodulator's I2C address */
++      u8 i2c_address;
++};
++
++#if defined(CONFIG_DVB_LGDT3304) || (defined(CONFIG_DVB_LGDT3304_MODULE) && defined(MODULE))
++extern struct dvb_frontend* lgdt3304_attach(const struct lgdt3304_config *config,
++                                         struct i2c_adapter *i2c);
++#else
++static inline struct dvb_frontend* lgdt3304_attach(const struct lgdt3304_config *config,
++                                         struct i2c_adapter *i2c)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return NULL;
++}
++#endif /* CONFIG_DVB_LGDT */
++
++#endif /* LGDT3304_H */
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/lgdt3305.h linux-2.6.18/drivers/media/dvb/frontends/lgdt3305.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/lgdt3305.h   1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/lgdt3305.h        2010-09-09 12:38:50.000000000 +0000
+@@ -0,0 +1,91 @@
++/*
++ *    Support for LG Electronics LGDT3304 and LGDT3305 - VSB/QAM
++ *
++ *    Copyright (C) 2008, 2009, 2010 Michael Krufky <mkrufky@linuxtv.org>
++ *
++ *    This program is free software; you can redistribute it and/or modify
++ *    it under the terms of the GNU General Public License as published by
++ *    the Free Software Foundation; either version 2 of the License, or
++ *    (at your option) any later version.
++ *
++ *    This program is distributed in the hope that it will be useful,
++ *    but WITHOUT ANY WARRANTY; without even the implied warranty of
++ *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ *    GNU General Public License for more details.
++ *
++ *    You should have received a copy of the GNU General Public License
++ *    along with this program; if not, write to the Free Software
++ *    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++ *
++ */
++
++#ifndef _LGDT3305_H_
++#define _LGDT3305_H_
++
++#include <linux/i2c.h>
++#include "dvb_frontend.h"
++
++
++enum lgdt3305_mpeg_mode {
++      LGDT3305_MPEG_PARALLEL = 0,
++      LGDT3305_MPEG_SERIAL = 1,
++};
++
++enum lgdt3305_tp_clock_edge {
++      LGDT3305_TPCLK_RISING_EDGE = 0,
++      LGDT3305_TPCLK_FALLING_EDGE = 1,
++};
++
++enum lgdt3305_tp_valid_polarity {
++      LGDT3305_TP_VALID_LOW = 0,
++      LGDT3305_TP_VALID_HIGH = 1,
++};
++
++enum lgdt_demod_chip_type {
++      LGDT3305 = 0,
++      LGDT3304 = 1,
++};
++
++struct lgdt3305_config {
++      u8 i2c_addr;
++
++      /* user defined IF frequency in KHz */
++      u16 qam_if_khz;
++      u16 vsb_if_khz;
++
++      /* AGC Power reference - defaults are used if left unset */
++      u16 usref_8vsb;   /* default: 0x32c4 */
++      u16 usref_qam64;  /* default: 0x5400 */
++      u16 usref_qam256; /* default: 0x2a80 */
++
++      /* disable i2c repeater - 0:repeater enabled 1:repeater disabled */
++      unsigned int deny_i2c_rptr:1;
++
++      /* spectral inversion - 0:disabled 1:enabled */
++      unsigned int spectral_inversion:1;
++
++      /* use RF AGC loop - 0:disabled 1:enabled */
++      unsigned int rf_agc_loop:1;
++
++      enum lgdt3305_mpeg_mode mpeg_mode;
++      enum lgdt3305_tp_clock_edge tpclk_edge;
++      enum lgdt3305_tp_valid_polarity tpvalid_polarity;
++      enum lgdt_demod_chip_type demod_chip;
++};
++
++#if defined(CONFIG_DVB_LGDT3305) || (defined(CONFIG_DVB_LGDT3305_MODULE) && \
++                                   defined(MODULE))
++extern
++struct dvb_frontend *lgdt3305_attach(const struct lgdt3305_config *config,
++                                   struct i2c_adapter *i2c_adap);
++#else
++static inline
++struct dvb_frontend *lgdt3305_attach(const struct lgdt3305_config *config,
++                                   struct i2c_adapter *i2c_adap)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return NULL;
++}
++#endif /* CONFIG_DVB_LGDT3305 */
++
++#endif /* _LGDT3305_H_ */
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/lgdt330x.h linux-2.6.18/drivers/media/dvb/frontends/lgdt330x.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/lgdt330x.h   2006-09-20 03:42:06.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/lgdt330x.h        2010-09-09 12:38:50.000000000 +0000
+@@ -52,8 +52,17 @@
+       int clock_polarity_flip;
+ };
+ 
++#if defined(CONFIG_DVB_LGDT330X) || (defined(CONFIG_DVB_LGDT330X_MODULE) && defined(MODULE))
+ extern struct dvb_frontend* lgdt330x_attach(const struct lgdt330x_config* config,
+                                           struct i2c_adapter* i2c);
++#else
++static inline struct dvb_frontend* lgdt330x_attach(const struct lgdt330x_config* config,
++                                          struct i2c_adapter* i2c)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return NULL;
++}
++#endif // CONFIG_DVB_LGDT330X
+ 
+ #endif /* LGDT330X_H */
+ 
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/lgdt330x_priv.h linux-2.6.18/drivers/media/dvb/frontends/lgdt330x_priv.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/lgdt330x_priv.h      2006-09-20 03:42:06.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/lgdt330x_priv.h   2010-09-09 12:38:50.000000000 +0000
+@@ -51,14 +51,19 @@
+       AGC_RFIF_ACC2= 0x3b,
+       AGC_STATUS= 0x3f,
+       SYNC_STATUS_VSB= 0x43,
+-      EQPH_ERR0= 0x47,
+-      EQ_ERR1= 0x48,
+-      EQ_ERR2= 0x49,
+-      PH_ERR1= 0x4a,
+-      PH_ERR2= 0x4b,
+       DEMUX_CONTROL= 0x66,
++      LGDT3302_EQPH_ERR0= 0x47,
++      LGDT3302_EQ_ERR1= 0x48,
++      LGDT3302_EQ_ERR2= 0x49,
++      LGDT3302_PH_ERR1= 0x4a,
++      LGDT3302_PH_ERR2= 0x4b,
+       LGDT3302_PACKET_ERR_COUNTER1= 0x6a,
+       LGDT3302_PACKET_ERR_COUNTER2= 0x6b,
++      LGDT3303_EQPH_ERR0= 0x6e,
++      LGDT3303_EQ_ERR1= 0x6f,
++      LGDT3303_EQ_ERR2= 0x70,
++      LGDT3303_PH_ERR1= 0x71,
++      LGDT3303_PH_ERR2= 0x72,
+       LGDT3303_PACKET_ERR_COUNTER1= 0x8b,
+       LGDT3303_PACKET_ERR_COUNTER2= 0x8c,
+ };
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/lg_h06xf.h linux-2.6.18/drivers/media/dvb/frontends/lg_h06xf.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/lg_h06xf.h   2006-09-20 03:42:06.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/lg_h06xf.h        1970-01-01 00:00:00.000000000 +0000
+@@ -1,64 +0,0 @@
+-/*
+- *  lg_h06xf.h - ATSC Tuner support for LG TDVS-H06xF
+- *
+- *  This program is free software; you can redistribute it and/or modify
+- *  it under the terms of the GNU General Public License as published by
+- *  the Free Software Foundation; either version 2 of the License, or
+- *  (at your option) any later version.
+- *
+- *  This program is distributed in the hope that it will be useful,
+- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+- *  GNU General Public License for more details.
+- *
+- *  You should have received a copy of the GNU General Public License
+- *  along with this program; if not, write to the Free Software
+- *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+- */
+-
+-#ifndef _LG_H06XF_H_
+-#define _LG_H06XF_H_
+-#include "dvb-pll.h"
+-
+-static int lg_h06xf_pll_set(struct dvb_frontend* fe, struct i2c_adapter* i2c_adap,
+-                   struct dvb_frontend_parameters* params)
+-{
+-      u8 buf[4];
+-      struct i2c_msg msg = { .addr = 0x61, .flags = 0,
+-                             .buf = buf, .len = sizeof(buf) };
+-      int err;
+-
+-      dvb_pll_configure(&dvb_pll_lg_tdvs_h06xf, buf, params->frequency, 0);
+-      if (fe->ops.i2c_gate_ctrl)
+-              fe->ops.i2c_gate_ctrl(fe, 1);
+-      if ((err = i2c_transfer(i2c_adap, &msg, 1)) != 1) {
+-              printk(KERN_WARNING "lg_h06xf: %s error "
+-                      "(addr %02x <- %02x, err = %i)\n",
+-                      __FUNCTION__, buf[0], buf[1], err);
+-              if (err < 0)
+-                      return err;
+-              else
+-                      return -EREMOTEIO;
+-      }
+-
+-      /* Set the Auxiliary Byte. */
+-      buf[0] = buf[2];
+-      buf[0] &= ~0x20;
+-      buf[0] |= 0x18;
+-      buf[1] = 0x50;
+-      msg.len = 2;
+-      if (fe->ops.i2c_gate_ctrl)
+-              fe->ops.i2c_gate_ctrl(fe, 1);
+-      if ((err = i2c_transfer(i2c_adap, &msg, 1)) != 1) {
+-              printk(KERN_WARNING "lg_h06xf: %s error "
+-                      "(addr %02x <- %02x, err = %i)\n",
+-                      __FUNCTION__, buf[0], buf[1], err);
+-              if (err < 0)
+-                      return err;
+-              else
+-                      return -EREMOTEIO;
+-      }
+-
+-      return 0;
+-}
+-#endif
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/lgs8gl5.h linux-2.6.18/drivers/media/dvb/frontends/lgs8gl5.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/lgs8gl5.h    1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/lgs8gl5.h 2010-09-09 12:38:50.000000000 +0000
+@@ -0,0 +1,45 @@
++/*
++    Legend Silicon LGS-8GL5 DMB-TH OFDM demodulator driver
++
++    Copyright (C) 2008 Sirius International (Hong Kong) Limited
++      Timothy Lee <timothy.lee@siriushk.com>
++
++    This program is free software; you can redistribute it and/or modify
++    it under the terms of the GNU General Public License as published by
++    the Free Software Foundation; either version 2 of the License, or
++    (at your option) any later version.
++
++    This program is distributed in the hope that it will be useful,
++    but WITHOUT ANY WARRANTY; without even the implied warranty of
++    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++    GNU General Public License for more details.
++
++    You should have received a copy of the GNU General Public License
++    along with this program; if not, write to the Free Software
++    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++
++*/
++
++#ifndef LGS8GL5_H
++#define LGS8GL5_H
++
++#include <linux/dvb/frontend.h>
++
++struct lgs8gl5_config {
++      /* the demodulator's i2c address */
++      u8 demod_address;
++};
++
++#if defined(CONFIG_DVB_LGS8GL5) || \
++      (defined(CONFIG_DVB_LGS8GL5_MODULE) && defined(MODULE))
++extern struct dvb_frontend *lgs8gl5_attach(
++      const struct lgs8gl5_config *config, struct i2c_adapter *i2c);
++#else
++static inline struct dvb_frontend *lgs8gl5_attach(
++      const struct lgs8gl5_config *config, struct i2c_adapter *i2c) {
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return NULL;
++}
++#endif /* CONFIG_DVB_LGS8GL5 */
++
++#endif /* LGS8GL5_H */
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/lgs8gxx.h linux-2.6.18/drivers/media/dvb/frontends/lgs8gxx.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/lgs8gxx.h    1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/lgs8gxx.h 2010-09-09 12:38:50.000000000 +0000
+@@ -0,0 +1,95 @@
++/*
++ *    Support for Legend Silicon GB20600 (a.k.a DMB-TH) demodulator
++ *    LGS8913, LGS8GL5, LGS8G75
++ *    experimental support LGS8G42, LGS8G52
++ *
++ *    Copyright (C) 2007-2009 David T.L. Wong <davidtlwong@gmail.com>
++ *    Copyright (C) 2008 Sirius International (Hong Kong) Limited
++ *    Timothy Lee <timothy.lee@siriushk.com> (for initial work on LGS8GL5)
++ *
++ *    This program is free software; you can redistribute it and/or modify
++ *    it under the terms of the GNU General Public License as published by
++ *    the Free Software Foundation; either version 2 of the License, or
++ *    (at your option) any later version.
++ *
++ *    This program is distributed in the hope that it will be useful,
++ *    but WITHOUT ANY WARRANTY; without even the implied warranty of
++ *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ *    GNU General Public License for more details.
++ *
++ *    You should have received a copy of the GNU General Public License
++ *    along with this program; if not, write to the Free Software
++ *    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++ *
++ */
++
++#ifndef __LGS8GXX_H__
++#define __LGS8GXX_H__
++
++#include <linux/dvb/frontend.h>
++#include <linux/i2c.h>
++
++#define LGS8GXX_PROD_LGS8913 0
++#define LGS8GXX_PROD_LGS8GL5 1
++#define LGS8GXX_PROD_LGS8G42 3
++#define LGS8GXX_PROD_LGS8G52 4
++#define LGS8GXX_PROD_LGS8G54 5
++#define LGS8GXX_PROD_LGS8G75 6
++
++struct lgs8gxx_config {
++
++      /* product type */
++      u8 prod;
++
++      /* the demodulator's i2c address */
++      u8 demod_address;
++
++      /* parallel or serial transport stream */
++      u8 serial_ts;
++
++      /* transport stream polarity*/
++      u8 ts_clk_pol;
++
++      /* transport stream clock gated by ts_valid */
++      u8 ts_clk_gated;
++
++      /* A/D Clock frequency */
++      u32 if_clk_freq; /* in kHz */
++
++      /* IF frequency */
++      u32 if_freq; /* in kHz */
++
++      /*Use External ADC*/
++      u8 ext_adc;
++
++      /*External ADC output two's complement*/
++      u8 adc_signed;
++
++      /*Sample IF data at falling edge of IF_CLK*/
++      u8 if_neg_edge;
++
++      /*IF use Negative center frequency*/
++      u8 if_neg_center;
++
++      /*8G75 internal ADC input range selection*/
++      /*0: 0.8Vpp, 1: 1.0Vpp, 2: 1.6Vpp, 3: 2.0Vpp*/
++      u8 adc_vpp;
++
++      /* slave address and configuration of the tuner */
++      u8 tuner_address;
++};
++
++#if defined(CONFIG_DVB_LGS8GXX) || \
++      (defined(CONFIG_DVB_LGS8GXX_MODULE) && defined(MODULE))
++extern struct dvb_frontend *lgs8gxx_attach(const struct lgs8gxx_config *config,
++                                         struct i2c_adapter *i2c);
++#else
++static inline
++struct dvb_frontend *lgs8gxx_attach(const struct lgs8gxx_config *config,
++                                  struct i2c_adapter *i2c) {
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return NULL;
++}
++#endif /* CONFIG_DVB_LGS8GXX */
++
++#endif /* __LGS8GXX_H__ */
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/lgs8gxx_priv.h linux-2.6.18/drivers/media/dvb/frontends/lgs8gxx_priv.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/lgs8gxx_priv.h       1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/lgs8gxx_priv.h    2010-09-09 12:38:50.000000000 +0000
+@@ -0,0 +1,70 @@
++/*
++ *    Support for Legend Silicon GB20600 (a.k.a DMB-TH) demodulator
++ *    LGS8913, LGS8GL5, LGS8G75
++ *    experimental support LGS8G42, LGS8G52
++ *
++ *    Copyright (C) 2007-2009 David T.L. Wong <davidtlwong@gmail.com>
++ *    Copyright (C) 2008 Sirius International (Hong Kong) Limited
++ *    Timothy Lee <timothy.lee@siriushk.com> (for initial work on LGS8GL5)
++ *
++ *    This program is free software; you can redistribute it and/or modify
++ *    it under the terms of the GNU General Public License as published by
++ *    the Free Software Foundation; either version 2 of the License, or
++ *    (at your option) any later version.
++ *
++ *    This program is distributed in the hope that it will be useful,
++ *    but WITHOUT ANY WARRANTY; without even the implied warranty of
++ *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ *    GNU General Public License for more details.
++ *
++ *    You should have received a copy of the GNU General Public License
++ *    along with this program; if not, write to the Free Software
++ *    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++ *
++ */
++
++#ifndef LGS8913_PRIV_H
++#define LGS8913_PRIV_H
++
++struct lgs8gxx_state {
++      struct i2c_adapter *i2c;
++      /* configuration settings */
++      const struct lgs8gxx_config *config;
++      struct dvb_frontend frontend;
++      u16 curr_gi; /* current guard interval */
++};
++
++#define SC_MASK               0x1C    /* Sub-Carrier Modulation Mask */
++#define SC_QAM64      0x10    /* 64QAM modulation */
++#define SC_QAM32      0x0C    /* 32QAM modulation */
++#define SC_QAM16      0x08    /* 16QAM modulation */
++#define SC_QAM4NR     0x04    /* 4QAM-NR modulation */
++#define SC_QAM4               0x00    /* 4QAM modulation */
++
++#define LGS_FEC_MASK  0x03    /* FEC Rate Mask */
++#define LGS_FEC_0_4   0x00    /* FEC Rate 0.4 */
++#define LGS_FEC_0_6   0x01    /* FEC Rate 0.6 */
++#define LGS_FEC_0_8   0x02    /* FEC Rate 0.8 */
++
++#define TIM_MASK        0x20  /* Time Interleave Length Mask */
++#define TIM_LONG        0x20  /* Time Interleave Length = 720 */
++#define TIM_MIDDLE     0x00   /* Time Interleave Length = 240 */
++
++#define CF_MASK       0x80    /* Control Frame Mask */
++#define CF_EN 0x80    /* Control Frame On */
++
++#define GI_MASK       0x03    /* Guard Interval Mask */
++#define GI_420        0x00    /* 1/9 Guard Interval */
++#define GI_595        0x01    /* */
++#define GI_945        0x02    /* 1/4 Guard Interval */
++
++
++#define TS_PARALLEL   0x00    /* Parallel TS Output a.k.a. SPI */
++#define TS_SERIAL     0x01    /* Serial TS Output a.k.a. SSI */
++#define TS_CLK_NORMAL         0x00    /* MPEG Clock Normal */
++#define TS_CLK_INVERTED               0x02    /* MPEG Clock Inverted */
++#define TS_CLK_GATED          0x00    /* MPEG clock gated */
++#define TS_CLK_FREERUN                0x04    /* MPEG clock free running*/
++
++
++#endif
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/lnbh24.h linux-2.6.18/drivers/media/dvb/frontends/lnbh24.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/lnbh24.h     1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/lnbh24.h  2010-09-09 12:38:50.000000000 +0000
+@@ -0,0 +1,55 @@
++/*
++ * lnbh24.h - driver for lnb supply and control ic lnbh24
++ *
++ * Copyright (C) 2009 NetUP Inc.
++ * Copyright (C) 2009 Igor M. Liplianin <liplianin@netup.ru>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ *
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++ */
++
++#ifndef _LNBH24_H
++#define _LNBH24_H
++
++/* system register bits */
++#define LNBH24_OLF    0x01
++#define LNBH24_OTF    0x02
++#define LNBH24_EN     0x04
++#define LNBH24_VSEL   0x08
++#define LNBH24_LLC    0x10
++#define LNBH24_TEN    0x20
++#define LNBH24_TTX    0x40
++#define LNBH24_PCL    0x80
++
++#include <linux/dvb/frontend.h>
++
++#if defined(CONFIG_DVB_LNBP21) || (defined(CONFIG_DVB_LNBP21_MODULE) \
++                                                      && defined(MODULE))
++/* override_set and override_clear control which
++   system register bits (above) to always set & clear */
++extern struct dvb_frontend *lnbh24_attach(struct dvb_frontend *fe,
++                              struct i2c_adapter *i2c, u8 override_set,
++                              u8 override_clear, u8 i2c_addr);
++#else
++static inline struct dvb_frontend *lnbh24_attach(struct dvb_frontend *fe,
++                              struct i2c_adapter *i2c, u8 override_set,
++                              u8 override_clear, u8 i2c_addr)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return NULL;
++}
++#endif
++
++#endif
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/lnbp21.h linux-2.6.18/drivers/media/dvb/frontends/lnbp21.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/lnbp21.h     2006-09-20 03:42:06.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/lnbp21.h  2010-09-09 12:38:50.000000000 +0000
+@@ -28,18 +28,48 @@
+ #define _LNBP21_H
+ 
+ /* system register bits */
++/* [RO] 0=OK; 1=over current limit flag */
+ #define LNBP21_OLF    0x01
++/* [RO] 0=OK; 1=over temperature flag (150 C) */
+ #define LNBP21_OTF    0x02
++/* [RW] 0=disable LNB power, enable loopthrough
++      1=enable LNB power, disable loopthrough */
+ #define LNBP21_EN     0x04
++/* [RW] 0=low voltage (13/14V, vert pol)
++      1=high voltage (18/19V,horiz pol) */
+ #define LNBP21_VSEL   0x08
++/* [RW] increase LNB voltage by 1V:
++      0=13/18V; 1=14/19V */
+ #define LNBP21_LLC    0x10
++/* [RW] 0=tone controlled by DSQIN pin
++      1=tone enable, disable DSQIN */
+ #define LNBP21_TEN    0x20
++/* [RW] current limit select:
++      0:Iout=500-650mA Isc=300mA
++      1:Iout=400-550mA Isc=200mA */
+ #define LNBP21_ISEL   0x40
++/* [RW] short-circuit protect:
++      0=pulsed (dynamic) curr limiting
++      1=static curr limiting */
+ #define LNBP21_PCL    0x80
+ 
+ #include <linux/dvb/frontend.h>
+ 
+-/* override_set and override_clear control which system register bits (above) to always set & clear */
+-extern int lnbp21_attach(struct dvb_frontend *fe, struct i2c_adapter *i2c, u8 override_set, u8 override_clear);
++#if defined(CONFIG_DVB_LNBP21) || (defined(CONFIG_DVB_LNBP21_MODULE) \
++                                                      && defined(MODULE))
++/* override_set and override_clear control which
++ system register bits (above) to always set & clear */
++extern struct dvb_frontend *lnbp21_attach(struct dvb_frontend *fe,
++                              struct i2c_adapter *i2c, u8 override_set,
++                              u8 override_clear);
++#else
++static inline struct dvb_frontend *lnbp21_attach(struct dvb_frontend *fe,
++                              struct i2c_adapter *i2c, u8 override_set,
++                              u8 override_clear)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return NULL;
++}
++#endif
+ 
+ #endif
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/mb86a16.h linux-2.6.18/drivers/media/dvb/frontends/mb86a16.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/mb86a16.h    1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/mb86a16.h 2010-09-09 12:38:50.000000000 +0000
+@@ -0,0 +1,52 @@
++/*
++      Fujitsu MB86A16 DVB-S/DSS DC Receiver driver
++
++      Copyright (C) Manu Abraham (abraham.manu@gmail.com)
++
++      This program is free software; you can redistribute it and/or modify
++      it under the terms of the GNU General Public License as published by
++      the Free Software Foundation; either version 2 of the License, or
++      (at your option) any later version.
++
++      This program is distributed in the hope that it will be useful,
++      but WITHOUT ANY WARRANTY; without even the implied warranty of
++      MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++      GNU General Public License for more details.
++
++      You should have received a copy of the GNU General Public License
++      along with this program; if not, write to the Free Software
++      Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++*/
++
++#ifndef __MB86A16_H
++#define __MB86A16_H
++
++#include <linux/dvb/frontend.h>
++#include "dvb_frontend.h"
++
++
++struct mb86a16_config {
++      u8 demod_address;
++
++      int (*set_voltage)(struct dvb_frontend *fe, fe_sec_voltage_t voltage);
++};
++
++
++
++#if defined(CONFIG_DVB_MB86A16) || (defined(CONFIG_DVB_MB86A16_MODULE) && defined(MODULE))
++
++extern struct dvb_frontend *mb86a16_attach(const struct mb86a16_config *config,
++                                         struct i2c_adapter *i2c_adap);
++
++#else
++
++static inline struct dvb_frontend *mb86a16_attach(const struct mb86a16_config *config,
++                                         struct i2c_adapter *i2c_adap)
++{
++      printk(KERN_WARNING "%s: Driver disabled by Kconfig\n", __func__);
++      return NULL;
++}
++
++#endif /* CONFIG_DVB_MB86A16 */
++
++#endif /* __MB86A16_H */
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/mb86a16_priv.h linux-2.6.18/drivers/media/dvb/frontends/mb86a16_priv.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/mb86a16_priv.h       1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/mb86a16_priv.h    2010-09-09 12:38:50.000000000 +0000
+@@ -0,0 +1,151 @@
++/*
++      Fujitsu MB86A16 DVB-S/DSS DC Receiver driver
++
++      Copyright (C) Manu Abraham (abraham.manu@gmail.com)
++
++      This program is free software; you can redistribute it and/or modify
++      it under the terms of the GNU General Public License as published by
++      the Free Software Foundation; either version 2 of the License, or
++      (at your option) any later version.
++
++      This program is distributed in the hope that it will be useful,
++      but WITHOUT ANY WARRANTY; without even the implied warranty of
++      MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++      GNU General Public License for more details.
++
++      You should have received a copy of the GNU General Public License
++      along with this program; if not, write to the Free Software
++      Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++*/
++
++#ifndef __MB86A16_PRIV_H
++#define __MB86A16_PRIV_H
++
++#define MB86A16_TSOUT         0x00
++#define MB86A16_TSOUT_HIZSEL  (0x01 << 5)
++#define MB86A16_TSOUT_HIZCNTI (0x01 << 4)
++#define MB86A16_TSOUT_MODE    (0x01 << 3)
++#define MB86A16_TSOUT_ORDER   (0x01 << 2)
++#define MB86A16_TSOUT_ERROR   (0x01 << 1)
++#define Mb86A16_TSOUT_EDGE    (0x01 << 0)
++
++#define MB86A16_FEC           0x01
++#define MB86A16_FEC_FSYNC     (0x01 << 5)
++#define MB86A16_FEC_PCKB8     (0x01 << 4)
++#define MB86A16_FEC_DVDS      (0x01 << 3)
++#define MB86A16_FEC_EREN      (0x01 << 2)
++#define Mb86A16_FEC_RSEN      (0x01 << 1)
++#define MB86A16_FEC_DIEN      (0x01 << 0)
++
++#define MB86A16_AGC           0x02
++#define MB86A16_AGC_AGMD      (0x01 << 6)
++#define MB86A16_AGC_AGCW      (0x0f << 2)
++#define MB86A16_AGC_AGCP      (0x01 << 1)
++#define MB86A16_AGC_AGCR      (0x01 << 0)
++
++#define MB86A16_SRATE1                0x03
++#define MB86A16_SRATE1_DECI   (0x07 << 2)
++#define MB86A16_SRATE1_CSEL   (0x01 << 1)
++#define MB86A16_SRATE1_RSEL   (0x01 << 0)
++
++#define MB86A16_SRATE2                0x04
++#define MB86A16_SRATE2_STOFSL (0xff << 0)
++
++#define MB86A16_SRATE3                0x05
++#define MB86A16_SRATE2_STOFSH (0xff << 0)
++
++#define MB86A16_VITERBI               0x06
++#define MB86A16_FRAMESYNC     0x07
++#define MB86A16_CRLFILTCOEF1  0x08
++#define MB86A16_CRLFILTCOEF2  0x09
++#define MB86A16_STRFILTCOEF1  0x0a
++#define MB86A16_STRFILTCOEF2  0x0b
++#define MB86A16_RESET         0x0c
++#define MB86A16_STATUS                0x0d
++#define MB86A16_AFCML         0x0e
++#define MB86A16_AFCMH         0x0f
++#define MB86A16_BERMON                0x10
++#define MB86A16_BERTAB                0x11
++#define MB86A16_BERLSB                0x12
++#define MB86A16_BERMID                0x13
++#define MB86A16_BERMSB                0x14
++#define MB86A16_AGCM          0x15
++
++#define MB86A16_DCC1          0x16
++#define MB86A16_DCC1_DISTA    (0x01 << 7)
++#define MB86A16_DCC1_PRTY     (0x01 << 6)
++#define MB86A16_DCC1_CTOE     (0x01 << 5)
++#define MB86A16_DCC1_TBEN     (0x01 << 4)
++#define MB86A16_DCC1_TBO      (0x01 << 3)
++#define MB86A16_DCC1_NUM      (0x07 << 0)
++
++#define MB86A16_DCC2          0x17
++#define MB86A16_DCC2_DCBST    (0x01 << 0)
++
++#define MB86A16_DCC3          0x18
++#define MB86A16_DCC3_CODE0    (0xff << 0)
++
++#define MB86A16_DCC4          0x19
++#define MB86A16_DCC4_CODE1    (0xff << 0)
++
++#define MB86A16_DCC5          0x1a
++#define MB86A16_DCC5_CODE2    (0xff << 0)
++
++#define MB86A16_DCC6          0x1b
++#define MB86A16_DCC6_CODE3    (0xff << 0)
++
++#define MB86A16_DCC7          0x1c
++#define MB86A16_DCC7_CODE4    (0xff << 0)
++
++#define MB86A16_DCC8          0x1d
++#define MB86A16_DCC8_CODE5    (0xff << 0)
++
++#define MB86A16_DCCOUT                0x1e
++#define MB86A16_DCCOUT_DISEN  (0x01 << 0)
++
++#define MB86A16_TONEOUT1      0x1f
++#define MB86A16_TONE_TDIVL    (0xff << 0)
++
++#define MB86A16_TONEOUT2      0x20
++#define MB86A16_TONE_TMD      (0x03 << 2)
++#define MB86A16_TONE_TDIVH    (0x03 << 0)
++
++#define MB86A16_FREQ1         0x21
++#define MB86A16_FREQ2         0x22
++#define MB86A16_FREQ3         0x23
++#define MB86A16_FREQ4         0x24
++#define MB86A16_FREQSET               0x25
++#define MB86A16_CNM           0x26
++#define MB86A16_PORT0         0x27
++#define MB86A16_PORT1         0x28
++#define MB86A16_DRCFILT               0x29
++#define MB86A16_AFC           0x2a
++#define MB86A16_AFCEXL                0x2b
++#define MB86A16_AFCEXH                0x2c
++#define MB86A16_DAGC          0x2d
++#define MB86A16_SEQMODE               0x32
++#define MB86A16_S0S1T         0x33
++#define MB86A16_S2S3T         0x34
++#define MB86A16_S4S5T         0x35
++#define MB86A16_CNTMR         0x36
++#define MB86A16_SIG1          0x37
++#define MB86A16_SIG2          0x38
++#define MB86A16_VIMAG         0x39
++#define MB86A16_VISET1                0x3a
++#define MB86A16_VISET2                0x3b
++#define MB86A16_VISET3                0x3c
++#define MB86A16_FAGCS1                0x3d
++#define MB86A16_FAGCS2                0x3e
++#define MB86A16_FAGCS3                0x3f
++#define MB86A16_FAGCS4                0x40
++#define MB86A16_FAGCS5                0x41
++#define MB86A16_FAGCS6                0x42
++#define MB86A16_CRM           0x43
++#define MB86A16_STRM          0x44
++#define MB86A16_DAGCML                0x45
++#define MB86A16_DAGCMH                0x46
++#define MB86A16_QPSKTST               0x49
++#define MB86A16_DISTMON               0x52
++#define MB86A16_VERSION               0x7f
++
++#endif /* __MB86A16_PRIV_H */
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/mt312.h linux-2.6.18/drivers/media/dvb/frontends/mt312.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/mt312.h      2006-09-20 03:42:06.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/mt312.h   2010-09-09 12:38:50.000000000 +0000
+@@ -28,14 +28,24 @@
+ 
+ #include <linux/dvb/frontend.h>
+ 
+-struct mt312_config
+-{
++struct mt312_config {
+       /* the demodulator's i2c address */
+       u8 demod_address;
+-};
+ 
+-struct dvb_frontend* vp310_mt312_attach(const struct mt312_config* config,
+-                                      struct i2c_adapter* i2c);
++      /* inverted voltage setting */
++      unsigned int voltage_inverted:1;
++};
+ 
++#if defined(CONFIG_DVB_MT312) || (defined(CONFIG_DVB_MT312_MODULE) && defined(MODULE))
++struct dvb_frontend *mt312_attach(const struct mt312_config *config,
++                                      struct i2c_adapter *i2c);
++#else
++static inline struct dvb_frontend *mt312_attach(
++      const struct mt312_config *config, struct i2c_adapter *i2c)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return NULL;
++}
++#endif /* CONFIG_DVB_MT312 */
+ 
+-#endif // MT312_H
++#endif /* MT312_H */
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/mt312_priv.h linux-2.6.18/drivers/media/dvb/frontends/mt312_priv.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/mt312_priv.h 2006-09-20 03:42:06.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/mt312_priv.h      2010-09-09 12:38:50.000000000 +0000
+@@ -110,6 +110,8 @@
+       VIT_ERRPER_H = 83,
+       VIT_ERRPER_M = 84,
+       VIT_ERRPER_L = 85,
++      HW_CTRL = 84,   /* ZL10313 only */
++      MPEG_CTRL = 85, /* ZL10313 only */
+       VIT_SETUP = 86,
+       VIT_REF0 = 87,
+       VIT_REF1 = 88,
+@@ -156,7 +158,8 @@
+ 
+ enum mt312_model_id {
+       ID_VP310 = 1,
+-      ID_MT312 = 3
++      ID_MT312 = 3,
++      ID_ZL10313 = 5,
+ };
+ 
+ #endif                                /* DVB_FRONTENDS_MT312_PRIV */
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/mt352.h linux-2.6.18/drivers/media/dvb/frontends/mt352.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/mt352.h      2006-09-20 03:42:06.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/mt352.h   2010-09-09 12:38:50.000000000 +0000
+@@ -51,9 +51,23 @@
+       int (*demod_init)(struct dvb_frontend* fe);
+ };
+ 
++#if defined(CONFIG_DVB_MT352) || (defined(CONFIG_DVB_MT352_MODULE) && defined(MODULE))
+ extern struct dvb_frontend* mt352_attach(const struct mt352_config* config,
+                                        struct i2c_adapter* i2c);
++#else
++static inline struct dvb_frontend* mt352_attach(const struct mt352_config* config,
++                                       struct i2c_adapter* i2c)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return NULL;
++}
++#endif // CONFIG_DVB_MT352
+ 
+-extern int mt352_write(struct dvb_frontend* fe, u8* ibuf, int ilen);
++static inline int mt352_write(struct dvb_frontend *fe, u8 *buf, int len) {
++      int r = 0;
++      if (fe->ops.write)
++              r = fe->ops.write(fe, buf, len);
++      return r;
++}
+ 
+ #endif // MT352_H
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/nxt200x.h linux-2.6.18/drivers/media/dvb/frontends/nxt200x.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/nxt200x.h    2006-09-20 03:42:06.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/nxt200x.h 2010-09-09 12:38:50.000000000 +0000
+@@ -38,15 +38,21 @@
+       /* the demodulator's i2c address */
+       u8 demod_address;
+ 
+-      /* used to set pll input */
+-      int (*set_pll_input)(u8* buf, int input);
+-
+       /* need to set device param for start_dma */
+       int (*set_ts_params)(struct dvb_frontend* fe, int is_punctured);
+ };
+ 
++#if defined(CONFIG_DVB_NXT200X) || (defined(CONFIG_DVB_NXT200X_MODULE) && defined(MODULE))
+ extern struct dvb_frontend* nxt200x_attach(const struct nxt200x_config* config,
+                                          struct i2c_adapter* i2c);
++#else
++static inline struct dvb_frontend* nxt200x_attach(const struct nxt200x_config* config,
++                                         struct i2c_adapter* i2c)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return NULL;
++}
++#endif // CONFIG_DVB_NXT200X
+ 
+ #endif /* NXT200X_H */
+ 
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/nxt6000.h linux-2.6.18/drivers/media/dvb/frontends/nxt6000.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/nxt6000.h    2006-09-20 03:42:06.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/nxt6000.h 2010-09-09 12:38:50.000000000 +0000
+@@ -33,7 +33,16 @@
+       u8 clock_inversion:1;
+ };
+ 
++#if defined(CONFIG_DVB_NXT6000) || (defined(CONFIG_DVB_NXT6000_MODULE) && defined(MODULE))
+ extern struct dvb_frontend* nxt6000_attach(const struct nxt6000_config* config,
+                                          struct i2c_adapter* i2c);
++#else
++static inline struct dvb_frontend* nxt6000_attach(const struct nxt6000_config* config,
++                                         struct i2c_adapter* i2c)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return NULL;
++}
++#endif // CONFIG_DVB_NXT6000
+ 
+ #endif // NXT6000_H
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/or51132.h linux-2.6.18/drivers/media/dvb/frontends/or51132.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/or51132.h    2006-09-20 03:42:06.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/or51132.h 2010-09-09 12:38:50.000000000 +0000
+@@ -34,8 +34,17 @@
+       int (*set_ts_params)(struct dvb_frontend* fe, int is_punctured);
+ };
+ 
++#if defined(CONFIG_DVB_OR51132) || (defined(CONFIG_DVB_OR51132_MODULE) && defined(MODULE))
+ extern struct dvb_frontend* or51132_attach(const struct or51132_config* config,
+                                          struct i2c_adapter* i2c);
++#else
++static inline struct dvb_frontend* or51132_attach(const struct or51132_config* config,
++                                         struct i2c_adapter* i2c)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return NULL;
++}
++#endif // CONFIG_DVB_OR51132
+ 
+ #endif // OR51132_H
+ 
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/or51211.h linux-2.6.18/drivers/media/dvb/frontends/or51211.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/or51211.h    2006-09-20 03:42:06.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/or51211.h 2010-09-09 12:38:50.000000000 +0000
+@@ -37,8 +37,17 @@
+       void (*sleep)(struct dvb_frontend * fe);
+ };
+ 
++#if defined(CONFIG_DVB_OR51211) || (defined(CONFIG_DVB_OR51211_MODULE) && defined(MODULE))
+ extern struct dvb_frontend* or51211_attach(const struct or51211_config* config,
+                                          struct i2c_adapter* i2c);
++#else
++static inline struct dvb_frontend* or51211_attach(const struct or51211_config* config,
++                                         struct i2c_adapter* i2c)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return NULL;
++}
++#endif // CONFIG_DVB_OR51211
+ 
+ #endif // OR51211_H
+ 
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/s5h1409.h linux-2.6.18/drivers/media/dvb/frontends/s5h1409.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/s5h1409.h    1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/s5h1409.h 2010-09-09 12:38:50.000000000 +0000
+@@ -0,0 +1,88 @@
++/*
++    Samsung S5H1409 VSB/QAM demodulator driver
++
++    Copyright (C) 2006 Steven Toth <stoth@linuxtv.org>
++
++    This program is free software; you can redistribute it and/or modify
++    it under the terms of the GNU General Public License as published by
++    the Free Software Foundation; either version 2 of the License, or
++    (at your option) any later version.
++
++    This program is distributed in the hope that it will be useful,
++    but WITHOUT ANY WARRANTY; without even the implied warranty of
++    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++    GNU General Public License for more details.
++
++    You should have received a copy of the GNU General Public License
++    along with this program; if not, write to the Free Software
++    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++
++*/
++
++#ifndef __S5H1409_H__
++#define __S5H1409_H__
++
++#include <linux/dvb/frontend.h>
++
++struct s5h1409_config {
++      /* the demodulator's i2c address */
++      u8 demod_address;
++
++      /* serial/parallel output */
++#define S5H1409_PARALLEL_OUTPUT 0
++#define S5H1409_SERIAL_OUTPUT   1
++      u8 output_mode;
++
++      /* GPIO Setting */
++#define S5H1409_GPIO_OFF 0
++#define S5H1409_GPIO_ON  1
++      u8 gpio;
++
++      /* IF Freq for QAM in KHz, VSB is hardcoded to 5380 */
++      u16 qam_if;
++
++      /* Spectral Inversion */
++#define S5H1409_INVERSION_OFF 0
++#define S5H1409_INVERSION_ON  1
++      u8 inversion;
++
++      /* Return lock status based on tuner lock, or demod lock */
++#define S5H1409_TUNERLOCKING 0
++#define S5H1409_DEMODLOCKING 1
++      u8 status_mode;
++
++      /* MPEG signal timing */
++#define S5H1409_MPEGTIMING_CONTINOUS_INVERTING_CLOCK       0
++#define S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK    1
++#define S5H1409_MPEGTIMING_NONCONTINOUS_INVERTING_CLOCK    2
++#define S5H1409_MPEGTIMING_NONCONTINOUS_NONINVERTING_CLOCK 3
++      u16 mpeg_timing;
++
++      /* HVR-1600 optimizations (to better work with MXL5005s)
++         Note: some of these are likely to be folded into the generic driver
++         after being regression tested with other boards */
++#define S5H1409_HVR1600_NOOPTIMIZE 0
++#define S5H1409_HVR1600_OPTIMIZE   1
++      u8 hvr1600_opt;
++};
++
++#if defined(CONFIG_DVB_S5H1409) || (defined(CONFIG_DVB_S5H1409_MODULE) \
++      && defined(MODULE))
++extern struct dvb_frontend *s5h1409_attach(const struct s5h1409_config *config,
++                                         struct i2c_adapter *i2c);
++#else
++static inline struct dvb_frontend *s5h1409_attach(
++      const struct s5h1409_config *config,
++      struct i2c_adapter *i2c)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return NULL;
++}
++#endif /* CONFIG_DVB_S5H1409 */
++
++#endif /* __S5H1409_H__ */
++
++/*
++ * Local variables:
++ * c-basic-offset: 8
++ */
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/s5h1411.h linux-2.6.18/drivers/media/dvb/frontends/s5h1411.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/s5h1411.h    1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/s5h1411.h 2010-09-09 12:38:50.000000000 +0000
+@@ -0,0 +1,90 @@
++/*
++    Samsung S5H1411 VSB/QAM demodulator driver
++
++    Copyright (C) 2008 Steven Toth <stoth@linuxtv.org>
++
++    This program is free software; you can redistribute it and/or modify
++    it under the terms of the GNU General Public License as published by
++    the Free Software Foundation; either version 2 of the License, or
++    (at your option) any later version.
++
++    This program is distributed in the hope that it will be useful,
++    but WITHOUT ANY WARRANTY; without even the implied warranty of
++    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++    GNU General Public License for more details.
++
++    You should have received a copy of the GNU General Public License
++    along with this program; if not, write to the Free Software
++    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++
++*/
++
++#ifndef __S5H1411_H__
++#define __S5H1411_H__
++
++#include <linux/dvb/frontend.h>
++
++#define S5H1411_I2C_TOP_ADDR (0x32 >> 1)
++#define S5H1411_I2C_QAM_ADDR (0x34 >> 1)
++
++struct s5h1411_config {
++
++      /* serial/parallel output */
++#define S5H1411_PARALLEL_OUTPUT 0
++#define S5H1411_SERIAL_OUTPUT   1
++      u8 output_mode;
++
++      /* GPIO Setting */
++#define S5H1411_GPIO_OFF 0
++#define S5H1411_GPIO_ON  1
++      u8 gpio;
++
++      /* MPEG signal timing */
++#define S5H1411_MPEGTIMING_CONTINOUS_INVERTING_CLOCK       0
++#define S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK    1
++#define S5H1411_MPEGTIMING_NONCONTINOUS_INVERTING_CLOCK    2
++#define S5H1411_MPEGTIMING_NONCONTINOUS_NONINVERTING_CLOCK 3
++      u16 mpeg_timing;
++
++      /* IF Freq for QAM and VSB in KHz */
++#define S5H1411_IF_3250  3250
++#define S5H1411_IF_3500  3500
++#define S5H1411_IF_4000  4000
++#define S5H1411_IF_5380  5380
++#define S5H1411_IF_44000 44000
++#define S5H1411_VSB_IF_DEFAULT S5H1411_IF_44000
++#define S5H1411_QAM_IF_DEFAULT S5H1411_IF_44000
++      u16 qam_if;
++      u16 vsb_if;
++
++      /* Spectral Inversion */
++#define S5H1411_INVERSION_OFF 0
++#define S5H1411_INVERSION_ON  1
++      u8 inversion;
++
++      /* Return lock status based on tuner lock, or demod lock */
++#define S5H1411_TUNERLOCKING 0
++#define S5H1411_DEMODLOCKING 1
++      u8 status_mode;
++};
++
++#if defined(CONFIG_DVB_S5H1411) || \
++      (defined(CONFIG_DVB_S5H1411_MODULE) && defined(MODULE))
++extern struct dvb_frontend *s5h1411_attach(const struct s5h1411_config *config,
++                                         struct i2c_adapter *i2c);
++#else
++static inline struct dvb_frontend *s5h1411_attach(
++      const struct s5h1411_config *config,
++      struct i2c_adapter *i2c)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return NULL;
++}
++#endif /* CONFIG_DVB_S5H1411 */
++
++#endif /* __S5H1411_H__ */
++
++/*
++ * Local variables:
++ * c-basic-offset: 8
++ */
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/s5h1420.h linux-2.6.18/drivers/media/dvb/frontends/s5h1420.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/s5h1420.h    2006-09-20 03:42:06.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/s5h1420.h 2010-09-09 12:38:50.000000000 +0000
+@@ -1,25 +1,26 @@
+ /*
+-    Driver for S5H1420 QPSK Demodulators
+-
+-    Copyright (C) 2005 Andrew de Quincey <adq_dvb@lidskialf.net>
+-
+-    This program is free software; you can redistribute it and/or modify
+-    it under the terms of the GNU General Public License as published by
+-    the Free Software Foundation; either version 2 of the License, or
+-    (at your option) any later version.
+-
+-    This program is distributed in the hope that it will be useful,
+-    but WITHOUT ANY WARRANTY; without even the implied warranty of
+-    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+-
+-    GNU General Public License for more details.
+-
+-    You should have received a copy of the GNU General Public License
+-    along with this program; if not, write to the Free Software
+-    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+-
+-*/
+-
++ * Driver for
++ *    Samsung S5H1420 and
++ *    PnpNetwork PN1010 QPSK Demodulator
++ *
++ * Copyright (C) 2005 Andrew de Quincey <adq_dvb@lidskialf.net>
++ * Copyright (C) 2005-8 Patrick Boettcher <pb@linuxtv.org>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ *
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++ */
+ #ifndef S5H1420_H
+ #define S5H1420_H
+ 
+@@ -32,9 +33,29 @@
+ 
+       /* does the inversion require inversion? */
+       u8 invert:1;
++
++      u8 repeated_start_workaround:1;
++      u8 cdclk_polarity:1; /* 1 == falling edge, 0 == raising edge */
++
++      u8 serial_mpeg:1;
+ };
+ 
+-extern struct dvb_frontend* s5h1420_attach(const struct s5h1420_config* config,
+-           struct i2c_adapter* i2c);
++#if defined(CONFIG_DVB_S5H1420) || (defined(CONFIG_DVB_S5H1420_MODULE) && defined(MODULE))
++extern struct dvb_frontend *s5h1420_attach(const struct s5h1420_config *config,
++           struct i2c_adapter *i2c);
++extern struct i2c_adapter *s5h1420_get_tuner_i2c_adapter(struct dvb_frontend *fe);
++#else
++static inline struct dvb_frontend *s5h1420_attach(const struct s5h1420_config *config,
++                                         struct i2c_adapter *i2c)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return NULL;
++}
++
++static inline struct i2c_adapter *s5h1420_get_tuner_i2c_adapter(struct dvb_frontend *fe)
++{
++      return NULL;
++}
++#endif // CONFIG_DVB_S5H1420
+ 
+ #endif // S5H1420_H
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/s5h1420_priv.h linux-2.6.18/drivers/media/dvb/frontends/s5h1420_priv.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/s5h1420_priv.h       1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/s5h1420_priv.h    2010-09-09 12:38:50.000000000 +0000
+@@ -0,0 +1,380 @@
++/*
++ * Driver for
++ *    Samsung S5H1420 and
++ *    PnpNetwork PN1010 QPSK Demodulator
++ *
++ * Copyright (C) 2005 Andrew de Quincey <adq_dvb@lidskialf.net>
++ * Copyright (C) 2005 Patrick Boettcher <pb@linuxtv.org>
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License as published by the Free
++ * Software Foundation; either version 2 of the License, or (at your option)
++ * any later version.
++ *
++ * This program is distributed in the hope that it will be useful, but WITHOUT
++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
++ * FITNESS FOR A PARTICULAR PURPOSE.  See the
++ *
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License along with
++ * this program; if not, write to the Free Software Foundation, Inc., 675 Mass
++ * Ave, Cambridge, MA 02139, USA.
++ */
++#ifndef S5H1420_PRIV
++#define S5H1420_PRIV
++
++#include <asm/types.h>
++
++enum s5h1420_register {
++      ID01      = 0x00,
++      CON_0     = 0x01,
++      CON_1     = 0x02,
++      PLL01     = 0x03,
++      PLL02     = 0x04,
++      QPSK01    = 0x05,
++      QPSK02    = 0x06,
++      Pre01     = 0x07,
++      Post01    = 0x08,
++      Loop01    = 0x09,
++      Loop02    = 0x0a,
++      Loop03    = 0x0b,
++      Loop04    = 0x0c,
++      Loop05    = 0x0d,
++      Pnco01    = 0x0e,
++      Pnco02    = 0x0f,
++      Pnco03    = 0x10,
++      Tnco01    = 0x11,
++      Tnco02    = 0x12,
++      Tnco03    = 0x13,
++      Monitor01 = 0x14,
++      Monitor02 = 0x15,
++      Monitor03 = 0x16,
++      Monitor04 = 0x17,
++      Monitor05 = 0x18,
++      Monitor06 = 0x19,
++      Monitor07 = 0x1a,
++      Monitor12 = 0x1f,
++
++      FEC01     = 0x22,
++      Soft01    = 0x23,
++      Soft02    = 0x24,
++      Soft03    = 0x25,
++      Soft04    = 0x26,
++      Soft05    = 0x27,
++      Soft06    = 0x28,
++      Vit01     = 0x29,
++      Vit02     = 0x2a,
++      Vit03     = 0x2b,
++      Vit04     = 0x2c,
++      Vit05     = 0x2d,
++      Vit06     = 0x2e,
++      Vit07     = 0x2f,
++      Vit08     = 0x30,
++      Vit09     = 0x31,
++      Vit10     = 0x32,
++      Vit11     = 0x33,
++      Vit12     = 0x34,
++      Sync01    = 0x35,
++      Sync02    = 0x36,
++      Rs01      = 0x37,
++      Mpeg01    = 0x38,
++      Mpeg02    = 0x39,
++      DiS01     = 0x3a,
++      DiS02     = 0x3b,
++      DiS03     = 0x3c,
++      DiS04     = 0x3d,
++      DiS05     = 0x3e,
++      DiS06     = 0x3f,
++      DiS07     = 0x40,
++      DiS08     = 0x41,
++      DiS09     = 0x42,
++      DiS10     = 0x43,
++      DiS11     = 0x44,
++      Rf01      = 0x45,
++      Err01     = 0x46,
++      Err02     = 0x47,
++      Err03     = 0x48,
++      Err04     = 0x49,
++};
++
++#if 0
++
++regsiter mapping follows
++
++/* ID01  */
++#define PN1010_ID 7, 0
++
++/* CON_0 */
++#define QPSK_ONLY 4, 4
++#define SOFT_RST  3, 3 /* System soft reset mode (active high) [1] Enable [0] Disable */
++#define CLK_MODE  2, 2
++#define BPSK_QPSK 1, 1
++#define DSS_DVB   0, 0 /* DSS/DVB mode selection [1] DSS [0] DVB */
++
++/* CON_1 */
++#define ADC_SPD   6, 6
++#define PLL_OEN   5, 5
++#define SER_SEL   4, 4
++#define XTAL_OEN  3, 3
++#define Q_TEST    2, 2
++#define PWR_DN    1, 1 /* Power down mode [1] Power down enable,  [0] Power down disable */
++#define I2C_RPT   0, 0 /* I2C repeater control [1] I2C repeater enable,  [0] I2C repeater disable.
++                                         * Note: The master should be set this bit to "1" in order to interface with the tuner.
++                                         * When the master is not communicated with the tuner,  this bit should be set to "0" */
++
++/* PLL programming information
++ * Fout = ((M+8)*Fin)/((P+2)*2^S),   Fin = 4 MHz */
++/* PLL01 */
++#define M 7, 0
++
++/* PLL02 */
++#define P 5, 0
++#define S 7, 6
++
++/* QPSK01 */
++#define KICK_EN    7, 7 /* [1] PLL Kicker enable [0] Disable */
++#define ROLL_OFF   6, 6
++#define SCALE_EN   5, 5
++#define DC_EN      4, 4 /* DC offset remove [1] Enable [0] Disable */
++#define VMODE      3, 3
++#define TGL_MSB    2, 2
++#define MODE_QPSK  1, 1 /* QPSK operation mode [1] 1 sampling/1 symbol [0] 2 sampling/1 symbol */
++#define Q_SRESET_N 0, 0 /* QPSK start signal [1] Start [0] Idle */
++
++/* QPSK02 */
++#define DUMP_ACC   3, 3 /* Dump phase loop filter & timing loop filter accumulator [0 and then 1]
++                                          * The read operation enabled,  when user set DUMP_ACC "0" and then "1". */
++#define DC_WIN     2, 0 /* Window position from MSB (0 <= DC_WIN <= 7) */
++
++/* AGC Controls */
++/* Pre01 */
++#define PRE_TH    4, 0 /* PRE-AGC threshold */
++#define INV_PULSE 7, 7 /* PWM signal is reversed [1] PWM signal active low [0] PWM signal active high */
++
++/* Post01 */
++#define RRC_SCALE 7, 6
++#define POST_TH   5, 0 /* POST-AGC threshold */
++
++/* Loop Controls */
++/* Loop01 */
++#define WT_TNCO 7, 7 /* Write TNCO center frequency [0 and then 1] The write operation enabled,  when user set WT_TNCO "0" and then "1" */
++#define WT_PNCO 6, 6 /* Write PNCO center frequency [0 and then 1] The write operation enabled,  when user set WT_PNCO "0" and then "1" */
++
++/* Loop02 */
++#define LOOP_OUT 7, 7 /* Loop filter monitoring selection [1] Loop filter accumulator + NCO [0] Loop filter accumulator */
++#define KICK_VAL 6, 4 /* The value that gets injected into the accumulator when a "kick" is needed. */
++#define KICK_MUL 3, 0 /* The number of bits KICK_VAL is up-shifted (2^N) before it is injected into the accumulator. */
++
++/* Loop03 */
++#define IGA_PLF 7, 4 /* Phase loop,  integral gain (2^IGA_PLF) in the acquisition mode */
++#define PGA_PLF 3, 0 /* Phase loop,  proportional gain (2^PGA_PLF) in the acquisition mode (default +8 added) */
++
++/* Loop04 */
++#define IGT_PLF 7, 4 /* Integral gain in the tracking mode */
++#define PGT_PLF 3, 0 /* Phase loop,  proportional gain in the tracking mode (default +8 added) */
++
++/* Loop 05 */
++#define IG_TLF 7, 4 /* Timing loop,  integral gain */
++#define PG_TLF 3, 0 /* Timing loop,  proportional gain (default +8 added) */
++
++/* NCO controls
++ * LOOP_OUT [1] Read PLF accumulator + PNCO,  LOOP_OUT [0] Read PLF accumulator */
++/* Pnco01 */
++#define PNCO0 7, 0
++/* Pnco02 */
++#define PNCO1 7, 0
++/* Pnco03 */
++#define PNCO2 7, 0
++
++/* LOOP_OUT [1],  Read TLF accumulator + TNCO,  LOOP_OUT [0],  Read TLF accumulator */
++/* Tnco01 */
++#define TNCO0 7, 0
++/* Tnco02 */
++#define TNCO1 7, 0
++/* Tnco03 */
++#define TNCO2 7, 0
++
++/* Monitor01 */
++#define A_SCL 3, 3
++#define TLOCK 1, 1 /* Timing loop lock (Symbol sync) [1] Timing loop has locked [0] Timing loop has not locked */
++#define PLOCK 0, 0 /* Phase loop lock (Carrier sync) [1] Phase loop has locked [0] Phase loop has not locked */
++
++/* Monitor02 */
++#define PRE_LEVEL 7, 0 /* PRE-AGC gain level */
++
++/* Monitor03 */
++#define POST_LEVEL 7, 0 /* POST-AGC gain level */
++
++/* Monitor04 */
++#define DC_I_LEVEL 7, 0 /* DC offset of I samples */
++
++/* Monitor05 */
++#define DC_Q_LEVEL 7, 0 /* DC offset of Q samples */
++
++/* Monitor06 */
++#define PLOCK_CNT 7, 0
++
++/* Monitor07 */
++#define TLOCK_CNT 7, 0
++
++/* Monitor12 */
++#define QPSK_OUT  6, 1 /* QPSK output monitoring */
++#define DC_FREEZE 0, 0 /* [1] Do not update DC_OFFSET */
++
++/* FEC Block */
++/* FEC01 */
++#define DERAND_BPAS   6, 6
++#define RS_BPAS       5, 5
++#define FEC_SRST_CNTL 4, 4
++#define FEC_SRESET    3, 3
++#define MPEG_CLK_INTL 2, 0
++      /*  Tmp=(FMClk/FSR) x (1 / (2xCR)); FMClk: System Clock Frequency,  FSR: Symbol Rate,  CR: Code Rate
++       *  0: 1 < Tmp <= 2,   4: 13 < Tmp <= 17,
++       *  1: 2 < Tmp <= 5,   5: 17 < Tmp <= 25,
++       *  2: 5 < Tmp <= 9,   6: 25 < Tmp <= 33,
++       *  3: 9 < Tmp <= 13,  7: 33 < Tmp */
++
++/* Soft01 */
++#define ST_VAL_R12 2, 0
++#define STEP_R12   5, 3
++#define STEP_R23   5, 3
++#define STEP_R34   5, 3
++#define STEP_R56   5, 3
++#define STEP_R67   5, 3
++#define STEP_R78   5, 3
++/* Soft02 */
++#define ST_VAL_R23 7, 0
++/* Soft03 */
++#define ST_VAL_R34 7, 0
++/* Soft04 */
++#define ST_VAL_R56 7, 0
++/* Soft05 */
++#define ST_VAL_R67 7, 0
++/* Soft06 */
++#define ST_VAL_R78 7, 0
++
++/* Vit01 */
++#define RENORM_R12 7, 0
++/* Vit02 */
++#define RENORM_R23 7, 0
++/* Vit03 */
++#define RENORM_R34 7, 0
++/* Vit04 */
++#define RENORM_R56 7, 0
++/* Vit05 */
++#define RENORM_R67 7, 0
++/* Vit06 */
++#define RENORM_R78 7, 0
++/* Vit07 */
++#define RENORM_PRD 7, 0
++
++/* Vit08 */
++#define VIT_IN_SR78 7, 7
++#define VIT_IN_SR34 6, 6
++#define VIT_SR78    5, 5
++#define VIT_SR67    4, 4
++#define VIT_SR56    3, 3
++#define VIT_SR34    2, 2
++#define VIT_SR23    1, 1 /* .... */
++#define VIT_SR12    0, 0 /* Include CR 1/2 in search */
++
++/* Vit09 */
++#define PARM_FIX             4, 4 /* Parameter fix mode: [1] Known parameter [0] Unknown parameter */
++#define VIT_INV_SPECPARM_FIX 3, 3 /* Initial spectrum information */
++#define VIT_FR               2, 0 /* Start synchronization search at code rate as follows */
++      #define VIT_CR_12 0x00
++      #define VIT_CR_23 0x01
++      #define VIT_CR_34 0x02
++      #define VIT_CR_56 0x03
++      #define VIT_CR_67 0x04
++      #define VIT_CR_78 0x05
++
++/* Vit10 */
++#define INV_SPEC_STS 3, 3 /* Spectrum information monitoring [1] Inv spectrum [0] Not inv spectrum */
++#define VIT_CR       2, 0 /* Viterbi decoder current code rate [0] R=1/2 [1] R=2/3 [2] R=3/4 [3] R=5/6 [4] R=6/7 [5] R=7/8 */
++
++/* Vit11 */
++#define VIT_CER 7, 0
++
++/* Vit12 */
++#define RENORM_RAT 7, 0
++
++/* Sync01 */
++#define SYNC_MISS_TH 7, 4 /* Sync byte detector?s miss threshold */
++#define SYNC_HIT_TH  3, 0 /* Sync byte detector?s hit threshold This value should be greater than 2 */
++
++/* Sync02 */
++#define BYTE_SYNC     5, 5 /* [1] Acquire byte sync [0] Not acquire byte sync */
++#define SYNC_BYTE_STS 4, 2
++#define VIT_SRCH_STS  1, 1
++#define VIT_SYNC      0, 0 /* [1] Viterbi decoder is in sync [0] Viterbi decoder is out of sync */
++
++/* Rs01 */
++#define RS_ERR  3, 0
++#define PKT_ERR 4, 4
++
++/* Mpeg01 */
++#define ERR_POL   3, 3 /* Packet error polarity [1] Active low [0] Active high */
++#define SYNC_POL  2, 2 /* Sync polarity [1] Active low [0] Active high */
++#define VALID_POL 1, 1 /* Data valid polarity [1] Active low [0] Active high */
++#define CDCLK_POL 0, 0 /* CDCLK polarity [1] Falling edge event [0] Rising edge event */
++
++/* Mpeg02 */
++#define MPEG_OEN  6, 6
++#define DOUT_CONT 5, 5
++#define ERR_CONT  4, 4
++#define CLK_CONT  3, 3 /* Clock continuous mode [1] Continuous clock,  [0] Clock is enable during payload data transfer */
++#define ENVELOPE  2, 2
++#define SER_PAR   1, 1 /* Serial / Parallel mode [1] Serial mode,  [0] Parallel mode */
++#define DSS_SYNC  0, 0 /* DSS sync mode [1] Output sync,  [0] No output sync */
++
++/* DiS01 */
++#define TONE_FREQ 7, 0 /* Tone frequency ratio ftone = fclk / (TONE_FREQ x 32) */
++
++/* DiS02 */
++#define RCV_EN     7, 7 /* DiSEqC receive enable mode [1] Receive enable [0] Receive disable */
++#define DIS_LENGTH 6, 4 /* Message length */
++#define DIS_RDY    3, 3 /* Data Transfer ready / finish [1] Ready [0] Finish */
++#define SWITCH_CON 2, 2 /* Satellite switch in tone burst mode [1] Satellite B [0] Satellite A */
++#define LNB_CON    1, 0 /* LNB control mode,  [0] Continuous mode,  [1] Tone burst mode,  [2] DiSEqC mode,  [3] Reserved */
++
++/* DiS03 */
++#define OLF_N      2, 2 /* [1] Disable [0] OLF (active low) */
++#define LNB_DN     1, 1 /* [1] LNB down [0] Disable (active high) */
++#define V18_13V    0, 0 /* 13V/18V select register (0=13V, 1=18V) */
++
++/* DiS04 .. DiS11*/
++#define LNB_MESGE0 7, 0
++#define LNB_MESGE1 7, 0
++#define LNB_MESGE2 7, 0
++#define LNB_MESGE3 7, 0
++#define LNB_MESGE4 7, 0
++#define LNB_MESGE5 7, 0
++#define LNB_MESGE6 7, 0
++#define LNB_MESGE7 7, 0
++
++/* Rf01 */
++#define SLAVE_ADDR 6, 0 /* RF tuner slave Address (SOC VERSION) */
++
++/* Err01 */
++#define ALARM_MODE  4, 4
++#define ERR_CNT_PRD 3, 2
++#define ERR_SRC     1, 0 /* Error monitoring source */
++      #define QPSK_BIT_ERRORS 0x0
++      #define VITERBI_BIT_ERRORS 0x1
++      #define VITERBI_BYTE_ERRORS 0x2
++      #define PACKET_ERRORS 0x3
++
++/* Err02 */
++#define ERR_CNT_L  7, 0 /* Error counter value register (LSB 8 bits) */
++
++/* Err03 */
++#define ERR_CNT_H  7, 0 /* Error counter value register (MSB 8 bits) */
++
++/* Err04 */
++#define PARITY_ERR 7, 0 /* Error flag for DiSEqC receive data */
++
++#endif
++
++#endif
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/s921_core.h linux-2.6.18/drivers/media/dvb/frontends/s921_core.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/s921_core.h  1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/s921_core.h       2010-09-09 12:38:50.000000000 +0000
+@@ -0,0 +1,114 @@
++#ifndef _S921_CORE_H
++#define _S921_CORE_H
++//#define u8 unsigned int
++//#define u32 unsigned int
++
++
++
++//#define EINVAL -1
++#define E_OK 0
++
++struct s921_isdb_t {
++      void *priv_dev;
++      int (*i2c_write)(void *dev, u8 reg, u8 val);
++      int (*i2c_read)(void *dev, u8 reg);
++};
++
++#define ISDB_T_CMD_INIT       0
++#define ISDB_T_CMD_SET_PARAM  1
++#define ISDB_T_CMD_TUNE       2
++#define ISDB_T_CMD_GET_STATUS 3
++
++struct s921_isdb_t_tune_params {
++      u32 frequency;
++};
++
++struct s921_isdb_t_status {
++};
++
++struct s921_isdb_t_transmission_mode_params {
++      u8 mode;
++      u8 layer_a_mode;
++#define ISDB_T_LA_MODE_1 0
++#define ISDB_T_LA_MODE_2 1
++#define ISDB_T_LA_MODE_3 2
++      u8 layer_a_carrier_modulation;
++#define ISDB_T_LA_CM_DQPSK 0
++#define ISDB_T_LA_CM_QPSK  1
++#define ISDB_T_LA_CM_16QAM 2
++#define ISDB_T_LA_CM_64QAM 3
++#define ISDB_T_LA_CM_NOLAYER 4
++      u8 layer_a_code_rate;
++#define ISDB_T_LA_CR_1_2   0
++#define ISDB_T_LA_CR_2_3   1
++#define ISDB_T_LA_CR_3_4   2
++#define ISDB_T_LA_CR_5_6   4
++#define ISDB_T_LA_CR_7_8   8
++#define ISDB_T_LA_CR_NOLAYER   16
++      u8 layer_a_time_interleave;
++#define ISDB_T_LA_TI_0  0
++#define ISDB_T_LA_TI_1  1
++#define ISDB_T_LA_TI_2  2
++#define ISDB_T_LA_TI_4  4
++#define ISDB_T_LA_TI_8  8
++#define ISDB_T_LA_TI_16 16
++#define ISDB_T_LA_TI_32 32
++      u8 layer_a_nseg;
++
++      u8 layer_b_mode;
++#define ISDB_T_LB_MODE_1 0
++#define ISDB_T_LB_MODE_2 1
++#define ISDB_T_LB_MODE_3 2
++      u8 layer_b_carrier_modulation;
++#define ISDB_T_LB_CM_DQPSK 0
++#define ISDB_T_LB_CM_QPSK  1
++#define ISDB_T_LB_CM_16QAM 2
++#define ISDB_T_LB_CM_64QAM 3
++#define ISDB_T_LB_CM_NOLAYER 4
++      u8 layer_b_code_rate;
++#define ISDB_T_LB_CR_1_2   0
++#define ISDB_T_LB_CR_2_3   1
++#define ISDB_T_LB_CR_3_4   2
++#define ISDB_T_LB_CR_5_6   4
++#define ISDB_T_LB_CR_7_8   8
++#define ISDB_T_LB_CR_NOLAYER   16
++      u8 layer_b_time_interleave;
++#define ISDB_T_LB_TI_0  0
++#define ISDB_T_LB_TI_1  1
++#define ISDB_T_LB_TI_2  2
++#define ISDB_T_LB_TI_4  4
++#define ISDB_T_LB_TI_8  8
++#define ISDB_T_LB_TI_16 16
++#define ISDB_T_LB_TI_32 32
++      u8 layer_b_nseg;
++
++      u8 layer_c_mode;
++#define ISDB_T_LC_MODE_1 0
++#define ISDB_T_LC_MODE_2 1
++#define ISDB_T_LC_MODE_3 2
++      u8 layer_c_carrier_modulation;
++#define ISDB_T_LC_CM_DQPSK 0
++#define ISDB_T_LC_CM_QPSK  1
++#define ISDB_T_LC_CM_16QAM 2
++#define ISDB_T_LC_CM_64QAM 3
++#define ISDB_T_LC_CM_NOLAYER 4
++      u8 layer_c_code_rate;
++#define ISDB_T_LC_CR_1_2   0
++#define ISDB_T_LC_CR_2_3   1
++#define ISDB_T_LC_CR_3_4   2
++#define ISDB_T_LC_CR_5_6   4
++#define ISDB_T_LC_CR_7_8   8
++#define ISDB_T_LC_CR_NOLAYER   16
++      u8 layer_c_time_interleave;
++#define ISDB_T_LC_TI_0  0
++#define ISDB_T_LC_TI_1  1
++#define ISDB_T_LC_TI_2  2
++#define ISDB_T_LC_TI_4  4
++#define ISDB_T_LC_TI_8  8
++#define ISDB_T_LC_TI_16 16
++#define ISDB_T_LC_TI_32 32
++      u8 layer_c_nseg;
++};
++
++int s921_isdb_cmd(struct s921_isdb_t *dev, u32 cmd, void *data);
++#endif
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/s921_module.h linux-2.6.18/drivers/media/dvb/frontends/s921_module.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/s921_module.h        1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/s921_module.h     2010-09-09 12:38:50.000000000 +0000
+@@ -0,0 +1,49 @@
++/*
++ *  Driver for DVB-T s921 demodulator
++ *
++ *  Copyright (C) 2008 Markus Rechberger <mrechberger@sundtek.de>
++ *
++ *  This program is free software; you can redistribute it and/or modify
++ *  it under the terms of the GNU General Public License as published by
++ *  the Free Software Foundation; either version 2 of the License, or
++ *  (at your option) any later version.
++ *
++ *  This program is distributed in the hope that it will be useful,
++ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
++ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ *
++ *  GNU General Public License for more details.
++ *
++ *  You should have received a copy of the GNU General Public License
++ *  along with this program; if not, write to the Free Software
++ *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.=
++ */
++
++#ifndef S921_MODULE_H
++#define S921_MODULE_H
++
++#include <linux/dvb/frontend.h>
++#include "s921_core.h"
++
++int s921_isdb_init(struct s921_isdb_t *dev);
++int s921_isdb_cmd(struct s921_isdb_t *dev, u32 cmd, void *data);
++
++struct s921_config
++{
++      /* demodulator's I2C address */
++      u8 i2c_address;
++};
++
++#if defined(CONFIG_DVB_S921) || (defined(CONFIG_DVB_S921_MODULE) && defined(MODULE))
++extern struct dvb_frontend* s921_attach(const struct s921_config *config,
++                                         struct i2c_adapter *i2c);
++#else
++static inline struct dvb_frontend* s921_attach(const struct s921_config *config,
++                                         struct i2c_adapter *i2c)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return NULL;
++}
++#endif /* CONFIG_DVB_S921 */
++
++#endif /* S921_H */
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/si21xx.h linux-2.6.18/drivers/media/dvb/frontends/si21xx.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/si21xx.h     1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/si21xx.h  2010-09-09 12:38:50.000000000 +0000
+@@ -0,0 +1,37 @@
++#ifndef SI21XX_H
++#define SI21XX_H
++
++#include <linux/dvb/frontend.h>
++#include "dvb_frontend.h"
++
++struct si21xx_config {
++      /* the demodulator's i2c address */
++      u8 demod_address;
++
++      /* minimum delay before retuning */
++      int min_delay_ms;
++};
++
++#if defined(CONFIG_DVB_SI21XX) || \
++              (defined(CONFIG_DVB_SI21XX_MODULE) && defined(MODULE))
++extern struct dvb_frontend *si21xx_attach(const struct si21xx_config *config,
++                                              struct i2c_adapter *i2c);
++#else
++static inline struct dvb_frontend *si21xx_attach(
++              const struct si21xx_config *config, struct i2c_adapter *i2c)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return NULL;
++}
++#endif
++
++static inline int si21xx_writeregister(struct dvb_frontend *fe, u8 reg, u8 val)
++{
++      int r = 0;
++      u8 buf[] = {reg, val};
++      if (fe->ops.write)
++              r = fe->ops.write(fe, buf, 2);
++      return r;
++}
++
++#endif
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/sp8870.h linux-2.6.18/drivers/media/dvb/frontends/sp8870.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/sp8870.h     2006-09-20 03:42:06.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/sp8870.h  2010-09-09 12:38:50.000000000 +0000
+@@ -35,7 +35,16 @@
+       int (*request_firmware)(struct dvb_frontend* fe, const struct firmware **fw, char* name);
+ };
+ 
++#if defined(CONFIG_DVB_SP8870) || (defined(CONFIG_DVB_SP8870_MODULE) && defined(MODULE))
+ extern struct dvb_frontend* sp8870_attach(const struct sp8870_config* config,
+                                         struct i2c_adapter* i2c);
++#else
++static inline struct dvb_frontend* sp8870_attach(const struct sp8870_config* config,
++                                        struct i2c_adapter* i2c)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return NULL;
++}
++#endif // CONFIG_DVB_SP8870
+ 
+ #endif // SP8870_H
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/sp887x.h linux-2.6.18/drivers/media/dvb/frontends/sp887x.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/sp887x.h     2006-09-20 03:42:06.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/sp887x.h  2010-09-09 12:38:50.000000000 +0000
+@@ -17,7 +17,16 @@
+       int (*request_firmware)(struct dvb_frontend* fe, const struct firmware **fw, char* name);
+ };
+ 
++#if defined(CONFIG_DVB_SP887X) || (defined(CONFIG_DVB_SP887X_MODULE) && defined(MODULE))
+ extern struct dvb_frontend* sp887x_attach(const struct sp887x_config* config,
+                                         struct i2c_adapter* i2c);
++#else
++static inline struct dvb_frontend* sp887x_attach(const struct sp887x_config* config,
++                                        struct i2c_adapter* i2c)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return NULL;
++}
++#endif // CONFIG_DVB_SP887X
+ 
+ #endif // SP887X_H
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/stb0899_cfg.h linux-2.6.18/drivers/media/dvb/frontends/stb0899_cfg.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/stb0899_cfg.h        1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/stb0899_cfg.h     2010-09-09 12:38:50.000000000 +0000
+@@ -0,0 +1,421 @@
++/*
++      STB0899 Multistandard Frontend driver
++      Copyright (C) Manu Abraham (abraham.manu@gmail.com)
++
++      Copyright (C) ST Microelectronics
++
++      This program is free software; you can redistribute it and/or modify
++      it under the terms of the GNU General Public License as published by
++      the Free Software Foundation; either version 2 of the License, or
++      (at your option) any later version.
++
++      This program is distributed in the hope that it will be useful,
++      but WITHOUT ANY WARRANTY; without even the implied warranty of
++      MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++      GNU General Public License for more details.
++
++      You should have received a copy of the GNU General Public License
++      along with this program; if not, write to the Free Software
++      Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++*/
++
++#ifndef __STB0899_CFG_H
++#define __STB0899_CFG_H
++
++static const struct stb0899_s2_reg  stb0899_s2_init_2[] = {
++
++      { STB0899_OFF0_DMD_STATUS       , STB0899_BASE_DMD_STATUS       , 0x00000103 }, /* DMDSTATUS    */
++      { STB0899_OFF0_CRL_FREQ         , STB0899_BASE_CRL_FREQ         , 0x3ed1da56 }, /* CRLFREQ      */
++      { STB0899_OFF0_BTR_FREQ         , STB0899_BASE_BTR_FREQ         , 0x00004000 }, /* BTRFREQ      */
++      { STB0899_OFF0_IF_AGC_GAIN      , STB0899_BASE_IF_AGC_GAIN      , 0x00002ade }, /* IFAGCGAIN    */
++      { STB0899_OFF0_BB_AGC_GAIN      , STB0899_BASE_BB_AGC_GAIN      , 0x000001bc }, /* BBAGCGAIN    */
++      { STB0899_OFF0_DC_OFFSET        , STB0899_BASE_DC_OFFSET        , 0x00000200 }, /* DCOFFSET     */
++      { STB0899_OFF0_DMD_CNTRL        , STB0899_BASE_DMD_CNTRL        , 0x0000000f }, /* DMDCNTRL     */
++
++      { STB0899_OFF0_IF_AGC_CNTRL     , STB0899_BASE_IF_AGC_CNTRL     , 0x03fb4a20 }, /* IFAGCCNTRL   */
++      { STB0899_OFF0_BB_AGC_CNTRL     , STB0899_BASE_BB_AGC_CNTRL     , 0x00200c97 }, /* BBAGCCNTRL   */
++
++      { STB0899_OFF0_CRL_CNTRL        , STB0899_BASE_CRL_CNTRL        , 0x00000016 }, /* CRLCNTRL     */
++      { STB0899_OFF0_CRL_PHS_INIT     , STB0899_BASE_CRL_PHS_INIT     , 0x00000000 }, /* CRLPHSINIT   */
++      { STB0899_OFF0_CRL_FREQ_INIT    , STB0899_BASE_CRL_FREQ_INIT    , 0x00000000 }, /* CRLFREQINIT  */
++      { STB0899_OFF0_CRL_LOOP_GAIN    , STB0899_BASE_CRL_LOOP_GAIN    , 0x00000000 }, /* CRLLOOPGAIN  */
++      { STB0899_OFF0_CRL_NOM_FREQ     , STB0899_BASE_CRL_NOM_FREQ     , 0x3ed097b6 }, /* CRLNOMFREQ   */
++      { STB0899_OFF0_CRL_SWP_RATE     , STB0899_BASE_CRL_SWP_RATE     , 0x00000000 }, /* CRLSWPRATE   */
++      { STB0899_OFF0_CRL_MAX_SWP      , STB0899_BASE_CRL_MAX_SWP      , 0x00000000 }, /* CRLMAXSWP    */
++      { STB0899_OFF0_CRL_LK_CNTRL     , STB0899_BASE_CRL_LK_CNTRL     , 0x0f6cdc01 }, /* CRLLKCNTRL   */
++      { STB0899_OFF0_DECIM_CNTRL      , STB0899_BASE_DECIM_CNTRL      , 0x00000000 }, /* DECIMCNTRL   */
++      { STB0899_OFF0_BTR_CNTRL        , STB0899_BASE_BTR_CNTRL        , 0x00003993 }, /* BTRCNTRL     */
++      { STB0899_OFF0_BTR_LOOP_GAIN    , STB0899_BASE_BTR_LOOP_GAIN    , 0x000d3c6f }, /* BTRLOOPGAIN  */
++      { STB0899_OFF0_BTR_PHS_INIT     , STB0899_BASE_BTR_PHS_INIT     , 0x00000000 }, /* BTRPHSINIT   */
++      { STB0899_OFF0_BTR_FREQ_INIT    , STB0899_BASE_BTR_FREQ_INIT    , 0x00000000 }, /* BTRFREQINIT  */
++      { STB0899_OFF0_BTR_NOM_FREQ     , STB0899_BASE_BTR_NOM_FREQ     , 0x0238e38e }, /* BTRNOMFREQ   */
++      { STB0899_OFF0_BTR_LK_CNTRL     , STB0899_BASE_BTR_LK_CNTRL     , 0x00000000 }, /* BTRLKCNTRL   */
++      { STB0899_OFF0_DECN_CNTRL       , STB0899_BASE_DECN_CNTRL       , 0x00000000 }, /* DECNCNTRL    */
++      { STB0899_OFF0_TP_CNTRL         , STB0899_BASE_TP_CNTRL         , 0x00000000 }, /* TPCNTRL      */
++      { STB0899_OFF0_TP_BUF_STATUS    , STB0899_BASE_TP_BUF_STATUS    , 0x00000000 }, /* TPBUFSTATUS  */
++      { STB0899_OFF0_DC_ESTIM         , STB0899_BASE_DC_ESTIM         , 0x00000000 }, /* DCESTIM      */
++      { STB0899_OFF0_FLL_CNTRL        , STB0899_BASE_FLL_CNTRL        , 0x00000000 }, /* FLLCNTRL     */
++      { STB0899_OFF0_FLL_FREQ_WD      , STB0899_BASE_FLL_FREQ_WD      , 0x40070000 }, /* FLLFREQWD    */
++      { STB0899_OFF0_ANTI_ALIAS_SEL   , STB0899_BASE_ANTI_ALIAS_SEL   , 0x00000001 }, /* ANTIALIASSEL */
++      { STB0899_OFF0_RRC_ALPHA        , STB0899_BASE_RRC_ALPHA        , 0x00000002 }, /* RRCALPHA     */
++      { STB0899_OFF0_DC_ADAPT_LSHFT   , STB0899_BASE_DC_ADAPT_LSHFT   , 0x00000000 }, /* DCADAPTISHFT */
++      { STB0899_OFF0_IMB_OFFSET       , STB0899_BASE_IMB_OFFSET       , 0x0000fe01 }, /* IMBOFFSET    */
++      { STB0899_OFF0_IMB_ESTIMATE     , STB0899_BASE_IMB_ESTIMATE     , 0x00000000 }, /* IMBESTIMATE  */
++      { STB0899_OFF0_IMB_CNTRL        , STB0899_BASE_IMB_CNTRL        , 0x00000001 }, /* IMBCNTRL     */
++      { STB0899_OFF0_IF_AGC_CNTRL2    , STB0899_BASE_IF_AGC_CNTRL2    , 0x00005007 }, /* IFAGCCNTRL2  */
++      { STB0899_OFF0_DMD_CNTRL2       , STB0899_BASE_DMD_CNTRL2       , 0x00000002 }, /* DMDCNTRL2    */
++      { STB0899_OFF0_TP_BUFFER        , STB0899_BASE_TP_BUFFER        , 0x00000000 }, /* TPBUFFER     */
++      { STB0899_OFF0_TP_BUFFER1       , STB0899_BASE_TP_BUFFER1       , 0x00000000 }, /* TPBUFFER1    */
++      { STB0899_OFF0_TP_BUFFER2       , STB0899_BASE_TP_BUFFER2       , 0x00000000 }, /* TPBUFFER2    */
++      { STB0899_OFF0_TP_BUFFER3       , STB0899_BASE_TP_BUFFER3       , 0x00000000 }, /* TPBUFFER3    */
++      { STB0899_OFF0_TP_BUFFER4       , STB0899_BASE_TP_BUFFER4       , 0x00000000 }, /* TPBUFFER4    */
++      { STB0899_OFF0_TP_BUFFER5       , STB0899_BASE_TP_BUFFER5       , 0x00000000 }, /* TPBUFFER5    */
++      { STB0899_OFF0_TP_BUFFER6       , STB0899_BASE_TP_BUFFER6       , 0x00000000 }, /* TPBUFFER6    */
++      { STB0899_OFF0_TP_BUFFER7       , STB0899_BASE_TP_BUFFER7       , 0x00000000 }, /* TPBUFFER7    */
++      { STB0899_OFF0_TP_BUFFER8       , STB0899_BASE_TP_BUFFER8       , 0x00000000 }, /* TPBUFFER8    */
++      { STB0899_OFF0_TP_BUFFER9       , STB0899_BASE_TP_BUFFER9       , 0x00000000 }, /* TPBUFFER9    */
++      { STB0899_OFF0_TP_BUFFER10      , STB0899_BASE_TP_BUFFER10      , 0x00000000 }, /* TPBUFFER10   */
++      { STB0899_OFF0_TP_BUFFER11      , STB0899_BASE_TP_BUFFER11      , 0x00000000 }, /* TPBUFFER11   */
++      { STB0899_OFF0_TP_BUFFER12      , STB0899_BASE_TP_BUFFER12      , 0x00000000 }, /* TPBUFFER12   */
++      { STB0899_OFF0_TP_BUFFER13      , STB0899_BASE_TP_BUFFER13      , 0x00000000 }, /* TPBUFFER13   */
++      { STB0899_OFF0_TP_BUFFER14      , STB0899_BASE_TP_BUFFER14      , 0x00000000 }, /* TPBUFFER14   */
++      { STB0899_OFF0_TP_BUFFER15      , STB0899_BASE_TP_BUFFER15      , 0x00000000 }, /* TPBUFFER15   */
++      { STB0899_OFF0_TP_BUFFER16      , STB0899_BASE_TP_BUFFER16      , 0x0000ff00 }, /* TPBUFFER16   */
++      { STB0899_OFF0_TP_BUFFER17      , STB0899_BASE_TP_BUFFER17      , 0x00000100 }, /* TPBUFFER17   */
++      { STB0899_OFF0_TP_BUFFER18      , STB0899_BASE_TP_BUFFER18      , 0x0000fe01 }, /* TPBUFFER18   */
++      { STB0899_OFF0_TP_BUFFER19      , STB0899_BASE_TP_BUFFER19      , 0x000004fe }, /* TPBUFFER19   */
++      { STB0899_OFF0_TP_BUFFER20      , STB0899_BASE_TP_BUFFER20      , 0x0000cfe7 }, /* TPBUFFER20   */
++      { STB0899_OFF0_TP_BUFFER21      , STB0899_BASE_TP_BUFFER21      , 0x0000bec6 }, /* TPBUFFER21   */
++      { STB0899_OFF0_TP_BUFFER22      , STB0899_BASE_TP_BUFFER22      , 0x0000c2bf }, /* TPBUFFER22   */
++      { STB0899_OFF0_TP_BUFFER23      , STB0899_BASE_TP_BUFFER23      , 0x0000c1c1 }, /* TPBUFFER23   */
++      { STB0899_OFF0_TP_BUFFER24      , STB0899_BASE_TP_BUFFER24      , 0x0000c1c1 }, /* TPBUFFER24   */
++      { STB0899_OFF0_TP_BUFFER25      , STB0899_BASE_TP_BUFFER25      , 0x0000c1c1 }, /* TPBUFFER25   */
++      { STB0899_OFF0_TP_BUFFER26      , STB0899_BASE_TP_BUFFER26      , 0x0000c1c1 }, /* TPBUFFER26   */
++      { STB0899_OFF0_TP_BUFFER27      , STB0899_BASE_TP_BUFFER27      , 0x0000c1c0 }, /* TPBUFFER27   */
++      { STB0899_OFF0_TP_BUFFER28      , STB0899_BASE_TP_BUFFER28      , 0x0000c0c0 }, /* TPBUFFER28   */
++      { STB0899_OFF0_TP_BUFFER29      , STB0899_BASE_TP_BUFFER29      , 0x0000c1c1 }, /* TPBUFFER29   */
++      { STB0899_OFF0_TP_BUFFER30      , STB0899_BASE_TP_BUFFER30      , 0x0000c1c1 }, /* TPBUFFER30   */
++      { STB0899_OFF0_TP_BUFFER31      , STB0899_BASE_TP_BUFFER31      , 0x0000c0c1 }, /* TPBUFFER31   */
++      { STB0899_OFF0_TP_BUFFER32      , STB0899_BASE_TP_BUFFER32      , 0x0000c0c1 }, /* TPBUFFER32   */
++      { STB0899_OFF0_TP_BUFFER33      , STB0899_BASE_TP_BUFFER33      , 0x0000c1c1 }, /* TPBUFFER33   */
++      { STB0899_OFF0_TP_BUFFER34      , STB0899_BASE_TP_BUFFER34      , 0x0000c1c1 }, /* TPBUFFER34   */
++      { STB0899_OFF0_TP_BUFFER35      , STB0899_BASE_TP_BUFFER35      , 0x0000c0c1 }, /* TPBUFFER35   */
++      { STB0899_OFF0_TP_BUFFER36      , STB0899_BASE_TP_BUFFER36      , 0x0000c1c1 }, /* TPBUFFER36   */
++      { STB0899_OFF0_TP_BUFFER37      , STB0899_BASE_TP_BUFFER37      , 0x0000c0c1 }, /* TPBUFFER37   */
++      { STB0899_OFF0_TP_BUFFER38      , STB0899_BASE_TP_BUFFER38      , 0x0000c1c1 }, /* TPBUFFER38   */
++      { STB0899_OFF0_TP_BUFFER39      , STB0899_BASE_TP_BUFFER39      , 0x0000c0c0 }, /* TPBUFFER39   */
++      { STB0899_OFF0_TP_BUFFER40      , STB0899_BASE_TP_BUFFER40      , 0x0000c1c0 }, /* TPBUFFER40   */
++      { STB0899_OFF0_TP_BUFFER41      , STB0899_BASE_TP_BUFFER41      , 0x0000c1c1 }, /* TPBUFFER41   */
++      { STB0899_OFF0_TP_BUFFER42      , STB0899_BASE_TP_BUFFER42      , 0x0000c0c0 }, /* TPBUFFER42   */
++      { STB0899_OFF0_TP_BUFFER43      , STB0899_BASE_TP_BUFFER43      , 0x0000c1c0 }, /* TPBUFFER43   */
++      { STB0899_OFF0_TP_BUFFER44      , STB0899_BASE_TP_BUFFER44      , 0x0000c0c1 }, /* TPBUFFER44   */
++      { STB0899_OFF0_TP_BUFFER45      , STB0899_BASE_TP_BUFFER45      , 0x0000c1be }, /* TPBUFFER45   */
++      { STB0899_OFF0_TP_BUFFER46      , STB0899_BASE_TP_BUFFER46      , 0x0000c1c9 }, /* TPBUFFER46   */
++      { STB0899_OFF0_TP_BUFFER47      , STB0899_BASE_TP_BUFFER47      , 0x0000c0da }, /* TPBUFFER47   */
++      { STB0899_OFF0_TP_BUFFER48      , STB0899_BASE_TP_BUFFER48      , 0x0000c0ba }, /* TPBUFFER48   */
++      { STB0899_OFF0_TP_BUFFER49      , STB0899_BASE_TP_BUFFER49      , 0x0000c1c4 }, /* TPBUFFER49   */
++      { STB0899_OFF0_TP_BUFFER50      , STB0899_BASE_TP_BUFFER50      , 0x0000c1bf }, /* TPBUFFER50   */
++      { STB0899_OFF0_TP_BUFFER51      , STB0899_BASE_TP_BUFFER51      , 0x0000c0c1 }, /* TPBUFFER51   */
++      { STB0899_OFF0_TP_BUFFER52      , STB0899_BASE_TP_BUFFER52      , 0x0000c1c0 }, /* TPBUFFER52   */
++      { STB0899_OFF0_TP_BUFFER53      , STB0899_BASE_TP_BUFFER53      , 0x0000c0c1 }, /* TPBUFFER53   */
++      { STB0899_OFF0_TP_BUFFER54      , STB0899_BASE_TP_BUFFER54      , 0x0000c1c1 }, /* TPBUFFER54   */
++      { STB0899_OFF0_TP_BUFFER55      , STB0899_BASE_TP_BUFFER55      , 0x0000c1c1 }, /* TPBUFFER55   */
++      { STB0899_OFF0_TP_BUFFER56      , STB0899_BASE_TP_BUFFER56      , 0x0000c1c1 }, /* TPBUFFER56   */
++      { STB0899_OFF0_TP_BUFFER57      , STB0899_BASE_TP_BUFFER57      , 0x0000c1c1 }, /* TPBUFFER57   */
++      { STB0899_OFF0_TP_BUFFER58      , STB0899_BASE_TP_BUFFER58      , 0x0000c1c1 }, /* TPBUFFER58   */
++      { STB0899_OFF0_TP_BUFFER59      , STB0899_BASE_TP_BUFFER59      , 0x0000c1c1 }, /* TPBUFFER59   */
++      { STB0899_OFF0_TP_BUFFER60      , STB0899_BASE_TP_BUFFER60      , 0x0000c1c1 }, /* TPBUFFER60   */
++      { STB0899_OFF0_TP_BUFFER61      , STB0899_BASE_TP_BUFFER61      , 0x0000c1c1 }, /* TPBUFFER61   */
++      { STB0899_OFF0_TP_BUFFER62      , STB0899_BASE_TP_BUFFER62      , 0x0000c1c1 }, /* TPBUFFER62   */
++      { STB0899_OFF0_TP_BUFFER63      , STB0899_BASE_TP_BUFFER63      , 0x0000c1c0 }, /* TPBUFFER63   */
++      { STB0899_OFF0_RESET_CNTRL      , STB0899_BASE_RESET_CNTRL      , 0x00000001 }, /* RESETCNTRL   */
++      { STB0899_OFF0_ACM_ENABLE       , STB0899_BASE_ACM_ENABLE       , 0x00005654 }, /* ACMENABLE    */
++      { STB0899_OFF0_DESCR_CNTRL      , STB0899_BASE_DESCR_CNTRL      , 0x00000000 }, /* DESCRCNTRL   */
++      { STB0899_OFF0_CSM_CNTRL1       , STB0899_BASE_CSM_CNTRL1       , 0x00020019 }, /* CSMCNTRL1    */
++      { STB0899_OFF0_CSM_CNTRL2       , STB0899_BASE_CSM_CNTRL2       , 0x004b3237 }, /* CSMCNTRL2    */
++      { STB0899_OFF0_CSM_CNTRL3       , STB0899_BASE_CSM_CNTRL3       , 0x0003dd17 }, /* CSMCNTRL3    */
++      { STB0899_OFF0_CSM_CNTRL4       , STB0899_BASE_CSM_CNTRL4       , 0x00008008 }, /* CSMCNTRL4    */
++      { STB0899_OFF0_UWP_CNTRL1       , STB0899_BASE_UWP_CNTRL1       , 0x002a3106 }, /* UWPCNTRL1    */
++      { STB0899_OFF0_UWP_CNTRL2       , STB0899_BASE_UWP_CNTRL2       , 0x0006140a }, /* UWPCNTRL2    */
++      { STB0899_OFF0_UWP_STAT1        , STB0899_BASE_UWP_STAT1        , 0x00008000 }, /* UWPSTAT1     */
++      { STB0899_OFF0_UWP_STAT2        , STB0899_BASE_UWP_STAT2        , 0x00000000 }, /* UWPSTAT2     */
++      { STB0899_OFF0_DMD_STAT2        , STB0899_BASE_DMD_STAT2        , 0x00000000 }, /* DMDSTAT2     */
++      { STB0899_OFF0_FREQ_ADJ_SCALE   , STB0899_BASE_FREQ_ADJ_SCALE   , 0x00000471 }, /* FREQADJSCALE */
++      { STB0899_OFF0_UWP_CNTRL3       , STB0899_BASE_UWP_CNTRL3       , 0x017b0465 }, /* UWPCNTRL3    */
++      { STB0899_OFF0_SYM_CLK_SEL      , STB0899_BASE_SYM_CLK_SEL      , 0x00000002 }, /* SYMCLKSEL    */
++      { STB0899_OFF0_SOF_SRCH_TO      , STB0899_BASE_SOF_SRCH_TO      , 0x00196464 }, /* SOFSRCHTO    */
++      { STB0899_OFF0_ACQ_CNTRL1       , STB0899_BASE_ACQ_CNTRL1       , 0x00000603 }, /* ACQCNTRL1    */
++      { STB0899_OFF0_ACQ_CNTRL2       , STB0899_BASE_ACQ_CNTRL2       , 0x02046666 }, /* ACQCNTRL2    */
++      { STB0899_OFF0_ACQ_CNTRL3       , STB0899_BASE_ACQ_CNTRL3       , 0x10046583 }, /* ACQCNTRL3    */
++      { STB0899_OFF0_FE_SETTLE        , STB0899_BASE_FE_SETTLE        , 0x00010404 }, /* FESETTLE     */
++      { STB0899_OFF0_AC_DWELL         , STB0899_BASE_AC_DWELL         , 0x0002aa8a }, /* ACDWELL      */
++      { STB0899_OFF0_ACQUIRE_TRIG     , STB0899_BASE_ACQUIRE_TRIG     , 0x00000000 }, /* ACQUIRETRIG  */
++      { STB0899_OFF0_LOCK_LOST        , STB0899_BASE_LOCK_LOST        , 0x00000001 }, /* LOCKLOST     */
++      { STB0899_OFF0_ACQ_STAT1        , STB0899_BASE_ACQ_STAT1        , 0x00000500 }, /* ACQSTAT1     */
++      { STB0899_OFF0_ACQ_TIMEOUT      , STB0899_BASE_ACQ_TIMEOUT      , 0x0028a0a0 }, /* ACQTIMEOUT   */
++      { STB0899_OFF0_ACQ_TIME         , STB0899_BASE_ACQ_TIME         , 0x00000000 }, /* ACQTIME      */
++      { STB0899_OFF0_FINAL_AGC_CNTRL  , STB0899_BASE_FINAL_AGC_CNTRL  , 0x00800c17 }, /* FINALAGCCNTRL*/
++      { STB0899_OFF0_FINAL_AGC_GAIN   , STB0899_BASE_FINAL_AGC_GAIN   , 0x00000000 }, /* FINALAGCCGAIN*/
++      { STB0899_OFF0_EQUALIZER_INIT   , STB0899_BASE_EQUALIZER_INIT   , 0x00000000 }, /* EQUILIZERINIT*/
++      { STB0899_OFF0_EQ_CNTRL         , STB0899_BASE_EQ_CNTRL         , 0x00054802 }, /* EQCNTL       */
++      { STB0899_OFF0_EQ_I_INIT_COEFF_0, STB0899_BASE_EQ_I_INIT_COEFF_N, 0x00000000 }, /* EQIINITCOEFF0 */
++      { STB0899_OFF1_EQ_I_INIT_COEFF_1, STB0899_BASE_EQ_I_INIT_COEFF_N, 0x00000000 }, /* EQIINITCOEFF1 */
++      { STB0899_OFF2_EQ_I_INIT_COEFF_2, STB0899_BASE_EQ_I_INIT_COEFF_N, 0x00000000 }, /* EQIINITCOEFF2 */
++      { STB0899_OFF3_EQ_I_INIT_COEFF_3, STB0899_BASE_EQ_I_INIT_COEFF_N, 0x00000000 }, /* EQIINITCOEFF3 */
++      { STB0899_OFF4_EQ_I_INIT_COEFF_4, STB0899_BASE_EQ_I_INIT_COEFF_N, 0x00000000 }, /* EQIINITCOEFF4 */
++      { STB0899_OFF5_EQ_I_INIT_COEFF_5, STB0899_BASE_EQ_I_INIT_COEFF_N, 0x00000400 }, /* EQIINITCOEFF5 */
++      { STB0899_OFF6_EQ_I_INIT_COEFF_6, STB0899_BASE_EQ_I_INIT_COEFF_N, 0x00000000 }, /* EQIINITCOEFF6 */
++      { STB0899_OFF7_EQ_I_INIT_COEFF_7, STB0899_BASE_EQ_I_INIT_COEFF_N, 0x00000000 }, /* EQIINITCOEFF7 */
++      { STB0899_OFF8_EQ_I_INIT_COEFF_8, STB0899_BASE_EQ_I_INIT_COEFF_N, 0x00000000 }, /* EQIINITCOEFF8 */
++      { STB0899_OFF9_EQ_I_INIT_COEFF_9, STB0899_BASE_EQ_I_INIT_COEFF_N, 0x00000000 }, /* EQIINITCOEFF9 */
++      { STB0899_OFFa_EQ_I_INIT_COEFF_10,STB0899_BASE_EQ_I_INIT_COEFF_N, 0x00000000 }, /* EQIINITCOEFF10*/
++      { STB0899_OFF0_EQ_Q_INIT_COEFF_0, STB0899_BASE_EQ_Q_INIT_COEFF_N, 0x00000000 }, /* EQQINITCOEFF0 */
++      { STB0899_OFF1_EQ_Q_INIT_COEFF_1, STB0899_BASE_EQ_Q_INIT_COEFF_N, 0x00000000 }, /* EQQINITCOEFF1 */
++      { STB0899_OFF2_EQ_Q_INIT_COEFF_2, STB0899_BASE_EQ_Q_INIT_COEFF_N, 0x00000000 }, /* EQQINITCOEFF2 */
++      { STB0899_OFF3_EQ_Q_INIT_COEFF_3, STB0899_BASE_EQ_Q_INIT_COEFF_N, 0x00000000 }, /* EQQINITCOEFF3 */
++      { STB0899_OFF4_EQ_Q_INIT_COEFF_4, STB0899_BASE_EQ_Q_INIT_COEFF_N, 0x00000000 }, /* EQQINITCOEFF4 */
++      { STB0899_OFF5_EQ_Q_INIT_COEFF_5, STB0899_BASE_EQ_Q_INIT_COEFF_N, 0x00000000 }, /* EQQINITCOEFF5 */
++      { STB0899_OFF6_EQ_Q_INIT_COEFF_6, STB0899_BASE_EQ_Q_INIT_COEFF_N, 0x00000000 }, /* EQQINITCOEFF6 */
++      { STB0899_OFF7_EQ_Q_INIT_COEFF_7, STB0899_BASE_EQ_Q_INIT_COEFF_N, 0x00000000 }, /* EQQINITCOEFF7 */
++      { STB0899_OFF8_EQ_Q_INIT_COEFF_8, STB0899_BASE_EQ_Q_INIT_COEFF_N, 0x00000000 }, /* EQQINITCOEFF8 */
++      { STB0899_OFF9_EQ_Q_INIT_COEFF_9, STB0899_BASE_EQ_Q_INIT_COEFF_N, 0x00000000 }, /* EQQINITCOEFF9 */
++      { STB0899_OFFa_EQ_Q_INIT_COEFF_10,STB0899_BASE_EQ_Q_INIT_COEFF_N, 0x00000000 }, /* EQQINITCOEFF10*/
++      { STB0899_OFF0_EQ_I_OUT_COEFF_0 , STB0899_BASE_EQ_I_OUT_COEFF_N , 0x00000000 }, /* EQICOEFFSOUT0 */
++      { STB0899_OFF1_EQ_I_OUT_COEFF_1 , STB0899_BASE_EQ_I_OUT_COEFF_N , 0x00000000 }, /* EQICOEFFSOUT1 */
++      { STB0899_OFF2_EQ_I_OUT_COEFF_2 , STB0899_BASE_EQ_I_OUT_COEFF_N , 0x00000000 }, /* EQICOEFFSOUT2 */
++      { STB0899_OFF3_EQ_I_OUT_COEFF_3 , STB0899_BASE_EQ_I_OUT_COEFF_N , 0x00000000 }, /* EQICOEFFSOUT3 */
++      { STB0899_OFF4_EQ_I_OUT_COEFF_4 , STB0899_BASE_EQ_I_OUT_COEFF_N , 0x00000000 }, /* EQICOEFFSOUT4 */
++      { STB0899_OFF5_EQ_I_OUT_COEFF_5 , STB0899_BASE_EQ_I_OUT_COEFF_N , 0x00000000 }, /* EQICOEFFSOUT5 */
++      { STB0899_OFF6_EQ_I_OUT_COEFF_6 , STB0899_BASE_EQ_I_OUT_COEFF_N , 0x00000000 }, /* EQICOEFFSOUT6 */
++      { STB0899_OFF7_EQ_I_OUT_COEFF_7 , STB0899_BASE_EQ_I_OUT_COEFF_N , 0x00000000 }, /* EQICOEFFSOUT7 */
++      { STB0899_OFF8_EQ_I_OUT_COEFF_8 , STB0899_BASE_EQ_I_OUT_COEFF_N , 0x00000000 }, /* EQICOEFFSOUT8 */
++      { STB0899_OFF9_EQ_I_OUT_COEFF_9 , STB0899_BASE_EQ_I_OUT_COEFF_N , 0x00000000 }, /* EQICOEFFSOUT9 */
++      { STB0899_OFFa_EQ_I_OUT_COEFF_10,STB0899_BASE_EQ_I_OUT_COEFF_N  , 0x00000000 }, /* EQICOEFFSOUT10*/
++      { STB0899_OFF0_EQ_Q_OUT_COEFF_0 , STB0899_BASE_EQ_Q_OUT_COEFF_N , 0x00000000 }, /* EQQCOEFFSOUT0 */
++      { STB0899_OFF1_EQ_Q_OUT_COEFF_1 , STB0899_BASE_EQ_Q_OUT_COEFF_N , 0x00000000 }, /* EQQCOEFFSOUT1 */
++      { STB0899_OFF2_EQ_Q_OUT_COEFF_2 , STB0899_BASE_EQ_Q_OUT_COEFF_N , 0x00000000 }, /* EQQCOEFFSOUT2 */
++      { STB0899_OFF3_EQ_Q_OUT_COEFF_3 , STB0899_BASE_EQ_Q_OUT_COEFF_N , 0x00000000 }, /* EQQCOEFFSOUT3 */
++      { STB0899_OFF4_EQ_Q_OUT_COEFF_4 , STB0899_BASE_EQ_Q_OUT_COEFF_N , 0x00000000 }, /* EQQCOEFFSOUT4 */
++      { STB0899_OFF5_EQ_Q_OUT_COEFF_5 , STB0899_BASE_EQ_Q_OUT_COEFF_N , 0x00000000 }, /* EQQCOEFFSOUT5 */
++      { STB0899_OFF6_EQ_Q_OUT_COEFF_6 , STB0899_BASE_EQ_Q_OUT_COEFF_N , 0x00000000 }, /* EQQCOEFFSOUT6 */
++      { STB0899_OFF7_EQ_Q_OUT_COEFF_7 , STB0899_BASE_EQ_Q_OUT_COEFF_N , 0x00000000 }, /* EQQCOEFFSOUT7 */
++      { STB0899_OFF8_EQ_Q_OUT_COEFF_8 , STB0899_BASE_EQ_Q_OUT_COEFF_N , 0x00000000 }, /* EQQCOEFFSOUT8 */
++      { STB0899_OFF9_EQ_Q_OUT_COEFF_9 , STB0899_BASE_EQ_Q_OUT_COEFF_N , 0x00000000 }, /* EQQCOEFFSOUT9 */
++      { STB0899_OFFa_EQ_Q_OUT_COEFF_10, STB0899_BASE_EQ_Q_OUT_COEFF_N , 0x00000000 }, /* EQQCOEFFSOUT10*/
++      { 0xffff                        , 0xffffffff                    , 0xffffffff },
++};
++#if 0
++static const struct stb0899_s1_reg stb0899_s1_init_3[] = {
++      { STB0899_DEMOD                 , 0x00 },
++      { STB0899_RCOMPC                , 0xc9 },
++      { STB0899_AGC1CN                , 0x01 },
++      { STB0899_AGC1REF               , 0x10 },
++      { STB0899_RTC                   , 0x23 },
++      { STB0899_TMGCFG                , 0x4e },
++      { STB0899_AGC2REF               , 0x34 },
++      { STB0899_TLSR                  , 0x84 },
++      { STB0899_CFD                   , 0xf7 },
++      { STB0899_ACLC                  , 0x87 },
++      { STB0899_BCLC                  , 0x94 },
++      { STB0899_EQON                  , 0x41 },
++      { STB0899_LDT                   , 0xf1 },
++      { STB0899_LDT2                  , 0xe3 },
++      { STB0899_EQUALREF              , 0xb4 },
++      { STB0899_TMGRAMP               , 0x10 },
++      { STB0899_TMGTHD                , 0x30 },
++      { STB0899_IDCCOMP               , 0xfd },
++      { STB0899_QDCCOMP               , 0xff },
++      { STB0899_POWERI                , 0x0c },
++      { STB0899_POWERQ                , 0x0f },
++      { STB0899_RCOMP                 , 0x6c },
++      { STB0899_AGCIQIN               , 0x80 },
++      { STB0899_AGC2I1                , 0x06 },
++      { STB0899_AGC2I2                , 0x00 },
++      { STB0899_TLIR                  , 0x30 },
++      { STB0899_RTF                   , 0x7f },
++      { STB0899_DSTATUS               , 0x00 },
++      { STB0899_LDI                   , 0xbc },
++      { STB0899_CFRM                  , 0xea },
++      { STB0899_CFRL                  , 0x31 },
++      { STB0899_NIRM                  , 0x2b },
++      { STB0899_NIRL                  , 0x80 },
++      { STB0899_ISYMB                 , 0x1d },
++      { STB0899_QSYMB                 , 0xa6 },
++      { STB0899_SFRH                  , 0x2f },
++      { STB0899_SFRM                  , 0x68 },
++      { STB0899_SFRL                  , 0x40 },
++      { STB0899_SFRUPH                , 0x2f },
++      { STB0899_SFRUPM                , 0x68 },
++      { STB0899_SFRUPL                , 0x40 },
++      { STB0899_EQUAI1                , 0x02 },
++      { STB0899_EQUAQ1                , 0xff },
++      { STB0899_EQUAI2                , 0x04 },
++      { STB0899_EQUAQ2                , 0x05 },
++      { STB0899_EQUAI3                , 0x02 },
++      { STB0899_EQUAQ3                , 0xfd },
++      { STB0899_EQUAI4                , 0x03 },
++      { STB0899_EQUAQ4                , 0x07 },
++      { STB0899_EQUAI5                , 0x08 },
++      { STB0899_EQUAQ5                , 0xf5 },
++      { STB0899_DSTATUS2              , 0x00 },
++      { STB0899_VSTATUS               , 0x00 },
++      { STB0899_VERROR                , 0x86 },
++      { STB0899_IQSWAP                , 0x2a },
++      { STB0899_ECNT1M                , 0x00 },
++      { STB0899_ECNT1L                , 0x00 },
++      { STB0899_ECNT2M                , 0x00 },
++      { STB0899_ECNT2L                , 0x00 },
++      { STB0899_ECNT3M                , 0x0a },
++      { STB0899_ECNT3L                , 0xad },
++      { STB0899_FECAUTO1              , 0x06 },
++      { STB0899_FECM                  , 0x01 },
++      { STB0899_VTH12                 , 0xb0 },
++      { STB0899_VTH23                 , 0x7a },
++      { STB0899_VTH34                 , 0x58 },
++      { STB0899_VTH56                 , 0x38 },
++      { STB0899_VTH67                 , 0x34 },
++      { STB0899_VTH78                 , 0x24 },
++      { STB0899_PRVIT                 , 0xff },
++      { STB0899_VITSYNC               , 0x19 },
++      { STB0899_RSULC                 , 0xb1 }, /* DVB = 0xb1, DSS = 0xa1 */
++      { STB0899_TSULC                 , 0x42 },
++      { STB0899_RSLLC                 , 0x41 },
++      { STB0899_TSLPL                 , 0x12 },
++      { STB0899_TSCFGH                , 0x0c },
++      { STB0899_TSCFGM                , 0x00 },
++      { STB0899_TSCFGL                , 0x00 },
++      { STB0899_TSOUT                 , 0x69 }, /* 0x0d for CAM */
++      { STB0899_RSSYNCDEL             , 0x00 },
++      { STB0899_TSINHDELH             , 0x02 },
++      { STB0899_TSINHDELM             , 0x00 },
++      { STB0899_TSINHDELL             , 0x00 },
++      { STB0899_TSLLSTKM              , 0x1b },
++      { STB0899_TSLLSTKL              , 0xb3 },
++      { STB0899_TSULSTKM              , 0x00 },
++      { STB0899_TSULSTKL              , 0x00 },
++      { STB0899_PCKLENUL              , 0xbc },
++      { STB0899_PCKLENLL              , 0xcc },
++      { STB0899_RSPCKLEN              , 0xbd },
++      { STB0899_TSSTATUS              , 0x90 },
++      { STB0899_ERRCTRL1              , 0xb6 },
++      { STB0899_ERRCTRL2              , 0x95 },
++      { STB0899_ERRCTRL3              , 0x8d },
++      { STB0899_DMONMSK1              , 0x27 },
++      { STB0899_DMONMSK0              , 0x03 },
++      { STB0899_DEMAPVIT              , 0x5c },
++      { STB0899_PLPARM                , 0x19 },
++      { STB0899_PDELCTRL              , 0x48 },
++      { STB0899_PDELCTRL2             , 0x00 },
++      { STB0899_BBHCTRL1              , 0x00 },
++      { STB0899_BBHCTRL2              , 0x00 },
++      { STB0899_HYSTTHRESH            , 0x77 },
++      { STB0899_MATCSTM               , 0x00 },
++      { STB0899_MATCSTL               , 0x00 },
++      { STB0899_UPLCSTM               , 0x00 },
++      { STB0899_UPLCSTL               , 0x00 },
++      { STB0899_DFLCSTM               , 0x00 },
++      { STB0899_DFLCSTL               , 0x00 },
++      { STB0899_SYNCCST               , 0x00 },
++      { STB0899_SYNCDCSTM             , 0x00 },
++      { STB0899_SYNCDCSTL             , 0x00 },
++      { STB0899_ISI_ENTRY             , 0x00 },
++      { STB0899_ISI_BIT_EN            , 0x00 },
++      { STB0899_MATSTRM               , 0xf0 },
++      { STB0899_MATSTRL               , 0x02 },
++      { STB0899_UPLSTRM               , 0x45 },
++      { STB0899_UPLSTRL               , 0x60 },
++      { STB0899_DFLSTRM               , 0xe3 },
++      { STB0899_DFLSTRL               , 0x00 },
++      { STB0899_SYNCSTR               , 0x47 },
++      { STB0899_SYNCDSTRM             , 0x05 },
++      { STB0899_SYNCDSTRL             , 0x18 },
++      { STB0899_CFGPDELSTATUS1        , 0x19 },
++      { STB0899_CFGPDELSTATUS2        , 0x2b },
++      { STB0899_BBFERRORM             , 0x00 },
++      { STB0899_BBFERRORL             , 0x01 },
++      { STB0899_UPKTERRORM            , 0x00 },
++      { STB0899_UPKTERRORL            , 0x00 },
++      { 0xffff                        , 0xff },
++};
++#endif
++static const struct stb0899_s2_reg stb0899_s2_init_4[] = {
++      { STB0899_OFF0_BLOCK_LNGTH      , STB0899_BASE_BLOCK_LNGTH      , 0x00000008 }, /* BLOCKLNGTH   */
++      { STB0899_OFF0_ROW_STR          , STB0899_BASE_ROW_STR          , 0x000000b4 }, /* ROWSTR       */
++      { STB0899_OFF0_BN_END_ADDR      , STB0899_BASE_BN_END_ADDR      , 0x000004b5 }, /* BNANDADDR    */
++      { STB0899_OFF0_CN_END_ADDR      , STB0899_BASE_CN_END_ADDR      , 0x00000b4b }, /* CNANDADDR    */
++      { STB0899_OFF0_INFO_LENGTH      , STB0899_BASE_INFO_LENGTH      , 0x00000078 }, /* INFOLENGTH   */
++      { STB0899_OFF0_BOT_ADDR         , STB0899_BASE_BOT_ADDR         , 0x000001e0 }, /* BOT_ADDR     */
++      { STB0899_OFF0_BCH_BLK_LN       , STB0899_BASE_BCH_BLK_LN       , 0x0000a8c0 }, /* BCHBLKLN     */
++      { STB0899_OFF0_BCH_T            , STB0899_BASE_BCH_T            , 0x0000000c }, /* BCHT         */
++      { STB0899_OFF0_CNFG_MODE        , STB0899_BASE_CNFG_MODE        , 0x00000001 }, /* CNFGMODE     */
++      { STB0899_OFF0_LDPC_STAT        , STB0899_BASE_LDPC_STAT        , 0x0000000d }, /* LDPCSTAT     */
++      { STB0899_OFF0_ITER_SCALE       , STB0899_BASE_ITER_SCALE       , 0x00000040 }, /* ITERSCALE    */
++      { STB0899_OFF0_INPUT_MODE       , STB0899_BASE_INPUT_MODE       , 0x00000000 }, /* INPUTMODE    */
++      { STB0899_OFF0_LDPCDECRST       , STB0899_BASE_LDPCDECRST       , 0x00000000 }, /* LDPCDECRST   */
++      { STB0899_OFF0_CLK_PER_BYTE_RW  , STB0899_BASE_CLK_PER_BYTE_RW  , 0x00000008 }, /* CLKPERBYTE   */
++      { STB0899_OFF0_BCH_ERRORS       , STB0899_BASE_BCH_ERRORS       , 0x00000000 }, /* BCHERRORS    */
++      { STB0899_OFF0_LDPC_ERRORS      , STB0899_BASE_LDPC_ERRORS      , 0x00000000 }, /* LDPCERRORS   */
++      { STB0899_OFF0_BCH_MODE         , STB0899_BASE_BCH_MODE         , 0x00000000 }, /* BCHMODE      */
++      { STB0899_OFF0_ERR_ACC_PER      , STB0899_BASE_ERR_ACC_PER      , 0x00000008 }, /* ERRACCPER    */
++      { STB0899_OFF0_BCH_ERR_ACC      , STB0899_BASE_BCH_ERR_ACC      , 0x00000000 }, /* BCHERRACC    */
++      { STB0899_OFF0_FEC_TP_SEL       , STB0899_BASE_FEC_TP_SEL       , 0x00000000 }, /* FECTPSEL     */
++      { 0xffff                        , 0xffffffff                    , 0xffffffff },
++};
++
++static const struct stb0899_s1_reg stb0899_s1_init_5[] = {
++      { STB0899_TSTCK         , 0x00 },
++      { STB0899_TSTRES        , 0x00 },
++      { STB0899_TSTOUT        , 0x00 },
++      { STB0899_TSTIN         , 0x00 },
++      { STB0899_TSTSYS        , 0x00 },
++      { STB0899_TSTCHIP       , 0x00 },
++      { STB0899_TSTFREE       , 0x00 },
++      { STB0899_TSTI2C        , 0x00 },
++      { STB0899_BITSPEEDM     , 0x00 },
++      { STB0899_BITSPEEDL     , 0x00 },
++      { STB0899_TBUSBIT       , 0x00 },
++      { STB0899_TSTDIS        , 0x00 },
++      { STB0899_TSTDISRX      , 0x00 },
++      { STB0899_TSTJETON      , 0x00 },
++      { STB0899_TSTDCADJ      , 0x00 },
++      { STB0899_TSTAGC1       , 0x00 },
++      { STB0899_TSTAGC1N      , 0x00 },
++      { STB0899_TSTPOLYPH     , 0x00 },
++      { STB0899_TSTR          , 0x00 },
++      { STB0899_TSTAGC2       , 0x00 },
++      { STB0899_TSTCTL1       , 0x00 },
++      { STB0899_TSTCTL2       , 0x00 },
++      { STB0899_TSTCTL3       , 0x00 },
++      { STB0899_TSTDEMAP      , 0x00 },
++      { STB0899_TSTDEMAP2     , 0x00 },
++      { STB0899_TSTDEMMON     , 0x00 },
++      { STB0899_TSTRATE       , 0x00 },
++      { STB0899_TSTSELOUT     , 0x00 },
++      { STB0899_TSYNC         , 0x00 },
++      { STB0899_TSTERR        , 0x00 },
++      { STB0899_TSTRAM1       , 0x00 },
++      { STB0899_TSTVSELOUT    , 0x00 },
++      { STB0899_TSTFORCEIN    , 0x00 },
++      { STB0899_TSTRS1        , 0x00 },
++      { STB0899_TSTRS2        , 0x00 },
++      { STB0899_TSTRS3        , 0x00 },
++      { STB0899_GHOSTREG      , 0x81 },
++      { 0xffff                , 0xff },
++};
++
++#define STB0899_DVBS2_ESNO_AVE                        3
++#define STB0899_DVBS2_ESNO_QUANT              32
++#define STB0899_DVBS2_AVFRAMES_COARSE         10
++#define STB0899_DVBS2_AVFRAMES_FINE           20
++#define STB0899_DVBS2_MISS_THRESHOLD          6
++#define STB0899_DVBS2_UWP_THRESHOLD_ACQ               1125
++#define STB0899_DVBS2_UWP_THRESHOLD_TRACK     758
++#define STB0899_DVBS2_UWP_THRESHOLD_SOF               1350
++#define STB0899_DVBS2_SOF_SEARCH_TIMEOUT      1664100
++
++#define STB0899_DVBS2_BTR_NCO_BITS            28
++#define STB0899_DVBS2_BTR_GAIN_SHIFT_OFFSET   15
++#define STB0899_DVBS2_CRL_NCO_BITS            30
++#define STB0899_DVBS2_LDPC_MAX_ITER           70
++
++#endif //__STB0899_CFG_H
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/stb0899_drv.h linux-2.6.18/drivers/media/dvb/frontends/stb0899_drv.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/stb0899_drv.h        1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/stb0899_drv.h     2010-09-09 12:38:50.000000000 +0000
+@@ -0,0 +1,162 @@
++/*
++      STB0899 Multistandard Frontend driver
++      Copyright (C) Manu Abraham (abraham.manu@gmail.com)
++
++      Copyright (C) ST Microelectronics
++
++      This program is free software; you can redistribute it and/or modify
++      it under the terms of the GNU General Public License as published by
++      the Free Software Foundation; either version 2 of the License, or
++      (at your option) any later version.
++
++      This program is distributed in the hope that it will be useful,
++      but WITHOUT ANY WARRANTY; without even the implied warranty of
++      MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++      GNU General Public License for more details.
++
++      You should have received a copy of the GNU General Public License
++      along with this program; if not, write to the Free Software
++      Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++*/
++
++#ifndef __STB0899_DRV_H
++#define __STB0899_DRV_H
++
++#include <linux/kernel.h>
++#include <linux/module.h>
++
++#include "dvb_frontend.h"
++
++#define STB0899_TSMODE_SERIAL         1
++#define STB0899_CLKPOL_FALLING                2
++#define STB0899_CLKNULL_PARITY                3
++#define STB0899_SYNC_FORCED           4
++#define STB0899_FECMODE_DSS           5
++
++struct stb0899_s1_reg {
++      u16     address;
++      u8      data;
++};
++
++struct stb0899_s2_reg {
++      u16     offset;
++      u32     base_address;
++      u32     data;
++};
++
++enum stb0899_inversion {
++      IQ_SWAP_OFF     = 0,
++      IQ_SWAP_ON,
++      IQ_SWAP_AUTO
++};
++
++#define STB0899_GPIO00                                0xf140
++#define STB0899_GPIO01                                0xf141
++#define STB0899_GPIO02                                0xf142
++#define STB0899_GPIO03                                0xf143
++#define STB0899_GPIO04                                0xf144
++#define STB0899_GPIO05                                0xf145
++#define STB0899_GPIO06                                0xf146
++#define STB0899_GPIO07                                0xf147
++#define STB0899_GPIO08                                0xf148
++#define STB0899_GPIO09                                0xf149
++#define STB0899_GPIO10                                0xf14a
++#define STB0899_GPIO11                                0xf14b
++#define STB0899_GPIO12                                0xf14c
++#define STB0899_GPIO13                                0xf14d
++#define STB0899_GPIO14                                0xf14e
++#define STB0899_GPIO15                                0xf14f
++#define STB0899_GPIO16                                0xf150
++#define STB0899_GPIO17                                0xf151
++#define STB0899_GPIO18                                0xf152
++#define STB0899_GPIO19                                0xf153
++#define STB0899_GPIO20                                0xf154
++
++#define STB0899_GPIOPULLUP                    0x01 /* Output device is connected to Vdd */
++#define STB0899_GPIOPULLDN                    0x00 /* Output device is connected to Vss */
++
++#define STB0899_POSTPROC_GPIO_POWER           0x00
++#define STB0899_POSTPROC_GPIO_LOCK            0x01
++
++/*
++ * Post process output configuration control
++ * 1. POWER ON/OFF            (index 0)
++ * 2. FE_HAS_LOCK/LOCK_LOSS   (index 1)
++ *
++ * @gpio      = one of the above listed GPIO's
++ * @level     = output state: pulled up or low
++ */
++struct stb0899_postproc {
++      u16     gpio;
++      u8      level;
++};
++
++struct stb0899_config {
++      const struct stb0899_s1_reg     *init_dev;
++      const struct stb0899_s2_reg     *init_s2_demod;
++      const struct stb0899_s1_reg     *init_s1_demod;
++      const struct stb0899_s2_reg     *init_s2_fec;
++      const struct stb0899_s1_reg     *init_tst;
++
++      const struct stb0899_postproc   *postproc;
++
++      enum stb0899_inversion          inversion;
++
++      u32     xtal_freq;
++
++      u8      demod_address;
++      u8      ts_output_mode;
++      u8      block_sync_mode;
++      u8      ts_pfbit_toggle;
++
++      u8      clock_polarity;
++      u8      data_clk_parity;
++      u8      fec_mode;
++      u8      data_output_ctl;
++      u8      data_fifo_mode;
++      u8      out_rate_comp;
++      u8      i2c_repeater;
++//    int     inversion;
++      int     lo_clk;
++      int     hi_clk;
++
++      u32     esno_ave;
++      u32     esno_quant;
++      u32     avframes_coarse;
++      u32     avframes_fine;
++      u32     miss_threshold;
++      u32     uwp_threshold_acq;
++      u32     uwp_threshold_track;
++      u32     uwp_threshold_sof;
++      u32     sof_search_timeout;
++
++      u32     btr_nco_bits;
++      u32     btr_gain_shift_offset;
++      u32     crl_nco_bits;
++      u32     ldpc_max_iter;
++
++      int (*tuner_set_frequency)(struct dvb_frontend *fe, u32 frequency);
++      int (*tuner_get_frequency)(struct dvb_frontend *fe, u32 *frequency);
++      int (*tuner_set_bandwidth)(struct dvb_frontend *fe, u32 bandwidth);
++      int (*tuner_get_bandwidth)(struct dvb_frontend *fe, u32 *bandwidth);
++      int (*tuner_set_rfsiggain)(struct dvb_frontend *fe, u32 rf_gain);
++};
++
++#if defined(CONFIG_DVB_STB0899) || (defined(CONFIG_DVB_STB0899_MODULE) && defined(MODULE))
++
++extern struct dvb_frontend *stb0899_attach(struct stb0899_config *config,
++                                         struct i2c_adapter *i2c);
++
++#else
++
++static inline struct dvb_frontend *stb0899_attach(struct stb0899_config *config,
++                                                struct i2c_adapter *i2c)
++{
++      printk(KERN_WARNING "%s: Driver disabled by Kconfig\n", __func__);
++      return NULL;
++}
++
++#endif //CONFIG_DVB_STB0899
++
++
++#endif
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/stb0899_priv.h linux-2.6.18/drivers/media/dvb/frontends/stb0899_priv.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/stb0899_priv.h       1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/stb0899_priv.h    2010-09-09 12:38:50.000000000 +0000
+@@ -0,0 +1,270 @@
++/*
++      STB0899 Multistandard Frontend driver
++      Copyright (C) Manu Abraham (abraham.manu@gmail.com)
++
++      Copyright (C) ST Microelectronics
++
++      This program is free software; you can redistribute it and/or modify
++      it under the terms of the GNU General Public License as published by
++      the Free Software Foundation; either version 2 of the License, or
++      (at your option) any later version.
++
++      This program is distributed in the hope that it will be useful,
++      but WITHOUT ANY WARRANTY; without even the implied warranty of
++      MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++      GNU General Public License for more details.
++
++      You should have received a copy of the GNU General Public License
++      along with this program; if not, write to the Free Software
++      Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++*/
++
++#ifndef __STB0899_PRIV_H
++#define __STB0899_PRIV_H
++
++#include "dvb_frontend.h"
++#include "stb0899_drv.h"
++
++#define FE_ERROR                              0
++#define FE_NOTICE                             1
++#define FE_INFO                                       2
++#define FE_DEBUG                              3
++#define FE_DEBUGREG                           4
++
++#define dprintk(x, y, z, format, arg...) do {                                         \
++      if (z) {                                                                        \
++              if      ((*x > FE_ERROR) && (*x > y))                                   \
++                      printk(KERN_ERR "%s: " format "\n", __func__ , ##arg);          \
++              else if ((*x > FE_NOTICE) && (*x > y))                                  \
++                      printk(KERN_NOTICE "%s: " format "\n", __func__ , ##arg);       \
++              else if ((*x > FE_INFO) && (*x > y))                                    \
++                      printk(KERN_INFO "%s: " format "\n", __func__ , ##arg);         \
++              else if ((*x > FE_DEBUG) && (*x > y))                                   \
++                      printk(KERN_DEBUG "%s: " format "\n", __func__ , ##arg);        \
++      } else {                                                                        \
++              if (*x > y)                                                             \
++                      printk(format, ##arg);                                          \
++      }                                                                               \
++} while(0)
++
++#define INRANGE(val, x, y)                    (((x <= val) && (val <= y)) ||          \
++                                               ((y <= val) && (val <= x)) ? 1 : 0)
++
++#define BYTE0                                 0
++#define BYTE1                                 8
++#define BYTE2                                 16
++#define BYTE3                                 24
++
++#define GETBYTE(x, y)                         (((x) >> (y)) & 0xff)
++#define MAKEWORD32(a, b, c, d)                        (((a) << 24) | ((b) << 16) | ((c) << 8) | (d))
++#define MAKEWORD16(a, b)                      (((a) << 8) | (b))
++
++#define LSB(x)                                        ((x & 0xff))
++#define MSB(y)                                        ((y >> 8) & 0xff)
++
++
++#define STB0899_GETFIELD(bitf, val)           ((val >> STB0899_OFFST_##bitf) & ((1 << STB0899_WIDTH_##bitf) - 1))
++
++
++#define STB0899_SETFIELD(mask, val, width, offset)      (mask & (~(((1 << width) - 1) <<      \
++                                                       offset))) | ((val &                    \
++                                                       ((1 << width) - 1)) << offset)
++
++#define STB0899_SETFIELD_VAL(bitf, mask, val) (mask = (mask & (~(((1 << STB0899_WIDTH_##bitf) - 1) <<\
++                                                       STB0899_OFFST_##bitf))) | \
++                                                       (val << STB0899_OFFST_##bitf))
++
++
++enum stb0899_status {
++      NOAGC1  = 0,
++      AGC1OK,
++      NOTIMING,
++      ANALOGCARRIER,
++      TIMINGOK,
++      NOAGC2,
++      AGC2OK,
++      NOCARRIER,
++      CARRIEROK,
++      NODATA,
++      FALSELOCK,
++      DATAOK,
++      OUTOFRANGE,
++      RANGEOK,
++      DVBS2_DEMOD_LOCK,
++      DVBS2_DEMOD_NOLOCK,
++      DVBS2_FEC_LOCK,
++      DVBS2_FEC_NOLOCK
++};
++
++enum stb0899_modcod {
++      STB0899_DUMMY_PLF,
++      STB0899_QPSK_14,
++      STB0899_QPSK_13,
++      STB0899_QPSK_25,
++      STB0899_QPSK_12,
++      STB0899_QPSK_35,
++      STB0899_QPSK_23,
++      STB0899_QPSK_34,
++      STB0899_QPSK_45,
++      STB0899_QPSK_56,
++      STB0899_QPSK_89,
++      STB0899_QPSK_910,
++      STB0899_8PSK_35,
++      STB0899_8PSK_23,
++      STB0899_8PSK_34,
++      STB0899_8PSK_56,
++      STB0899_8PSK_89,
++      STB0899_8PSK_910,
++      STB0899_16APSK_23,
++      STB0899_16APSK_34,
++      STB0899_16APSK_45,
++      STB0899_16APSK_56,
++      STB0899_16APSK_89,
++      STB0899_16APSK_910,
++      STB0899_32APSK_34,
++      STB0899_32APSK_45,
++      STB0899_32APSK_56,
++      STB0899_32APSK_89,
++      STB0899_32APSK_910
++};
++
++enum stb0899_frame {
++      STB0899_LONG_FRAME,
++      STB0899_SHORT_FRAME
++};
++
++enum stb0899_alpha {
++      RRC_20,
++      RRC_25,
++      RRC_35
++};
++
++struct stb0899_tab {
++      s32 real;
++      s32 read;
++};
++
++enum stb0899_fec {
++      STB0899_FEC_1_2                 = 13,
++      STB0899_FEC_2_3                 = 18,
++      STB0899_FEC_3_4                 = 21,
++      STB0899_FEC_5_6                 = 24,
++      STB0899_FEC_6_7                 = 25,
++      STB0899_FEC_7_8                 = 26
++};
++
++struct stb0899_params {
++      u32     freq;                                   /* Frequency    */
++      u32     srate;                                  /* Symbol rate  */
++      enum fe_code_rate fecrate;
++};
++
++struct stb0899_internal {
++      u32                     master_clk;
++      u32                     freq;                   /* Demod internal Frequency             */
++      u32                     srate;                  /* Demod internal Symbol rate           */
++      enum stb0899_fec        fecrate;                /* Demod internal FEC rate              */
++      s32                     srch_range;             /* Demod internal Search Range          */
++      s32                     sub_range;              /* Demod current sub range (Hz)         */
++      s32                     tuner_step;             /* Tuner step (Hz)                      */
++      s32                     tuner_offst;            /* Relative offset to carrier (Hz)      */
++      u32                     tuner_bw;               /* Current bandwidth of the tuner (Hz)  */
++
++      s32                     mclk;                   /* Masterclock Divider factor (binary)  */
++      s32                     rolloff;                /* Current RollOff of the filter (x100) */
++
++      s16                     derot_freq;             /* Current derotator frequency (Hz)     */
++      s16                     derot_percent;
++
++      s16                     direction;              /* Current derotator search direction   */
++      s16                     derot_step;             /* Derotator step (binary value)        */
++      s16                     t_derot;                /* Derotator time constant (ms)         */
++      s16                     t_data;                 /* Data recovery time constant (ms)     */
++      s16                     sub_dir;                /* Direction of the next sub range      */
++
++      s16                     t_agc1;                 /* Agc1 time constant (ms)              */
++      s16                     t_agc2;                 /* Agc2 time constant (ms)              */
++
++      u32                     lock;                   /* Demod internal lock state            */
++      enum stb0899_status     status;                 /* Demod internal status                */
++
++      /* DVB-S2 */
++      s32                     agc_gain;               /* RF AGC Gain                          */
++      s32                     center_freq;            /* Nominal carrier frequency            */
++      s32                     av_frame_coarse;        /* Coarse carrier freq search frames    */
++      s32                     av_frame_fine;          /* Fine carrier freq search frames      */
++
++      s16                     step_size;              /* Carrier frequency search step size   */
++
++      enum stb0899_alpha      rrc_alpha;
++      enum stb0899_inversion  inversion;
++      enum stb0899_modcod     modcod;
++      u8                      pilots;                 /* Pilots found                         */
++
++      enum stb0899_frame      frame_length;
++      u8                      v_status;               /* VSTATUS                              */
++      u8                      err_ctrl;               /* ERRCTRLn                             */
++};
++
++struct stb0899_state {
++      struct i2c_adapter              *i2c;
++      struct stb0899_config           *config;
++      struct dvb_frontend             frontend;
++
++      u32                             *verbose;       /* Cached module verbosity level        */
++
++      struct stb0899_internal         internal;       /* Device internal parameters           */
++
++      /*      cached params from API  */
++      enum fe_delivery_system         delsys;
++      struct stb0899_params           params;
++
++      u32                             rx_freq;        /* DiSEqC 2.0 receiver freq             */
++      struct mutex                    search_lock;
++};
++/* stb0899.c          */
++extern int stb0899_read_reg(struct stb0899_state *state,
++                          unsigned int reg);
++
++extern u32 _stb0899_read_s2reg(struct stb0899_state *state,
++                             u32 stb0899_i2cdev,
++                             u32 stb0899_base_addr,
++                             u16 stb0899_reg_offset);
++
++extern int stb0899_read_regs(struct stb0899_state *state,
++                           unsigned int reg, u8 *buf,
++                           u32 count);
++
++extern int stb0899_write_regs(struct stb0899_state *state,
++                            unsigned int reg, u8 *data,
++                            u32 count);
++
++extern int stb0899_write_reg(struct stb0899_state *state,
++                           unsigned int reg,
++                           u8 data);
++
++extern int stb0899_write_s2reg(struct stb0899_state *state,
++                             u32 stb0899_i2cdev,
++                             u32 stb0899_base_addr,
++                             u16 stb0899_reg_offset,
++                             u32 stb0899_data);
++
++extern int stb0899_i2c_gate_ctrl(struct dvb_frontend *fe, int enable);
++
++#if 0
++extern int _stb0899_write_s2reg(struct stb0899_state *state,
++                              u32 stb0899_i2cdev,
++                              u32 stb0899_base_addr,
++                              u16 stb0899_reg_offset,
++                              u32 stb0899_data);
++#endif
++
++#define STB0899_READ_S2REG(DEVICE, REG)       (_stb0899_read_s2reg(state, DEVICE, STB0899_BASE_##REG, STB0899_OFF0_##REG))
++//#define STB0899_WRITE_S2REG(DEVICE, REG, DATA)      (_stb0899_write_s2reg(state, DEVICE, STB0899_BASE_##REG, STB0899_OFF0_##REG, DATA))
++
++/* stb0899_algo.c     */
++extern enum stb0899_status stb0899_dvbs_algo(struct stb0899_state *state);
++extern enum stb0899_status stb0899_dvbs2_algo(struct stb0899_state *state);
++extern long stb0899_carr_width(struct stb0899_state *state);
++
++#endif //__STB0899_PRIV_H
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/stb0899_reg.h linux-2.6.18/drivers/media/dvb/frontends/stb0899_reg.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/stb0899_reg.h        1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/stb0899_reg.h     2010-09-09 12:38:50.000000000 +0000
+@@ -0,0 +1,2027 @@
++/*
++      STB0899 Multistandard Frontend driver
++      Copyright (C) Manu Abraham (abraham.manu@gmail.com)
++
++      Copyright (C) ST Microelectronics
++
++      This program is free software; you can redistribute it and/or modify
++      it under the terms of the GNU General Public License as published by
++      the Free Software Foundation; either version 2 of the License, or
++      (at your option) any later version.
++
++      This program is distributed in the hope that it will be useful,
++      but WITHOUT ANY WARRANTY; without even the implied warranty of
++      MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++      GNU General Public License for more details.
++
++      You should have received a copy of the GNU General Public License
++      along with this program; if not, write to the Free Software
++      Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++*/
++
++#ifndef __STB0899_REG_H
++#define __STB0899_REG_H
++
++/*    S1      */
++#define STB0899_DEV_ID                                0xf000
++#define STB0899_CHIP_ID                               (0x0f << 4)
++#define STB0899_OFFST_CHIP_ID                 4
++#define STB0899_WIDTH_CHIP_ID                 4
++#define STB0899_CHIP_REL                      (0x0f << 0)
++#define STB0899_OFFST_CHIP_REL                        0
++#define STB0899_WIDTH_CHIP_REL                        4
++
++#define STB0899_DEMOD                         0xf40e
++#define STB0899_MODECOEFF                     (0x01 << 0)
++#define STB0899_OFFST_MODECOEFF                       0
++#define STB0899_WIDTH_MODECOEFF                       1
++
++#define STB0899_RCOMPC                                0xf410
++#define STB0899_AGC1CN                                0xf412
++#define STB0899_AGC1REF                               0xf413
++#define STB0899_RTC                           0xf417
++#define STB0899_TMGCFG                                0xf418
++#define STB0899_AGC2REF                               0xf419
++#define STB0899_TLSR                          0xf41a
++
++#define STB0899_CFD                           0xf41b
++#define STB0899_CFD_ON                                (0x01 << 7)
++#define STB0899_OFFST_CFD_ON                  7
++#define STB0899_WIDTH_CFD_ON                  1
++
++#define STB0899_ACLC                          0xf41c
++
++#define STB0899_BCLC                          0xf41d
++#define STB0899_OFFST_ALGO                    6
++#define STB0899_WIDTH_ALGO_QPSK2              2
++#define STB0899_ALGO_QPSK2                    (2 << 6)
++#define STB0899_ALGO_QPSK1                    (1 << 6)
++#define STB0899_ALGO_BPSK                     (0 << 6)
++#define STB0899_OFFST_BETA                    0
++#define STB0899_WIDTH_BETA                    6
++
++#define STB0899_EQON                          0xf41e
++#define STB0899_LDT                           0xf41f
++#define STB0899_LDT2                          0xf420
++#define STB0899_EQUALREF                      0xf425
++#define STB0899_TMGRAMP                               0xf426
++#define STB0899_TMGTHD                                0xf427
++#define STB0899_IDCCOMP                               0xf428
++#define STB0899_QDCCOMP                               0xf429
++#define STB0899_POWERI                                0xf42a
++#define STB0899_POWERQ                                0xf42b
++#define STB0899_RCOMP                         0xf42c
++
++#define STB0899_AGCIQIN                               0xf42e
++#define STB0899_AGCIQVALUE                    (0xff << 0)
++#define STB0899_OFFST_AGCIQVALUE              0
++#define STB0899_WIDTH_AGCIQVALUE              8
++
++#define STB0899_AGC2I1                                0xf436
++#define STB0899_AGC2I2                                0xf437
++
++#define STB0899_TLIR                          0xf438
++#define STB0899_TLIR_TMG_LOCK_IND             (0xff << 0)
++#define STB0899_OFFST_TLIR_TMG_LOCK_IND               0
++#define STB0899_WIDTH_TLIR_TMG_LOCK_IND               8
++
++#define STB0899_RTF                           0xf439
++#define STB0899_RTF_TIMING_LOOP_FREQ          (0xff << 0)
++#define STB0899_OFFST_RTF_TIMING_LOOP_FREQ    0
++#define STB0899_WIDTH_RTF_TIMING_LOOP_FREQ    8
++
++#define STB0899_DSTATUS                               0xf43a
++#define STB0899_CARRIER_FOUND                 (0x01 << 7)
++#define STB0899_OFFST_CARRIER_FOUND           7
++#define STB0899_WIDTH_CARRIER_FOUND           1
++#define STB0899_TMG_LOCK                      (0x01 << 6)
++#define STB0899_OFFST_TMG_LOCK                        6
++#define STB0899_WIDTH_TMG_LOCK                        1
++#define STB0899_DEMOD_LOCK                    (0x01 << 5)
++#define STB0899_OFFST_DEMOD_LOCK              5
++#define STB0899_WIDTH_DEMOD_LOCK              1
++#define STB0899_TMG_AUTO                      (0x01 << 4)
++#define STB0899_OFFST_TMG_AUTO                        4
++#define STB0899_WIDTH_TMG_AUTO                        1
++#define STB0899_END_MAIN                      (0x01 << 3)
++#define STB0899_OFFST_END_MAIN                        3
++#define STB0899_WIDTH_END_MAIN                        1
++
++#define STB0899_LDI                           0xf43b
++#define STB0899_OFFST_LDI                     0
++#define STB0899_WIDTH_LDI                     8
++
++#define STB0899_CFRM                          0xf43e
++#define STB0899_OFFST_CFRM                    0
++#define STB0899_WIDTH_CFRM                    8
++
++#define STB0899_CFRL                          0xf43f
++#define STB0899_OFFST_CFRL                    0
++#define STB0899_WIDTH_CFRL                    8
++
++#define STB0899_NIRM                          0xf440
++#define STB0899_OFFST_NIRM                    0
++#define STB0899_WIDTH_NIRM                    8
++
++#define STB0899_NIRL                          0xf441
++#define STB0899_OFFST_NIRL                    0
++#define STB0899_WIDTH_NIRL                    8
++
++#define STB0899_ISYMB                         0xf444
++#define STB0899_QSYMB                         0xf445
++
++#define STB0899_SFRH                          0xf446
++#define STB0899_OFFST_SFRH                    0
++#define STB0899_WIDTH_SFRH                    8
++
++#define STB0899_SFRM                          0xf447
++#define STB0899_OFFST_SFRM                    0
++#define STB0899_WIDTH_SFRM                    8
++
++#define STB0899_SFRL                          0xf448
++#define STB0899_OFFST_SFRL                    4
++#define STB0899_WIDTH_SFRL                    4
++
++#define STB0899_SFRUPH                                0xf44c
++#define STB0899_SFRUPM                                0xf44d
++#define STB0899_SFRUPL                                0xf44e
++
++#define STB0899_EQUAI1                                0xf4e0
++#define STB0899_EQUAQ1                                0xf4e1
++#define STB0899_EQUAI2                                0xf4e2
++#define STB0899_EQUAQ2                                0xf4e3
++#define STB0899_EQUAI3                                0xf4e4
++#define STB0899_EQUAQ3                                0xf4e5
++#define STB0899_EQUAI4                                0xf4e6
++#define STB0899_EQUAQ4                                0xf4e7
++#define STB0899_EQUAI5                                0xf4e8
++#define STB0899_EQUAQ5                                0xf4e9
++
++#define STB0899_DSTATUS2                      0xf50c
++#define STB0899_DS2_TMG_AUTOSRCH              (0x01 << 7)
++#define STB8999_OFFST_DS2_TMG_AUTOSRCH                7
++#define STB0899_WIDTH_DS2_TMG_AUTOSRCH                1
++#define STB0899_DS2_END_MAINLOOP              (0x01 << 6)
++#define STB0899_OFFST_DS2_END_MAINLOOP                6
++#define STB0899_WIDTH_DS2_END_MAINLOOP                1
++#define STB0899_DS2_CFSYNC                    (0x01 << 5)
++#define STB0899_OFFST_DS2_CFSYNC              5
++#define STB0899_WIDTH_DS2_CFSYNC              1
++#define STB0899_DS2_TMGLOCK                   (0x01 << 4)
++#define STB0899_OFFST_DS2_TMGLOCK             4
++#define STB0899_WIDTH_DS2_TMGLOCK             1
++#define STB0899_DS2_DEMODWAIT                 (0x01 << 3)
++#define STB0899_OFFST_DS2_DEMODWAIT           3
++#define STB0899_WIDTH_DS2_DEMODWAIT           1
++#define STB0899_DS2_FECON                     (0x01 << 1)
++#define STB0899_OFFST_DS2_FECON                       1
++#define STB0899_WIDTH_DS2_FECON                       1
++
++/*    S1 FEC  */
++#define STB0899_VSTATUS                               0xf50d
++#define STB0899_VSTATUS_VITERBI_ON            (0x01 << 7)
++#define STB0899_OFFST_VSTATUS_VITERBI_ON      7
++#define STB0899_WIDTH_VSTATUS_VITERBI_ON      1
++#define STB0899_VSTATUS_END_LOOPVIT           (0x01 << 6)
++#define STB0899_OFFST_VSTATUS_END_LOOPVIT     6
++#define STB0899_WIDTH_VSTATUS_END_LOOPVIT     1
++#define STB0899_VSTATUS_PRFVIT                        (0x01 << 4)
++#define STB0899_OFFST_VSTATUS_PRFVIT          4
++#define STB0899_WIDTH_VSTATUS_PRFVIT          1
++#define STB0899_VSTATUS_LOCKEDVIT             (0x01 << 3)
++#define STB0899_OFFST_VSTATUS_LOCKEDVIT               3
++#define STB0899_WIDTH_VSTATUS_LOCKEDVIT               1
++
++#define STB0899_VERROR                                0xf50f
++
++#define STB0899_IQSWAP                                0xf523
++#define STB0899_SYM                           (0x01 << 3)
++#define STB0899_OFFST_SYM                     3
++#define STB0899_WIDTH_SYM                     1
++
++#define STB0899_FECAUTO1                      0xf530
++#define STB0899_DSSSRCH                               (0x01 << 3)
++#define STB0899_OFFST_DSSSRCH                 3
++#define STB0899_WIDTH_DSSSRCH                 1
++#define STB0899_SYMSRCH                               (0x01 << 2)
++#define STB0899_OFFST_SYMSRCH                 2
++#define STB0899_WIDTH_SYMSRCH                 1
++#define STB0899_QPSKSRCH                      (0x01 << 1)
++#define STB0899_OFFST_QPSKSRCH                        1
++#define STB0899_WIDTH_QPSKSRCH                        1
++#define STB0899_BPSKSRCH                      (0x01 << 0)
++#define STB0899_OFFST_BPSKSRCH                        0
++#define STB0899_WIDTH_BPSKSRCH                        1
++
++#define STB0899_FECM                          0xf533
++#define STB0899_FECM_NOT_DVB                  (0x01 << 7)
++#define STB0899_OFFST_FECM_NOT_DVB            7
++#define STB0899_WIDTH_FECM_NOT_DVB            1
++#define STB0899_FECM_RSVD1                    (0x07 << 4)
++#define STB0899_OFFST_FECM_RSVD1              4
++#define STB0899_WIDTH_FECM_RSVD1              3
++#define STB0899_FECM_VITERBI_ON                       (0x01 << 3)
++#define STB0899_OFFST_FECM_VITERBI_ON         3
++#define STB0899_WIDTH_FECM_VITERBI_ON         1
++#define STB0899_FECM_RSVD0                    (0x01 << 2)
++#define STB0899_OFFST_FECM_RSVD0              2
++#define STB0899_WIDTH_FECM_RSVD0              1
++#define STB0899_FECM_SYNCDIS                  (0x01 << 1)
++#define STB0899_OFFST_FECM_SYNCDIS            1
++#define STB0899_WIDTH_FECM_SYNCDIS            1
++#define STB0899_FECM_SYMI                     (0x01 << 0)
++#define STB0899_OFFST_FECM_SYMI                       0
++#define STB0899_WIDTH_FECM_SYMI                       1
++
++#define STB0899_VTH12                         0xf534
++#define STB0899_VTH23                         0xf535
++#define STB0899_VTH34                         0xf536
++#define STB0899_VTH56                         0xf537
++#define STB0899_VTH67                         0xf538
++#define STB0899_VTH78                         0xf539
++
++#define STB0899_PRVIT                         0xf53c
++#define STB0899_PR_7_8                                (0x01 << 5)
++#define STB0899_OFFST_PR_7_8                  5
++#define STB0899_WIDTH_PR_7_8                  1
++#define STB0899_PR_6_7                                (0x01 << 4)
++#define STB0899_OFFST_PR_6_7                  4
++#define STB0899_WIDTH_PR_6_7                  1
++#define STB0899_PR_5_6                                (0x01 << 3)
++#define STB0899_OFFST_PR_5_6                  3
++#define STB0899_WIDTH_PR_5_6                  1
++#define STB0899_PR_3_4                                (0x01 << 2)
++#define STB0899_OFFST_PR_3_4                  2
++#define STB0899_WIDTH_PR_3_4                  1
++#define STB0899_PR_2_3                                (0x01 << 1)
++#define STB0899_OFFST_PR_2_3                  1
++#define STB0899_WIDTH_PR_2_3                  1
++#define STB0899_PR_1_2                                (0x01 << 0)
++#define STB0899_OFFST_PR_1_2                  0
++#define STB0899_WIDTH_PR_1_2                  1
++
++#define STB0899_VITSYNC                               0xf53d
++#define STB0899_AM                            (0x01 << 7)
++#define STB0899_OFFST_AM                      7
++#define STB0899_WIDTH_AM                      1
++#define STB0899_FREEZE                                (0x01 << 6)
++#define STB0899_OFFST_FREEZE                  6
++#define STB0899_WIDTH_FREEZE                  1
++#define STB0899_SN_65536                      (0x03 << 4)
++#define STB0899_OFFST_SN_65536                        4
++#define STB0899_WIDTH_SN_65536                        2
++#define STB0899_SN_16384                      (0x01 << 5)
++#define STB0899_OFFST_SN_16384                        5
++#define STB0899_WIDTH_SN_16384                        1
++#define STB0899_SN_4096                               (0x01 << 4)
++#define STB0899_OFFST_SN_4096                 4
++#define STB0899_WIDTH_SN_4096                 1
++#define STB0899_SN_1024                               (0x00 << 4)
++#define STB0899_OFFST_SN_1024                 4
++#define STB0899_WIDTH_SN_1024                 0
++#define STB0899_TO_128                                (0x03 << 2)
++#define STB0899_OFFST_TO_128                  2
++#define STB0899_WIDTH_TO_128                  2
++#define STB0899_TO_64                         (0x01 << 3)
++#define STB0899_OFFST_TO_64                   3
++#define STB0899_WIDTH_TO_64                   1
++#define STB0899_TO_32                         (0x01 << 2)
++#define STB0899_OFFST_TO_32                   2
++#define STB0899_WIDTH_TO_32                   1
++#define STB0899_TO_16                         (0x00 << 2)
++#define STB0899_OFFST_TO_16                   2
++#define STB0899_WIDTH_TO_16                   0
++#define STB0899_HYST_128                      (0x03 << 1)
++#define STB0899_OFFST_HYST_128                        1
++#define STB0899_WIDTH_HYST_128                        2
++#define STB0899_HYST_64                               (0x01 << 1)
++#define STB0899_OFFST_HYST_64                 1
++#define STB0899_WIDTH_HYST_64                 1
++#define STB0899_HYST_32                               (0x01 << 0)
++#define STB0899_OFFST_HYST_32                 0
++#define STB0899_WIDTH_HYST_32                 1
++#define STB0899_HYST_16                               (0x00 << 0)
++#define STB0899_OFFST_HYST_16                 0
++#define STB0899_WIDTH_HYST_16                 0
++
++#define STB0899_RSULC                         0xf548
++#define STB0899_ULDIL_ON                      (0x01 << 7)
++#define STB0899_OFFST_ULDIL_ON                        7
++#define STB0899_WIDTH_ULDIL_ON                        1
++#define STB0899_ULAUTO_ON                     (0x01 << 6)
++#define STB0899_OFFST_ULAUTO_ON                       6
++#define STB0899_WIDTH_ULAUTO_ON                       1
++#define STB0899_ULRS_ON                               (0x01 << 5)
++#define STB0899_OFFST_ULRS_ON                 5
++#define STB0899_WIDTH_ULRS_ON                 1
++#define STB0899_ULDESCRAM_ON                  (0x01 << 4)
++#define STB0899_OFFST_ULDESCRAM_ON            4
++#define STB0899_WIDTH_ULDESCRAM_ON            1
++#define STB0899_UL_DISABLE                    (0x01 << 2)
++#define STB0899_OFFST_UL_DISABLE              2
++#define STB0899_WIDTH_UL_DISABLE              1
++#define STB0899_NOFTHRESHOLD                  (0x01 << 0)
++#define STB0899_OFFST_NOFTHRESHOLD            0
++#define STB0899_WIDTH_NOFTHRESHOLD            1
++
++#define STB0899_RSLLC                         0xf54a
++#define STB0899_DEMAPVIT                      0xf583
++#define STB0899_DEMAPVIT_RSVD                 (0x01 << 7)
++#define STB0899_OFFST_DEMAPVIT_RSVD           7
++#define STB0899_WIDTH_DEMAPVIT_RSVD           1
++#define STB0899_DEMAPVIT_KDIVIDER             (0x7f << 0)
++#define STB0899_OFFST_DEMAPVIT_KDIVIDER               0
++#define STB0899_WIDTH_DEMAPVIT_KDIVIDER               7
++
++#define STB0899_PLPARM                                0xf58c
++#define STB0899_VITMAPPING                    (0x07 << 5)
++#define STB0899_OFFST_VITMAPPING              5
++#define STB0899_WIDTH_VITMAPPING              3
++#define STB0899_VITMAPPING_BPSK                       (0x01 << 5)
++#define STB0899_OFFST_VITMAPPING_BPSK         5
++#define STB0899_WIDTH_VITMAPPING_BPSK         1
++#define STB0899_VITMAPPING_QPSK                       (0x00 << 5)
++#define STB0899_OFFST_VITMAPPING_QPSK         5
++#define STB0899_WIDTH_VITMAPPING_QPSK         0
++#define STB0899_VITCURPUN                     (0x1f << 0)
++#define STB0899_OFFST_VITCURPUN                       0
++#define STB0899_WIDTH_VITCURPUN                       5
++#define STB0899_VITCURPUN_1_2                 (0x0d << 0)
++#define STB0899_VITCURPUN_2_3                 (0x12 << 0)
++#define STB0899_VITCURPUN_3_4                 (0x15 << 0)
++#define STB0899_VITCURPUN_5_6                 (0x18 << 0)
++#define STB0899_VITCURPUN_6_7                 (0x19 << 0)
++#define STB0899_VITCURPUN_7_8                 (0x1a << 0)
++
++/*    S2 DEMOD        */
++#define STB0899_OFF0_DMD_STATUS                       0xf300
++#define STB0899_BASE_DMD_STATUS                       0x00000000
++#define STB0899_IF_AGC_LOCK                   (0x01 << 8)
++#define STB0899_OFFST_IF_AGC_LOCK             0
++#define STB0899_WIDTH_IF_AGC_LOCK             1
++
++#define STB0899_OFF0_CRL_FREQ                 0xf304
++#define STB0899_BASE_CRL_FREQ                 0x00000000
++#define STB0899_CARR_FREQ                     (0x3fffffff << 0)
++#define STB0899_OFFST_CARR_FREQ                       0
++#define STB0899_WIDTH_CARR_FREQ                       30
++
++#define STB0899_OFF0_BTR_FREQ                 0xf308
++#define STB0899_BASE_BTR_FREQ                 0x00000000
++#define STB0899_BTR_FREQ                      (0xfffffff << 0)
++#define STB0899_OFFST_BTR_FREQ                        0
++#define STB0899_WIDTH_BTR_FREQ                        28
++
++#define STB0899_OFF0_IF_AGC_GAIN              0xf30c
++#define STB0899_BASE_IF_AGC_GAIN              0x00000000
++#define STB0899_IF_AGC_GAIN                   (0x3fff < 0)
++#define STB0899_OFFST_IF_AGC_GAIN             0
++#define STB0899_WIDTH_IF_AGC_GAIN             14
++
++#define STB0899_OFF0_BB_AGC_GAIN              0xf310
++#define STB0899_BASE_BB_AGC_GAIN              0x00000000
++#define STB0899_BB_AGC_GAIN                   (0x3fff < 0)
++#define STB0899_OFFST_BB_AGC_GAIN             0
++#define STB0899_WIDTH_BB_AGC_GAIN             14
++
++#define STB0899_OFF0_DC_OFFSET                        0xf314
++#define STB0899_BASE_DC_OFFSET                        0x00000000
++#define STB0899_I                             (0xff < 8)
++#define STB0899_OFFST_I                               8
++#define STB0899_WIDTH_I                               8
++#define STB0899_Q                             (0xff < 0)
++#define STB0899_OFFST_Q                               8
++#define STB0899_WIDTH_Q                               8
++
++#define STB0899_OFF0_DMD_CNTRL                        0xf31c
++#define STB0899_BASE_DMD_CNTRL                        0x00000000
++#define STB0899_ADC0_PINS1IN                  (0x01 << 6)
++#define STB0899_OFFST_ADC0_PINS1IN              6
++#define STB0899_WIDTH_ADC0_PINS1IN              1
++#define STB0899_IN2COMP1_OFFBIN0              (0x01 << 3)
++#define STB0899_OFFST_IN2COMP1_OFFBIN0          3
++#define STB0899_WIDTH_IN2COMP1_OFFBIN0          1
++#define STB0899_DC_COMP                               (0x01 << 2)
++#define STB0899_OFFST_DC_COMP                 2
++#define STB0899_WIDTH_DC_COMP                 1
++#define STB0899_MODMODE                               (0x03 << 0)
++#define STB0899_OFFST_MODMODE                 0
++#define STB0899_WIDTH_MODMODE                 2
++
++#define STB0899_OFF0_IF_AGC_CNTRL             0xf320
++#define STB0899_BASE_IF_AGC_CNTRL             0x00000000
++#define STB0899_IF_GAIN_INIT                  (0x3fff << 13)
++#define STB0899_OFFST_IF_GAIN_INIT            13
++#define STB0899_WIDTH_IF_GAIN_INIT            14
++#define STB0899_IF_GAIN_SENSE                 (0x01 << 12)
++#define STB0899_OFFST_IF_GAIN_SENSE           12
++#define STB0899_WIDTH_IF_GAIN_SENSE           1
++#define STB0899_IF_LOOP_GAIN                  (0x0f << 8)
++#define STB0899_OFFST_IF_LOOP_GAIN            8
++#define STB0899_WIDTH_IF_LOOP_GAIN            4
++#define STB0899_IF_LD_GAIN_INIT                       (0x01 << 7)
++#define STB0899_OFFST_IF_LD_GAIN_INIT         7
++#define STB0899_WIDTH_IF_LD_GAIN_INIT         1
++#define STB0899_IF_AGC_REF                    (0x7f << 0)
++#define STB0899_OFFST_IF_AGC_REF              0
++#define STB0899_WIDTH_IF_AGC_REF              7
++
++#define STB0899_OFF0_BB_AGC_CNTRL             0xf324
++#define STB0899_BASE_BB_AGC_CNTRL             0x00000000
++#define STB0899_BB_GAIN_INIT                  (0x3fff << 12)
++#define STB0899_OFFST_BB_GAIN_INIT            12
++#define STB0899_WIDTH_BB_GAIN_INIT            14
++#define STB0899_BB_LOOP_GAIN                  (0x0f << 8)
++#define STB0899_OFFST_BB_LOOP_GAIN            8
++#define STB0899_WIDTH_BB_LOOP_GAIN            4
++#define STB0899_BB_LD_GAIN_INIT                       (0x01 << 7)
++#define STB0899_OFFST_BB_LD_GAIN_INIT         7
++#define STB0899_WIDTH_BB_LD_GAIN_INIT         1
++#define STB0899_BB_AGC_REF                    (0x7f << 0)
++#define STB0899_OFFST_BB_AGC_REF              0
++#define STB0899_WIDTH_BB_AGC_REF              7
++
++#define STB0899_OFF0_CRL_CNTRL                        0xf328
++#define STB0899_BASE_CRL_CNTRL                        0x00000000
++#define STB0899_CRL_LOCK_CLEAR                        (0x01 << 5)
++#define STB0899_OFFST_CRL_LOCK_CLEAR          5
++#define STB0899_WIDTH_CRL_LOCK_CLEAR          1
++#define STB0899_CRL_SWPR_CLEAR                        (0x01 << 4)
++#define STB0899_OFFST_CRL_SWPR_CLEAR          4
++#define STB0899_WIDTH_CRL_SWPR_CLEAR          1
++#define STB0899_CRL_SWP_ENA                   (0x01 << 3)
++#define STB0899_OFFST_CRL_SWP_ENA             3
++#define STB0899_WIDTH_CRL_SWP_ENA             1
++#define STB0899_CRL_DET_SEL                   (0x01 << 2)
++#define STB0899_OFFST_CRL_DET_SEL             2
++#define STB0899_WIDTH_CRL_DET_SEL             1
++#define STB0899_CRL_SENSE                     (0x01 << 1)
++#define STB0899_OFFST_CRL_SENSE                       1
++#define STB0899_WIDTH_CRL_SENSE                       1
++#define STB0899_CRL_PHSERR_CLEAR              (0x01 << 0)
++#define STB0899_OFFST_CRL_PHSERR_CLEAR                0
++#define STB0899_WIDTH_CRL_PHSERR_CLEAR                1
++
++#define STB0899_OFF0_CRL_PHS_INIT             0xf32c
++#define STB0899_BASE_CRL_PHS_INIT             0x00000000
++#define STB0899_CRL_PHS_INIT_31                       (0x1 << 30)
++#define STB0899_OFFST_CRL_PHS_INIT_31         30
++#define STB0899_WIDTH_CRL_PHS_INIT_31         1
++#define STB0899_CRL_LD_INIT_PHASE             (0x1 << 24)
++#define STB0899_OFFST_CRL_LD_INIT_PHASE               24
++#define STB0899_WIDTH_CRL_LD_INIT_PHASE               1
++#define STB0899_CRL_INIT_PHASE                        (0xffffff << 0)
++#define STB0899_OFFST_CRL_INIT_PHASE          0
++#define STB0899_WIDTH_CRL_INIT_PHASE          24
++
++#define STB0899_OFF0_CRL_FREQ_INIT            0xf330
++#define STB0899_BASE_CRL_FREQ_INIT            0x00000000
++#define STB0899_CRL_FREQ_INIT_31              (0x1 << 30)
++#define STB0899_OFFST_CRL_FREQ_INIT_31                30
++#define STB0899_WIDTH_CRL_FREQ_INIT_31                1
++#define STB0899_CRL_LD_FREQ_INIT              (0x1 << 24)
++#define STB0899_OFFST_CRL_LD_FREQ_INIT                24
++#define STB0899_WIDTH_CRL_LD_FREQ_INIT                1
++#define STB0899_CRL_FREQ_INIT                 (0xffffff << 0)
++#define STB0899_OFFST_CRL_FREQ_INIT           0
++#define STB0899_WIDTH_CRL_FREQ_INIT           24
++
++#define STB0899_OFF0_CRL_LOOP_GAIN            0xf334
++#define STB0899_BASE_CRL_LOOP_GAIN            0x00000000
++#define STB0899_KCRL2_RSHFT                   (0xf << 16)
++#define STB0899_OFFST_KCRL2_RSHFT             16
++#define STB0899_WIDTH_KCRL2_RSHFT             4
++#define STB0899_KCRL1                         (0xf << 12)
++#define STB0899_OFFST_KCRL1                   12
++#define STB0899_WIDTH_KCRL1                   4
++#define STB0899_KCRL1_RSHFT                   (0xf << 8)
++#define STB0899_OFFST_KCRL1_RSHFT             8
++#define STB0899_WIDTH_KCRL1_RSHFT             4
++#define STB0899_KCRL0                         (0xf << 4)
++#define STB0899_OFFST_KCRL0                   4
++#define STB0899_WIDTH_KCRL0                   4
++#define STB0899_KCRL0_RSHFT                   (0xf << 0)
++#define STB0899_OFFST_KCRL0_RSHFT             0
++#define STB0899_WIDTH_KCRL0_RSHFT             4
++
++#define STB0899_OFF0_CRL_NOM_FREQ             0xf338
++#define STB0899_BASE_CRL_NOM_FREQ             0x00000000
++#define STB0899_CRL_NOM_FREQ                  (0x3fffffff << 0)
++#define STB0899_OFFST_CRL_NOM_FREQ            0
++#define STB0899_WIDTH_CRL_NOM_FREQ            30
++
++#define STB0899_OFF0_CRL_SWP_RATE             0xf33c
++#define STB0899_BASE_CRL_SWP_RATE             0x00000000
++#define STB0899_CRL_SWP_RATE                  (0x3fffffff << 0)
++#define STB0899_OFFST_CRL_SWP_RATE            0
++#define STB0899_WIDTH_CRL_SWP_RATE            30
++
++#define STB0899_OFF0_CRL_MAX_SWP              0xf340
++#define STB0899_BASE_CRL_MAX_SWP              0x00000000
++#define STB0899_CRL_MAX_SWP                   (0x3fffffff << 0)
++#define STB0899_OFFST_CRL_MAX_SWP             0
++#define STB0899_WIDTH_CRL_MAX_SWP             30
++
++#define STB0899_OFF0_CRL_LK_CNTRL             0xf344
++#define STB0899_BASE_CRL_LK_CNTRL             0x00000000
++
++#define STB0899_OFF0_DECIM_CNTRL              0xf348
++#define STB0899_BASE_DECIM_CNTRL              0x00000000
++#define STB0899_BAND_LIMIT_B                  (0x01 << 5)
++#define STB0899_OFFST_BAND_LIMIT_B            5
++#define STB0899_WIDTH_BAND_LIMIT_B            1
++#define STB0899_WIN_SEL                               (0x03 << 3)
++#define STB0899_OFFST_WIN_SEL                 3
++#define STB0899_WIDTH_WIN_SEL                 2
++#define STB0899_DECIM_RATE                    (0x07 << 0)
++#define STB0899_OFFST_DECIM_RATE              0
++#define STB0899_WIDTH_DECIM_RATE              3
++
++#define STB0899_OFF0_BTR_CNTRL                        0xf34c
++#define STB0899_BASE_BTR_CNTRL                        0x00000000
++#define STB0899_BTR_FREQ_CORR                 (0x7ff << 4)
++#define STB0899_OFFST_BTR_FREQ_CORR           4
++#define STB0899_WIDTH_BTR_FREQ_CORR           11
++#define STB0899_BTR_CLR_LOCK                  (0x01 << 3)
++#define STB0899_OFFST_BTR_CLR_LOCK            3
++#define STB0899_WIDTH_BTR_CLR_LOCK            1
++#define STB0899_BTR_SENSE                     (0x01 << 2)
++#define STB0899_OFFST_BTR_SENSE                       2
++#define STB0899_WIDTH_BTR_SENSE                       1
++#define STB0899_BTR_ERR_ENA                   (0x01 << 1)
++#define STB0899_OFFST_BTR_ERR_ENA             1
++#define STB0899_WIDTH_BTR_ERR_ENA             1
++#define STB0899_INTRP_PHS_SENSE                       (0x01 << 0)
++#define STB0899_OFFST_INTRP_PHS_SENSE         0
++#define STB0899_WIDTH_INTRP_PHS_SENSE         1
++
++#define STB0899_OFF0_BTR_LOOP_GAIN            0xf350
++#define STB0899_BASE_BTR_LOOP_GAIN            0x00000000
++#define STB0899_KBTR2_RSHFT                   (0x0f << 16)
++#define STB0899_OFFST_KBTR2_RSHFT             16
++#define STB0899_WIDTH_KBTR2_RSHFT             4
++#define STB0899_KBTR1                         (0x0f << 12)
++#define STB0899_OFFST_KBTR1                   12
++#define STB0899_WIDTH_KBTR1                   4
++#define STB0899_KBTR1_RSHFT                   (0x0f << 8)
++#define STB0899_OFFST_KBTR1_RSHFT             8
++#define STB0899_WIDTH_KBTR1_RSHFT             4
++#define STB0899_KBTR0                         (0x0f << 4)
++#define STB0899_OFFST_KBTR0                   4
++#define STB0899_WIDTH_KBTR0                   4
++#define STB0899_KBTR0_RSHFT                   (0x0f << 0)
++#define STB0899_OFFST_KBTR0_RSHFT             0
++#define STB0899_WIDTH_KBTR0_RSHFT             4
++
++#define STB0899_OFF0_BTR_PHS_INIT             0xf354
++#define STB0899_BASE_BTR_PHS_INIT             0x00000000
++#define STB0899_BTR_LD_PHASE_INIT             (0x01 << 28)
++#define STB0899_OFFST_BTR_LD_PHASE_INIT               28
++#define STB0899_WIDTH_BTR_LD_PHASE_INIT               1
++#define STB0899_BTR_INIT_PHASE                        (0xfffffff << 0)
++#define STB0899_OFFST_BTR_INIT_PHASE          0
++#define STB0899_WIDTH_BTR_INIT_PHASE          28
++
++#define STB0899_OFF0_BTR_FREQ_INIT            0xf358
++#define STB0899_BASE_BTR_FREQ_INIT            0x00000000
++#define STB0899_BTR_LD_FREQ_INIT              (1 << 28)
++#define STB0899_OFFST_BTR_LD_FREQ_INIT                28
++#define STB0899_WIDTH_BTR_LD_FREQ_INIT                1
++#define STB0899_BTR_FREQ_INIT                 (0xfffffff << 0)
++#define STB0899_OFFST_BTR_FREQ_INIT           0
++#define STB0899_WIDTH_BTR_FREQ_INIT           28
++
++#define STB0899_OFF0_BTR_NOM_FREQ             0xf35c
++#define STB0899_BASE_BTR_NOM_FREQ             0x00000000
++#define STB0899_BTR_NOM_FREQ                  (0xfffffff << 0)
++#define STB0899_OFFST_BTR_NOM_FREQ            0
++#define STB0899_WIDTH_BTR_NOM_FREQ            28
++
++#define STB0899_OFF0_BTR_LK_CNTRL             0xf360
++#define STB0899_BASE_BTR_LK_CNTRL             0x00000000
++#define STB0899_BTR_MIN_ENERGY                        (0x0f << 24)
++#define STB0899_OFFST_BTR_MIN_ENERGY          24
++#define STB0899_WIDTH_BTR_MIN_ENERGY          4
++#define STB0899_BTR_LOCK_TH_LO                        (0xff << 16)
++#define STB0899_OFFST_BTR_LOCK_TH_LO          16
++#define STB0899_WIDTH_BTR_LOCK_TH_LO          8
++#define STB0899_BTR_LOCK_TH_HI                        (0xff << 8)
++#define STB0899_OFFST_BTR_LOCK_TH_HI          8
++#define STB0899_WIDTH_BTR_LOCK_TH_HI          8
++#define STB0899_BTR_LOCK_GAIN                 (0x03 << 6)
++#define STB0899_OFFST_BTR_LOCK_GAIN           6
++#define STB0899_WIDTH_BTR_LOCK_GAIN           2
++#define STB0899_BTR_LOCK_LEAK                 (0x3f << 0)
++#define STB0899_OFFST_BTR_LOCK_LEAK           0
++#define STB0899_WIDTH_BTR_LOCK_LEAK           6
++
++#define STB0899_OFF0_DECN_CNTRL                       0xf364
++#define STB0899_BASE_DECN_CNTRL                       0x00000000
++
++#define STB0899_OFF0_TP_CNTRL                 0xf368
++#define STB0899_BASE_TP_CNTRL                 0x00000000
++
++#define STB0899_OFF0_TP_BUF_STATUS            0xf36c
++#define STB0899_BASE_TP_BUF_STATUS            0x00000000
++#define STB0899_TP_BUFFER_FULL                  (1 << 0)
++
++#define STB0899_OFF0_DC_ESTIM                 0xf37c
++#define STB0899_BASE_DC_ESTIM                 0x0000
++#define STB0899_I_DC_ESTIMATE                 (0xff << 8)
++#define STB0899_OFFST_I_DC_ESTIMATE           8
++#define STB0899_WIDTH_I_DC_ESTIMATE           8
++#define STB0899_Q_DC_ESTIMATE                 (0xff << 0)
++#define STB0899_OFFST_Q_DC_ESTIMATE           0
++#define STB0899_WIDTH_Q_DC_ESTIMATE           8
++
++#define STB0899_OFF0_FLL_CNTRL                        0xf310
++#define STB0899_BASE_FLL_CNTRL                        0x00000020
++#define STB0899_CRL_FLL_ACC                   (0x01 << 4)
++#define STB0899_OFFST_CRL_FLL_ACC             4
++#define STB0899_WIDTH_CRL_FLL_ACC             1
++#define STB0899_FLL_AVG_PERIOD                        (0x0f << 0)
++#define STB0899_OFFST_FLL_AVG_PERIOD          0
++#define STB0899_WIDTH_FLL_AVG_PERIOD          4
++
++#define STB0899_OFF0_FLL_FREQ_WD              0xf314
++#define STB0899_BASE_FLL_FREQ_WD              0x00000020
++#define STB0899_FLL_FREQ_WD                   (0xffffffff << 0)
++#define STB0899_OFFST_FLL_FREQ_WD             0
++#define STB0899_WIDTH_FLL_FREQ_WD             32
++
++#define STB0899_OFF0_ANTI_ALIAS_SEL           0xf358
++#define STB0899_BASE_ANTI_ALIAS_SEL           0x00000020
++#define STB0899_ANTI_ALIAS_SELB                       (0x03 << 0)
++#define STB0899_OFFST_ANTI_ALIAS_SELB         0
++#define STB0899_WIDTH_ANTI_ALIAS_SELB         2
++
++#define STB0899_OFF0_RRC_ALPHA                        0xf35c
++#define STB0899_BASE_RRC_ALPHA                        0x00000020
++#define STB0899_RRC_ALPHA                     (0x03 << 0)
++#define STB0899_OFFST_RRC_ALPHA                       0
++#define STB0899_WIDTH_RRC_ALPHA                       2
++
++#define STB0899_OFF0_DC_ADAPT_LSHFT           0xf360
++#define STB0899_BASE_DC_ADAPT_LSHFT           0x00000020
++#define STB0899_DC_ADAPT_LSHFT                        (0x077 << 0)
++#define STB0899_OFFST_DC_ADAPT_LSHFT          0
++#define STB0899_WIDTH_DC_ADAPT_LSHFT          3
++
++#define STB0899_OFF0_IMB_OFFSET                       0xf364
++#define STB0899_BASE_IMB_OFFSET                       0x00000020
++#define STB0899_PHS_IMB_COMP                  (0xff << 8)
++#define STB0899_OFFST_PHS_IMB_COMP            8
++#define STB0899_WIDTH_PHS_IMB_COMP            8
++#define STB0899_AMPL_IMB_COMP                 (0xff << 0)
++#define STB0899_OFFST_AMPL_IMB_COMP           0
++#define STB0899_WIDTH_AMPL_IMB_COMP           8
++
++#define STB0899_OFF0_IMB_ESTIMATE             0xf368
++#define STB0899_BASE_IMB_ESTIMATE             0x00000020
++#define STB0899_PHS_IMB_ESTIMATE              (0xff << 8)
++#define STB0899_OFFST_PHS_IMB_ESTIMATE                8
++#define STB0899_WIDTH_PHS_IMB_ESTIMATE                8
++#define STB0899_AMPL_IMB_ESTIMATE             (0xff << 0)
++#define STB0899_OFFST_AMPL_IMB_ESTIMATE               0
++#define STB0899_WIDTH_AMPL_IMB_ESTIMATE               8
++
++#define STB0899_OFF0_IMB_CNTRL                        0xf36c
++#define STB0899_BASE_IMB_CNTRL                        0x00000020
++#define STB0899_PHS_ADAPT_LSHFT                       (0x07 << 4)
++#define STB0899_OFFST_PHS_ADAPT_LSHFT         4
++#define STB0899_WIDTH_PHS_ADAPT_LSHFT         3
++#define STB0899_AMPL_ADAPT_LSHFT              (0x07 << 1)
++#define STB0899_OFFST_AMPL_ADAPT_LSHFT                1
++#define STB0899_WIDTH_AMPL_ADAPT_LSHFT                3
++#define STB0899_IMB_COMP                      (0x01 << 0)
++#define STB0899_OFFST_IMB_COMP                        0
++#define STB0899_WIDTH_IMB_COMP                        1
++
++#define STB0899_OFF0_IF_AGC_CNTRL2            0xf374
++#define STB0899_BASE_IF_AGC_CNTRL2            0x00000020
++#define STB0899_IF_AGC_LOCK_TH                        (0xff << 11)
++#define STB0899_OFFST_IF_AGC_LOCK_TH          11
++#define STB0899_WIDTH_IF_AGC_LOCK_TH          8
++#define STB0899_IF_AGC_SD_DIV                 (0xff << 3)
++#define STB0899_OFFST_IF_AGC_SD_DIV           3
++#define STB0899_WIDTH_IF_AGC_SD_DIV           8
++#define STB0899_IF_AGC_DUMP_PER                       (0x07 << 0)
++#define STB0899_OFFST_IF_AGC_DUMP_PER         0
++#define STB0899_WIDTH_IF_AGC_DUMP_PER         3
++
++#define STB0899_OFF0_DMD_CNTRL2                       0xf378
++#define STB0899_BASE_DMD_CNTRL2                       0x00000020
++#define STB0899_SPECTRUM_INVERT                       (0x01 << 2)
++#define STB0899_OFFST_SPECTRUM_INVERT         2
++#define STB0899_WIDTH_SPECTRUM_INVERT         1
++#define STB0899_AGC_MODE                      (0x01 << 1)
++#define STB0899_OFFST_AGC_MODE                        1
++#define STB0899_WIDTH_AGC_MODE                        1
++#define STB0899_CRL_FREQ_ADJ                  (0x01 << 0)
++#define STB0899_OFFST_CRL_FREQ_ADJ            0
++#define STB0899_WIDTH_CRL_FREQ_ADJ            1
++
++#define STB0899_OFF0_TP_BUFFER                        0xf300
++#define STB0899_BASE_TP_BUFFER                        0x00000040
++#define STB0899_TP_BUFFER_IN                  (0xffff << 0)
++#define STB0899_OFFST_TP_BUFFER_IN            0
++#define STB0899_WIDTH_TP_BUFFER_IN            16
++
++#define STB0899_OFF0_TP_BUFFER1                       0xf304
++#define STB0899_BASE_TP_BUFFER1                       0x00000040
++#define STB0899_OFF0_TP_BUFFER2                       0xf308
++#define STB0899_BASE_TP_BUFFER2                       0x00000040
++#define STB0899_OFF0_TP_BUFFER3                       0xf30c
++#define STB0899_BASE_TP_BUFFER3                       0x00000040
++#define STB0899_OFF0_TP_BUFFER4                       0xf310
++#define STB0899_BASE_TP_BUFFER4                       0x00000040
++#define STB0899_OFF0_TP_BUFFER5                       0xf314
++#define STB0899_BASE_TP_BUFFER5                       0x00000040
++#define STB0899_OFF0_TP_BUFFER6                       0xf318
++#define STB0899_BASE_TP_BUFFER6                       0x00000040
++#define STB0899_OFF0_TP_BUFFER7                       0xf31c
++#define STB0899_BASE_TP_BUFFER7                       0x00000040
++#define STB0899_OFF0_TP_BUFFER8                       0xf320
++#define STB0899_BASE_TP_BUFFER8                       0x00000040
++#define STB0899_OFF0_TP_BUFFER9                       0xf324
++#define STB0899_BASE_TP_BUFFER9                       0x00000040
++#define STB0899_OFF0_TP_BUFFER10              0xf328
++#define STB0899_BASE_TP_BUFFER10              0x00000040
++#define STB0899_OFF0_TP_BUFFER11              0xf32c
++#define STB0899_BASE_TP_BUFFER11              0x00000040
++#define STB0899_OFF0_TP_BUFFER12              0xf330
++#define STB0899_BASE_TP_BUFFER12              0x00000040
++#define STB0899_OFF0_TP_BUFFER13              0xf334
++#define STB0899_BASE_TP_BUFFER13              0x00000040
++#define STB0899_OFF0_TP_BUFFER14              0xf338
++#define STB0899_BASE_TP_BUFFER14              0x00000040
++#define STB0899_OFF0_TP_BUFFER15              0xf33c
++#define STB0899_BASE_TP_BUFFER15              0x00000040
++#define STB0899_OFF0_TP_BUFFER16              0xf340
++#define STB0899_BASE_TP_BUFFER16              0x00000040
++#define STB0899_OFF0_TP_BUFFER17              0xf344
++#define STB0899_BASE_TP_BUFFER17              0x00000040
++#define STB0899_OFF0_TP_BUFFER18              0xf348
++#define STB0899_BASE_TP_BUFFER18              0x00000040
++#define STB0899_OFF0_TP_BUFFER19              0xf34c
++#define STB0899_BASE_TP_BUFFER19              0x00000040
++#define STB0899_OFF0_TP_BUFFER20              0xf350
++#define STB0899_BASE_TP_BUFFER20              0x00000040
++#define STB0899_OFF0_TP_BUFFER21              0xf354
++#define STB0899_BASE_TP_BUFFER21              0x00000040
++#define STB0899_OFF0_TP_BUFFER22              0xf358
++#define STB0899_BASE_TP_BUFFER22              0x00000040
++#define STB0899_OFF0_TP_BUFFER23              0xf35c
++#define STB0899_BASE_TP_BUFFER23              0x00000040
++#define STB0899_OFF0_TP_BUFFER24              0xf360
++#define STB0899_BASE_TP_BUFFER24              0x00000040
++#define STB0899_OFF0_TP_BUFFER25              0xf364
++#define STB0899_BASE_TP_BUFFER25              0x00000040
++#define STB0899_OFF0_TP_BUFFER26              0xf368
++#define STB0899_BASE_TP_BUFFER26              0x00000040
++#define STB0899_OFF0_TP_BUFFER27              0xf36c
++#define STB0899_BASE_TP_BUFFER27              0x00000040
++#define STB0899_OFF0_TP_BUFFER28              0xf370
++#define STB0899_BASE_TP_BUFFER28              0x00000040
++#define STB0899_OFF0_TP_BUFFER29              0xf374
++#define STB0899_BASE_TP_BUFFER29              0x00000040
++#define STB0899_OFF0_TP_BUFFER30              0xf378
++#define STB0899_BASE_TP_BUFFER30              0x00000040
++#define STB0899_OFF0_TP_BUFFER31              0xf37c
++#define STB0899_BASE_TP_BUFFER31              0x00000040
++#define STB0899_OFF0_TP_BUFFER32              0xf300
++#define STB0899_BASE_TP_BUFFER32              0x00000060
++#define STB0899_OFF0_TP_BUFFER33              0xf304
++#define STB0899_BASE_TP_BUFFER33              0x00000060
++#define STB0899_OFF0_TP_BUFFER34              0xf308
++#define STB0899_BASE_TP_BUFFER34              0x00000060
++#define STB0899_OFF0_TP_BUFFER35              0xf30c
++#define STB0899_BASE_TP_BUFFER35              0x00000060
++#define STB0899_OFF0_TP_BUFFER36              0xf310
++#define STB0899_BASE_TP_BUFFER36              0x00000060
++#define STB0899_OFF0_TP_BUFFER37              0xf314
++#define STB0899_BASE_TP_BUFFER37              0x00000060
++#define STB0899_OFF0_TP_BUFFER38              0xf318
++#define STB0899_BASE_TP_BUFFER38              0x00000060
++#define STB0899_OFF0_TP_BUFFER39              0xf31c
++#define STB0899_BASE_TP_BUFFER39              0x00000060
++#define STB0899_OFF0_TP_BUFFER40              0xf320
++#define STB0899_BASE_TP_BUFFER40              0x00000060
++#define STB0899_OFF0_TP_BUFFER41              0xf324
++#define STB0899_BASE_TP_BUFFER41              0x00000060
++#define STB0899_OFF0_TP_BUFFER42              0xf328
++#define STB0899_BASE_TP_BUFFER42              0x00000060
++#define STB0899_OFF0_TP_BUFFER43              0xf32c
++#define STB0899_BASE_TP_BUFFER43              0x00000060
++#define STB0899_OFF0_TP_BUFFER44              0xf330
++#define STB0899_BASE_TP_BUFFER44              0x00000060
++#define STB0899_OFF0_TP_BUFFER45              0xf334
++#define STB0899_BASE_TP_BUFFER45              0x00000060
++#define STB0899_OFF0_TP_BUFFER46              0xf338
++#define STB0899_BASE_TP_BUFFER46              0x00000060
++#define STB0899_OFF0_TP_BUFFER47              0xf33c
++#define STB0899_BASE_TP_BUFFER47              0x00000060
++#define STB0899_OFF0_TP_BUFFER48              0xf340
++#define STB0899_BASE_TP_BUFFER48              0x00000060
++#define STB0899_OFF0_TP_BUFFER49              0xf344
++#define STB0899_BASE_TP_BUFFER49              0x00000060
++#define STB0899_OFF0_TP_BUFFER50              0xf348
++#define STB0899_BASE_TP_BUFFER50              0x00000060
++#define STB0899_OFF0_TP_BUFFER51              0xf34c
++#define STB0899_BASE_TP_BUFFER51              0x00000060
++#define STB0899_OFF0_TP_BUFFER52              0xf350
++#define STB0899_BASE_TP_BUFFER52              0x00000060
++#define STB0899_OFF0_TP_BUFFER53              0xf354
++#define STB0899_BASE_TP_BUFFER53              0x00000060
++#define STB0899_OFF0_TP_BUFFER54              0xf358
++#define STB0899_BASE_TP_BUFFER54              0x00000060
++#define STB0899_OFF0_TP_BUFFER55              0xf35c
++#define STB0899_BASE_TP_BUFFER55              0x00000060
++#define STB0899_OFF0_TP_BUFFER56              0xf360
++#define STB0899_BASE_TP_BUFFER56              0x00000060
++#define STB0899_OFF0_TP_BUFFER57              0xf364
++#define STB0899_BASE_TP_BUFFER57              0x00000060
++#define STB0899_OFF0_TP_BUFFER58              0xf368
++#define STB0899_BASE_TP_BUFFER58              0x00000060
++#define STB0899_OFF0_TP_BUFFER59              0xf36c
++#define STB0899_BASE_TP_BUFFER59              0x00000060
++#define STB0899_OFF0_TP_BUFFER60              0xf370
++#define STB0899_BASE_TP_BUFFER60              0x00000060
++#define STB0899_OFF0_TP_BUFFER61              0xf374
++#define STB0899_BASE_TP_BUFFER61              0x00000060
++#define STB0899_OFF0_TP_BUFFER62              0xf378
++#define STB0899_BASE_TP_BUFFER62              0x00000060
++#define STB0899_OFF0_TP_BUFFER63              0xf37c
++#define STB0899_BASE_TP_BUFFER63              0x00000060
++
++#define STB0899_OFF0_RESET_CNTRL              0xf300
++#define STB0899_BASE_RESET_CNTRL              0x00000400
++#define STB0899_DVBS2_RESET                   (0x01 << 0)
++#define STB0899_OFFST_DVBS2_RESET             0
++#define STB0899_WIDTH_DVBS2_RESET             1
++
++#define STB0899_OFF0_ACM_ENABLE                       0xf304
++#define STB0899_BASE_ACM_ENABLE                       0x00000400
++#define STB0899_ACM_ENABLE                    1
++
++#define STB0899_OFF0_DESCR_CNTRL              0xf30c
++#define STB0899_BASE_DESCR_CNTRL              0x00000400
++#define STB0899_OFFST_DESCR_CNTRL               0
++#define STB0899_WIDTH_DESCR_CNTRL               16
++
++#define STB0899_OFF0_UWP_CNTRL1                       0xf320
++#define STB0899_BASE_UWP_CNTRL1                       0x00000400
++#define STB0899_UWP_TH_SOF                    (0x7fff << 11)
++#define STB0899_OFFST_UWP_TH_SOF              11
++#define STB0899_WIDTH_UWP_TH_SOF              15
++#define STB0899_UWP_ESN0_QUANT                        (0xff << 3)
++#define STB0899_OFFST_UWP_ESN0_QUANT          3
++#define STB0899_WIDTH_UWP_ESN0_QUANT          8
++#define STB0899_UWP_ESN0_AVE                  (0x03 << 1)
++#define STB0899_OFFST_UWP_ESN0_AVE            1
++#define STB0899_WIDTH_UWP_ESN0_AVE            2
++#define STB0899_UWP_START                     (0x01 << 0)
++#define STB0899_OFFST_UWP_START                       0
++#define STB0899_WIDTH_UWP_START                       1
++
++#define STB0899_OFF0_UWP_CNTRL2                       0xf324
++#define STB0899_BASE_UWP_CNTRL2                       0x00000400
++#define STB0899_UWP_MISS_TH                   (0xff << 16)
++#define STB0899_OFFST_UWP_MISS_TH             16
++#define STB0899_WIDTH_UWP_MISS_TH             8
++#define STB0899_FE_FINE_TRK                   (0xff << 8)
++#define STB0899_OFFST_FE_FINE_TRK             8
++#define STB0899_WIDTH_FE_FINE_TRK             8
++#define STB0899_FE_COARSE_TRK                 (0xff << 0)
++#define STB0899_OFFST_FE_COARSE_TRK           0
++#define STB0899_WIDTH_FE_COARSE_TRK           8
++
++#define STB0899_OFF0_UWP_STAT1                        0xf328
++#define STB0899_BASE_UWP_STAT1                        0x00000400
++#define STB0899_UWP_STATE                     (0x03ff << 15)
++#define STB0899_OFFST_UWP_STATE                       15
++#define STB0899_WIDTH_UWP_STATE                       10
++#define STB0899_UW_MAX_PEAK                   (0x7fff << 0)
++#define STB0899_OFFST_UW_MAX_PEAK             0
++#define STB0899_WIDTH_UW_MAX_PEAK             15
++
++#define STB0899_OFF0_UWP_STAT2                        0xf32c
++#define STB0899_BASE_UWP_STAT2                        0x00000400
++#define STB0899_ESNO_EST                      (0x07ffff << 7)
++#define STB0899_OFFST_ESN0_EST                        7
++#define STB0899_WIDTH_ESN0_EST                        19
++#define STB0899_UWP_DECODE_MOD                        (0x7f << 0)
++#define STB0899_OFFST_UWP_DECODE_MOD          0
++#define STB0899_WIDTH_UWP_DECODE_MOD          7
++
++#define STB0899_OFF0_DMD_CORE_ID              0xf334
++#define STB0899_BASE_DMD_CORE_ID              0x00000400
++#define STB0899_CORE_ID                               (0xffffffff << 0)
++#define STB0899_OFFST_CORE_ID                 0
++#define STB0899_WIDTH_CORE_ID                 32
++
++#define STB0899_OFF0_DMD_VERSION_ID           0xf33c
++#define STB0899_BASE_DMD_VERSION_ID           0x00000400
++#define STB0899_VERSION_ID                    (0xff << 0)
++#define STB0899_OFFST_VERSION_ID              0
++#define STB0899_WIDTH_VERSION_ID              8
++
++#define STB0899_OFF0_DMD_STAT2                        0xf340
++#define STB0899_BASE_DMD_STAT2                        0x00000400
++#define STB0899_CSM_LOCK                      (0x01 << 1)
++#define STB0899_OFFST_CSM_LOCK                        1
++#define STB0899_WIDTH_CSM_LOCK                        1
++#define STB0899_UWP_LOCK                      (0x01 << 0)
++#define STB0899_OFFST_UWP_LOCK                        0
++#define STB0899_WIDTH_UWP_LOCK                        1
++
++#define STB0899_OFF0_FREQ_ADJ_SCALE           0xf344
++#define STB0899_BASE_FREQ_ADJ_SCALE           0x00000400
++#define STB0899_FREQ_ADJ_SCALE                        (0x0fff << 0)
++#define STB0899_OFFST_FREQ_ADJ_SCALE          0
++#define STB0899_WIDTH_FREQ_ADJ_SCALE          12
++
++#define STB0899_OFF0_UWP_CNTRL3                       0xf34c
++#define STB0899_BASE_UWP_CNTRL3                       0x00000400
++#define STB0899_UWP_TH_TRACK                  (0x7fff << 15)
++#define STB0899_OFFST_UWP_TH_TRACK            15
++#define STB0899_WIDTH_UWP_TH_TRACK            15
++#define STB0899_UWP_TH_ACQ                    (0x7fff << 0)
++#define STB0899_OFFST_UWP_TH_ACQ              0
++#define STB0899_WIDTH_UWP_TH_ACQ              15
++
++#define STB0899_OFF0_SYM_CLK_SEL              0xf350
++#define STB0899_BASE_SYM_CLK_SEL              0x00000400
++#define STB0899_SYM_CLK_SEL                   (0x03 << 0)
++#define STB0899_OFFST_SYM_CLK_SEL             0
++#define STB0899_WIDTH_SYM_CLK_SEL             2
++
++#define STB0899_OFF0_SOF_SRCH_TO              0xf354
++#define STB0899_BASE_SOF_SRCH_TO              0x00000400
++#define STB0899_SOF_SEARCH_TIMEOUT            (0x3fffff << 0)
++#define STB0899_OFFST_SOF_SEARCH_TIMEOUT      0
++#define STB0899_WIDTH_SOF_SEARCH_TIMEOUT      22
++
++#define STB0899_OFF0_ACQ_CNTRL1                       0xf358
++#define STB0899_BASE_ACQ_CNTRL1                       0x00000400
++#define STB0899_FE_FINE_ACQ                   (0xff << 8)
++#define STB0899_OFFST_FE_FINE_ACQ             8
++#define STB0899_WIDTH_FE_FINE_ACQ             8
++#define STB0899_FE_COARSE_ACQ                 (0xff << 0)
++#define STB0899_OFFST_FE_COARSE_ACQ           0
++#define STB0899_WIDTH_FE_COARSE_ACQ           8
++
++#define STB0899_OFF0_ACQ_CNTRL2                       0xf35c
++#define STB0899_BASE_ACQ_CNTRL2                       0x00000400
++#define STB0899_ZIGZAG                                (0x01 << 25)
++#define STB0899_OFFST_ZIGZAG                  25
++#define STB0899_WIDTH_ZIGZAG                  1
++#define STB0899_NUM_STEPS                     (0xff << 17)
++#define STB0899_OFFST_NUM_STEPS                       17
++#define STB0899_WIDTH_NUM_STEPS                       8
++#define STB0899_FREQ_STEPSIZE                 (0x1ffff << 0)
++#define STB0899_OFFST_FREQ_STEPSIZE           0
++#define STB0899_WIDTH_FREQ_STEPSIZE           17
++
++#define STB0899_OFF0_ACQ_CNTRL3                       0xf360
++#define STB0899_BASE_ACQ_CNTRL3                       0x00000400
++#define STB0899_THRESHOLD_SCL                 (0x3f << 23)
++#define STB0899_OFFST_THRESHOLD_SCL           23
++#define STB0899_WIDTH_THRESHOLD_SCL           6
++#define STB0899_UWP_TH_SRCH                   (0x7fff << 8)
++#define STB0899_OFFST_UWP_TH_SRCH             8
++#define STB0899_WIDTH_UWP_TH_SRCH             15
++#define STB0899_AUTO_REACQUIRE                        (0x01 << 7)
++#define STB0899_OFFST_AUTO_REACQUIRE          7
++#define STB0899_WIDTH_AUTO_REACQUIRE          1
++#define STB0899_TRACK_LOCK_SEL                        (0x01 << 6)
++#define STB0899_OFFST_TRACK_LOCK_SEL          6
++#define STB0899_WIDTH_TRACK_LOCK_SEL          1
++#define STB0899_ACQ_SEARCH_MODE                       (0x03 << 4)
++#define STB0899_OFFST_ACQ_SEARCH_MODE         4
++#define STB0899_WIDTH_ACQ_SEARCH_MODE         2
++#define STB0899_CONFIRM_FRAMES                        (0x0f << 0)
++#define STB0899_OFFST_CONFIRM_FRAMES          0
++#define STB0899_WIDTH_CONFIRM_FRAMES          4
++
++#define STB0899_OFF0_FE_SETTLE                        0xf364
++#define STB0899_BASE_FE_SETTLE                        0x00000400
++#define STB0899_SETTLING_TIME                 (0x3fffff << 0)
++#define STB0899_OFFST_SETTLING_TIME           0
++#define STB0899_WIDTH_SETTLING_TIME           22
++
++#define STB0899_OFF0_AC_DWELL                 0xf368
++#define STB0899_BASE_AC_DWELL                 0x00000400
++#define STB0899_DWELL_TIME                    (0x3fffff << 0)
++#define STB0899_OFFST_DWELL_TIME              0
++#define STB0899_WIDTH_DWELL_TIME              22
++
++#define STB0899_OFF0_ACQUIRE_TRIG             0xf36c
++#define STB0899_BASE_ACQUIRE_TRIG             0x00000400
++#define STB0899_ACQUIRE                               (0x01 << 0)
++#define STB0899_OFFST_ACQUIRE                 0
++#define STB0899_WIDTH_ACQUIRE                 1
++
++#define STB0899_OFF0_LOCK_LOST                        0xf370
++#define STB0899_BASE_LOCK_LOST                        0x00000400
++#define STB0899_LOCK_LOST                     (0x01 << 0)
++#define STB0899_OFFST_LOCK_LOST                       0
++#define STB0899_WIDTH_LOCK_LOST                       1
++
++#define STB0899_OFF0_ACQ_STAT1                        0xf374
++#define STB0899_BASE_ACQ_STAT1                        0x00000400
++#define STB0899_STEP_FREQ                     (0x1fffff << 11)
++#define STB0899_OFFST_STEP_FREQ                       11
++#define STB0899_WIDTH_STEP_FREQ                       21
++#define STB0899_ACQ_STATE                     (0x07 << 8)
++#define STB0899_OFFST_ACQ_STATE                       8
++#define STB0899_WIDTH_ACQ_STATE                       3
++#define STB0899_UW_DETECT_COUNT                       (0xff << 0)
++#define STB0899_OFFST_UW_DETECT_COUNT         0
++#define STB0899_WIDTH_UW_DETECT_COUNT         8
++
++#define STB0899_OFF0_ACQ_TIMEOUT              0xf378
++#define STB0899_BASE_ACQ_TIMEOUT              0x00000400
++#define STB0899_ACQ_TIMEOUT                   (0x3fffff << 0)
++#define STB0899_OFFST_ACQ_TIMEOUT             0
++#define STB0899_WIDTH_ACQ_TIMEOUT             22
++
++#define STB0899_OFF0_ACQ_TIME                 0xf37c
++#define STB0899_BASE_ACQ_TIME                 0x00000400
++#define STB0899_ACQ_TIME_SYM                  (0xffffff << 0)
++#define STB0899_OFFST_ACQ_TIME_SYM            0
++#define STB0899_WIDTH_ACQ_TIME_SYM            24
++
++#define STB0899_OFF0_FINAL_AGC_CNTRL          0xf308
++#define STB0899_BASE_FINAL_AGC_CNTRL          0x00000440
++#define STB0899_FINAL_GAIN_INIT                       (0x3fff << 12)
++#define STB0899_OFFST_FINAL_GAIN_INIT         12
++#define STB0899_WIDTH_FINAL_GAIN_INIT         14
++#define STB0899_FINAL_LOOP_GAIN                       (0x0f << 8)
++#define STB0899_OFFST_FINAL_LOOP_GAIN         8
++#define STB0899_WIDTH_FINAL_LOOP_GAIN         4
++#define STB0899_FINAL_LD_GAIN_INIT            (0x01 << 7)
++#define STB0899_OFFST_FINAL_LD_GAIN_INIT      7
++#define STB0899_WIDTH_FINAL_LD_GAIN_INIT      1
++#define STB0899_FINAL_AGC_REF                 (0x7f << 0)
++#define STB0899_OFFST_FINAL_AGC_REF           0
++#define STB0899_WIDTH_FINAL_AGC_REF           7
++
++#define STB0899_OFF0_FINAL_AGC_GAIN           0xf30c
++#define STB0899_BASE_FINAL_AGC_GAIN           0x00000440
++#define STB0899_FINAL_AGC_GAIN                        (0x3fff << 0)
++#define STB0899_OFFST_FINAL_AGC_GAIN          0
++#define STB0899_WIDTH_FINAL_AGC_GAIN          14
++
++#define STB0899_OFF0_EQUALIZER_INIT           0xf310
++#define STB0899_BASE_EQUALIZER_INIT           0x00000440
++#define STB0899_EQ_SRST                               (0x01 << 1)
++#define STB0899_OFFST_EQ_SRST                 1
++#define STB0899_WIDTH_EQ_SRST                 1
++#define STB0899_EQ_INIT                               (0x01 << 0)
++#define STB0899_OFFST_EQ_INIT                 0
++#define STB0899_WIDTH_EQ_INIT                 1
++
++#define STB0899_OFF0_EQ_CNTRL                 0xf314
++#define STB0899_BASE_EQ_CNTRL                 0x00000440
++#define STB0899_EQ_ADAPT_MODE                 (0x01 << 18)
++#define STB0899_OFFST_EQ_ADAPT_MODE           18
++#define STB0899_WIDTH_EQ_ADAPT_MODE           1
++#define STB0899_EQ_DELAY                      (0x0f << 14)
++#define STB0899_OFFST_EQ_DELAY                        14
++#define STB0899_WIDTH_EQ_DELAY                        4
++#define STB0899_EQ_QUANT_LEVEL                        (0xff << 6)
++#define STB0899_OFFST_EQ_QUANT_LEVEL          6
++#define STB0899_WIDTH_EQ_QUANT_LEVEL          8
++#define STB0899_EQ_DISABLE_UPDATE             (0x01 << 5)
++#define STB0899_OFFST_EQ_DISABLE_UPDATE               5
++#define STB0899_WIDTH_EQ_DISABLE_UPDATE               1
++#define STB0899_EQ_BYPASS                     (0x01 << 4)
++#define STB0899_OFFST_EQ_BYPASS                       4
++#define STB0899_WIDTH_EQ_BYPASS                       1
++#define STB0899_EQ_SHIFT                      (0x0f << 0)
++#define STB0899_OFFST_EQ_SHIFT                        0
++#define STB0899_WIDTH_EQ_SHIFT                        4
++
++#define STB0899_OFF0_EQ_I_INIT_COEFF_0                0xf320
++#define STB0899_OFF1_EQ_I_INIT_COEFF_1                0xf324
++#define STB0899_OFF2_EQ_I_INIT_COEFF_2                0xf328
++#define STB0899_OFF3_EQ_I_INIT_COEFF_3                0xf32c
++#define STB0899_OFF4_EQ_I_INIT_COEFF_4                0xf330
++#define STB0899_OFF5_EQ_I_INIT_COEFF_5                0xf334
++#define STB0899_OFF6_EQ_I_INIT_COEFF_6                0xf338
++#define STB0899_OFF7_EQ_I_INIT_COEFF_7                0xf33c
++#define STB0899_OFF8_EQ_I_INIT_COEFF_8                0xf340
++#define STB0899_OFF9_EQ_I_INIT_COEFF_9                0xf344
++#define STB0899_OFFa_EQ_I_INIT_COEFF_10               0xf348
++#define STB0899_BASE_EQ_I_INIT_COEFF_N                0x00000440
++#define STB0899_EQ_I_INIT_COEFF_N             (0x0fff << 0)
++#define STB0899_OFFST_EQ_I_INIT_COEFF_N               0
++#define STB0899_WIDTH_EQ_I_INIT_COEFF_N               12
++
++#define STB0899_OFF0_EQ_Q_INIT_COEFF_0                0xf350
++#define STB0899_OFF1_EQ_Q_INIT_COEFF_1                0xf354
++#define STB0899_OFF2_EQ_Q_INIT_COEFF_2                0xf358
++#define STB0899_OFF3_EQ_Q_INIT_COEFF_3                0xf35c
++#define STB0899_OFF4_EQ_Q_INIT_COEFF_4                0xf360
++#define STB0899_OFF5_EQ_Q_INIT_COEFF_5                0xf364
++#define STB0899_OFF6_EQ_Q_INIT_COEFF_6                0xf368
++#define STB0899_OFF7_EQ_Q_INIT_COEFF_7                0xf36c
++#define STB0899_OFF8_EQ_Q_INIT_COEFF_8                0xf370
++#define STB0899_OFF9_EQ_Q_INIT_COEFF_9                0xf374
++#define STB0899_OFFa_EQ_Q_INIT_COEFF_10               0xf378
++#define STB0899_BASE_EQ_Q_INIT_COEFF_N                0x00000440
++#define STB0899_EQ_Q_INIT_COEFF_N             (0x0fff << 0)
++#define STB0899_OFFST_EQ_Q_INIT_COEFF_N               0
++#define STB0899_WIDTH_EQ_Q_INIT_COEFF_N               12
++
++#define STB0899_OFF0_EQ_I_OUT_COEFF_0         0xf300
++#define STB0899_OFF1_EQ_I_OUT_COEFF_1         0xf304
++#define STB0899_OFF2_EQ_I_OUT_COEFF_2         0xf308
++#define STB0899_OFF3_EQ_I_OUT_COEFF_3         0xf30c
++#define STB0899_OFF4_EQ_I_OUT_COEFF_4         0xf310
++#define STB0899_OFF5_EQ_I_OUT_COEFF_5         0xf314
++#define STB0899_OFF6_EQ_I_OUT_COEFF_6         0xf318
++#define STB0899_OFF7_EQ_I_OUT_COEFF_7         0xf31c
++#define STB0899_OFF8_EQ_I_OUT_COEFF_8         0xf320
++#define STB0899_OFF9_EQ_I_OUT_COEFF_9         0xf324
++#define STB0899_OFFa_EQ_I_OUT_COEFF_10                0xf328
++#define STB0899_BASE_EQ_I_OUT_COEFF_N         0x00000460
++#define STB0899_EQ_I_OUT_COEFF_N              (0x0fff << 0)
++#define STB0899_OFFST_EQ_I_OUT_COEFF_N                0
++#define STB0899_WIDTH_EQ_I_OUT_COEFF_N                12
++
++#define STB0899_OFF0_EQ_Q_OUT_COEFF_0         0xf330
++#define STB0899_OFF1_EQ_Q_OUT_COEFF_1         0xf334
++#define STB0899_OFF2_EQ_Q_OUT_COEFF_2         0xf338
++#define STB0899_OFF3_EQ_Q_OUT_COEFF_3         0xf33c
++#define STB0899_OFF4_EQ_Q_OUT_COEFF_4         0xf340
++#define STB0899_OFF5_EQ_Q_OUT_COEFF_5         0xf344
++#define STB0899_OFF6_EQ_Q_OUT_COEFF_6         0xf348
++#define STB0899_OFF7_EQ_Q_OUT_COEFF_7         0xf34c
++#define STB0899_OFF8_EQ_Q_OUT_COEFF_8         0xf350
++#define STB0899_OFF9_EQ_Q_OUT_COEFF_9         0xf354
++#define STB0899_OFFa_EQ_Q_OUT_COEFF_10                0xf358
++#define STB0899_BASE_EQ_Q_OUT_COEFF_N         0x00000460
++#define STB0899_EQ_Q_OUT_COEFF_N              (0x0fff << 0)
++#define STB0899_OFFST_EQ_Q_OUT_COEFF_N                0
++#define STB0899_WIDTH_EQ_Q_OUT_COEFF_N                12
++
++/*    S2 FEC  */
++#define STB0899_OFF0_BLOCK_LNGTH              0xfa04
++#define STB0899_BASE_BLOCK_LNGTH              0x00000000
++#define STB0899_BLOCK_LENGTH                  (0xff << 0)
++#define STB0899_OFFST_BLOCK_LENGTH            0
++#define STB0899_WIDTH_BLOCK_LENGTH            8
++
++#define STB0899_OFF0_ROW_STR                  0xfa08
++#define STB0899_BASE_ROW_STR                  0x00000000
++#define STB0899_ROW_STRIDE                    (0xff << 0)
++#define STB0899_OFFST_ROW_STRIDE              0
++#define STB0899_WIDTH_ROW_STRIDE              8
++
++#define STB0899_OFF0_MAX_ITER                 0xfa0c
++#define STB0899_BASE_MAX_ITER                 0x00000000
++#define STB0899_MAX_ITERATIONS                        (0xff << 0)
++#define STB0899_OFFST_MAX_ITERATIONS          0
++#define STB0899_WIDTH_MAX_ITERATIONS          8
++
++#define STB0899_OFF0_BN_END_ADDR              0xfa10
++#define STB0899_BASE_BN_END_ADDR              0x00000000
++#define STB0899_BN_END_ADDR                   (0x0fff << 0)
++#define STB0899_OFFST_BN_END_ADDR             0
++#define STB0899_WIDTH_BN_END_ADDR             12
++
++#define STB0899_OFF0_CN_END_ADDR              0xfa14
++#define STB0899_BASE_CN_END_ADDR              0x00000000
++#define STB0899_CN_END_ADDR                   (0x0fff << 0)
++#define STB0899_OFFST_CN_END_ADDR             0
++#define STB0899_WIDTH_CN_END_ADDR             12
++
++#define STB0899_OFF0_INFO_LENGTH              0xfa1c
++#define STB0899_BASE_INFO_LENGTH              0x00000000
++#define STB0899_INFO_LENGTH                   (0xff << 0)
++#define STB0899_OFFST_INFO_LENGTH             0
++#define STB0899_WIDTH_INFO_LENGTH             8
++
++#define STB0899_OFF0_BOT_ADDR                 0xfa20
++#define STB0899_BASE_BOT_ADDR                 0x00000000
++#define STB0899_BOTTOM_BASE_ADDR              (0x03ff << 0)
++#define STB0899_OFFST_BOTTOM_BASE_ADDR                0
++#define STB0899_WIDTH_BOTTOM_BASE_ADDR                10
++
++#define STB0899_OFF0_BCH_BLK_LN                       0xfa24
++#define STB0899_BASE_BCH_BLK_LN                       0x00000000
++#define STB0899_BCH_BLOCK_LENGTH              (0xffff << 0)
++#define STB0899_OFFST_BCH_BLOCK_LENGTH                0
++#define STB0899_WIDTH_BCH_BLOCK_LENGTH                16
++
++#define STB0899_OFF0_BCH_T                    0xfa28
++#define STB0899_BASE_BCH_T                    0x00000000
++#define STB0899_BCH_T                         (0x0f << 0)
++#define STB0899_OFFST_BCH_T                   0
++#define STB0899_WIDTH_BCH_T                   4
++
++#define STB0899_OFF0_CNFG_MODE                        0xfa00
++#define STB0899_BASE_CNFG_MODE                        0x00000800
++#define STB0899_MODCOD                                (0x1f << 2)
++#define STB0899_OFFST_MODCOD                  2
++#define STB0899_WIDTH_MODCOD                  5
++#define STB0899_MODCOD_SEL                    (0x01 << 1)
++#define STB0899_OFFST_MODCOD_SEL              1
++#define STB0899_WIDTH_MODCOD_SEL              1
++#define STB0899_CONFIG_MODE                   (0x01 << 0)
++#define STB0899_OFFST_CONFIG_MODE             0
++#define STB0899_WIDTH_CONFIG_MODE             1
++
++#define STB0899_OFF0_LDPC_STAT                        0xfa04
++#define STB0899_BASE_LDPC_STAT                        0x00000800
++#define STB0899_ITERATION                     (0xff << 3)
++#define STB0899_OFFST_ITERATION                       3
++#define STB0899_WIDTH_ITERATION                       8
++#define STB0899_LDPC_DEC_STATE                        (0x07 << 0)
++#define STB0899_OFFST_LDPC_DEC_STATE          0
++#define STB0899_WIDTH_LDPC_DEC_STATE          3
++
++#define STB0899_OFF0_ITER_SCALE                       0xfa08
++#define STB0899_BASE_ITER_SCALE                       0x00000800
++#define STB0899_ITERATION_SCALE                       (0xff << 0)
++#define STB0899_OFFST_ITERATION_SCALE         0
++#define STB0899_WIDTH_ITERATION_SCALE         8
++
++#define STB0899_OFF0_INPUT_MODE                       0xfa0c
++#define STB0899_BASE_INPUT_MODE                       0x00000800
++#define STB0899_SD_BLOCK1_STREAM0             (0x01 << 0)
++#define STB0899_OFFST_SD_BLOCK1_STREAM0               0
++#define STB0899_WIDTH_SD_BLOCK1_STREAM0               1
++
++#define STB0899_OFF0_LDPCDECRST                       0xfa10
++#define STB0899_BASE_LDPCDECRST                       0x00000800
++#define STB0899_LDPC_DEC_RST                  (0x01 << 0)
++#define STB0899_OFFST_LDPC_DEC_RST            0
++#define STB0899_WIDTH_LDPC_DEC_RST            1
++
++#define STB0899_OFF0_CLK_PER_BYTE_RW          0xfa14
++#define STB0899_BASE_CLK_PER_BYTE_RW          0x00000800
++#define STB0899_CLKS_PER_BYTE                 (0x0f << 0)
++#define STB0899_OFFST_CLKS_PER_BYTE           0
++#define STB0899_WIDTH_CLKS_PER_BYTE           5
++
++#define STB0899_OFF0_BCH_ERRORS                       0xfa18
++#define STB0899_BASE_BCH_ERRORS                       0x00000800
++#define STB0899_BCH_ERRORS                    (0x0f << 0)
++#define STB0899_OFFST_BCH_ERRORS              0
++#define STB0899_WIDTH_BCH_ERRORS              4
++
++#define STB0899_OFF0_LDPC_ERRORS              0xfa1c
++#define STB0899_BASE_LDPC_ERRORS              0x00000800
++#define STB0899_LDPC_ERRORS                   (0xffff << 0)
++#define STB0899_OFFST_LDPC_ERRORS             0
++#define STB0899_WIDTH_LDPC_ERRORS             16
++
++#define STB0899_OFF0_BCH_MODE                 0xfa20
++#define STB0899_BASE_BCH_MODE                 0x00000800
++#define STB0899_BCH_CORRECT_N                 (0x01 << 1)
++#define STB0899_OFFST_BCH_CORRECT_N           1
++#define STB0899_WIDTH_BCH_CORRECT_N           1
++#define STB0899_FULL_BYPASS                   (0x01 << 0)
++#define STB0899_OFFST_FULL_BYPASS             0
++#define STB0899_WIDTH_FULL_BYPASS             1
++
++#define STB0899_OFF0_ERR_ACC_PER              0xfa24
++#define STB0899_BASE_ERR_ACC_PER              0x00000800
++#define STB0899_BCH_ERR_ACC_PERIOD            (0x0f << 0)
++#define STB0899_OFFST_BCH_ERR_ACC_PERIOD      0
++#define STB0899_WIDTH_BCH_ERR_ACC_PERIOD      4
++
++#define STB0899_OFF0_BCH_ERR_ACC              0xfa28
++#define STB0899_BASE_BCH_ERR_ACC              0x00000800
++#define STB0899_BCH_ERR_ACCUM                 (0xff << 0)
++#define STB0899_OFFST_BCH_ERR_ACCUM           0
++#define STB0899_WIDTH_BCH_ERR_ACCUM           8
++
++#define STB0899_OFF0_FEC_CORE_ID_REG          0xfa2c
++#define STB0899_BASE_FEC_CORE_ID_REG          0x00000800
++#define STB0899_FEC_CORE_ID                   (0xffffffff << 0)
++#define STB0899_OFFST_FEC_CORE_ID             0
++#define STB0899_WIDTH_FEC_CORE_ID             32
++
++#define STB0899_OFF0_FEC_VER_ID_REG           0xfa34
++#define STB0899_BASE_FEC_VER_ID_REG           0x00000800
++#define STB0899_FEC_VER_ID                    (0xff << 0)
++#define STB0899_OFFST_FEC_VER_ID              0
++#define STB0899_WIDTH_FEC_VER_ID              8
++
++#define STB0899_OFF0_FEC_TP_SEL                       0xfa38
++#define STB0899_BASE_FEC_TP_SEL                       0x00000800
++
++#define STB0899_OFF0_CSM_CNTRL1                       0xf310
++#define STB0899_BASE_CSM_CNTRL1                       0x00000400
++#define STB0899_CSM_FORCE_FREQLOCK            (0x01 << 19)
++#define STB0899_OFFST_CSM_FORCE_FREQLOCK      19
++#define STB0899_WIDTH_CSM_FORCE_FREQLOCK      1
++#define STB0899_CSM_FREQ_LOCKSTATE            (0x01 << 18)
++#define STB0899_OFFST_CSM_FREQ_LOCKSTATE      18
++#define STB0899_WIDTH_CSM_FREQ_LOCKSTATE      1
++#define STB0899_CSM_AUTO_PARAM                        (0x01 << 17)
++#define STB0899_OFFST_CSM_AUTO_PARAM          17
++#define STB0899_WIDTH_CSM_AUTO_PARAM          1
++#define STB0899_FE_LOOP_SHIFT                 (0x07 << 14)
++#define STB0899_OFFST_FE_LOOP_SHIFT           14
++#define STB0899_WIDTH_FE_LOOP_SHIFT           3
++#define STB0899_CSM_AGC_SHIFT                 (0x07 << 11)
++#define STB0899_OFFST_CSM_AGC_SHIFT           11
++#define STB0899_WIDTH_CSM_AGC_SHIFT           3
++#define STB0899_CSM_AGC_GAIN                  (0x1ff << 2)
++#define STB0899_OFFST_CSM_AGC_GAIN            2
++#define STB0899_WIDTH_CSM_AGC_GAIN            9
++#define STB0899_CSM_TWO_PASS                  (0x01 << 1)
++#define STB0899_OFFST_CSM_TWO_PASS            1
++#define STB0899_WIDTH_CSM_TWO_PASS            1
++#define STB0899_CSM_DVT_TABLE                 (0x01 << 0)
++#define STB0899_OFFST_CSM_DVT_TABLE           0
++#define STB0899_WIDTH_CSM_DVT_TABLE           1
++
++#define STB0899_OFF0_CSM_CNTRL2                       0xf314
++#define STB0899_BASE_CSM_CNTRL2                       0x00000400
++#define STB0899_CSM_GAMMA_RHO_ACQ             (0x1ff << 9)
++#define STB0899_OFFST_CSM_GAMMA_RHOACQ                9
++#define STB0899_WIDTH_CSM_GAMMA_RHOACQ                9
++#define STB0899_CSM_GAMMA_ACQ                 (0x1ff << 0)
++#define STB0899_OFFST_CSM_GAMMA_ACQ           0
++#define STB0899_WIDTH_CSM_GAMMA_ACQ           9
++
++#define STB0899_OFF0_CSM_CNTRL3                       0xf318
++#define STB0899_BASE_CSM_CNTRL3                       0x00000400
++#define STB0899_CSM_GAMMA_RHO_TRACK           (0x1ff << 9)
++#define STB0899_OFFST_CSM_GAMMA_RHOTRACK      9
++#define STB0899_WIDTH_CSM_GAMMA_RHOTRACK      9
++#define STB0899_CSM_GAMMA_TRACK                       (0x1ff << 0)
++#define STB0899_OFFST_CSM_GAMMA_TRACK         0
++#define STB0899_WIDTH_CSM_GAMMA_TRACK         9
++
++#define STB0899_OFF0_CSM_CNTRL4                       0xf31c
++#define STB0899_BASE_CSM_CNTRL4                       0x00000400
++#define STB0899_CSM_PHASEDIFF_THRESH          (0x0f << 8)
++#define STB0899_OFFST_CSM_PHASEDIFF_THRESH    8
++#define STB0899_WIDTH_CSM_PHASEDIFF_THRESH    4
++#define STB0899_CSM_LOCKCOUNT_THRESH          (0xff << 0)
++#define STB0899_OFFST_CSM_LOCKCOUNT_THRESH    0
++#define STB0899_WIDTH_CSM_LOCKCOUNT_THRESH    8
++
++/*    Check on chapter 8 page 42      */
++#define STB0899_ERRCTRL1                      0xf574
++#define STB0899_ERRCTRL2                      0xf575
++#define STB0899_ERRCTRL3                      0xf576
++#define STB0899_ERR_SRC_S1                    (0x1f << 3)
++#define STB0899_OFFST_ERR_SRC_S1              3
++#define STB0899_WIDTH_ERR_SRC_S1              5
++#define STB0899_ERR_SRC_S2                    (0x0f << 0)
++#define STB0899_OFFST_ERR_SRC_S2              0
++#define STB0899_WIDTH_ERR_SRC_S2              4
++#define STB0899_NOE                           (0x07 << 0)
++#define STB0899_OFFST_NOE                     0
++#define STB0899_WIDTH_NOE                     3
++
++#define STB0899_ECNT1M                                0xf524
++#define STB0899_ECNT1L                                0xf525
++#define STB0899_ECNT2M                                0xf526
++#define STB0899_ECNT2L                                0xf527
++#define STB0899_ECNT3M                                0xf528
++#define STB0899_ECNT3L                                0xf529
++
++#define STB0899_DMONMSK1                      0xf57b
++#define STB0899_DMONMSK1_WAIT_1STEP           (1 << 7)
++#define STB0899_DMONMSK1_FREE_14              (1 << 6)
++#define STB0899_DMONMSK1_AVRGVIT_CALC         (1 << 5)
++#define STB0899_DMONMSK1_FREE_12              (1 << 4)
++#define STB0899_DMONMSK1_FREE_11              (1 << 3)
++#define STB0899_DMONMSK1_B0DIV_CALC           (1 << 2)
++#define STB0899_DMONMSK1_KDIVB1_CALC          (1 << 1)
++#define STB0899_DMONMSK1_KDIVB2_CALC          (1 << 0)
++
++#define STB0899_DMONMSK0                      0xf57c
++#define STB0899_DMONMSK0_SMOTTH_CALC          (1 << 7)
++#define STB0899_DMONMSK0_FREE_6                       (1 << 6)
++#define STB0899_DMONMSK0_SIGPOWER_CALC                (1 << 5)
++#define STB0899_DMONMSK0_QSEUIL_CALC          (1 << 4)
++#define STB0899_DMONMSK0_FREE_3                       (1 << 3)
++#define STB0899_DMONMSK0_FREE_2                       (1 << 2)
++#define STB0899_DMONMSK0_KVDIVB1_CALC         (1 << 1)
++#define STB0899_DMONMSK0_KVDIVB2_CALC         (1 << 0)
++
++#define STB0899_TSULC                         0xf549
++#define STB0899_ULNOSYNCBYTES                 (0x01 << 7)
++#define STB0899_OFFST_ULNOSYNCBYTES           7
++#define STB0899_WIDTH_ULNOSYNCBYTES           1
++#define STB0899_ULPARITY_ON                   (0x01 << 6)
++#define STB0899_OFFST_ULPARITY_ON             6
++#define STB0899_WIDTH_ULPARITY_ON             1
++#define STB0899_ULSYNCOUTRS                   (0x01 << 5)
++#define STB0899_OFFST_ULSYNCOUTRS             5
++#define STB0899_WIDTH_ULSYNCOUTRS             1
++#define STB0899_ULDSS_PACKETS                 (0x01 << 0)
++#define STB0899_OFFST_ULDSS_PACKETS           0
++#define STB0899_WIDTH_ULDSS_PACKETS           1
++
++#define STB0899_TSLPL                         0xf54b
++#define STB0899_LLDVBS2_MODE                  (0x01 << 4)
++#define STB0899_OFFST_LLDVBS2_MODE            4
++#define STB0899_WIDTH_LLDVBS2_MODE            1
++#define STB0899_LLISSYI_ON                    (0x01 << 3)
++#define STB0899_OFFST_LLISSYI_ON              3
++#define STB0899_WIDTH_LLISSYI_ON              1
++#define STB0899_LLNPD_ON                      (0x01 << 2)
++#define STB0899_OFFST_LLNPD_ON                        2
++#define STB0899_WIDTH_LLNPD_ON                        1
++#define STB0899_LLCRC8_ON                     (0x01 << 1)
++#define STB0899_OFFST_LLCRC8_ON                       1
++#define STB0899_WIDTH_LLCRC8_ON                       1
++
++#define STB0899_TSCFGH                                0xf54c
++#define STB0899_OUTRS_PS                      (0x01 << 6)
++#define STB0899_OFFST_OUTRS_PS                        6
++#define STB0899_WIDTH_OUTRS_PS                        1
++#define STB0899_SYNCBYTE                      (0x01 << 5)
++#define STB0899_OFFST_SYNCBYTE                        5
++#define STB0899_WIDTH_SYNCBYTE                        1
++#define STB0899_PFBIT                         (0x01 << 4)
++#define STB0899_OFFST_PFBIT                   4
++#define STB0899_WIDTH_PFBIT                   1
++#define STB0899_ERR_BIT                               (0x01 << 3)
++#define STB0899_OFFST_ERR_BIT                 3
++#define STB0899_WIDTH_ERR_BIT                 1
++#define STB0899_MPEG                          (0x01 << 2)
++#define STB0899_OFFST_MPEG                    2
++#define STB0899_WIDTH_MPEG                    1
++#define STB0899_CLK_POL                               (0x01 << 1)
++#define STB0899_OFFST_CLK_POL                 1
++#define STB0899_WIDTH_CLK_POL                 1
++#define STB0899_FORCE0                                (0x01 << 0)
++#define STB0899_OFFST_FORCE0                  0
++#define STB0899_WIDTH_FORCE0                  1
++
++#define STB0899_TSCFGM                                0xf54d
++#define STB0899_LLPRIORITY                    (0x01 << 3)
++#define STB0899_OFFST_LLPRIORIY                       3
++#define STB0899_WIDTH_LLPRIORITY              1
++#define STB0899_EN188                         (0x01 << 2)
++#define STB0899_OFFST_EN188                   2
++#define STB0899_WIDTH_EN188                   1
++
++#define STB0899_TSCFGL                                0xf54e
++#define STB0899_DEL_ERRPCK                    (0x01 << 7)
++#define STB0899_OFFST_DEL_ERRPCK              7
++#define STB0899_WIDTH_DEL_ERRPCK              1
++#define STB0899_ERRFLAGSTD                    (0x01 << 5)
++#define STB0899_OFFST_ERRFLAGSTD              5
++#define STB0899_WIDTH_ERRFLAGSTD              1
++#define STB0899_MPEGERR                               (0x01 << 4)
++#define STB0899_OFFST_MPEGERR                 4
++#define STB0899_WIDTH_MPEGERR                 1
++#define STB0899_BCH_CHK                               (0x01 << 3)
++#define STB0899_OFFST_BCH_CHK                 5
++#define STB0899_WIDTH_BCH_CHK                 1
++#define STB0899_CRC8CHK                               (0x01 << 2)
++#define STB0899_OFFST_CRC8CHK                 2
++#define STB0899_WIDTH_CRC8CHK                 1
++#define STB0899_SPEC_INFO                     (0x01 << 1)
++#define STB0899_OFFST_SPEC_INFO                       1
++#define STB0899_WIDTH_SPEC_INFO                       1
++#define STB0899_LOW_PRIO_CLK                  (0x01 << 0)
++#define STB0899_OFFST_LOW_PRIO_CLK            0
++#define STB0899_WIDTH_LOW_PRIO_CLK            1
++#define STB0899_ERROR_NORM                    (0x00 << 0)
++#define STB0899_OFFST_ERROR_NORM              0
++#define STB0899_WIDTH_ERROR_NORM              0
++
++#define STB0899_TSOUT                         0xf54f
++#define STB0899_RSSYNCDEL                     0xf550
++#define STB0899_TSINHDELH                     0xf551
++#define STB0899_TSINHDELM                     0xf552
++#define STB0899_TSINHDELL                     0xf553
++#define STB0899_TSLLSTKM                      0xf55a
++#define STB0899_TSLLSTKL                      0xf55b
++#define STB0899_TSULSTKM                      0xf55c
++#define STB0899_TSULSTKL                      0xf55d
++#define STB0899_TSSTATUS                      0xf561
++
++#define STB0899_PDELCTRL                      0xf600
++#define STB0899_INVERT_RES                    (0x01 << 7)
++#define STB0899_OFFST_INVERT_RES              7
++#define STB0899_WIDTH_INVERT_RES              1
++#define STB0899_FORCE_ACCEPTED                        (0x01 << 6)
++#define STB0899_OFFST_FORCE_ACCEPTED          6
++#define STB0899_WIDTH_FORCE_ACCEPTED          1
++#define STB0899_FILTER_EN                     (0x01 << 5)
++#define STB0899_OFFST_FILTER_EN                       5
++#define STB0899_WIDTH_FILTER_EN                       1
++#define STB0899_LOCKFALL_THRESH                       (0x01 << 4)
++#define STB0899_OFFST_LOCKFALL_THRESH         4
++#define STB0899_WIDTH_LOCKFALL_THRESH         1
++#define STB0899_HYST_EN                               (0x01 << 3)
++#define STB0899_OFFST_HYST_EN                 3
++#define STB0899_WIDTH_HYST_EN                 1
++#define STB0899_HYST_SWRST                    (0x01 << 2)
++#define STB0899_OFFST_HYST_SWRST              2
++#define STB0899_WIDTH_HYST_SWRST              1
++#define STB0899_ALGO_EN                               (0x01 << 1)
++#define STB0899_OFFST_ALGO_EN                 1
++#define STB0899_WIDTH_ALGO_EN                 1
++#define STB0899_ALGO_SWRST                    (0x01 << 0)
++#define STB0899_OFFST_ALGO_SWRST              0
++#define STB0899_WIDTH_ALGO_SWRST              1
++
++#define STB0899_PDELCTRL2                     0xf601
++#define STB0899_BBHCTRL1                      0xf602
++#define STB0899_BBHCTRL2                      0xf603
++#define STB0899_HYSTTHRESH                    0xf604
++
++#define STB0899_MATCSTM                               0xf605
++#define STB0899_MATCSTL                               0xf606
++#define STB0899_UPLCSTM                               0xf607
++#define STB0899_UPLCSTL                               0xf608
++#define STB0899_DFLCSTM                               0xf609
++#define STB0899_DFLCSTL                               0xf60a
++#define STB0899_SYNCCST                               0xf60b
++#define STB0899_SYNCDCSTM                     0xf60c
++#define STB0899_SYNCDCSTL                     0xf60d
++#define STB0899_ISI_ENTRY                     0xf60e
++#define STB0899_ISI_BIT_EN                    0xf60f
++#define STB0899_MATSTRM                               0xf610
++#define STB0899_MATSTRL                               0xf611
++#define STB0899_UPLSTRM                               0xf612
++#define STB0899_UPLSTRL                               0xf613
++#define STB0899_DFLSTRM                               0xf614
++#define STB0899_DFLSTRL                               0xf615
++#define STB0899_SYNCSTR                               0xf616
++#define STB0899_SYNCDSTRM                     0xf617
++#define STB0899_SYNCDSTRL                     0xf618
++
++#define STB0899_CFGPDELSTATUS1                        0xf619
++#define STB0899_BADDFL                                (0x01 << 6)
++#define STB0899_OFFST_BADDFL                  6
++#define STB0899_WIDTH_BADDFL                  1
++#define STB0899_CONTINUOUS_STREAM             (0x01 << 5)
++#define STB0899_OFFST_CONTINUOUS_STREAM               5
++#define STB0899_WIDTH_CONTINUOUS_STREAM               1
++#define STB0899_ACCEPTED_STREAM                       (0x01 << 4)
++#define STB0899_OFFST_ACCEPTED_STREAM         4
++#define STB0899_WIDTH_ACCEPTED_STREAM         1
++#define STB0899_BCH_ERRFLAG                   (0x01 << 3)
++#define STB0899_OFFST_BCH_ERRFLAG             3
++#define STB0899_WIDTH_BCH_ERRFLAG             1
++#define STB0899_CRCRES                                (0x01 << 2)
++#define STB0899_OFFST_CRCRES                  2
++#define STB0899_WIDTH_CRCRES                  1
++#define STB0899_CFGPDELSTATUS_LOCK            (0x01 << 1)
++#define STB0899_OFFST_CFGPDELSTATUS_LOCK      1
++#define STB0899_WIDTH_CFGPDELSTATUS_LOCK      1
++#define STB0899_1STLOCK                               (0x01 << 0)
++#define STB0899_OFFST_1STLOCK                 0
++#define STB0899_WIDTH_1STLOCK                 1
++
++#define STB0899_CFGPDELSTATUS2                        0xf61a
++#define STB0899_BBFERRORM                     0xf61b
++#define STB0899_BBFERRORL                     0xf61c
++#define STB0899_UPKTERRORM                    0xf61d
++#define STB0899_UPKTERRORL                    0xf61e
++
++#define STB0899_TSTCK                         0xff10
++
++#define STB0899_TSTRES                                0xff11
++#define STB0899_FRESLDPC                      (0x01 << 7)
++#define STB0899_OFFST_FRESLDPC                        7
++#define STB0899_WIDTH_FRESLDPC                        1
++#define STB0899_FRESRS                                (0x01 << 6)
++#define STB0899_OFFST_FRESRS                  6
++#define STB0899_WIDTH_FRESRS                  1
++#define STB0899_FRESVIT                               (0x01 << 5)
++#define STB0899_OFFST_FRESVIT                 5
++#define STB0899_WIDTH_FRESVIT                 1
++#define STB0899_FRESMAS1_2                    (0x01 << 4)
++#define STB0899_OFFST_FRESMAS1_2              4
++#define STB0899_WIDTH_FRESMAS1_2              1
++#define STB0899_FRESACS                               (0x01 << 3)
++#define STB0899_OFFST_FRESACS                 3
++#define STB0899_WIDTH_FRESACS                 1
++#define STB0899_FRESSYM                               (0x01 << 2)
++#define STB0899_OFFST_FRESSYM                 2
++#define STB0899_WIDTH_FRESSYM                 1
++#define STB0899_FRESMAS                               (0x01 << 1)
++#define STB0899_OFFST_FRESMAS                 1
++#define STB0899_WIDTH_FRESMAS                 1
++#define STB0899_FRESINT                               (0x01 << 0)
++#define STB0899_OFFST_FRESINIT                        0
++#define STB0899_WIDTH_FRESINIT                        1
++
++#define STB0899_TSTOUT                                0xff12
++#define STB0899_EN_SIGNATURE                  (0x01 << 7)
++#define STB0899_OFFST_EN_SIGNATURE            7
++#define STB0899_WIDTH_EN_SIGNATURE            1
++#define STB0899_BCLK_CLK                      (0x01 << 6)
++#define STB0899_OFFST_BCLK_CLK                        6
++#define STB0899_WIDTH_BCLK_CLK                        1
++#define STB0899_SGNL_OUT                      (0x01 << 5)
++#define STB0899_OFFST_SGNL_OUT                        5
++#define STB0899_WIDTH_SGNL_OUT                        1
++#define STB0899_TS                            (0x01 << 4)
++#define STB0899_OFFST_TS                      4
++#define STB0899_WIDTH_TS                      1
++#define STB0899_CTEST                         (0x01 << 0)
++#define STB0899_OFFST_CTEST                   0
++#define STB0899_WIDTH_CTEST                   1
++
++#define STB0899_TSTIN                         0xff13
++#define STB0899_TEST_IN                               (0x01 << 7)
++#define STB0899_OFFST_TEST_IN                 7
++#define STB0899_WIDTH_TEST_IN                 1
++#define STB0899_EN_ADC                                (0x01 << 6)
++#define STB0899_OFFST_EN_ADC                  6
++#define STB0899_WIDTH_ENADC                   1
++#define STB0899_SGN_ADC                               (0x01 << 5)
++#define STB0899_OFFST_SGN_ADC                 5
++#define STB0899_WIDTH_SGN_ADC                 1
++#define STB0899_BCLK_IN                               (0x01 << 4)
++#define STB0899_OFFST_BCLK_IN                 4
++#define STB0899_WIDTH_BCLK_IN                 1
++#define STB0899_JETONIN_MODE                  (0x01 << 3)
++#define STB0899_OFFST_JETONIN_MODE            3
++#define STB0899_WIDTH_JETONIN_MODE            1
++#define STB0899_BCLK_VALUE                    (0x01 << 2)
++#define STB0899_OFFST_BCLK_VALUE              2
++#define STB0899_WIDTH_BCLK_VALUE              1
++#define STB0899_SGNRST_T12                    (0x01 << 1)
++#define STB0899_OFFST_SGNRST_T12              1
++#define STB0899_WIDTH_SGNRST_T12              1
++#define STB0899_LOWSP_ENAX                    (0x01 << 0)
++#define STB0899_OFFST_LOWSP_ENAX              0
++#define STB0899_WIDTH_LOWSP_ENAX              1
++
++#define STB0899_TSTSYS                                0xff14
++#define STB0899_TSTCHIP                               0xff15
++#define STB0899_TSTFREE                               0xff16
++#define STB0899_TSTI2C                                0xff17
++#define STB0899_BITSPEEDM                     0xff1c
++#define STB0899_BITSPEEDL                     0xff1d
++#define STB0899_TBUSBIT                               0xff1e
++#define STB0899_TSTDIS                                0xff24
++#define STB0899_TSTDISRX                      0xff25
++#define STB0899_TSTJETON                      0xff28
++#define STB0899_TSTDCADJ                      0xff40
++#define STB0899_TSTAGC1                               0xff41
++#define STB0899_TSTAGC1N                      0xff42
++#define STB0899_TSTPOLYPH                     0xff48
++#define STB0899_TSTR                          0xff49
++#define STB0899_TSTAGC2                               0xff4a
++#define STB0899_TSTCTL1                               0xff4b
++#define STB0899_TSTCTL2                               0xff4c
++#define STB0899_TSTCTL3                               0xff4d
++#define STB0899_TSTDEMAP                      0xff50
++#define STB0899_TSTDEMAP2                     0xff51
++#define STB0899_TSTDEMMON                     0xff52
++#define STB0899_TSTRATE                               0xff53
++#define STB0899_TSTSELOUT                     0xff54
++#define STB0899_TSYNC                         0xff55
++#define STB0899_TSTERR                                0xff56
++#define STB0899_TSTRAM1                               0xff58
++#define STB0899_TSTVSELOUT                    0xff59
++#define STB0899_TSTFORCEIN                    0xff5a
++#define STB0899_TSTRS1                                0xff5c
++#define STB0899_TSTRS2                                0xff5d
++#define STB0899_TSTRS3                                0xff53
++
++#define STB0899_INTBUFSTATUS                  0xf200
++#define STB0899_INTBUFCTRL                    0xf201
++#define STB0899_PCKLENUL                      0xf55e
++#define STB0899_PCKLENLL                      0xf55f
++#define STB0899_RSPCKLEN                      0xf560
++
++/*    2 registers     */
++#define STB0899_SYNCDCST                      0xf60c
++
++/*    DiSEqC  */
++#define STB0899_DISCNTRL1                     0xf0a0
++#define STB0899_TIMOFF                                (0x01 << 7)
++#define STB0899_OFFST_TIMOFF                  7
++#define STB0899_WIDTH_TIMOFF                  1
++#define STB0899_DISEQCRESET                   (0x01 << 6)
++#define STB0899_OFFST_DISEQCRESET             6
++#define STB0899_WIDTH_DISEQCRESET             1
++#define STB0899_TIMCMD                                (0x03 << 4)
++#define STB0899_OFFST_TIMCMD                  4
++#define STB0899_WIDTH_TIMCMD                  2
++#define STB0899_DISPRECHARGE                  (0x01 << 2)
++#define STB0899_OFFST_DISPRECHARGE            2
++#define STB0899_WIDTH_DISPRECHARGE            1
++#define STB0899_DISEQCMODE                    (0x03 << 0)
++#define STB0899_OFFST_DISEQCMODE              0
++#define STB0899_WIDTH_DISEQCMODE              2
++
++#define STB0899_DISCNTRL2                     0xf0a1
++#define STB0899_RECEIVER_ON                   (0x01 << 7)
++#define STB0899_OFFST_RECEIVER_ON             7
++#define STB0899_WIDTH_RECEIVER_ON             1
++#define STB0899_IGNO_SHORT_22K                        (0x01 << 6)
++#define STB0899_OFFST_IGNO_SHORT_22K          6
++#define STB0899_WIDTH_IGNO_SHORT_22K          1
++#define STB0899_ONECHIP_TRX                   (0x01 << 5)
++#define STB0899_OFFST_ONECHIP_TRX             5
++#define STB0899_WIDTH_ONECHIP_TRX             1
++#define STB0899_EXT_ENVELOP                   (0x01 << 4)
++#define STB0899_OFFST_EXT_ENVELOP             4
++#define STB0899_WIDTH_EXT_ENVELOP             1
++#define STB0899_PIN_SELECT                    (0x03 << 2)
++#define STB0899_OFFST_PIN_SELCT                       2
++#define STB0899_WIDTH_PIN_SELCT                       2
++#define STB0899_IRQ_RXEND                     (0x01 << 1)
++#define STB0899_OFFST_IRQ_RXEND                       1
++#define STB0899_WIDTH_IRQ_RXEND                       1
++#define STB0899_IRQ_4NBYTES                   (0x01 << 0)
++#define STB0899_OFFST_IRQ_4NBYTES             0
++#define STB0899_WIDTH_IRQ_4NBYTES             1
++
++#define STB0899_DISRX_ST0                     0xf0a4
++#define STB0899_RXEND                         (0x01 << 7)
++#define STB0899_OFFST_RXEND                   7
++#define STB0899_WIDTH_RXEND                   1
++#define STB0899_RXACTIVE                      (0x01 << 6)
++#define STB0899_OFFST_RXACTIVE                        6
++#define STB0899_WIDTH_RXACTIVE                        1
++#define STB0899_SHORT22K                      (0x01 << 5)
++#define STB0899_OFFST_SHORT22K                        5
++#define STB0899_WIDTH_SHORT22K                        1
++#define STB0899_CONTTONE                      (0x01 << 4)
++#define STB0899_OFFST_CONTTONE                        4
++#define STB0899_WIDTH_CONTONE                 1
++#define STB0899_4BFIFOREDY                    (0x01 << 3)
++#define STB0899_OFFST_4BFIFOREDY              3
++#define STB0899_WIDTH_4BFIFOREDY              1
++#define STB0899_FIFOEMPTY                     (0x01 << 2)
++#define STB0899_OFFST_FIFOEMPTY                       2
++#define STB0899_WIDTH_FIFOEMPTY                       1
++#define STB0899_ABORTTRX                      (0x01 << 0)
++#define STB0899_OFFST_ABORTTRX                        0
++#define STB0899_WIDTH_ABORTTRX                        1
++
++#define STB0899_DISRX_ST1                     0xf0a5
++#define STB0899_RXFAIL                                (0x01 << 7)
++#define STB0899_OFFST_RXFAIL                  7
++#define STB0899_WIDTH_RXFAIL                  1
++#define STB0899_FIFOPFAIL                     (0x01 << 6)
++#define STB0899_OFFST_FIFOPFAIL                       6
++#define STB0899_WIDTH_FIFOPFAIL                       1
++#define STB0899_RXNONBYTES                    (0x01 << 5)
++#define STB0899_OFFST_RXNONBYTES              5
++#define STB0899_WIDTH_RXNONBYTES              1
++#define STB0899_FIFOOVF                               (0x01 << 4)
++#define STB0899_OFFST_FIFOOVF                 4
++#define STB0899_WIDTH_FIFOOVF                 1
++#define STB0899_FIFOBYTENBR                   (0x0f << 0)
++#define STB0899_OFFST_FIFOBYTENBR             0
++#define STB0899_WIDTH_FIFOBYTENBR             4
++
++#define STB0899_DISPARITY                     0xf0a6
++
++#define STB0899_DISFIFO                               0xf0a7
++
++#define STB0899_DISSTATUS                     0xf0a8
++#define STB0899_FIFOFULL                      (0x01 << 6)
++#define STB0899_OFFST_FIFOFULL                        6
++#define STB0899_WIDTH_FIFOFULL                        1
++#define STB0899_TXIDLE                                (0x01 << 5)
++#define STB0899_OFFST_TXIDLE                  5
++#define STB0899_WIDTH_TXIDLE                  1
++#define STB0899_GAPBURST                      (0x01 << 4)
++#define STB0899_OFFST_GAPBURST                        4
++#define STB0899_WIDTH_GAPBURST                        1
++#define STB0899_TXFIFOBYTES                   (0x0f << 0)
++#define STB0899_OFFST_TXFIFOBYTES             0
++#define STB0899_WIDTH_TXFIFOBYTES             4
++#define STB0899_DISF22                                0xf0a9
++
++#define STB0899_DISF22RX                      0xf0aa
++
++/*    General Purpose */
++#define STB0899_SYSREG                                0xf101
++#define STB0899_ACRPRESC                      0xf110
++#define STB0899_OFFST_RSVD2                   7
++#define STB0899_WIDTH_RSVD2                   1
++#define STB0899_OFFST_ACRPRESC                        4
++#define STB0899_WIDTH_ACRPRESC                        3
++#define STB0899_OFFST_RSVD1                   3
++#define STB0899_WIDTH_RSVD1                   1
++#define STB0899_OFFST_ACRPRESC2                       0
++#define STB0899_WIDTH_ACRPRESC2                       3
++
++#define STB0899_ACRDIV1                               0xf111
++#define STB0899_ACRDIV2                               0xf112
++#define STB0899_DACR1                         0xf113
++#define STB0899_DACR2                         0xf114
++#define STB0899_OUTCFG                                0xf11c
++#define STB0899_MODECFG                               0xf11d
++#define STB0899_NCOARSE                               0xf1b3
++
++#define STB0899_SYNTCTRL                      0xf1b6
++#define STB0899_STANDBY                               (0x01 << 7)
++#define STB0899_OFFST_STANDBY                 7
++#define STB0899_WIDTH_STANDBY                 1
++#define STB0899_BYPASSPLL                     (0x01 << 6)
++#define STB0899_OFFST_BYPASSPLL                       6
++#define STB0899_WIDTH_BYPASSPLL                       1
++#define STB0899_SEL1XRATIO                    (0x01 << 5)
++#define STB0899_OFFST_SEL1XRATIO              5
++#define STB0899_WIDTH_SEL1XRATIO              1
++#define STB0899_SELOSCI                               (0x01 << 1)
++#define STB0899_OFFST_SELOSCI                 1
++#define STB0899_WIDTH_SELOSCI                 1
++
++#define STB0899_FILTCTRL                      0xf1b7
++#define STB0899_SYSCTRL                               0xf1b8
++
++#define STB0899_STOPCLK1                      0xf1c2
++#define STB0899_STOP_CKINTBUF108              (0x01 << 7)
++#define STB0899_OFFST_STOP_CKINTBUF108                7
++#define STB0899_WIDTH_STOP_CKINTBUF108                1
++#define STB0899_STOP_CKINTBUF216              (0x01 << 6)
++#define STB0899_OFFST_STOP_CKINTBUF216                6
++#define STB0899_WIDTH_STOP_CKINTBUF216                1
++#define STB0899_STOP_CHK8PSK                  (0x01 << 5)
++#define STB0899_OFFST_STOP_CHK8PSK            5
++#define STB0899_WIDTH_STOP_CHK8PSK            1
++#define STB0899_STOP_CKFEC108                 (0x01 << 4)
++#define STB0899_OFFST_STOP_CKFEC108           4
++#define STB0899_WIDTH_STOP_CKFEC108           1
++#define STB0899_STOP_CKFEC216                 (0x01 << 3)
++#define STB0899_OFFST_STOP_CKFEC216           3
++#define STB0899_WIDTH_STOP_CKFEC216           1
++#define STB0899_STOP_CKCORE216                        (0x01 << 2)
++#define STB0899_OFFST_STOP_CKCORE216          2
++#define STB0899_WIDTH_STOP_CKCORE216          1
++#define STB0899_STOP_CKADCI108                        (0x01 << 1)
++#define STB0899_OFFST_STOP_CKADCI108          1
++#define STB0899_WIDTH_STOP_CKADCI108          1
++#define STB0899_STOP_INVCKADCI108             (0x01 << 0)
++#define STB0899_OFFST_STOP_INVCKADCI108               0
++#define STB0899_WIDTH_STOP_INVCKADCI108               1
++
++#define STB0899_STOPCLK2                      0xf1c3
++#define STB0899_STOP_CKS2DMD108                       (0x01 << 2)
++#define STB0899_OFFST_STOP_CKS2DMD108         2
++#define STB0899_WIDTH_STOP_CKS2DMD108         1
++#define STB0899_STOP_CKPKDLIN108              (0x01 << 1)
++#define STB0899_OFFST_STOP_CKPKDLIN108                1
++#define STB0899_WIDTH_STOP_CKPKDLIN108                1
++#define STB0899_STOP_CKPKDLIN216              (0x01 << 0)
++#define STB0899_OFFST_STOP_CKPKDLIN216                0
++#define STB0899_WIDTH_STOP_CKPKDLIN216                1
++
++#define STB0899_TSTTNR1                               0xf1e0
++#define STB0899_BYPASS_ADC                    (0x01 << 7)
++#define STB0899_OFFST_BYPASS_ADC              7
++#define STB0899_WIDTH_BYPASS_ADC              1
++#define STB0899_INVADCICKOUT                  (0x01 << 6)
++#define STB0899_OFFST_INVADCICKOUT            6
++#define STB0899_WIDTH_INVADCICKOUT            1
++#define STB0899_ADCTEST_VOLTAGE                       (0x03 << 4)
++#define STB0899_OFFST_ADCTEST_VOLTAGE         4
++#define STB0899_WIDTH_ADCTEST_VOLTAGE         1
++#define STB0899_ADC_RESET                     (0x01 << 3)
++#define STB0899_OFFST_ADC_RESET                       3
++#define STB0899_WIDTH_ADC_RESET                       1
++#define STB0899_TSTTNR1_2                     (0x01 << 2)
++#define STB0899_OFFST_TSTTNR1_2                       2
++#define STB0899_WIDTH_TSTTNR1_2                       1
++#define STB0899_ADCPON                                (0x01 << 1)
++#define STB0899_OFFST_ADCPON                  1
++#define STB0899_WIDTH_ADCPON                  1
++#define STB0899_ADCIN_MODE                    (0x01 << 0)
++#define STB0899_OFFST_ADCIN_MODE              0
++#define STB0899_WIDTH_ADCIN_MODE              1
++
++#define STB0899_TSTTNR2                               0xf1e1
++#define STB0899_TSTTNR2_7                     (0x01 << 7)
++#define STB0899_OFFST_TSTTNR2_7                       7
++#define STB0899_WIDTH_TSTTNR2_7                       1
++#define STB0899_NOT_DISRX_WIRED                       (0x01 << 6)
++#define STB0899_OFFST_NOT_DISRX_WIRED         6
++#define STB0899_WIDTH_NOT_DISRX_WIRED         1
++#define STB0899_DISEQC_DCURRENT                       (0x01 << 5)
++#define STB0899_OFFST_DISEQC_DCURRENT         5
++#define STB0899_WIDTH_DISEQC_DCURRENT         1
++#define STB0899_DISEQC_ZCURRENT                       (0x01 << 4)
++#define STB0899_OFFST_DISEQC_ZCURRENT         4
++#define STB0899_WIDTH_DISEQC_ZCURRENT         1
++#define STB0899_DISEQC_SINC_SOURCE            (0x03 << 2)
++#define STB0899_OFFST_DISEQC_SINC_SOURCE      2
++#define STB0899_WIDTH_DISEQC_SINC_SOURCE      2
++#define STB0899_SELIQSRC                      (0x03 << 0)
++#define STB0899_OFFST_SELIQSRC                        0
++#define STB0899_WIDTH_SELIQSRC                        2
++
++#define STB0899_TSTTNR3                               0xf1e2
++
++#define STB0899_I2CCFG                                0xf129
++#define STB0899_I2CCFGRSVD                    (0x0f << 4)
++#define STB0899_OFFST_I2CCFGRSVD              4
++#define STB0899_WIDTH_I2CCFGRSVD              4
++#define STB0899_I2CFASTMODE                   (0x01 << 3)
++#define STB0899_OFFST_I2CFASTMODE             3
++#define STB0899_WIDTH_I2CFASTMODE             1
++#define STB0899_STATUSWR                      (0x01 << 2)
++#define STB0899_OFFST_STATUSWR                        2
++#define STB0899_WIDTH_STATUSWR                        1
++#define STB0899_I2CADDRINC                    (0x03 << 0)
++#define STB0899_OFFST_I2CADDRINC              0
++#define STB0899_WIDTH_I2CADDRINC              2
++
++#define STB0899_I2CRPT                                0xf12a
++#define STB0899_I2CTON                                (0x01 << 7)
++#define STB0899_OFFST_I2CTON                  7
++#define STB0899_WIDTH_I2CTON                  1
++#define STB0899_ENARPTLEVEL                   (0x01 << 6)
++#define STB0899_OFFST_ENARPTLEVEL             6
++#define STB0899_WIDTH_ENARPTLEVEL             2
++#define STB0899_SCLTDELAY                     (0x01 << 3)
++#define STB0899_OFFST_SCLTDELAY                       3
++#define STB0899_WIDTH_SCLTDELAY                       1
++#define STB0899_STOPENA                               (0x01 << 2)
++#define STB0899_OFFST_STOPENA                 2
++#define STB0899_WIDTH_STOPENA                 1
++#define STB0899_STOPSDAT2SDA                  (0x01 << 1)
++#define STB0899_OFFST_STOPSDAT2SDA            1
++#define STB0899_WIDTH_STOPSDAT2SDA            1
++
++#define STB0899_IOPVALUE8                     0xf136
++#define STB0899_IOPVALUE7                     0xf137
++#define STB0899_IOPVALUE6                     0xf138
++#define STB0899_IOPVALUE5                     0xf139
++#define STB0899_IOPVALUE4                     0xf13a
++#define STB0899_IOPVALUE3                     0xf13b
++#define STB0899_IOPVALUE2                     0xf13c
++#define STB0899_IOPVALUE1                     0xf13d
++#define STB0899_IOPVALUE0                     0xf13e
++
++#define STB0899_GPIO00CFG                     0xf140
++
++#define STB0899_GPIO01CFG                     0xf141
++#define STB0899_GPIO02CFG                     0xf142
++#define STB0899_GPIO03CFG                     0xf143
++#define STB0899_GPIO04CFG                     0xf144
++#define STB0899_GPIO05CFG                     0xf145
++#define STB0899_GPIO06CFG                     0xf146
++#define STB0899_GPIO07CFG                     0xf147
++#define STB0899_GPIO08CFG                     0xf148
++#define STB0899_GPIO09CFG                     0xf149
++#define STB0899_GPIO10CFG                     0xf14a
++#define STB0899_GPIO11CFG                     0xf14b
++#define STB0899_GPIO12CFG                     0xf14c
++#define STB0899_GPIO13CFG                     0xf14d
++#define STB0899_GPIO14CFG                     0xf14e
++#define STB0899_GPIO15CFG                     0xf14f
++#define STB0899_GPIO16CFG                     0xf150
++#define STB0899_GPIO17CFG                     0xf151
++#define STB0899_GPIO18CFG                     0xf152
++#define STB0899_GPIO19CFG                     0xf153
++#define STB0899_GPIO20CFG                     0xf154
++
++#define STB0899_SDATCFG                               0xf155
++#define STB0899_SCLTCFG                               0xf156
++#define STB0899_AGCRFCFG                      0xf157
++#define STB0899_GPIO22                                0xf158  /* AGCBB2CFG    */
++#define STB0899_GPIO21                                0xf159  /* AGCBB1CFG    */
++#define STB0899_DIRCLKCFG                     0xf15a
++#define STB0899_CLKOUT27CFG                   0xf15b
++#define STB0899_STDBYCFG                      0xf15c
++#define STB0899_CS0CFG                                0xf15d
++#define STB0899_CS1CFG                                0xf15e
++#define STB0899_DISEQCOCFG                    0xf15f
++
++#define STB0899_GPIO32CFG                     0xf160
++#define STB0899_GPIO33CFG                     0xf161
++#define STB0899_GPIO34CFG                     0xf162
++#define STB0899_GPIO35CFG                     0xf163
++#define STB0899_GPIO36CFG                     0xf164
++#define STB0899_GPIO37CFG                     0xf165
++#define STB0899_GPIO38CFG                     0xf166
++#define STB0899_GPIO39CFG                     0xf167
++
++#define STB0899_IRQSTATUS_3                   0xf120
++#define STB0899_IRQSTATUS_2                   0xf121
++#define STB0899_IRQSTATUS_1                   0xf122
++#define STB0899_IRQSTATUS_0                   0xf123
++
++#define STB0899_IRQMSK_3                      0xf124
++#define STB0899_IRQMSK_2                      0xf125
++#define STB0899_IRQMSK_1                      0xf126
++#define STB0899_IRQMSK_0                      0xf127
++
++#define STB0899_IRQCFG                                0xf128
++
++#define STB0899_GHOSTREG                      0xf000
++
++#define STB0899_S2DEMOD                               0xf3fc
++#define STB0899_S2FEC                         0xfafc
++
++
++#endif
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/stb6000.h linux-2.6.18/drivers/media/dvb/frontends/stb6000.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/stb6000.h    1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/stb6000.h 2010-09-09 12:38:50.000000000 +0000
+@@ -0,0 +1,51 @@
++  /*
++     Driver for ST stb6000 DVBS Silicon tuner
++
++     Copyright (C) 2008 Igor M. Liplianin (liplianin@me.by)
++
++     This program is free software; you can redistribute it and/or modify
++     it under the terms of the GNU General Public License as published by
++     the Free Software Foundation; either version 2 of the License, or
++     (at your option) any later version.
++
++     This program is distributed in the hope that it will be useful,
++     but WITHOUT ANY WARRANTY; without even the implied warranty of
++     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++
++     GNU General Public License for more details.
++
++     You should have received a copy of the GNU General Public License
++     along with this program; if not, write to the Free Software
++     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++
++  */
++
++#ifndef __DVB_STB6000_H__
++#define __DVB_STB6000_H__
++
++#include <linux/i2c.h>
++#include "dvb_frontend.h"
++
++/**
++ * Attach a stb6000 tuner to the supplied frontend structure.
++ *
++ * @param fe Frontend to attach to.
++ * @param addr i2c address of the tuner.
++ * @param i2c i2c adapter to use.
++ * @return FE pointer on success, NULL on failure.
++ */
++#if defined(CONFIG_DVB_STB6000) || (defined(CONFIG_DVB_STB6000_MODULE) \
++                                                      && defined(MODULE))
++extern struct dvb_frontend *stb6000_attach(struct dvb_frontend *fe, int addr,
++                                         struct i2c_adapter *i2c);
++#else
++static inline struct dvb_frontend *stb6000_attach(struct dvb_frontend *fe,
++                                                int addr,
++                                                struct i2c_adapter *i2c)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return NULL;
++}
++#endif /* CONFIG_DVB_STB6000 */
++
++#endif /* __DVB_STB6000_H__ */
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/stb6100_cfg.h linux-2.6.18/drivers/media/dvb/frontends/stb6100_cfg.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/stb6100_cfg.h        1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/stb6100_cfg.h     2010-09-09 12:38:50.000000000 +0000
+@@ -0,0 +1,104 @@
++/*
++      STB6100 Silicon Tuner
++      Copyright (C) Manu Abraham (abraham.manu@gmail.com)
++
++      Copyright (C) ST Microelectronics
++
++      This program is free software; you can redistribute it and/or modify
++      it under the terms of the GNU General Public License as published by
++      the Free Software Foundation; either version 2 of the License, or
++      (at your option) any later version.
++
++      This program is distributed in the hope that it will be useful,
++      but WITHOUT ANY WARRANTY; without even the implied warranty of
++      MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++      GNU General Public License for more details.
++
++      You should have received a copy of the GNU General Public License
++      along with this program; if not, write to the Free Software
++      Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++*/
++
++static int stb6100_get_frequency(struct dvb_frontend *fe, u32 *frequency)
++{
++      struct dvb_frontend_ops *frontend_ops = NULL;
++      struct dvb_tuner_ops    *tuner_ops = NULL;
++      struct tuner_state      t_state;
++      int err = 0;
++
++      if (&fe->ops)
++              frontend_ops = &fe->ops;
++      if (&frontend_ops->tuner_ops)
++              tuner_ops = &frontend_ops->tuner_ops;
++      if (tuner_ops->get_state) {
++              if ((err = tuner_ops->get_state(fe, DVBFE_TUNER_FREQUENCY, &t_state)) < 0) {
++                      printk("%s: Invalid parameter\n", __func__);
++                      return err;
++              }
++              *frequency = t_state.frequency;
++      }
++      return 0;
++}
++
++static int stb6100_set_frequency(struct dvb_frontend *fe, u32 frequency)
++{
++      struct dvb_frontend_ops *frontend_ops = NULL;
++      struct dvb_tuner_ops    *tuner_ops = NULL;
++      struct tuner_state      t_state;
++      int err = 0;
++
++      t_state.frequency = frequency;
++      if (&fe->ops)
++              frontend_ops = &fe->ops;
++      if (&frontend_ops->tuner_ops)
++              tuner_ops = &frontend_ops->tuner_ops;
++      if (tuner_ops->set_state) {
++              if ((err = tuner_ops->set_state(fe, DVBFE_TUNER_FREQUENCY, &t_state)) < 0) {
++                      printk("%s: Invalid parameter\n", __func__);
++                      return err;
++              }
++      }
++      return 0;
++}
++
++static int stb6100_get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth)
++{
++      struct dvb_frontend_ops *frontend_ops = &fe->ops;
++      struct dvb_tuner_ops    *tuner_ops = &frontend_ops->tuner_ops;
++      struct tuner_state      t_state;
++      int err = 0;
++
++      if (&fe->ops)
++              frontend_ops = &fe->ops;
++      if (&frontend_ops->tuner_ops)
++              tuner_ops = &frontend_ops->tuner_ops;
++      if (tuner_ops->get_state) {
++              if ((err = tuner_ops->get_state(fe, DVBFE_TUNER_BANDWIDTH, &t_state)) < 0) {
++                      printk("%s: Invalid parameter\n", __func__);
++                      return err;
++              }
++              *bandwidth = t_state.bandwidth;
++      }
++      return 0;
++}
++
++static int stb6100_set_bandwidth(struct dvb_frontend *fe, u32 bandwidth)
++{
++      struct dvb_frontend_ops *frontend_ops = NULL;
++      struct dvb_tuner_ops    *tuner_ops = NULL;
++      struct tuner_state      t_state;
++      int err = 0;
++
++      t_state.bandwidth = bandwidth;
++      if (&fe->ops)
++              frontend_ops = &fe->ops;
++      if (&frontend_ops->tuner_ops)
++              tuner_ops = &frontend_ops->tuner_ops;
++      if (tuner_ops->set_state) {
++              if ((err = tuner_ops->set_state(fe, DVBFE_TUNER_BANDWIDTH, &t_state)) < 0) {
++                      printk("%s: Invalid parameter\n", __func__);
++                      return err;
++              }
++      }
++      return 0;
++}
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/stb6100.h linux-2.6.18/drivers/media/dvb/frontends/stb6100.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/stb6100.h    1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/stb6100.h 2010-09-09 12:38:50.000000000 +0000
+@@ -0,0 +1,115 @@
++/*
++      STB6100 Silicon Tuner
++      Copyright (C) Manu Abraham (abraham.manu@gmail.com)
++
++      Copyright (C) ST Microelectronics
++
++      This program is free software; you can redistribute it and/or modify
++      it under the terms of the GNU General Public License as published by
++      the Free Software Foundation; either version 2 of the License, or
++      (at your option) any later version.
++
++      This program is distributed in the hope that it will be useful,
++      but WITHOUT ANY WARRANTY; without even the implied warranty of
++      MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++      GNU General Public License for more details.
++
++      You should have received a copy of the GNU General Public License
++      along with this program; if not, write to the Free Software
++      Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++*/
++
++#ifndef __STB_6100_REG_H
++#define __STB_6100_REG_H
++
++#include <linux/dvb/frontend.h>
++#include "dvb_frontend.h"
++
++#define STB6100_LD                    0x00
++#define STB6100_LD_LOCK                       (1 << 0)
++
++#define STB6100_VCO                   0x01
++#define STB6100_VCO_OSCH              (0x01 << 7)
++#define STB6100_VCO_OSCH_SHIFT                7
++#define STB6100_VCO_OCK                       (0x03 << 5)
++#define STB6100_VCO_OCK_SHIFT         5
++#define STB6100_VCO_ODIV              (0x01 << 4)
++#define STB6100_VCO_ODIV_SHIFT                4
++#define STB6100_VCO_OSM                       (0x0f << 0)
++
++#define STB6100_NI                    0x02
++#define STB6100_NF_LSB                        0x03
++
++#define STB6100_K                     0x04
++#define STB6100_K_PSD2                        (0x01 << 2)
++#define STB6100_K_PSD2_SHIFT            2
++#define STB6100_K_NF_MSB              (0x03 << 0)
++
++#define STB6100_G                     0x05
++#define STB6100_G_G                   (0x0f << 0)
++#define STB6100_G_GCT                 (0x07 << 5)
++
++#define STB6100_F                     0x06
++#define STB6100_F_F                   (0x1f << 0)
++
++#define STB6100_DLB                   0x07
++
++#define STB6100_TEST1                 0x08
++
++#define STB6100_FCCK                  0x09
++#define STB6100_FCCK_FCCK             (0x01 << 6)
++
++#define STB6100_LPEN                  0x0a
++#define STB6100_LPEN_LPEN             (0x01 << 4)
++#define STB6100_LPEN_SYNP             (0x01 << 5)
++#define STB6100_LPEN_OSCP             (0x01 << 6)
++#define STB6100_LPEN_BEN              (0x01 << 7)
++
++#define STB6100_TEST3                 0x0b
++
++#define STB6100_NUMREGS                 0x0c
++
++
++#define INRANGE(val, x, y)            (((x <= val) && (val <= y)) ||          \
++                                       ((y <= val) && (val <= x)) ? 1 : 0)
++
++#define CHKRANGE(val, x, y)           (((val >= x) && (val < y)) ? 1 : 0)
++
++struct stb6100_config {
++      u8      tuner_address;
++      u32     refclock;
++};
++
++struct stb6100_state {
++      struct i2c_adapter *i2c;
++
++      const struct stb6100_config     *config;
++      struct dvb_tuner_ops            ops;
++      struct dvb_frontend             *frontend;
++      struct tuner_state              status;
++
++      u32 frequency;
++      u32 srate;
++      u32 bandwidth;
++      u32 reference;
++};
++
++#if defined(CONFIG_DVB_STB6100) || (defined(CONFIG_DVB_STB6100_MODULE) && defined(MODULE))
++
++extern struct dvb_frontend *stb6100_attach(struct dvb_frontend *fe,
++                                         struct stb6100_config *config,
++                                         struct i2c_adapter *i2c);
++
++#else
++
++static inline struct dvb_frontend *stb6100_attach(struct dvb_frontend *fe,
++                                                struct stb6100_config *config,
++                                                struct i2c_adapter *i2c)
++{
++      printk(KERN_WARNING "%s: Driver disabled by Kconfig\n", __func__);
++      return NULL;
++}
++
++#endif //CONFIG_DVB_STB6100
++
++#endif
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/stb6100_proc.h linux-2.6.18/drivers/media/dvb/frontends/stb6100_proc.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/stb6100_proc.h       1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/stb6100_proc.h    2010-09-09 12:38:50.000000000 +0000
+@@ -0,0 +1,138 @@
++/*
++      STB6100 Silicon Tuner wrapper
++      Copyright (C)2009 Igor M. Liplianin (liplianin@me.by)
++
++      This program is free software; you can redistribute it and/or modify
++      it under the terms of the GNU General Public License as published by
++      the Free Software Foundation; either version 2 of the License, or
++      (at your option) any later version.
++
++      This program is distributed in the hope that it will be useful,
++      but WITHOUT ANY WARRANTY; without even the implied warranty of
++      MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++      GNU General Public License for more details.
++
++      You should have received a copy of the GNU General Public License
++      along with this program; if not, write to the Free Software
++      Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++*/
++
++static int stb6100_get_freq(struct dvb_frontend *fe, u32 *frequency)
++{
++      struct dvb_frontend_ops *frontend_ops = NULL;
++      struct dvb_tuner_ops    *tuner_ops = NULL;
++      struct tuner_state      state;
++      int err = 0;
++
++      if (&fe->ops)
++              frontend_ops = &fe->ops;
++      if (&frontend_ops->tuner_ops)
++              tuner_ops = &frontend_ops->tuner_ops;
++      if (tuner_ops->get_state) {
++              if (frontend_ops->i2c_gate_ctrl)
++                      frontend_ops->i2c_gate_ctrl(fe, 1);
++
++              err = tuner_ops->get_state(fe, DVBFE_TUNER_FREQUENCY, &state);
++              if (err < 0) {
++                      printk(KERN_ERR "%s: Invalid parameter\n", __func__);
++                      return err;
++              }
++
++              if (frontend_ops->i2c_gate_ctrl)
++                      frontend_ops->i2c_gate_ctrl(fe, 0);
++
++              *frequency = state.frequency;
++      }
++
++      return 0;
++}
++
++static int stb6100_set_freq(struct dvb_frontend *fe, u32 frequency)
++{
++      struct dvb_frontend_ops *frontend_ops = NULL;
++      struct dvb_tuner_ops    *tuner_ops = NULL;
++      struct tuner_state      state;
++      int err = 0;
++
++      state.frequency = frequency;
++      if (&fe->ops)
++              frontend_ops = &fe->ops;
++      if (&frontend_ops->tuner_ops)
++              tuner_ops = &frontend_ops->tuner_ops;
++      if (tuner_ops->set_state) {
++              if (frontend_ops->i2c_gate_ctrl)
++                      frontend_ops->i2c_gate_ctrl(fe, 1);
++
++              err = tuner_ops->set_state(fe, DVBFE_TUNER_FREQUENCY, &state);
++              if (err < 0) {
++                      printk(KERN_ERR "%s: Invalid parameter\n", __func__);
++                      return err;
++              }
++
++              if (frontend_ops->i2c_gate_ctrl)
++                      frontend_ops->i2c_gate_ctrl(fe, 0);
++
++      }
++
++      return 0;
++}
++
++static int stb6100_get_bandw(struct dvb_frontend *fe, u32 *bandwidth)
++{
++      struct dvb_frontend_ops *frontend_ops = NULL;
++      struct dvb_tuner_ops    *tuner_ops = NULL;
++      struct tuner_state      state;
++      int err = 0;
++
++      if (&fe->ops)
++              frontend_ops = &fe->ops;
++      if (&frontend_ops->tuner_ops)
++              tuner_ops = &frontend_ops->tuner_ops;
++      if (tuner_ops->get_state) {
++              if (frontend_ops->i2c_gate_ctrl)
++                      frontend_ops->i2c_gate_ctrl(fe, 1);
++
++              err = tuner_ops->get_state(fe, DVBFE_TUNER_BANDWIDTH, &state);
++              if (err < 0) {
++                      printk(KERN_ERR "%s: Invalid parameter\n", __func__);
++                      return err;
++              }
++
++              if (frontend_ops->i2c_gate_ctrl)
++                      frontend_ops->i2c_gate_ctrl(fe, 0);
++
++              *bandwidth = state.bandwidth;
++      }
++
++      return 0;
++}
++
++static int stb6100_set_bandw(struct dvb_frontend *fe, u32 bandwidth)
++{
++      struct dvb_frontend_ops *frontend_ops = NULL;
++      struct dvb_tuner_ops    *tuner_ops = NULL;
++      struct tuner_state      state;
++      int err = 0;
++
++      state.bandwidth = bandwidth;
++      if (&fe->ops)
++              frontend_ops = &fe->ops;
++      if (&frontend_ops->tuner_ops)
++              tuner_ops = &frontend_ops->tuner_ops;
++      if (tuner_ops->set_state) {
++              if (frontend_ops->i2c_gate_ctrl)
++                      frontend_ops->i2c_gate_ctrl(fe, 1);
++
++              err = tuner_ops->set_state(fe, DVBFE_TUNER_BANDWIDTH, &state);
++              if (err < 0) {
++                      printk(KERN_ERR "%s: Invalid parameter\n", __func__);
++                      return err;
++              }
++
++              if (frontend_ops->i2c_gate_ctrl)
++                      frontend_ops->i2c_gate_ctrl(fe, 0);
++
++      }
++
++      return 0;
++}
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/stv0288.h linux-2.6.18/drivers/media/dvb/frontends/stv0288.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/stv0288.h    1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/stv0288.h 2010-09-09 12:38:50.000000000 +0000
+@@ -0,0 +1,67 @@
++/*
++      Driver for ST STV0288 demodulator
++
++      Copyright (C) 2006 Georg Acher, BayCom GmbH, acher (at) baycom (dot) de
++              for Reel Multimedia
++      Copyright (C) 2008 TurboSight.com, <bob@turbosight.com>
++      Copyright (C) 2008 Igor M. Liplianin <liplianin@me.by>
++              Removed stb6000 specific tuner code and revised some
++              procedures.
++
++      This program is free software; you can redistribute it and/or modify
++      it under the terms of the GNU General Public License as published by
++      the Free Software Foundation; either version 2 of the License, or
++      (at your option) any later version.
++
++      This program is distributed in the hope that it will be useful,
++      but WITHOUT ANY WARRANTY; without even the implied warranty of
++      MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++      GNU General Public License for more details.
++
++      You should have received a copy of the GNU General Public License
++      along with this program; if not, write to the Free Software
++      Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++
++*/
++
++#ifndef STV0288_H
++#define STV0288_H
++
++#include <linux/dvb/frontend.h>
++#include "dvb_frontend.h"
++
++struct stv0288_config {
++      /* the demodulator's i2c address */
++      u8 demod_address;
++
++      u8* inittab;
++
++      /* minimum delay before retuning */
++      int min_delay_ms;
++
++      int (*set_ts_params)(struct dvb_frontend *fe, int is_punctured);
++};
++
++#if defined(CONFIG_DVB_STV0288) || (defined(CONFIG_DVB_STV0288_MODULE) && \
++                                                      defined(MODULE))
++extern struct dvb_frontend *stv0288_attach(const struct stv0288_config *config,
++                                         struct i2c_adapter *i2c);
++#else
++static inline struct dvb_frontend *stv0288_attach(const struct stv0288_config *config,
++                                         struct i2c_adapter *i2c)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return NULL;
++}
++#endif /* CONFIG_DVB_STV0288 */
++
++static inline int stv0288_writereg(struct dvb_frontend *fe, u8 reg, u8 val)
++{
++      int r = 0;
++      u8 buf[] = { reg, val };
++      if (fe->ops.write)
++              r = fe->ops.write(fe, buf, 2);
++      return r;
++}
++
++#endif /* STV0288_H */
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/stv0297.h linux-2.6.18/drivers/media/dvb/frontends/stv0297.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/stv0297.h    2006-09-20 03:42:06.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/stv0297.h 2010-09-09 12:38:50.000000000 +0000
+@@ -42,7 +42,16 @@
+       u8 stop_during_read:1;
+ };
+ 
++#if defined(CONFIG_DVB_STV0297) || (defined(CONFIG_DVB_STV0297_MODULE) && defined(MODULE))
+ extern struct dvb_frontend* stv0297_attach(const struct stv0297_config* config,
+                                          struct i2c_adapter* i2c);
++#else
++static inline struct dvb_frontend* stv0297_attach(const struct stv0297_config* config,
++                                         struct i2c_adapter* i2c)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return NULL;
++}
++#endif // CONFIG_DVB_STV0297
+ 
+ #endif // STV0297_H
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/stv0299.h linux-2.6.18/drivers/media/dvb/frontends/stv0299.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/stv0299.h    2006-09-20 03:42:06.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/stv0299.h 2010-09-09 12:38:50.000000000 +0000
+@@ -48,10 +48,10 @@
+ #include <linux/dvb/frontend.h>
+ #include "dvb_frontend.h"
+ 
+-#define STV0229_LOCKOUTPUT_0  0
+-#define STV0229_LOCKOUTPUT_1  1
+-#define STV0229_LOCKOUTPUT_CF 2
+-#define STV0229_LOCKOUTPUT_LK 3
++#define STV0299_LOCKOUTPUT_0  0
++#define STV0299_LOCKOUTPUT_1  1
++#define STV0299_LOCKOUTPUT_CF 2
++#define STV0299_LOCKOUTPUT_LK 3
+ 
+ #define STV0299_VOLT13_OP0 0
+ #define STV0299_VOLT13_OP1 1
+@@ -82,16 +82,37 @@
+       /* Is 13v controlled by OP0 or OP1? */
+       u8 volt13_op0_op1:1;
+ 
++      /* Turn-off OP0? */
++      u8 op0_off:1;
++
+       /* minimum delay before retuning */
+       int min_delay_ms;
+ 
+       /* Set the symbol rate */
+-      int (*set_symbol_rate)(struct dvb_frontend* fe, u32 srate, u32 ratio);
+-};
++      int (*set_symbol_rate)(struct dvb_frontend *fe, u32 srate, u32 ratio);
+ 
+-extern int stv0299_writereg (struct dvb_frontend* fe, u8 reg, u8 data);
++      /* Set device param to start dma */
++      int (*set_ts_params)(struct dvb_frontend *fe, int is_punctured);
++};
+ 
+-extern struct dvb_frontend* stv0299_attach(const struct stv0299_config* config,
+-                                         struct i2c_adapter* i2c);
++#if defined(CONFIG_DVB_STV0299) || (defined(CONFIG_DVB_STV0299_MODULE) && defined(MODULE))
++extern struct dvb_frontend *stv0299_attach(const struct stv0299_config *config,
++                                         struct i2c_adapter *i2c);
++#else
++static inline struct dvb_frontend *stv0299_attach(const struct stv0299_config *config,
++                                         struct i2c_adapter *i2c)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return NULL;
++}
++#endif // CONFIG_DVB_STV0299
++
++static inline int stv0299_writereg(struct dvb_frontend *fe, u8 reg, u8 val) {
++      int r = 0;
++      u8 buf[] = {reg, val};
++      if (fe->ops.write)
++              r = fe->ops.write(fe, buf, 2);
++      return r;
++}
+ 
+ #endif // STV0299_H
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/stv0900.h linux-2.6.18/drivers/media/dvb/frontends/stv0900.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/stv0900.h    1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/stv0900.h 2010-09-09 12:38:50.000000000 +0000
+@@ -0,0 +1,72 @@
++/*
++ * stv0900.h
++ *
++ * Driver for ST STV0900 satellite demodulator IC.
++ *
++ * Copyright (C) ST Microelectronics.
++ * Copyright (C) 2009 NetUP Inc.
++ * Copyright (C) 2009 Igor M. Liplianin <liplianin@netup.ru>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ *
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++ */
++
++#ifndef STV0900_H
++#define STV0900_H
++
++#include <linux/dvb/frontend.h>
++#include "dvb_frontend.h"
++
++struct stv0900_reg {
++      u16 addr;
++      u8  val;
++};
++
++struct stv0900_config {
++      u8 demod_address;
++      u8 demod_mode;
++      u32 xtal;
++      u8 clkmode;/* 0 for CLKI,  2 for XTALI */
++
++      u8 diseqc_mode;
++
++      u8 path1_mode;
++      u8 path2_mode;
++      struct stv0900_reg *ts_config_regs;
++      u8 tun1_maddress;/* 0, 1, 2, 3 for 0xc0, 0xc2, 0xc4, 0xc6 */
++      u8 tun2_maddress;
++      u8 tun1_adc;/* 1 for stv6110, 2 for stb6100 */
++      u8 tun2_adc;
++      u8 tun1_type;/* for now 3 for stb6100 auto, else - software */
++      u8 tun2_type;
++      /* Set device param to start dma */
++      int (*set_ts_params)(struct dvb_frontend *fe, int is_punctured);
++};
++
++#if defined(CONFIG_DVB_STV0900) || (defined(CONFIG_DVB_STV0900_MODULE) \
++                                                      && defined(MODULE))
++extern struct dvb_frontend *stv0900_attach(const struct stv0900_config *config,
++                                      struct i2c_adapter *i2c, int demod);
++#else
++static inline struct dvb_frontend *stv0900_attach(const struct stv0900_config *config,
++                                      struct i2c_adapter *i2c, int demod)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return NULL;
++}
++#endif
++
++#endif
++
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/stv0900_init.h linux-2.6.18/drivers/media/dvb/frontends/stv0900_init.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/stv0900_init.h       1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/stv0900_init.h    2010-09-09 12:38:50.000000000 +0000
+@@ -0,0 +1,584 @@
++/*
++ * stv0900_init.h
++ *
++ * Driver for ST STV0900 satellite demodulator IC.
++ *
++ * Copyright (C) ST Microelectronics.
++ * Copyright (C) 2009 NetUP Inc.
++ * Copyright (C) 2009 Igor M. Liplianin <liplianin@netup.ru>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ *
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++ */
++
++#ifndef STV0900_INIT_H
++#define STV0900_INIT_H
++
++#include "stv0900_priv.h"
++
++/* DVBS2 C/N Look-Up table */
++static const struct stv0900_table stv0900_s2_cn = {
++      55,
++      {
++              { -30,  13348 }, /*C/N=-3dB*/
++              { -20,  12640 }, /*C/N=-2dB*/
++              { -10,  11883 }, /*C/N=-1dB*/
++              { 0,    11101 }, /*C/N=-0dB*/
++              { 5,    10718 }, /*C/N=0.5dB*/
++              { 10,   10339 }, /*C/N=1.0dB*/
++              { 15,   9947 }, /*C/N=1.5dB*/
++              { 20,   9552 }, /*C/N=2.0dB*/
++              { 25,   9183 }, /*C/N=2.5dB*/
++              { 30,   8799 }, /*C/N=3.0dB*/
++              { 35,   8422 }, /*C/N=3.5dB*/
++              { 40,   8062 }, /*C/N=4.0dB*/
++              { 45,   7707 }, /*C/N=4.5dB*/
++              { 50,   7353 }, /*C/N=5.0dB*/
++              { 55,   7025 }, /*C/N=5.5dB*/
++              { 60,   6684 }, /*C/N=6.0dB*/
++              { 65,   6331 }, /*C/N=6.5dB*/
++              { 70,   6036 }, /*C/N=7.0dB*/
++              { 75,   5727 }, /*C/N=7.5dB*/
++              { 80,   5437 }, /*C/N=8.0dB*/
++              { 85,   5164 }, /*C/N=8.5dB*/
++              { 90,   4902 }, /*C/N=9.0dB*/
++              { 95,   4653 }, /*C/N=9.5dB*/
++              { 100,  4408 }, /*C/N=10.0dB*/
++              { 105,  4187 }, /*C/N=10.5dB*/
++              { 110,  3961 }, /*C/N=11.0dB*/
++              { 115,  3751 }, /*C/N=11.5dB*/
++              { 120,  3558 }, /*C/N=12.0dB*/
++              { 125,  3368 }, /*C/N=12.5dB*/
++              { 130,  3191 }, /*C/N=13.0dB*/
++              { 135,  3017 }, /*C/N=13.5dB*/
++              { 140,  2862 }, /*C/N=14.0dB*/
++              { 145,  2710 }, /*C/N=14.5dB*/
++              { 150,  2565 }, /*C/N=15.0dB*/
++              { 160,  2300 }, /*C/N=16.0dB*/
++              { 170,  2058 }, /*C/N=17.0dB*/
++              { 180,  1849 }, /*C/N=18.0dB*/
++              { 190,  1663 }, /*C/N=19.0dB*/
++              { 200,  1495 }, /*C/N=20.0dB*/
++              { 210,  1349 }, /*C/N=21.0dB*/
++              { 220,  1222 }, /*C/N=22.0dB*/
++              { 230,  1110 }, /*C/N=23.0dB*/
++              { 240,  1011 }, /*C/N=24.0dB*/
++              { 250,  925 }, /*C/N=25.0dB*/
++              { 260,  853 }, /*C/N=26.0dB*/
++              { 270,  789 }, /*C/N=27.0dB*/
++              { 280,  734 }, /*C/N=28.0dB*/
++              { 290,  690 }, /*C/N=29.0dB*/
++              { 300,  650 }, /*C/N=30.0dB*/
++              { 310,  619 }, /*C/N=31.0dB*/
++              { 320,  593 }, /*C/N=32.0dB*/
++              { 330,  571 }, /*C/N=33.0dB*/
++              { 400,  498 }, /*C/N=40.0dB*/
++              { 450,  484 }, /*C/N=45.0dB*/
++              { 500,  481 }  /*C/N=50.0dB*/
++      }
++};
++
++/* RF level C/N Look-Up table */
++static const struct stv0900_table stv0900_rf = {
++      14,
++      {
++              { -5, 0xCAA1 }, /*-5dBm*/
++              { -10, 0xC229 }, /*-10dBm*/
++              { -15, 0xBB08 }, /*-15dBm*/
++              { -20, 0xB4BC }, /*-20dBm*/
++              { -25, 0xAD5A }, /*-25dBm*/
++              { -30, 0xA298 }, /*-30dBm*/
++              { -35, 0x98A8 }, /*-35dBm*/
++              { -40, 0x8389 }, /*-40dBm*/
++              { -45, 0x59BE }, /*-45dBm*/
++              { -50, 0x3A14 }, /*-50dBm*/
++              { -55, 0x2D11 }, /*-55dBm*/
++              { -60, 0x210D }, /*-60dBm*/
++              { -65, 0xA14F }, /*-65dBm*/
++              { -70, 0x7AA }  /*-70dBm*/
++      }
++};
++
++struct stv0900_car_loop_optim {
++      enum fe_stv0900_modcode modcode;
++      u8 car_loop_pilots_on_2;
++      u8 car_loop_pilots_off_2;
++      u8 car_loop_pilots_on_5;
++      u8 car_loop_pilots_off_5;
++      u8 car_loop_pilots_on_10;
++      u8 car_loop_pilots_off_10;
++      u8 car_loop_pilots_on_20;
++      u8 car_loop_pilots_off_20;
++      u8 car_loop_pilots_on_30;
++      u8 car_loop_pilots_off_30;
++
++};
++
++struct stv0900_short_frames_car_loop_optim {
++      enum fe_stv0900_modulation modulation;
++      u8 car_loop_cut12_2;    /* Cut 1.2,   SR<=3msps     */
++      u8 car_loop_cut20_2;    /* Cut 2.0,   SR<3msps      */
++      u8 car_loop_cut12_5;    /* Cut 1.2,   3<SR<=7msps   */
++      u8 car_loop_cut20_5;    /* Cut 2.0,   3<SR<=7msps   */
++      u8 car_loop_cut12_10;   /* Cut 1.2,   7<SR<=15msps  */
++      u8 car_loop_cut20_10;   /* Cut 2.0,   7<SR<=15msps  */
++      u8 car_loop_cut12_20;   /* Cut 1.2,   10<SR<=25msps */
++      u8 car_loop_cut20_20;   /* Cut 2.0,   10<SR<=25msps */
++      u8 car_loop_cut12_30;   /* Cut 1.2,   25<SR<=45msps */
++      u8 car_loop_cut20_30;   /* Cut 2.0,   10<SR<=45msps */
++
++};
++
++struct stv0900_short_frames_car_loop_optim_vs_mod {
++      enum fe_stv0900_modulation modulation;
++      u8 car_loop_2;    /* SR<3msps      */
++      u8 car_loop_5;    /* 3<SR<=7msps   */
++      u8 car_loop_10;   /* 7<SR<=15msps  */
++      u8 car_loop_20;   /* 10<SR<=25msps */
++      u8 car_loop_30;   /* 10<SR<=45msps */
++};
++
++/* Cut 1.x Tracking carrier loop carrier QPSK 1/2 to 8PSK 9/10 long Frame */
++static const struct stv0900_car_loop_optim FE_STV0900_S2CarLoop[14] = {
++      /*Modcod                2MPon   2MPoff  5MPon   5MPoff  10MPon
++                              10MPoff 20MPon  20MPoff 30MPon  30MPoff */
++      { STV0900_QPSK_12,      0x1C,   0x0D,   0x1B,   0x2C,   0x3A,
++                              0x1C,   0x2A,   0x3B,   0x2A,   0x1B },
++      { STV0900_QPSK_35,      0x2C,   0x0D,   0x2B,   0x2C,   0x3A,
++                              0x0C,   0x3A,   0x2B,   0x2A,   0x0B },
++      { STV0900_QPSK_23,      0x2C,   0x0D,   0x2B,   0x2C,   0x0B,
++                              0x0C,   0x3A,   0x1B,   0x2A,   0x3A },
++      { STV0900_QPSK_34,      0x3C,   0x0D,   0x3B,   0x1C,   0x0B,
++                              0x3B,   0x3A,   0x0B,   0x2A,   0x3A },
++      { STV0900_QPSK_45,      0x3C,   0x0D,   0x3B,   0x1C,   0x0B,
++                              0x3B,   0x3A,   0x0B,   0x2A,   0x3A },
++      { STV0900_QPSK_56,      0x0D,   0x0D,   0x3B,   0x1C,   0x0B,
++                              0x3B,   0x3A,   0x0B,   0x2A,   0x3A },
++      { STV0900_QPSK_89,      0x0D,   0x0D,   0x3B,   0x1C,   0x1B,
++                              0x3B,   0x3A,   0x0B,   0x2A,   0x3A },
++      { STV0900_QPSK_910,     0x1D,   0x0D,   0x3B,   0x1C,   0x1B,
++                              0x3B,   0x3A,   0x0B,   0x2A,   0x3A },
++      { STV0900_8PSK_35,      0x29,   0x3B,   0x09,   0x2B,   0x38,
++                              0x0B,   0x18,   0x1A,   0x08,   0x0A },
++      { STV0900_8PSK_23,      0x0A,   0x3B,   0x29,   0x2B,   0x19,
++                              0x0B,   0x38,   0x1A,   0x18,   0x0A },
++      { STV0900_8PSK_34,      0x3A,   0x3B,   0x2A,   0x2B,   0x39,
++                              0x0B,   0x19,   0x1A,   0x38,   0x0A },
++      { STV0900_8PSK_56,      0x1B,   0x3B,   0x0B,   0x2B,   0x1A,
++                              0x0B,   0x39,   0x1A,   0x19,   0x0A },
++      { STV0900_8PSK_89,      0x3B,   0x3B,   0x0B,   0x2B,   0x2A,
++                              0x0B,   0x39,   0x1A,   0x29,   0x39 },
++      { STV0900_8PSK_910,     0x3B,   0x3B,   0x0B,   0x2B,   0x2A,
++                              0x0B,   0x39,   0x1A,   0x29,   0x39 }
++};
++
++
++/* Cut 2.0 Tracking carrier loop carrier QPSK 1/2 to 8PSK 9/10 long Frame */
++static const struct stv0900_car_loop_optim FE_STV0900_S2CarLoopCut20[14] = {
++      /* Modcod               2MPon   2MPoff  5MPon   5MPoff  10MPon
++                              10MPoff 20MPon  20MPoff 30MPon  30MPoff */
++      { STV0900_QPSK_12,      0x1F,   0x3F,   0x1E,   0x3F,   0x3D,
++                              0x1F,   0x3D,   0x3E,   0x3D,   0x1E },
++      { STV0900_QPSK_35,      0x2F,   0x3F,   0x2E,   0x2F,   0x3D,
++                              0x0F,   0x0E,   0x2E,   0x3D,   0x0E },
++      { STV0900_QPSK_23,      0x2F,   0x3F,   0x2E,   0x2F,   0x0E,
++                              0x0F,   0x0E,   0x1E,   0x3D,   0x3D },
++      { STV0900_QPSK_34,      0x3F,   0x3F,   0x3E,   0x1F,   0x0E,
++                              0x3E,   0x0E,   0x1E,   0x3D,   0x3D },
++      { STV0900_QPSK_45,      0x3F,   0x3F,   0x3E,   0x1F,   0x0E,
++                              0x3E,   0x0E,   0x1E,   0x3D,   0x3D },
++      { STV0900_QPSK_56,      0x3F,   0x3F,   0x3E,   0x1F,   0x0E,
++                              0x3E,   0x0E,   0x1E,   0x3D,   0x3D },
++      { STV0900_QPSK_89,      0x3F,   0x3F,   0x3E,   0x1F,   0x1E,
++                              0x3E,   0x0E,   0x1E,   0x3D,   0x3D },
++      { STV0900_QPSK_910,     0x3F,   0x3F,   0x3E,   0x1F,   0x1E,
++                              0x3E,   0x0E,   0x1E,   0x3D,   0x3D },
++      { STV0900_8PSK_35,      0x3c,   0x0c,   0x1c,   0x3b,   0x0c,
++                              0x3b,   0x2b,   0x2b,   0x1b,   0x2b },
++      { STV0900_8PSK_23,      0x1d,   0x0c,   0x3c,   0x0c,   0x2c,
++                              0x3b,   0x0c,   0x2b,   0x2b,   0x2b },
++      { STV0900_8PSK_34,      0x0e,   0x1c,   0x3d,   0x0c,   0x0d,
++                              0x3b,   0x2c,   0x3b,   0x0c,   0x2b },
++      { STV0900_8PSK_56,      0x2e,   0x3e,   0x1e,   0x2e,   0x2d,
++                              0x1e,   0x3c,   0x2d,   0x2c,   0x1d },
++      { STV0900_8PSK_89,      0x3e,   0x3e,   0x1e,   0x2e,   0x3d,
++                              0x1e,   0x0d,   0x2d,   0x3c,   0x1d },
++      { STV0900_8PSK_910,     0x3e,   0x3e,   0x1e,   0x2e,   0x3d,
++                              0x1e,   0x1d,   0x2d,   0x0d,   0x1d },
++};
++
++
++
++/* Cut 2.0 Tracking carrier loop carrier 16APSK 2/3 to 32APSK 9/10 long Frame */
++static const struct stv0900_car_loop_optim FE_STV0900_S2APSKCarLoopCut20[11] = {
++      /* Modcod               2MPon   2MPoff  5MPon   5MPoff  10MPon
++                              10MPoff 20MPon  20MPoff 30MPon  30MPoff */
++      { STV0900_16APSK_23,    0x0C,   0x0C,   0x0C,   0x0C,   0x1D,
++                              0x0C,   0x3C,   0x0C,   0x2C,   0x0C },
++      { STV0900_16APSK_34,    0x0C,   0x0C,   0x0C,   0x0C,   0x0E,
++                              0x0C,   0x2D,   0x0C,   0x1D,   0x0C },
++      { STV0900_16APSK_45,    0x0C,   0x0C,   0x0C,   0x0C,   0x1E,
++                              0x0C,   0x3D,   0x0C,   0x2D,   0x0C },
++      { STV0900_16APSK_56,    0x0C,   0x0C,   0x0C,   0x0C,   0x1E,
++                              0x0C,   0x3D,   0x0C,   0x2D,   0x0C },
++      { STV0900_16APSK_89,    0x0C,   0x0C,   0x0C,   0x0C,   0x2E,
++                              0x0C,   0x0E,   0x0C,   0x3D,   0x0C },
++      { STV0900_16APSK_910,   0x0C,   0x0C,   0x0C,   0x0C,   0x2E,
++                              0x0C,   0x0E,   0x0C,   0x3D,   0x0C },
++      { STV0900_32APSK_34,    0x0C,   0x0C,   0x0C,   0x0C,   0x0C,
++                              0x0C,   0x0C,   0x0C,   0x0C,   0x0C },
++      { STV0900_32APSK_45,    0x0C,   0x0C,   0x0C,   0x0C,   0x0C,
++                              0x0C,   0x0C,   0x0C,   0x0C,   0x0C },
++      { STV0900_32APSK_56,    0x0C,   0x0C,   0x0C,   0x0C,   0x0C,
++                              0x0C,   0x0C,   0x0C,   0x0C,   0x0C },
++      { STV0900_32APSK_89,    0x0C,   0x0C,   0x0C,   0x0C,   0x0C,
++                              0x0C,   0x0C,   0x0C,   0x0C,   0x0C },
++      { STV0900_32APSK_910,   0x0C,   0x0C,   0x0C,   0x0C,   0x0C,
++                              0x0C,   0x0C,   0x0C,   0x0C,   0x0C },
++};
++
++
++/* Cut 2.0 Tracking carrier loop carrier QPSK 1/4 to QPSK 2/5 long Frame */
++static const struct stv0900_car_loop_optim FE_STV0900_S2LowQPCarLoopCut20[3] = {
++      /* Modcod               2MPon   2MPoff  5MPon   5MPoff  10MPon
++                              10MPoff 20MPon  20MPoff 30MPon  30MPoff */
++      { STV0900_QPSK_14,      0x0F,   0x3F,   0x0E,   0x3F,   0x2D,
++                              0x2F,   0x2D,   0x1F,   0x3D,   0x3E },
++      { STV0900_QPSK_13,      0x0F,   0x3F,   0x0E,   0x3F,   0x2D,
++                              0x2F,   0x3D,   0x0F,   0x3D,   0x2E },
++      { STV0900_QPSK_25,      0x1F,   0x3F,   0x1E,   0x3F,   0x3D,
++                              0x1F,   0x3D,   0x3E,   0x3D,   0x2E }
++};
++
++
++/* Cut 2.0 Tracking carrier loop carrier  short Frame, cut 1.2 and 2.0 */
++static const
++struct stv0900_short_frames_car_loop_optim FE_STV0900_S2ShortCarLoop[4] = {
++      /*Mod           2Mcut1.2 2Mcut2.0 5Mcut1.2 5Mcut2.0 10Mcut1.2
++                      10Mcut2.0 20Mcut1.2 20M_cut2.0 30Mcut1.2 30Mcut2.0*/
++      { STV0900_QPSK,         0x3C,   0x2F,   0x2B,   0x2E,   0x0B,
++                              0x0E,   0x3A,   0x0E,   0x2A,   0x3D },
++      { STV0900_8PSK,         0x0B,   0x3E,   0x2A,   0x0E,   0x0A,
++                              0x2D,   0x19,   0x0D,   0x09,   0x3C },
++      { STV0900_16APSK,       0x1B,   0x1E,   0x1B,   0x1E,   0x1B,
++                              0x1E,   0x3A,   0x3D,   0x2A,   0x2D },
++      { STV0900_32APSK,       0x1B,   0x1E,   0x1B,   0x1E,   0x1B,
++                              0x1E,   0x3A,   0x3D,   0x2A,   0x2D }
++};
++
++static        const struct stv0900_car_loop_optim FE_STV0900_S2CarLoopCut30[14] = {
++      /*Modcod                2MPon   2MPoff  5MPon   5MPoff  10MPon
++                              10MPoff 20MPon  20MPoff 30MPon  30MPoff */
++      { STV0900_QPSK_12,      0x3C,   0x2C,   0x0C,   0x2C,   0x1B,
++                              0x2C,   0x1B,   0x1C,   0x0B,   0x3B },
++      { STV0900_QPSK_35,      0x0D,   0x0D,   0x0C,   0x0D,   0x1B,
++                              0x3C,   0x1B,   0x1C,   0x0B,   0x3B },
++      { STV0900_QPSK_23,      0x1D,   0x0D,   0x0C,   0x1D,   0x2B,
++                              0x3C,   0x1B,   0x1C,   0x0B,   0x3B },
++      { STV0900_QPSK_34,      0x1D,   0x1D,   0x0C,   0x1D,   0x2B,
++                              0x3C,   0x1B,   0x1C,   0x0B,   0x3B },
++      { STV0900_QPSK_45,      0x2D,   0x1D,   0x1C,   0x1D,   0x2B,
++                              0x3C,   0x2B,   0x0C,   0x1B,   0x3B },
++      { STV0900_QPSK_56,      0x2D,   0x1D,   0x1C,   0x1D,   0x2B,
++                              0x3C,   0x2B,   0x0C,   0x1B,   0x3B },
++      { STV0900_QPSK_89,      0x3D,   0x2D,   0x1C,   0x1D,   0x3B,
++                              0x3C,   0x2B,   0x0C,   0x1B,   0x3B },
++      { STV0900_QPSK_910,     0x3D,   0x2D,   0x1C,   0x1D,   0x3B,
++                              0x3C,   0x2B,   0x0C,   0x1B,   0x3B },
++      { STV0900_8PSK_35,      0x39,   0x19,   0x39,   0x19,   0x19,
++                              0x19,   0x19,   0x19,   0x09,   0x19 },
++      { STV0900_8PSK_23,      0x2A,   0x39,   0x1A,   0x0A,   0x39,
++                              0x0A,   0x29,   0x39,   0x29,   0x0A },
++      { STV0900_8PSK_34,      0x0B,   0x3A,   0x0B,   0x0B,   0x3A,
++                              0x1B,   0x1A,   0x0B,   0x1A,   0x3A },
++      { STV0900_8PSK_56,      0x0C,   0x1B,   0x3B,   0x2B,   0x1B,
++                              0x3B,   0x3A,   0x3B,   0x3A,   0x1B },
++      { STV0900_8PSK_89,      0x2C,   0x2C,   0x2C,   0x1C,   0x2B,
++                              0x0C,   0x0B,   0x3B,   0x0B,   0x1B },
++      { STV0900_8PSK_910,     0x2C,   0x3C,   0x2C,   0x1C,   0x3B,
++                              0x1C,   0x0B,   0x3B,   0x0B,   0x1B }
++};
++
++static        const
++struct stv0900_car_loop_optim FE_STV0900_S2APSKCarLoopCut30[11] = {
++      /*Modcod                2MPon   2MPoff  5MPon   5MPoff  10MPon
++                              10MPoff 20MPon  20MPoff 30MPon  30MPoff */
++      { STV0900_16APSK_23,    0x0A,   0x0A,   0x0A,   0x0A,   0x1A,
++                              0x0A,   0x3A,   0x0A,   0x2A,   0x0A },
++      { STV0900_16APSK_34,    0x0A,   0x0A,   0x0A,   0x0A,   0x0B,
++                              0x0A,   0x3B,   0x0A,   0x1B,   0x0A },
++      { STV0900_16APSK_45,    0x0A,   0x0A,   0x0A,   0x0A,   0x1B,
++                              0x0A,   0x3B,   0x0A,   0x2B,   0x0A },
++      { STV0900_16APSK_56,    0x0A,   0x0A,   0x0A,   0x0A,   0x1B,
++                              0x0A,   0x3B,   0x0A,   0x2B,   0x0A },
++      { STV0900_16APSK_89,    0x0A,   0x0A,   0x0A,   0x0A,   0x2B,
++                              0x0A,   0x0C,   0x0A,   0x3B,   0x0A },
++      { STV0900_16APSK_910,   0x0A,   0x0A,   0x0A,   0x0A,   0x2B,
++                              0x0A,   0x0C,   0x0A,   0x3B,   0x0A },
++      { STV0900_32APSK_34,    0x0A,   0x0A,   0x0A,   0x0A,   0x0A,
++                              0x0A,   0x0A,   0x0A,   0x0A,   0x0A },
++      { STV0900_32APSK_45,    0x0A,   0x0A,   0x0A,   0x0A,   0x0A,
++                              0x0A,   0x0A,   0x0A,   0x0A,   0x0A },
++      { STV0900_32APSK_56,    0x0A,   0x0A,   0x0A,   0x0A,   0x0A,
++                              0x0A,   0x0A,   0x0A,   0x0A,   0x0A },
++      { STV0900_32APSK_89,    0x0A,   0x0A,   0x0A,   0x0A,   0x0A,
++                              0x0A,   0x0A,   0x0A,   0x0A,   0x0A },
++      { STV0900_32APSK_910,   0x0A,   0x0A,   0x0A,   0x0A,   0x0A,
++                              0x0A,   0x0A,   0x0A,   0x0A,   0x0A }
++};
++
++static        const
++struct stv0900_car_loop_optim FE_STV0900_S2LowQPCarLoopCut30[3] = {
++      /*Modcod                2MPon   2MPoff  5MPon   5MPoff  10MPon
++                              10MPoff 20MPon  20MPoff 30MPon  30MPoff*/
++      { STV0900_QPSK_14,      0x0C,   0x3C,   0x0B,   0x3C,   0x2A,
++                              0x2C,   0x2A,   0x1C,   0x3A,   0x3B },
++      { STV0900_QPSK_13,      0x0C,   0x3C,   0x0B,   0x3C,   0x2A,
++                              0x2C,   0x3A,   0x0C,   0x3A,   0x2B },
++      { STV0900_QPSK_25,      0x1C,   0x3C,   0x1B,   0x3C,   0x3A,
++                              0x1C,   0x3A,   0x3B,   0x3A,   0x2B }
++};
++
++static        const struct stv0900_short_frames_car_loop_optim_vs_mod
++FE_STV0900_S2ShortCarLoopCut30[4] = {
++      /*Mod           2Mcut3.0 5Mcut3.0 10Mcut3.0 20Mcut3.0 30Mcut3.0*/
++      { STV0900_QPSK,         0x2C,   0x2B,   0x0B,   0x0B,   0x3A },
++      { STV0900_8PSK,         0x3B,   0x0B,   0x2A,   0x0A,   0x39 },
++      { STV0900_16APSK,       0x1B,   0x1B,   0x1B,   0x3A,   0x2A },
++      { STV0900_32APSK,       0x1B,   0x1B,   0x1B,   0x3A,   0x2A },
++
++};
++
++static const u16 STV0900_InitVal[181][2] = {
++      { R0900_OUTCFG          , 0x00  },
++      { R0900_AGCRF1CFG       , 0x11  },
++      { R0900_AGCRF2CFG       , 0x13  },
++      { R0900_TSGENERAL1X     , 0x14  },
++      { R0900_TSTTNR2         , 0x21  },
++      { R0900_TSTTNR4         , 0x21  },
++      { R0900_P2_DISTXCTL     , 0x22  },
++      { R0900_P2_F22TX        , 0xc0  },
++      { R0900_P2_F22RX        , 0xc0  },
++      { R0900_P2_DISRXCTL     , 0x00  },
++      { R0900_P2_TNRSTEPS     , 0x87  },
++      { R0900_P2_TNRGAIN      , 0x09  },
++      { R0900_P2_DMDCFGMD     , 0xF9  },
++      { R0900_P2_DEMOD        , 0x08  },
++      { R0900_P2_DMDCFG3      , 0xc4  },
++      { R0900_P2_CARFREQ      , 0xed  },
++      { R0900_P2_TNRCFG2      , 0x02  },
++      { R0900_P2_TNRCFG3      , 0x02  },
++      { R0900_P2_LDT          , 0xd0  },
++      { R0900_P2_LDT2         , 0xb8  },
++      { R0900_P2_TMGCFG       , 0xd2  },
++      { R0900_P2_TMGTHRISE    , 0x20  },
++      { R0900_P2_TMGTHFALL    , 0x00  },
++      { R0900_P2_FECSPY       , 0x88  },
++      { R0900_P2_FSPYDATA     , 0x3a  },
++      { R0900_P2_FBERCPT4     , 0x00  },
++      { R0900_P2_FSPYBER      , 0x10  },
++      { R0900_P2_ERRCTRL1     , 0x35  },
++      { R0900_P2_ERRCTRL2     , 0xc1  },
++      { R0900_P2_CFRICFG      , 0xf8  },
++      { R0900_P2_NOSCFG       , 0x1c  },
++      { R0900_P2_DMDT0M       , 0x20  },
++      { R0900_P2_CORRELMANT   , 0x70  },
++      { R0900_P2_CORRELABS    , 0x88  },
++      { R0900_P2_AGC2O        , 0x5b  },
++      { R0900_P2_AGC2REF      , 0x38  },
++      { R0900_P2_CARCFG       , 0xe4  },
++      { R0900_P2_ACLC         , 0x1A  },
++      { R0900_P2_BCLC         , 0x09  },
++      { R0900_P2_CARHDR       , 0x08  },
++      { R0900_P2_KREFTMG      , 0xc1  },
++      { R0900_P2_SFRUPRATIO   , 0xf0  },
++      { R0900_P2_SFRLOWRATIO  , 0x70  },
++      { R0900_P2_SFRSTEP      , 0x58  },
++      { R0900_P2_TMGCFG2      , 0x01  },
++      { R0900_P2_CAR2CFG      , 0x26  },
++      { R0900_P2_BCLC2S2Q     , 0x86  },
++      { R0900_P2_BCLC2S28     , 0x86  },
++      { R0900_P2_SMAPCOEF7    , 0x77  },
++      { R0900_P2_SMAPCOEF6    , 0x85  },
++      { R0900_P2_SMAPCOEF5    , 0x77  },
++      { R0900_P2_TSCFGL       , 0x20  },
++      { R0900_P2_DMDCFG2      , 0x3b  },
++      { R0900_P2_MODCODLST0   , 0xff  },
++      { R0900_P2_MODCODLST1   , 0xff  },
++      { R0900_P2_MODCODLST2   , 0xff  },
++      { R0900_P2_MODCODLST3   , 0xff  },
++      { R0900_P2_MODCODLST4   , 0xff  },
++      { R0900_P2_MODCODLST5   , 0xff  },
++      { R0900_P2_MODCODLST6   , 0xff  },
++      { R0900_P2_MODCODLST7   , 0xcc  },
++      { R0900_P2_MODCODLST8   , 0xcc  },
++      { R0900_P2_MODCODLST9   , 0xcc  },
++      { R0900_P2_MODCODLSTA   , 0xcc  },
++      { R0900_P2_MODCODLSTB   , 0xcc  },
++      { R0900_P2_MODCODLSTC   , 0xcc  },
++      { R0900_P2_MODCODLSTD   , 0xcc  },
++      { R0900_P2_MODCODLSTE   , 0xcc  },
++      { R0900_P2_MODCODLSTF   , 0xcf  },
++      { R0900_P1_DISTXCTL     , 0x22  },
++      { R0900_P1_F22TX        , 0xc0  },
++      { R0900_P1_F22RX        , 0xc0  },
++      { R0900_P1_DISRXCTL     , 0x00  },
++      { R0900_P1_TNRSTEPS     , 0x87  },
++      { R0900_P1_TNRGAIN      , 0x09  },
++      { R0900_P1_DMDCFGMD     , 0xf9  },
++      { R0900_P1_DEMOD        , 0x08  },
++      { R0900_P1_DMDCFG3      , 0xc4  },
++      { R0900_P1_DMDT0M       , 0x20  },
++      { R0900_P1_CARFREQ      , 0xed  },
++      { R0900_P1_TNRCFG2      , 0x82  },
++      { R0900_P1_TNRCFG3      , 0x02  },
++      { R0900_P1_LDT          , 0xd0  },
++      { R0900_P1_LDT2         , 0xb8  },
++      { R0900_P1_TMGCFG       , 0xd2  },
++      { R0900_P1_TMGTHRISE    , 0x20  },
++      { R0900_P1_TMGTHFALL    , 0x00  },
++      { R0900_P1_SFRUPRATIO   , 0xf0  },
++      { R0900_P1_SFRLOWRATIO  , 0x70  },
++      { R0900_P1_TSCFGL       , 0x20  },
++      { R0900_P1_FECSPY       , 0x88  },
++      { R0900_P1_FSPYDATA     , 0x3a  },
++      { R0900_P1_FBERCPT4     , 0x00  },
++      { R0900_P1_FSPYBER      , 0x10  },
++      { R0900_P1_ERRCTRL1     , 0x35  },
++      { R0900_P1_ERRCTRL2     , 0xc1  },
++      { R0900_P1_CFRICFG      , 0xf8  },
++      { R0900_P1_NOSCFG       , 0x1c  },
++      { R0900_P1_CORRELMANT   , 0x70  },
++      { R0900_P1_CORRELABS    , 0x88  },
++      { R0900_P1_AGC2O        , 0x5b  },
++      { R0900_P1_AGC2REF      , 0x38  },
++      { R0900_P1_CARCFG       , 0xe4  },
++      { R0900_P1_ACLC         , 0x1A  },
++      { R0900_P1_BCLC         , 0x09  },
++      { R0900_P1_CARHDR       , 0x08  },
++      { R0900_P1_KREFTMG      , 0xc1  },
++      { R0900_P1_SFRSTEP      , 0x58  },
++      { R0900_P1_TMGCFG2      , 0x01  },
++      { R0900_P1_CAR2CFG      , 0x26  },
++      { R0900_P1_BCLC2S2Q     , 0x86  },
++      { R0900_P1_BCLC2S28     , 0x86  },
++      { R0900_P1_SMAPCOEF7    , 0x77  },
++      { R0900_P1_SMAPCOEF6    , 0x85  },
++      { R0900_P1_SMAPCOEF5    , 0x77  },
++      { R0900_P1_DMDCFG2      , 0x3b  },
++      { R0900_P1_MODCODLST0   , 0xff  },
++      { R0900_P1_MODCODLST1   , 0xff  },
++      { R0900_P1_MODCODLST2   , 0xff  },
++      { R0900_P1_MODCODLST3   , 0xff  },
++      { R0900_P1_MODCODLST4   , 0xff  },
++      { R0900_P1_MODCODLST5   , 0xff  },
++      { R0900_P1_MODCODLST6   , 0xff  },
++      { R0900_P1_MODCODLST7   , 0xcc  },
++      { R0900_P1_MODCODLST8   , 0xcc  },
++      { R0900_P1_MODCODLST9   , 0xcc  },
++      { R0900_P1_MODCODLSTA   , 0xcc  },
++      { R0900_P1_MODCODLSTB   , 0xcc  },
++      { R0900_P1_MODCODLSTC   , 0xcc  },
++      { R0900_P1_MODCODLSTD   , 0xcc  },
++      { R0900_P1_MODCODLSTE   , 0xcc  },
++      { R0900_P1_MODCODLSTF   , 0xcf  },
++      { R0900_GENCFG          , 0x1d  },
++      { R0900_NBITER_NF4      , 0x37  },
++      { R0900_NBITER_NF5      , 0x29  },
++      { R0900_NBITER_NF6      , 0x37  },
++      { R0900_NBITER_NF7      , 0x33  },
++      { R0900_NBITER_NF8      , 0x31  },
++      { R0900_NBITER_NF9      , 0x2f  },
++      { R0900_NBITER_NF10     , 0x39  },
++      { R0900_NBITER_NF11     , 0x3a  },
++      { R0900_NBITER_NF12     , 0x29  },
++      { R0900_NBITER_NF13     , 0x37  },
++      { R0900_NBITER_NF14     , 0x33  },
++      { R0900_NBITER_NF15     , 0x2f  },
++      { R0900_NBITER_NF16     , 0x39  },
++      { R0900_NBITER_NF17     , 0x3a  },
++      { R0900_NBITERNOERR     , 0x04  },
++      { R0900_GAINLLR_NF4     , 0x0C  },
++      { R0900_GAINLLR_NF5     , 0x0F  },
++      { R0900_GAINLLR_NF6     , 0x11  },
++      { R0900_GAINLLR_NF7     , 0x14  },
++      { R0900_GAINLLR_NF8     , 0x17  },
++      { R0900_GAINLLR_NF9     , 0x19  },
++      { R0900_GAINLLR_NF10    , 0x20  },
++      { R0900_GAINLLR_NF11    , 0x21  },
++      { R0900_GAINLLR_NF12    , 0x0D  },
++      { R0900_GAINLLR_NF13    , 0x0F  },
++      { R0900_GAINLLR_NF14    , 0x13  },
++      { R0900_GAINLLR_NF15    , 0x1A  },
++      { R0900_GAINLLR_NF16    , 0x1F  },
++      { R0900_GAINLLR_NF17    , 0x21  },
++      { R0900_RCCFG2          , 0x20  },
++      { R0900_P1_FECM         , 0x01  }, /*disable DSS modes*/
++      { R0900_P2_FECM         , 0x01  }, /*disable DSS modes*/
++      { R0900_P1_PRVIT        , 0x2F  }, /*disable puncture rate 6/7*/
++      { R0900_P2_PRVIT        , 0x2F  }, /*disable puncture rate 6/7*/
++      { R0900_STROUT1CFG      , 0x4c  },
++      { R0900_STROUT2CFG      , 0x4c  },
++      { R0900_CLKOUT1CFG      , 0x50  },
++      { R0900_CLKOUT2CFG      , 0x50  },
++      { R0900_DPN1CFG         , 0x4a  },
++      { R0900_DPN2CFG         , 0x4a  },
++      { R0900_DATA71CFG       , 0x52  },
++      { R0900_DATA72CFG       , 0x52  },
++      { R0900_P1_TSCFGM       , 0xc0  },
++      { R0900_P2_TSCFGM       , 0xc0  },
++      { R0900_P1_TSCFGH       , 0xe0  }, /* DVB-CI timings */
++      { R0900_P2_TSCFGH       , 0xe0  }, /* DVB-CI timings */
++      { R0900_P1_TSSPEED      , 0x40  },
++      { R0900_P2_TSSPEED      , 0x40  },
++};
++
++static const u16 STV0900_Cut20_AddOnVal[32][2] = {
++      { R0900_P2_DMDCFG3      , 0xe8  },
++      { R0900_P2_DMDCFG4      , 0x10  },
++      { R0900_P2_CARFREQ      , 0x38  },
++      { R0900_P2_CARHDR       , 0x20  },
++      { R0900_P2_KREFTMG      , 0x5a  },
++      { R0900_P2_SMAPCOEF7    , 0x06  },
++      { R0900_P2_SMAPCOEF6    , 0x00  },
++      { R0900_P2_SMAPCOEF5    , 0x04  },
++      { R0900_P2_NOSCFG       , 0x0c  },
++      { R0900_P1_DMDCFG3      , 0xe8  },
++      { R0900_P1_DMDCFG4      , 0x10  },
++      { R0900_P1_CARFREQ      , 0x38  },
++      { R0900_P1_CARHDR       , 0x20  },
++      { R0900_P1_KREFTMG      , 0x5a  },
++      { R0900_P1_SMAPCOEF7    , 0x06  },
++      { R0900_P1_SMAPCOEF6    , 0x00  },
++      { R0900_P1_SMAPCOEF5    , 0x04  },
++      { R0900_P1_NOSCFG       , 0x0c  },
++      { R0900_GAINLLR_NF4     , 0x21  },
++      { R0900_GAINLLR_NF5     , 0x21  },
++      { R0900_GAINLLR_NF6     , 0x20  },
++      { R0900_GAINLLR_NF7     , 0x1F  },
++      { R0900_GAINLLR_NF8     , 0x1E  },
++      { R0900_GAINLLR_NF9     , 0x1E  },
++      { R0900_GAINLLR_NF10    , 0x1D  },
++      { R0900_GAINLLR_NF11    , 0x1B  },
++      { R0900_GAINLLR_NF12    , 0x20  },
++      { R0900_GAINLLR_NF13    , 0x20  },
++      { R0900_GAINLLR_NF14    , 0x20  },
++      { R0900_GAINLLR_NF15    , 0x20  },
++      { R0900_GAINLLR_NF16    , 0x20  },
++      { R0900_GAINLLR_NF17    , 0x21  }
++
++};
++
++#endif
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/stv0900_priv.h linux-2.6.18/drivers/media/dvb/frontends/stv0900_priv.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/stv0900_priv.h       1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/stv0900_priv.h    2010-09-09 12:38:50.000000000 +0000
+@@ -0,0 +1,408 @@
++/*
++ * stv0900_priv.h
++ *
++ * Driver for ST STV0900 satellite demodulator IC.
++ *
++ * Copyright (C) ST Microelectronics.
++ * Copyright (C) 2009 NetUP Inc.
++ * Copyright (C) 2009 Igor M. Liplianin <liplianin@netup.ru>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ *
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++ */
++
++#ifndef STV0900_PRIV_H
++#define STV0900_PRIV_H
++
++#include <linux/i2c.h>
++
++#define ABS(X) ((X) < 0 ? (-1 * (X)) : (X))
++#define INRANGE(X, Y, Z) ((((X) <= (Y)) && ((Y) <= (Z))) \
++              || (((Z) <= (Y)) && ((Y) <= (X))) ? 1 : 0)
++
++#ifndef MAKEWORD
++#define MAKEWORD(X, Y) (((X) << 8) + (Y))
++#endif
++
++#define LSB(X) (((X) & 0xFF))
++#define MSB(Y) (((Y) >> 8) & 0xFF)
++
++#ifndef TRUE
++#define TRUE (1 == 1)
++#endif
++#ifndef FALSE
++#define FALSE (!TRUE)
++#endif
++
++#define dprintk(args...) \
++      do { \
++              if (stvdebug) \
++                      printk(KERN_DEBUG args); \
++      } while (0)
++
++#define STV0900_MAXLOOKUPSIZE 500
++#define STV0900_BLIND_SEARCH_AGC2_TH 700
++#define STV0900_BLIND_SEARCH_AGC2_TH_CUT30 1400
++#define IQPOWER_THRESHOLD  30
++
++/* One point of the lookup table */
++struct stv000_lookpoint {
++      s32 realval;/* real value */
++      s32 regval;/* binary value */
++};
++
++/* Lookup table definition */
++struct stv0900_table{
++      s32 size;/* Size of the lookup table */
++      struct stv000_lookpoint table[STV0900_MAXLOOKUPSIZE];/* Lookup table */
++};
++
++enum fe_stv0900_error {
++      STV0900_NO_ERROR = 0,
++      STV0900_INVALID_HANDLE,
++      STV0900_BAD_PARAMETER,
++      STV0900_I2C_ERROR,
++      STV0900_SEARCH_FAILED,
++};
++
++enum fe_stv0900_clock_type {
++      STV0900_USE_REGISTERS_DEFAULT,
++      STV0900_SERIAL_PUNCT_CLOCK,/*Serial punctured clock */
++      STV0900_SERIAL_CONT_CLOCK,/*Serial continues clock */
++      STV0900_PARALLEL_PUNCT_CLOCK,/*Parallel punctured clock */
++      STV0900_DVBCI_CLOCK/*Parallel continues clock : DVBCI */
++};
++
++enum fe_stv0900_search_state {
++      STV0900_SEARCH = 0,
++      STV0900_PLH_DETECTED,
++      STV0900_DVBS2_FOUND,
++      STV0900_DVBS_FOUND
++
++};
++
++enum fe_stv0900_ldpc_state {
++      STV0900_PATH1_OFF_PATH2_OFF = 0,
++      STV0900_PATH1_ON_PATH2_OFF = 1,
++      STV0900_PATH1_OFF_PATH2_ON = 2,
++      STV0900_PATH1_ON_PATH2_ON = 3
++};
++
++enum fe_stv0900_signal_type {
++      STV0900_NOAGC1 = 0,
++      STV0900_AGC1OK,
++      STV0900_NOTIMING,
++      STV0900_ANALOGCARRIER,
++      STV0900_TIMINGOK,
++      STV0900_NOAGC2,
++      STV0900_AGC2OK,
++      STV0900_NOCARRIER,
++      STV0900_CARRIEROK,
++      STV0900_NODATA,
++      STV0900_DATAOK,
++      STV0900_OUTOFRANGE,
++      STV0900_RANGEOK
++};
++
++enum fe_stv0900_demod_num {
++      STV0900_DEMOD_1,
++      STV0900_DEMOD_2
++};
++
++enum fe_stv0900_tracking_standard {
++      STV0900_DVBS1_STANDARD,/* Found Standard*/
++      STV0900_DVBS2_STANDARD,
++      STV0900_DSS_STANDARD,
++      STV0900_TURBOCODE_STANDARD,
++      STV0900_UNKNOWN_STANDARD
++};
++
++enum fe_stv0900_search_standard {
++      STV0900_AUTO_SEARCH,
++      STV0900_SEARCH_DVBS1,/* Search Standard*/
++      STV0900_SEARCH_DVBS2,
++      STV0900_SEARCH_DSS,
++      STV0900_SEARCH_TURBOCODE
++};
++
++enum fe_stv0900_search_algo {
++      STV0900_BLIND_SEARCH,/* offset freq and SR are Unknown */
++      STV0900_COLD_START,/* only the SR is known */
++      STV0900_WARM_START/* offset freq and SR are known */
++};
++
++enum fe_stv0900_modulation {
++      STV0900_QPSK,
++      STV0900_8PSK,
++      STV0900_16APSK,
++      STV0900_32APSK,
++      STV0900_UNKNOWN
++};
++
++enum fe_stv0900_modcode {
++      STV0900_DUMMY_PLF,
++      STV0900_QPSK_14,
++      STV0900_QPSK_13,
++      STV0900_QPSK_25,
++      STV0900_QPSK_12,
++      STV0900_QPSK_35,
++      STV0900_QPSK_23,
++      STV0900_QPSK_34,
++      STV0900_QPSK_45,
++      STV0900_QPSK_56,
++      STV0900_QPSK_89,
++      STV0900_QPSK_910,
++      STV0900_8PSK_35,
++      STV0900_8PSK_23,
++      STV0900_8PSK_34,
++      STV0900_8PSK_56,
++      STV0900_8PSK_89,
++      STV0900_8PSK_910,
++      STV0900_16APSK_23,
++      STV0900_16APSK_34,
++      STV0900_16APSK_45,
++      STV0900_16APSK_56,
++      STV0900_16APSK_89,
++      STV0900_16APSK_910,
++      STV0900_32APSK_34,
++      STV0900_32APSK_45,
++      STV0900_32APSK_56,
++      STV0900_32APSK_89,
++      STV0900_32APSK_910,
++      STV0900_MODCODE_UNKNOWN
++};
++
++enum fe_stv0900_fec {/*DVBS1, DSS and turbo code puncture rate*/
++      STV0900_FEC_1_2 = 0,
++      STV0900_FEC_2_3,
++      STV0900_FEC_3_4,
++      STV0900_FEC_4_5,/*for turbo code only*/
++      STV0900_FEC_5_6,
++      STV0900_FEC_6_7,/*for DSS only */
++      STV0900_FEC_7_8,
++      STV0900_FEC_8_9,/*for turbo code only*/
++      STV0900_FEC_UNKNOWN
++};
++
++enum fe_stv0900_frame_length {
++      STV0900_LONG_FRAME,
++      STV0900_SHORT_FRAME
++};
++
++enum fe_stv0900_pilot {
++      STV0900_PILOTS_OFF,
++      STV0900_PILOTS_ON
++};
++
++enum fe_stv0900_rolloff {
++      STV0900_35,
++      STV0900_25,
++      STV0900_20
++};
++
++enum fe_stv0900_search_iq {
++      STV0900_IQ_AUTO,
++      STV0900_IQ_AUTO_NORMAL_FIRST,
++      STV0900_IQ_FORCE_NORMAL,
++      STV0900_IQ_FORCE_SWAPPED
++};
++
++enum stv0900_iq_inversion {
++      STV0900_IQ_NORMAL,
++      STV0900_IQ_SWAPPED
++};
++
++enum fe_stv0900_diseqc_mode {
++      STV0900_22KHZ_Continues = 0,
++      STV0900_DISEQC_2_3_PWM = 2,
++      STV0900_DISEQC_3_3_PWM = 3,
++      STV0900_DISEQC_2_3_ENVELOP = 4,
++      STV0900_DISEQC_3_3_ENVELOP = 5
++};
++
++enum fe_stv0900_demod_mode {
++      STV0900_SINGLE = 0,
++      STV0900_DUAL
++};
++
++struct stv0900_init_params{
++      u32     dmd_ref_clk;/* Refrence,Input clock for the demod in Hz */
++
++      /* Demodulator Type (single demod or dual demod) */
++      enum fe_stv0900_demod_mode      demod_mode;
++      enum fe_stv0900_rolloff         rolloff;
++      enum fe_stv0900_clock_type      path1_ts_clock;
++
++      u8      tun1_maddress;
++      int     tuner1_adc;
++      int     tuner1_type;
++
++      /* IQ from the tuner1 to the demod */
++      enum stv0900_iq_inversion       tun1_iq_inv;
++      enum fe_stv0900_clock_type      path2_ts_clock;
++
++      u8      tun2_maddress;
++      int     tuner2_adc;
++      int     tuner2_type;
++
++      /* IQ from the tuner2 to the demod */
++      enum stv0900_iq_inversion       tun2_iq_inv;
++      struct stv0900_reg              *ts_config;
++};
++
++struct stv0900_search_params {
++      enum fe_stv0900_demod_num       path;/* Path Used demod1 or 2 */
++
++      u32     frequency;/* Transponder frequency (in KHz) */
++      u32     symbol_rate;/* Transponder symbol rate  (in bds)*/
++      u32     search_range;/* Range of the search (in Hz) */
++
++      enum fe_stv0900_search_standard standard;
++      enum fe_stv0900_modulation      modulation;
++      enum fe_stv0900_fec             fec;
++      enum fe_stv0900_modcode         modcode;
++      enum fe_stv0900_search_iq       iq_inversion;
++      enum fe_stv0900_search_algo     search_algo;
++
++};
++
++struct stv0900_signal_info {
++      int     locked;/* Transponder locked */
++      u32     frequency;/* Transponder frequency (in KHz) */
++      u32     symbol_rate;/* Transponder symbol rate  (in Mbds) */
++
++      enum fe_stv0900_tracking_standard       standard;
++      enum fe_stv0900_fec                     fec;
++      enum fe_stv0900_modcode                 modcode;
++      enum fe_stv0900_modulation              modulation;
++      enum fe_stv0900_pilot                   pilot;
++      enum fe_stv0900_frame_length            frame_len;
++      enum stv0900_iq_inversion               spectrum;
++      enum fe_stv0900_rolloff                 rolloff;
++
++      s32 Power;/* Power of the RF signal (dBm) */
++      s32 C_N;/* Carrier to noise ratio (dB x10)*/
++      u32 BER;/* Bit error rate (x10^7) */
++
++};
++
++struct stv0900_internal{
++      s32     quartz;
++      s32     mclk;
++      /* manual RollOff for DVBS1/DSS only */
++      enum fe_stv0900_rolloff         rolloff;
++      /* Demodulator use for single demod or for dual demod) */
++      enum fe_stv0900_demod_mode      demod_mode;
++
++      /*Demods */
++      s32     freq[2];
++      s32     bw[2];
++      s32     symbol_rate[2];
++      s32     srch_range[2];
++      /* for software/auto tuner */
++      int     tuner_type[2];
++
++      /* algorithm for search Blind, Cold or Warm*/
++      enum fe_stv0900_search_algo     srch_algo[2];
++      /* search standard: Auto, DVBS1/DSS only or DVBS2 only*/
++      enum fe_stv0900_search_standard srch_standard[2];
++      /* inversion search : auto, auto norma first, normal or inverted */
++      enum fe_stv0900_search_iq       srch_iq_inv[2];
++      enum fe_stv0900_modcode         modcode[2];
++      enum fe_stv0900_modulation      modulation[2];
++      enum fe_stv0900_fec             fec[2];
++
++      struct stv0900_signal_info      result[2];
++      enum fe_stv0900_error           err[2];
++
++
++      struct i2c_adapter      *i2c_adap;
++      u8                      i2c_addr;
++      u8                      clkmode;/* 0 for CLKI, 2 for XTALI */
++      u8                      chip_id;
++      struct stv0900_reg      *ts_config;
++      enum fe_stv0900_error   errs;
++      int dmds_used;
++};
++
++/* state for each demod */
++struct stv0900_state {
++      /* pointer for internal params, one for each pair of demods */
++      struct stv0900_internal         *internal;
++      struct i2c_adapter              *i2c_adap;
++      const struct stv0900_config     *config;
++      struct dvb_frontend             frontend;
++      int demod;
++};
++
++extern int stvdebug;
++
++extern s32 ge2comp(s32 a, s32 width);
++
++extern void stv0900_write_reg(struct stv0900_internal *i_params,
++                              u16 reg_addr, u8 reg_data);
++
++extern u8 stv0900_read_reg(struct stv0900_internal *i_params,
++                              u16 reg_addr);
++
++extern void stv0900_write_bits(struct stv0900_internal *i_params,
++                              u32 label, u8 val);
++
++extern u8 stv0900_get_bits(struct stv0900_internal *i_params,
++                              u32 label);
++
++extern int stv0900_get_demod_lock(struct stv0900_internal *i_params,
++                              enum fe_stv0900_demod_num demod, s32 time_out);
++extern int stv0900_check_signal_presence(struct stv0900_internal *i_params,
++                              enum fe_stv0900_demod_num demod);
++
++extern enum fe_stv0900_signal_type stv0900_algo(struct dvb_frontend *fe);
++
++extern void stv0900_set_tuner(struct dvb_frontend *fe, u32 frequency,
++                              u32 bandwidth);
++extern void stv0900_set_bandwidth(struct dvb_frontend *fe, u32 bandwidth);
++
++extern void stv0900_start_search(struct stv0900_internal *i_params,
++                              enum fe_stv0900_demod_num demod);
++
++extern u8 stv0900_get_optim_carr_loop(s32 srate,
++                              enum fe_stv0900_modcode modcode,
++                              s32 pilot, u8 chip_id);
++
++extern u8 stv0900_get_optim_short_carr_loop(s32 srate,
++                              enum fe_stv0900_modulation modulation,
++                              u8 chip_id);
++
++extern void stv0900_stop_all_s2_modcod(struct stv0900_internal *i_params,
++                              enum fe_stv0900_demod_num demod);
++
++extern void stv0900_activate_s2_modcod(struct stv0900_internal *i_params,
++                              enum fe_stv0900_demod_num demod);
++
++extern void stv0900_activate_s2_modcod_single(struct stv0900_internal *i_params,
++                              enum fe_stv0900_demod_num demod);
++
++extern enum
++fe_stv0900_tracking_standard stv0900_get_standard(struct dvb_frontend *fe,
++                              enum fe_stv0900_demod_num demod);
++
++extern u32
++stv0900_get_freq_auto(struct stv0900_internal *intp, int demod);
++
++extern void
++stv0900_set_tuner_auto(struct stv0900_internal *intp, u32 Frequency,
++                                              u32 Bandwidth, int demod);
++
++#endif
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/stv0900_reg.h linux-2.6.18/drivers/media/dvb/frontends/stv0900_reg.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/stv0900_reg.h        1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/stv0900_reg.h     2010-09-09 12:38:50.000000000 +0000
+@@ -0,0 +1,3981 @@
++/*
++ * stv0900_reg.h
++ *
++ * Driver for ST STV0900 satellite demodulator IC.
++ *
++ * Copyright (C) ST Microelectronics.
++ * Copyright (C) 2009 NetUP Inc.
++ * Copyright (C) 2009 Igor M. Liplianin <liplianin@netup.ru>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ *
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++ */
++
++#ifndef STV0900_REG_H
++#define STV0900_REG_H
++
++extern s32 shiftx(s32 x, int demod, s32 shift);
++
++#define REGx(x) shiftx(x, demod, 0x200)
++#define FLDx(x) shiftx(x, demod, 0x2000000)
++
++/*MID*/
++#define R0900_MID 0xf100
++#define F0900_MCHIP_IDENT 0xf10000f0
++#define F0900_MRELEASE 0xf100000f
++
++/*DACR1*/
++#define R0900_DACR1 0xf113
++#define F0900_DAC_MODE 0xf11300e0
++#define F0900_DAC_VALUE1 0xf113000f
++
++/*DACR2*/
++#define R0900_DACR2 0xf114
++#define F0900_DAC_VALUE0 0xf11400ff
++
++/*OUTCFG*/
++#define R0900_OUTCFG 0xf11c
++#define F0900_OUTSERRS1_HZ 0xf11c0040
++#define F0900_OUTSERRS2_HZ 0xf11c0020
++#define F0900_OUTSERRS3_HZ 0xf11c0010
++#define F0900_OUTPARRS3_HZ 0xf11c0008
++
++/*IRQSTATUS3*/
++#define R0900_IRQSTATUS3 0xf120
++#define F0900_SPLL_LOCK 0xf1200020
++#define F0900_SSTREAM_LCK_3 0xf1200010
++#define F0900_SSTREAM_LCK_2 0xf1200008
++#define F0900_SSTREAM_LCK_1 0xf1200004
++#define F0900_SDVBS1_PRF_2 0xf1200002
++#define F0900_SDVBS1_PRF_1 0xf1200001
++
++/*IRQSTATUS2*/
++#define R0900_IRQSTATUS2 0xf121
++#define F0900_SSPY_ENDSIM_3 0xf1210080
++#define F0900_SSPY_ENDSIM_2 0xf1210040
++#define F0900_SSPY_ENDSIM_1 0xf1210020
++#define F0900_SPKTDEL_ERROR_2 0xf1210010
++#define F0900_SPKTDEL_LOCKB_2 0xf1210008
++#define F0900_SPKTDEL_LOCK_2 0xf1210004
++#define F0900_SPKTDEL_ERROR_1 0xf1210002
++#define F0900_SPKTDEL_LOCKB_1 0xf1210001
++
++/*IRQSTATUS1*/
++#define R0900_IRQSTATUS1 0xf122
++#define F0900_SPKTDEL_LOCK_1 0xf1220080
++#define F0900_SDEMOD_LOCKB_2 0xf1220004
++#define F0900_SDEMOD_LOCK_2 0xf1220002
++#define F0900_SDEMOD_IRQ_2 0xf1220001
++
++/*IRQSTATUS0*/
++#define R0900_IRQSTATUS0 0xf123
++#define F0900_SDEMOD_LOCKB_1 0xf1230080
++#define F0900_SDEMOD_LOCK_1 0xf1230040
++#define F0900_SDEMOD_IRQ_1 0xf1230020
++#define F0900_SBCH_ERRFLAG 0xf1230010
++#define F0900_SDISEQC2RX_IRQ 0xf1230008
++#define F0900_SDISEQC2TX_IRQ 0xf1230004
++#define F0900_SDISEQC1RX_IRQ 0xf1230002
++#define F0900_SDISEQC1TX_IRQ 0xf1230001
++
++/*IRQMASK3*/
++#define R0900_IRQMASK3 0xf124
++#define F0900_MPLL_LOCK 0xf1240020
++#define F0900_MSTREAM_LCK_3 0xf1240010
++#define F0900_MSTREAM_LCK_2 0xf1240008
++#define F0900_MSTREAM_LCK_1 0xf1240004
++#define F0900_MDVBS1_PRF_2 0xf1240002
++#define F0900_MDVBS1_PRF_1 0xf1240001
++
++/*IRQMASK2*/
++#define R0900_IRQMASK2 0xf125
++#define F0900_MSPY_ENDSIM_3 0xf1250080
++#define F0900_MSPY_ENDSIM_2 0xf1250040
++#define F0900_MSPY_ENDSIM_1 0xf1250020
++#define F0900_MPKTDEL_ERROR_2 0xf1250010
++#define F0900_MPKTDEL_LOCKB_2 0xf1250008
++#define F0900_MPKTDEL_LOCK_2 0xf1250004
++#define F0900_MPKTDEL_ERROR_1 0xf1250002
++#define F0900_MPKTDEL_LOCKB_1 0xf1250001
++
++/*IRQMASK1*/
++#define R0900_IRQMASK1 0xf126
++#define F0900_MPKTDEL_LOCK_1 0xf1260080
++#define F0900_MEXTPINB2 0xf1260040
++#define F0900_MEXTPIN2 0xf1260020
++#define F0900_MEXTPINB1 0xf1260010
++#define F0900_MEXTPIN1 0xf1260008
++#define F0900_MDEMOD_LOCKB_2 0xf1260004
++#define F0900_MDEMOD_LOCK_2 0xf1260002
++#define F0900_MDEMOD_IRQ_2 0xf1260001
++
++/*IRQMASK0*/
++#define R0900_IRQMASK0 0xf127
++#define F0900_MDEMOD_LOCKB_1 0xf1270080
++#define F0900_MDEMOD_LOCK_1 0xf1270040
++#define F0900_MDEMOD_IRQ_1 0xf1270020
++#define F0900_MBCH_ERRFLAG 0xf1270010
++#define F0900_MDISEQC2RX_IRQ 0xf1270008
++#define F0900_MDISEQC2TX_IRQ 0xf1270004
++#define F0900_MDISEQC1RX_IRQ 0xf1270002
++#define F0900_MDISEQC1TX_IRQ 0xf1270001
++
++/*I2CCFG*/
++#define R0900_I2CCFG 0xf129
++#define F0900_I2C_FASTMODE 0xf1290008
++#define F0900_I2CADDR_INC 0xf1290003
++
++/*P1_I2CRPT*/
++#define R0900_P1_I2CRPT 0xf12a
++#define I2CRPT shiftx(R0900_P1_I2CRPT, demod, -1)
++#define F0900_P1_I2CT_ON 0xf12a0080
++#define I2CT_ON shiftx(F0900_P1_I2CT_ON, demod, -0x10000)
++#define F0900_P1_ENARPT_LEVEL 0xf12a0070
++#define F0900_P1_SCLT_DELAY 0xf12a0008
++#define F0900_P1_STOP_ENABLE 0xf12a0004
++#define F0900_P1_STOP_SDAT2SDA 0xf12a0002
++
++/*P2_I2CRPT*/
++#define R0900_P2_I2CRPT 0xf12b
++#define F0900_P2_I2CT_ON 0xf12b0080
++#define F0900_P2_ENARPT_LEVEL 0xf12b0070
++#define F0900_P2_SCLT_DELAY 0xf12b0008
++#define F0900_P2_STOP_ENABLE 0xf12b0004
++#define F0900_P2_STOP_SDAT2SDA 0xf12b0002
++
++/*IOPVALUE6*/
++#define R0900_IOPVALUE6 0xf138
++#define F0900_VSCL 0xf1380004
++#define F0900_VSDA 0xf1380002
++#define F0900_VDATA3_0 0xf1380001
++
++/*IOPVALUE5*/
++#define R0900_IOPVALUE5 0xf139
++#define F0900_VDATA3_1 0xf1390080
++#define F0900_VDATA3_2 0xf1390040
++#define F0900_VDATA3_3 0xf1390020
++#define F0900_VDATA3_4 0xf1390010
++#define F0900_VDATA3_5 0xf1390008
++#define F0900_VDATA3_6 0xf1390004
++#define F0900_VDATA3_7 0xf1390002
++#define F0900_VCLKOUT3 0xf1390001
++
++/*IOPVALUE4*/
++#define R0900_IOPVALUE4 0xf13a
++#define F0900_VSTROUT3 0xf13a0080
++#define F0900_VDPN3 0xf13a0040
++#define F0900_VERROR3 0xf13a0020
++#define F0900_VDATA2_7 0xf13a0010
++#define F0900_VCLKOUT2 0xf13a0008
++#define F0900_VSTROUT2 0xf13a0004
++#define F0900_VDPN2 0xf13a0002
++#define F0900_VERROR2 0xf13a0001
++
++/*IOPVALUE3*/
++#define R0900_IOPVALUE3 0xf13b
++#define F0900_VDATA1_7 0xf13b0080
++#define F0900_VCLKOUT1 0xf13b0040
++#define F0900_VSTROUT1 0xf13b0020
++#define F0900_VDPN1 0xf13b0010
++#define F0900_VERROR1 0xf13b0008
++#define F0900_VCLKOUT27 0xf13b0004
++#define F0900_VDISEQCOUT2 0xf13b0002
++#define F0900_VSCLT2 0xf13b0001
++
++/*IOPVALUE2*/
++#define R0900_IOPVALUE2 0xf13c
++#define F0900_VSDAT2 0xf13c0080
++#define F0900_VAGCRF2 0xf13c0040
++#define F0900_VDISEQCOUT1 0xf13c0020
++#define F0900_VSCLT1 0xf13c0010
++#define F0900_VSDAT1 0xf13c0008
++#define F0900_VAGCRF1 0xf13c0004
++#define F0900_VDIRCLK 0xf13c0002
++#define F0900_VSTDBY 0xf13c0001
++
++/*IOPVALUE1*/
++#define R0900_IOPVALUE1 0xf13d
++#define F0900_VCS1 0xf13d0080
++#define F0900_VCS0 0xf13d0040
++#define F0900_VGPIO13 0xf13d0020
++#define F0900_VGPIO12 0xf13d0010
++#define F0900_VGPIO11 0xf13d0008
++#define F0900_VGPIO10 0xf13d0004
++#define F0900_VGPIO9 0xf13d0002
++#define F0900_VGPIO8 0xf13d0001
++
++/*IOPVALUE0*/
++#define R0900_IOPVALUE0 0xf13e
++#define F0900_VGPIO7 0xf13e0080
++#define F0900_VGPIO6 0xf13e0040
++#define F0900_VGPIO5 0xf13e0020
++#define F0900_VGPIO4 0xf13e0010
++#define F0900_VGPIO3 0xf13e0008
++#define F0900_VGPIO2 0xf13e0004
++#define F0900_VGPIO1 0xf13e0002
++#define F0900_VCLKI2 0xf13e0001
++
++/*CLKI2CFG*/
++#define R0900_CLKI2CFG 0xf140
++#define F0900_CLKI2_OPD 0xf1400080
++#define F0900_CLKI2_CONFIG 0xf140007e
++#define F0900_CLKI2_XOR 0xf1400001
++
++/*GPIO1CFG*/
++#define R0900_GPIO1CFG 0xf141
++#define F0900_GPIO1_OPD 0xf1410080
++#define F0900_GPIO1_CONFIG 0xf141007e
++#define F0900_GPIO1_XOR 0xf1410001
++
++/*GPIO2CFG*/
++#define R0900_GPIO2CFG 0xf142
++#define F0900_GPIO2_OPD 0xf1420080
++#define F0900_GPIO2_CONFIG 0xf142007e
++#define F0900_GPIO2_XOR 0xf1420001
++
++/*GPIO3CFG*/
++#define R0900_GPIO3CFG 0xf143
++#define F0900_GPIO3_OPD 0xf1430080
++#define F0900_GPIO3_CONFIG 0xf143007e
++#define F0900_GPIO3_XOR 0xf1430001
++
++/*GPIO4CFG*/
++#define R0900_GPIO4CFG 0xf144
++#define F0900_GPIO4_OPD 0xf1440080
++#define F0900_GPIO4_CONFIG 0xf144007e
++#define F0900_GPIO4_XOR 0xf1440001
++
++/*GPIO5CFG*/
++#define R0900_GPIO5CFG 0xf145
++#define F0900_GPIO5_OPD 0xf1450080
++#define F0900_GPIO5_CONFIG 0xf145007e
++#define F0900_GPIO5_XOR 0xf1450001
++
++/*GPIO6CFG*/
++#define R0900_GPIO6CFG 0xf146
++#define F0900_GPIO6_OPD 0xf1460080
++#define F0900_GPIO6_CONFIG 0xf146007e
++#define F0900_GPIO6_XOR 0xf1460001
++
++/*GPIO7CFG*/
++#define R0900_GPIO7CFG 0xf147
++#define F0900_GPIO7_OPD 0xf1470080
++#define F0900_GPIO7_CONFIG 0xf147007e
++#define F0900_GPIO7_XOR 0xf1470001
++
++/*GPIO8CFG*/
++#define R0900_GPIO8CFG 0xf148
++#define F0900_GPIO8_OPD 0xf1480080
++#define F0900_GPIO8_CONFIG 0xf148007e
++#define F0900_GPIO8_XOR 0xf1480001
++
++/*GPIO9CFG*/
++#define R0900_GPIO9CFG 0xf149
++#define F0900_GPIO9_OPD 0xf1490080
++#define F0900_GPIO9_CONFIG 0xf149007e
++#define F0900_GPIO9_XOR 0xf1490001
++
++/*GPIO10CFG*/
++#define R0900_GPIO10CFG 0xf14a
++#define F0900_GPIO10_OPD 0xf14a0080
++#define F0900_GPIO10_CONFIG 0xf14a007e
++#define F0900_GPIO10_XOR 0xf14a0001
++
++/*GPIO11CFG*/
++#define R0900_GPIO11CFG 0xf14b
++#define F0900_GPIO11_OPD 0xf14b0080
++#define F0900_GPIO11_CONFIG 0xf14b007e
++#define F0900_GPIO11_XOR 0xf14b0001
++
++/*GPIO12CFG*/
++#define R0900_GPIO12CFG 0xf14c
++#define F0900_GPIO12_OPD 0xf14c0080
++#define F0900_GPIO12_CONFIG 0xf14c007e
++#define F0900_GPIO12_XOR 0xf14c0001
++
++/*GPIO13CFG*/
++#define R0900_GPIO13CFG 0xf14d
++#define F0900_GPIO13_OPD 0xf14d0080
++#define F0900_GPIO13_CONFIG 0xf14d007e
++#define F0900_GPIO13_XOR 0xf14d0001
++
++/*CS0CFG*/
++#define R0900_CS0CFG 0xf14e
++#define F0900_CS0_OPD 0xf14e0080
++#define F0900_CS0_CONFIG 0xf14e007e
++#define F0900_CS0_XOR 0xf14e0001
++
++/*CS1CFG*/
++#define R0900_CS1CFG 0xf14f
++#define F0900_CS1_OPD 0xf14f0080
++#define F0900_CS1_CONFIG 0xf14f007e
++#define F0900_CS1_XOR 0xf14f0001
++
++/*STDBYCFG*/
++#define R0900_STDBYCFG 0xf150
++#define F0900_STDBY_OPD 0xf1500080
++#define F0900_STDBY_CONFIG 0xf150007e
++#define F0900_STBDY_XOR 0xf1500001
++
++/*DIRCLKCFG*/
++#define R0900_DIRCLKCFG 0xf151
++#define F0900_DIRCLK_OPD 0xf1510080
++#define F0900_DIRCLK_CONFIG 0xf151007e
++#define F0900_DIRCLK_XOR 0xf1510001
++
++/*AGCRF1CFG*/
++#define R0900_AGCRF1CFG 0xf152
++#define F0900_AGCRF1_OPD 0xf1520080
++#define F0900_AGCRF1_CONFIG 0xf152007e
++#define F0900_AGCRF1_XOR 0xf1520001
++
++/*SDAT1CFG*/
++#define R0900_SDAT1CFG 0xf153
++#define F0900_SDAT1_OPD 0xf1530080
++#define F0900_SDAT1_CONFIG 0xf153007e
++#define F0900_SDAT1_XOR 0xf1530001
++
++/*SCLT1CFG*/
++#define R0900_SCLT1CFG 0xf154
++#define F0900_SCLT1_OPD 0xf1540080
++#define F0900_SCLT1_CONFIG 0xf154007e
++#define F0900_SCLT1_XOR 0xf1540001
++
++/*DISEQCO1CFG*/
++#define R0900_DISEQCO1CFG 0xf155
++#define F0900_DISEQCO1_OPD 0xf1550080
++#define F0900_DISEQCO1_CONFIG 0xf155007e
++#define F0900_DISEQC1_XOR 0xf1550001
++
++/*AGCRF2CFG*/
++#define R0900_AGCRF2CFG 0xf156
++#define F0900_AGCRF2_OPD 0xf1560080
++#define F0900_AGCRF2_CONFIG 0xf156007e
++#define F0900_AGCRF2_XOR 0xf1560001
++
++/*SDAT2CFG*/
++#define R0900_SDAT2CFG 0xf157
++#define F0900_SDAT2_OPD 0xf1570080
++#define F0900_SDAT2_CONFIG 0xf157007e
++#define F0900_SDAT2_XOR 0xf1570001
++
++/*SCLT2CFG*/
++#define R0900_SCLT2CFG 0xf158
++#define F0900_SCLT2_OPD 0xf1580080
++#define F0900_SCLT2_CONFIG 0xf158007e
++#define F0900_SCLT2_XOR 0xf1580001
++
++/*DISEQCO2CFG*/
++#define R0900_DISEQCO2CFG 0xf159
++#define F0900_DISEQCO2_OPD 0xf1590080
++#define F0900_DISEQCO2_CONFIG 0xf159007e
++#define F0900_DISEQC2_XOR 0xf1590001
++
++/*CLKOUT27CFG*/
++#define R0900_CLKOUT27CFG 0xf15a
++#define F0900_CLKOUT27_OPD 0xf15a0080
++#define F0900_CLKOUT27_CONFIG 0xf15a007e
++#define F0900_CLKOUT27_XOR 0xf15a0001
++
++/*ERROR1CFG*/
++#define R0900_ERROR1CFG 0xf15b
++#define F0900_ERROR1_OPD 0xf15b0080
++#define F0900_ERROR1_CONFIG 0xf15b007e
++#define F0900_ERROR1_XOR 0xf15b0001
++
++/*DPN1CFG*/
++#define R0900_DPN1CFG 0xf15c
++#define F0900_DPN1_OPD 0xf15c0080
++#define F0900_DPN1_CONFIG 0xf15c007e
++#define F0900_DPN1_XOR 0xf15c0001
++
++/*STROUT1CFG*/
++#define R0900_STROUT1CFG 0xf15d
++#define F0900_STROUT1_OPD 0xf15d0080
++#define F0900_STROUT1_CONFIG 0xf15d007e
++#define F0900_STROUT1_XOR 0xf15d0001
++
++/*CLKOUT1CFG*/
++#define R0900_CLKOUT1CFG 0xf15e
++#define F0900_CLKOUT1_OPD 0xf15e0080
++#define F0900_CLKOUT1_CONFIG 0xf15e007e
++#define F0900_CLKOUT1_XOR 0xf15e0001
++
++/*DATA71CFG*/
++#define R0900_DATA71CFG 0xf15f
++#define F0900_DATA71_OPD 0xf15f0080
++#define F0900_DATA71_CONFIG 0xf15f007e
++#define F0900_DATA71_XOR 0xf15f0001
++
++/*ERROR2CFG*/
++#define R0900_ERROR2CFG 0xf160
++#define F0900_ERROR2_OPD 0xf1600080
++#define F0900_ERROR2_CONFIG 0xf160007e
++#define F0900_ERROR2_XOR 0xf1600001
++
++/*DPN2CFG*/
++#define R0900_DPN2CFG 0xf161
++#define F0900_DPN2_OPD 0xf1610080
++#define F0900_DPN2_CONFIG 0xf161007e
++#define F0900_DPN2_XOR 0xf1610001
++
++/*STROUT2CFG*/
++#define R0900_STROUT2CFG 0xf162
++#define F0900_STROUT2_OPD 0xf1620080
++#define F0900_STROUT2_CONFIG 0xf162007e
++#define F0900_STROUT2_XOR 0xf1620001
++
++/*CLKOUT2CFG*/
++#define R0900_CLKOUT2CFG 0xf163
++#define F0900_CLKOUT2_OPD 0xf1630080
++#define F0900_CLKOUT2_CONFIG 0xf163007e
++#define F0900_CLKOUT2_XOR 0xf1630001
++
++/*DATA72CFG*/
++#define R0900_DATA72CFG 0xf164
++#define F0900_DATA72_OPD 0xf1640080
++#define F0900_DATA72_CONFIG 0xf164007e
++#define F0900_DATA72_XOR 0xf1640001
++
++/*ERROR3CFG*/
++#define R0900_ERROR3CFG 0xf165
++#define F0900_ERROR3_OPD 0xf1650080
++#define F0900_ERROR3_CONFIG 0xf165007e
++#define F0900_ERROR3_XOR 0xf1650001
++
++/*DPN3CFG*/
++#define R0900_DPN3CFG 0xf166
++#define F0900_DPN3_OPD 0xf1660080
++#define F0900_DPN3_CONFIG 0xf166007e
++#define F0900_DPN3_XOR 0xf1660001
++
++/*STROUT3CFG*/
++#define R0900_STROUT3CFG 0xf167
++#define F0900_STROUT3_OPD 0xf1670080
++#define F0900_STROUT3_CONFIG 0xf167007e
++#define F0900_STROUT3_XOR 0xf1670001
++
++/*CLKOUT3CFG*/
++#define R0900_CLKOUT3CFG 0xf168
++#define F0900_CLKOUT3_OPD 0xf1680080
++#define F0900_CLKOUT3_CONFIG 0xf168007e
++#define F0900_CLKOUT3_XOR 0xf1680001
++
++/*DATA73CFG*/
++#define R0900_DATA73CFG 0xf169
++#define F0900_DATA73_OPD 0xf1690080
++#define F0900_DATA73_CONFIG 0xf169007e
++#define F0900_DATA73_XOR 0xf1690001
++
++/*STRSTATUS1*/
++#define R0900_STRSTATUS1 0xf16a
++#define F0900_STRSTATUS_SEL2 0xf16a00f0
++#define F0900_STRSTATUS_SEL1 0xf16a000f
++
++/*STRSTATUS2*/
++#define R0900_STRSTATUS2 0xf16b
++#define F0900_STRSTATUS_SEL4 0xf16b00f0
++#define F0900_STRSTATUS_SEL3 0xf16b000f
++
++/*STRSTATUS3*/
++#define R0900_STRSTATUS3 0xf16c
++#define F0900_STRSTATUS_SEL6 0xf16c00f0
++#define F0900_STRSTATUS_SEL5 0xf16c000f
++
++/*FSKTFC2*/
++#define R0900_FSKTFC2 0xf170
++#define F0900_FSKT_KMOD 0xf17000fc
++#define F0900_FSKT_CAR2 0xf1700003
++
++/*FSKTFC1*/
++#define R0900_FSKTFC1 0xf171
++#define F0900_FSKT_CAR1 0xf17100ff
++
++/*FSKTFC0*/
++#define R0900_FSKTFC0 0xf172
++#define F0900_FSKT_CAR0 0xf17200ff
++
++/*FSKTDELTAF1*/
++#define R0900_FSKTDELTAF1 0xf173
++#define F0900_FSKT_DELTAF1 0xf173000f
++
++/*FSKTDELTAF0*/
++#define R0900_FSKTDELTAF0 0xf174
++#define F0900_FSKT_DELTAF0 0xf17400ff
++
++/*FSKTCTRL*/
++#define R0900_FSKTCTRL 0xf175
++#define F0900_FSKT_EN_SGN 0xf1750040
++#define F0900_FSKT_MOD_SGN 0xf1750020
++#define F0900_FSKT_MOD_EN 0xf175001c
++#define F0900_FSKT_DACMODE 0xf1750003
++
++/*FSKRFC2*/
++#define R0900_FSKRFC2 0xf176
++#define F0900_FSKR_DETSGN 0xf1760040
++#define F0900_FSKR_OUTSGN 0xf1760020
++#define F0900_FSKR_KAGC 0xf176001c
++#define F0900_FSKR_CAR2 0xf1760003
++
++/*FSKRFC1*/
++#define R0900_FSKRFC1 0xf177
++#define F0900_FSKR_CAR1 0xf17700ff
++
++/*FSKRFC0*/
++#define R0900_FSKRFC0 0xf178
++#define F0900_FSKR_CAR0 0xf17800ff
++
++/*FSKRK1*/
++#define R0900_FSKRK1 0xf179
++#define F0900_FSKR_K1_EXP 0xf17900e0
++#define F0900_FSKR_K1_MANT 0xf179001f
++
++/*FSKRK2*/
++#define R0900_FSKRK2 0xf17a
++#define F0900_FSKR_K2_EXP 0xf17a00e0
++#define F0900_FSKR_K2_MANT 0xf17a001f
++
++/*FSKRAGCR*/
++#define R0900_FSKRAGCR 0xf17b
++#define F0900_FSKR_OUTCTL 0xf17b00c0
++#define F0900_FSKR_AGC_REF 0xf17b003f
++
++/*FSKRAGC*/
++#define R0900_FSKRAGC 0xf17c
++#define F0900_FSKR_AGC_ACCU 0xf17c00ff
++
++/*FSKRALPHA*/
++#define R0900_FSKRALPHA 0xf17d
++#define F0900_FSKR_ALPHA_EXP 0xf17d001c
++#define F0900_FSKR_ALPHA_M 0xf17d0003
++
++/*FSKRPLTH1*/
++#define R0900_FSKRPLTH1 0xf17e
++#define F0900_FSKR_BETA 0xf17e00f0
++#define F0900_FSKR_PLL_TRESH1 0xf17e000f
++
++/*FSKRPLTH0*/
++#define R0900_FSKRPLTH0 0xf17f
++#define F0900_FSKR_PLL_TRESH0 0xf17f00ff
++
++/*FSKRDF1*/
++#define R0900_FSKRDF1 0xf180
++#define F0900_FSKR_OUT 0xf1800080
++#define F0900_FSKR_DELTAF1 0xf180001f
++
++/*FSKRDF0*/
++#define R0900_FSKRDF0 0xf181
++#define F0900_FSKR_DELTAF0 0xf18100ff
++
++/*FSKRSTEPP*/
++#define R0900_FSKRSTEPP 0xf182
++#define F0900_FSKR_STEP_PLUS 0xf18200ff
++
++/*FSKRSTEPM*/
++#define R0900_FSKRSTEPM 0xf183
++#define F0900_FSKR_STEP_MINUS 0xf18300ff
++
++/*FSKRDET1*/
++#define R0900_FSKRDET1 0xf184
++#define F0900_FSKR_DETECT 0xf1840080
++#define F0900_FSKR_CARDET_ACCU1 0xf184000f
++
++/*FSKRDET0*/
++#define R0900_FSKRDET0 0xf185
++#define F0900_FSKR_CARDET_ACCU0 0xf18500ff
++
++/*FSKRDTH1*/
++#define R0900_FSKRDTH1 0xf186
++#define F0900_FSKR_CARLOSS_THRESH1 0xf18600f0
++#define F0900_FSKR_CARDET_THRESH1 0xf186000f
++
++/*FSKRDTH0*/
++#define R0900_FSKRDTH0 0xf187
++#define F0900_FSKR_CARDET_THRESH0 0xf18700ff
++
++/*FSKRLOSS*/
++#define R0900_FSKRLOSS 0xf188
++#define F0900_FSKR_CARLOSS_THRESH0 0xf18800ff
++
++/*P2_DISTXCTL*/
++#define R0900_P2_DISTXCTL 0xf190
++#define F0900_P2_TIM_OFF 0xf1900080
++#define F0900_P2_DISEQC_RESET 0xf1900040
++#define F0900_P2_TIM_CMD 0xf1900030
++#define F0900_P2_DIS_PRECHARGE 0xf1900008
++#define F0900_P2_DISTX_MODE 0xf1900007
++
++/*P2_DISRXCTL*/
++#define R0900_P2_DISRXCTL 0xf191
++#define F0900_P2_RECEIVER_ON 0xf1910080
++#define F0900_P2_IGNO_SHORT22K 0xf1910040
++#define F0900_P2_ONECHIP_TRX 0xf1910020
++#define F0900_P2_EXT_ENVELOP 0xf1910010
++#define F0900_P2_PIN_SELECT0 0xf191000c
++#define F0900_P2_IRQ_RXEND 0xf1910002
++#define F0900_P2_IRQ_4NBYTES 0xf1910001
++
++/*P2_DISRX_ST0*/
++#define R0900_P2_DISRX_ST0 0xf194
++#define F0900_P2_RX_END 0xf1940080
++#define F0900_P2_RX_ACTIVE 0xf1940040
++#define F0900_P2_SHORT_22KHZ 0xf1940020
++#define F0900_P2_CONT_TONE 0xf1940010
++#define F0900_P2_FIFO_4BREADY 0xf1940008
++#define F0900_P2_FIFO_EMPTY 0xf1940004
++#define F0900_P2_ABORT_DISRX 0xf1940001
++
++/*P2_DISRX_ST1*/
++#define R0900_P2_DISRX_ST1 0xf195
++#define F0900_P2_RX_FAIL 0xf1950080
++#define F0900_P2_FIFO_PARITYFAIL 0xf1950040
++#define F0900_P2_RX_NONBYTE 0xf1950020
++#define F0900_P2_FIFO_OVERFLOW 0xf1950010
++#define F0900_P2_FIFO_BYTENBR 0xf195000f
++
++/*P2_DISRXDATA*/
++#define R0900_P2_DISRXDATA 0xf196
++#define F0900_P2_DISRX_DATA 0xf19600ff
++
++/*P2_DISTXDATA*/
++#define R0900_P2_DISTXDATA 0xf197
++#define F0900_P2_DISEQC_FIFO 0xf19700ff
++
++/*P2_DISTXSTATUS*/
++#define R0900_P2_DISTXSTATUS 0xf198
++#define F0900_P2_TX_FAIL 0xf1980080
++#define F0900_P2_FIFO_FULL 0xf1980040
++#define F0900_P2_TX_IDLE 0xf1980020
++#define F0900_P2_GAP_BURST 0xf1980010
++#define F0900_P2_TXFIFO_BYTES 0xf198000f
++
++/*P2_F22TX*/
++#define R0900_P2_F22TX 0xf199
++#define F0900_P2_F22_REG 0xf19900ff
++
++/*P2_F22RX*/
++#define R0900_P2_F22RX 0xf19a
++#define F0900_P2_F22RX_REG 0xf19a00ff
++
++/*P2_ACRPRESC*/
++#define R0900_P2_ACRPRESC 0xf19c
++#define F0900_P2_ACR_PRESC 0xf19c0007
++
++/*P2_ACRDIV*/
++#define R0900_P2_ACRDIV 0xf19d
++#define F0900_P2_ACR_DIV 0xf19d00ff
++
++/*P1_DISTXCTL*/
++#define R0900_P1_DISTXCTL 0xf1a0
++#define DISTXCTL shiftx(R0900_P1_DISTXCTL, demod, 0x10)
++#define F0900_P1_TIM_OFF 0xf1a00080
++#define F0900_P1_DISEQC_RESET 0xf1a00040
++#define DISEQC_RESET shiftx(F0900_P1_DISEQC_RESET, demod, 0x100000)
++#define F0900_P1_TIM_CMD 0xf1a00030
++#define F0900_P1_DIS_PRECHARGE 0xf1a00008
++#define DIS_PRECHARGE shiftx(F0900_P1_DIS_PRECHARGE, demod, 0x100000)
++#define F0900_P1_DISTX_MODE 0xf1a00007
++#define DISTX_MODE shiftx(F0900_P1_DISTX_MODE, demod, 0x100000)
++
++/*P1_DISRXCTL*/
++#define R0900_P1_DISRXCTL 0xf1a1
++#define DISRXCTL shiftx(R0900_P1_DISRXCTL, demod, 0x10)
++#define F0900_P1_RECEIVER_ON 0xf1a10080
++#define F0900_P1_IGNO_SHORT22K 0xf1a10040
++#define F0900_P1_ONECHIP_TRX 0xf1a10020
++#define F0900_P1_EXT_ENVELOP 0xf1a10010
++#define F0900_P1_PIN_SELECT0 0xf1a1000c
++#define F0900_P1_IRQ_RXEND 0xf1a10002
++#define F0900_P1_IRQ_4NBYTES 0xf1a10001
++
++/*P1_DISRX_ST0*/
++#define R0900_P1_DISRX_ST0 0xf1a4
++#define DISRX_ST0 shiftx(R0900_P1_DISRX_ST0, demod, 0x10)
++#define F0900_P1_RX_END 0xf1a40080
++#define RX_END shiftx(F0900_P1_RX_END, demod, 0x100000)
++#define F0900_P1_RX_ACTIVE 0xf1a40040
++#define F0900_P1_SHORT_22KHZ 0xf1a40020
++#define F0900_P1_CONT_TONE 0xf1a40010
++#define F0900_P1_FIFO_4BREADY 0xf1a40008
++#define F0900_P1_FIFO_EMPTY 0xf1a40004
++#define F0900_P1_ABORT_DISRX 0xf1a40001
++
++/*P1_DISRX_ST1*/
++#define R0900_P1_DISRX_ST1 0xf1a5
++#define DISRX_ST1 shiftx(R0900_P1_DISRX_ST1, demod, 0x10)
++#define F0900_P1_RX_FAIL 0xf1a50080
++#define F0900_P1_FIFO_PARITYFAIL 0xf1a50040
++#define F0900_P1_RX_NONBYTE 0xf1a50020
++#define F0900_P1_FIFO_OVERFLOW 0xf1a50010
++#define F0900_P1_FIFO_BYTENBR 0xf1a5000f
++#define FIFO_BYTENBR shiftx(F0900_P1_FIFO_BYTENBR, demod, 0x100000)
++
++/*P1_DISRXDATA*/
++#define R0900_P1_DISRXDATA 0xf1a6
++#define DISRXDATA shiftx(R0900_P1_DISRXDATA, demod, 0x10)
++#define F0900_P1_DISRX_DATA 0xf1a600ff
++
++/*P1_DISTXDATA*/
++#define R0900_P1_DISTXDATA 0xf1a7
++#define DISTXDATA shiftx(R0900_P1_DISTXDATA, demod, 0x10)
++#define F0900_P1_DISEQC_FIFO 0xf1a700ff
++
++/*P1_DISTXSTATUS*/
++#define R0900_P1_DISTXSTATUS 0xf1a8
++#define F0900_P1_TX_FAIL 0xf1a80080
++#define F0900_P1_FIFO_FULL 0xf1a80040
++#define FIFO_FULL shiftx(F0900_P1_FIFO_FULL, demod, 0x100000)
++#define F0900_P1_TX_IDLE 0xf1a80020
++#define TX_IDLE shiftx(F0900_P1_TX_IDLE, demod, 0x100000)
++#define F0900_P1_GAP_BURST 0xf1a80010
++#define F0900_P1_TXFIFO_BYTES 0xf1a8000f
++
++/*P1_F22TX*/
++#define R0900_P1_F22TX 0xf1a9
++#define F22TX shiftx(R0900_P1_F22TX, demod, 0x10)
++#define F0900_P1_F22_REG 0xf1a900ff
++
++/*P1_F22RX*/
++#define R0900_P1_F22RX 0xf1aa
++#define F22RX shiftx(R0900_P1_F22RX, demod, 0x10)
++#define F0900_P1_F22RX_REG 0xf1aa00ff
++
++/*P1_ACRPRESC*/
++#define R0900_P1_ACRPRESC 0xf1ac
++#define ACRPRESC shiftx(R0900_P1_ACRPRESC, demod, 0x10)
++#define F0900_P1_ACR_PRESC 0xf1ac0007
++
++/*P1_ACRDIV*/
++#define R0900_P1_ACRDIV 0xf1ad
++#define ACRDIV shiftx(R0900_P1_ACRDIV, demod, 0x10)
++#define F0900_P1_ACR_DIV 0xf1ad00ff
++
++/*NCOARSE*/
++#define R0900_NCOARSE 0xf1b3
++#define F0900_M_DIV 0xf1b300ff
++
++/*SYNTCTRL*/
++#define R0900_SYNTCTRL 0xf1b6
++#define F0900_STANDBY 0xf1b60080
++#define F0900_BYPASSPLLCORE 0xf1b60040
++#define F0900_SELX1RATIO 0xf1b60020
++#define F0900_STOP_PLL 0xf1b60008
++#define F0900_BYPASSPLLFSK 0xf1b60004
++#define F0900_SELOSCI 0xf1b60002
++#define F0900_BYPASSPLLADC 0xf1b60001
++
++/*FILTCTRL*/
++#define R0900_FILTCTRL 0xf1b7
++#define F0900_INV_CLK135 0xf1b70080
++#define F0900_SEL_FSKCKDIV 0xf1b70004
++#define F0900_INV_CLKFSK 0xf1b70002
++#define F0900_BYPASS_APPLI 0xf1b70001
++
++/*PLLSTAT*/
++#define R0900_PLLSTAT 0xf1b8
++#define F0900_PLLLOCK 0xf1b80001
++
++/*STOPCLK1*/
++#define R0900_STOPCLK1 0xf1c2
++#define F0900_STOP_CLKPKDT2 0xf1c20040
++#define F0900_STOP_CLKPKDT1 0xf1c20020
++#define F0900_STOP_CLKFEC 0xf1c20010
++#define F0900_STOP_CLKADCI2 0xf1c20008
++#define F0900_INV_CLKADCI2 0xf1c20004
++#define F0900_STOP_CLKADCI1 0xf1c20002
++#define F0900_INV_CLKADCI1 0xf1c20001
++
++/*STOPCLK2*/
++#define R0900_STOPCLK2 0xf1c3
++#define F0900_STOP_CLKSAMP2 0xf1c30010
++#define F0900_STOP_CLKSAMP1 0xf1c30008
++#define F0900_STOP_CLKVIT2 0xf1c30004
++#define F0900_STOP_CLKVIT1 0xf1c30002
++#define STOP_CLKVIT shiftx(F0900_STOP_CLKVIT1, demod, -2)
++#define F0900_STOP_CLKTS 0xf1c30001
++
++/*TSTTNR0*/
++#define R0900_TSTTNR0 0xf1df
++#define F0900_SEL_FSK 0xf1df0080
++#define F0900_FSK_PON 0xf1df0004
++
++/*TSTTNR1*/
++#define R0900_TSTTNR1 0xf1e0
++#define F0900_ADC1_PON 0xf1e00002
++#define F0900_ADC1_INMODE 0xf1e00001
++
++/*TSTTNR2*/
++#define R0900_TSTTNR2 0xf1e1
++#define F0900_DISEQC1_PON 0xf1e10020
++
++/*TSTTNR3*/
++#define R0900_TSTTNR3 0xf1e2
++#define F0900_ADC2_PON 0xf1e20002
++#define F0900_ADC2_INMODE 0xf1e20001
++
++/*TSTTNR4*/
++#define R0900_TSTTNR4 0xf1e3
++#define F0900_DISEQC2_PON 0xf1e30020
++
++/*P2_IQCONST*/
++#define R0900_P2_IQCONST 0xf200
++#define F0900_P2_CONSTEL_SELECT 0xf2000060
++#define F0900_P2_IQSYMB_SEL 0xf200001f
++
++/*P2_NOSCFG*/
++#define R0900_P2_NOSCFG 0xf201
++#define F0900_P2_DUMMYPL_NOSDATA 0xf2010020
++#define F0900_P2_NOSPLH_BETA 0xf2010018
++#define F0900_P2_NOSDATA_BETA 0xf2010007
++
++/*P2_ISYMB*/
++#define R0900_P2_ISYMB 0xf202
++#define F0900_P2_I_SYMBOL 0xf20201ff
++
++/*P2_QSYMB*/
++#define R0900_P2_QSYMB 0xf203
++#define F0900_P2_Q_SYMBOL 0xf20301ff
++
++/*P2_AGC1CFG*/
++#define R0900_P2_AGC1CFG 0xf204
++#define F0900_P2_DC_FROZEN 0xf2040080
++#define F0900_P2_DC_CORRECT 0xf2040040
++#define F0900_P2_AMM_FROZEN 0xf2040020
++#define F0900_P2_AMM_CORRECT 0xf2040010
++#define F0900_P2_QUAD_FROZEN 0xf2040008
++#define F0900_P2_QUAD_CORRECT 0xf2040004
++
++/*P2_AGC1CN*/
++#define R0900_P2_AGC1CN 0xf206
++#define F0900_P2_AGC1_LOCKED 0xf2060080
++#define F0900_P2_AGC1_MINPOWER 0xf2060010
++#define F0900_P2_AGCOUT_FAST 0xf2060008
++#define F0900_P2_AGCIQ_BETA 0xf2060007
++
++/*P2_AGC1REF*/
++#define R0900_P2_AGC1REF 0xf207
++#define F0900_P2_AGCIQ_REF 0xf20700ff
++
++/*P2_IDCCOMP*/
++#define R0900_P2_IDCCOMP 0xf208
++#define F0900_P2_IAVERAGE_ADJ 0xf20801ff
++
++/*P2_QDCCOMP*/
++#define R0900_P2_QDCCOMP 0xf209
++#define F0900_P2_QAVERAGE_ADJ 0xf20901ff
++
++/*P2_POWERI*/
++#define R0900_P2_POWERI 0xf20a
++#define F0900_P2_POWER_I 0xf20a00ff
++
++/*P2_POWERQ*/
++#define R0900_P2_POWERQ 0xf20b
++#define F0900_P2_POWER_Q 0xf20b00ff
++
++/*P2_AGC1AMM*/
++#define R0900_P2_AGC1AMM 0xf20c
++#define F0900_P2_AMM_VALUE 0xf20c00ff
++
++/*P2_AGC1QUAD*/
++#define R0900_P2_AGC1QUAD 0xf20d
++#define F0900_P2_QUAD_VALUE 0xf20d01ff
++
++/*P2_AGCIQIN1*/
++#define R0900_P2_AGCIQIN1 0xf20e
++#define F0900_P2_AGCIQ_VALUE1 0xf20e00ff
++
++/*P2_AGCIQIN0*/
++#define R0900_P2_AGCIQIN0 0xf20f
++#define F0900_P2_AGCIQ_VALUE0 0xf20f00ff
++
++/*P2_DEMOD*/
++#define R0900_P2_DEMOD 0xf210
++#define F0900_P2_MANUALS2_ROLLOFF 0xf2100080
++#define F0900_P2_SPECINV_CONTROL 0xf2100030
++#define F0900_P2_FORCE_ENASAMP 0xf2100008
++#define F0900_P2_MANUALSX_ROLLOFF 0xf2100004
++#define F0900_P2_ROLLOFF_CONTROL 0xf2100003
++
++/*P2_DMDMODCOD*/
++#define R0900_P2_DMDMODCOD 0xf211
++#define F0900_P2_MANUAL_MODCOD 0xf2110080
++#define F0900_P2_DEMOD_MODCOD 0xf211007c
++#define F0900_P2_DEMOD_TYPE 0xf2110003
++
++/*P2_DSTATUS*/
++#define R0900_P2_DSTATUS 0xf212
++#define F0900_P2_CAR_LOCK 0xf2120080
++#define F0900_P2_TMGLOCK_QUALITY 0xf2120060
++#define F0900_P2_LOCK_DEFINITIF 0xf2120008
++#define F0900_P2_OVADC_DETECT 0xf2120001
++
++/*P2_DSTATUS2*/
++#define R0900_P2_DSTATUS2 0xf213
++#define F0900_P2_DEMOD_DELOCK 0xf2130080
++#define F0900_P2_AGC1_NOSIGNALACK 0xf2130008
++#define F0900_P2_AGC2_OVERFLOW 0xf2130004
++#define F0900_P2_CFR_OVERFLOW 0xf2130002
++#define F0900_P2_GAMMA_OVERUNDER 0xf2130001
++
++/*P2_DMDCFGMD*/
++#define R0900_P2_DMDCFGMD 0xf214
++#define F0900_P2_DVBS2_ENABLE 0xf2140080
++#define F0900_P2_DVBS1_ENABLE 0xf2140040
++#define F0900_P2_SCAN_ENABLE 0xf2140010
++#define F0900_P2_CFR_AUTOSCAN 0xf2140008
++#define F0900_P2_TUN_RNG 0xf2140003
++
++/*P2_DMDCFG2*/
++#define R0900_P2_DMDCFG2 0xf215
++#define F0900_P2_S1S2_SEQUENTIAL 0xf2150040
++#define F0900_P2_INFINITE_RELOCK 0xf2150010
++
++/*P2_DMDISTATE*/
++#define R0900_P2_DMDISTATE 0xf216
++#define F0900_P2_I2C_DEMOD_MODE 0xf216001f
++
++/*P2_DMDT0M*/
++#define R0900_P2_DMDT0M 0xf217
++#define F0900_P2_DMDT0_MIN 0xf21700ff
++
++/*P2_DMDSTATE*/
++#define R0900_P2_DMDSTATE 0xf21b
++#define F0900_P2_HEADER_MODE 0xf21b0060
++
++/*P2_DMDFLYW*/
++#define R0900_P2_DMDFLYW 0xf21c
++#define F0900_P2_I2C_IRQVAL 0xf21c00f0
++#define F0900_P2_FLYWHEEL_CPT 0xf21c000f
++
++/*P2_DSTATUS3*/
++#define R0900_P2_DSTATUS3 0xf21d
++#define F0900_P2_DEMOD_CFGMODE 0xf21d0060
++
++/*P2_DMDCFG3*/
++#define R0900_P2_DMDCFG3 0xf21e
++#define F0900_P2_NOSTOP_FIFOFULL 0xf21e0008
++
++/*P2_DMDCFG4*/
++#define R0900_P2_DMDCFG4 0xf21f
++#define F0900_P2_TUNER_NRELAUNCH 0xf21f0008
++
++/*P2_CORRELMANT*/
++#define R0900_P2_CORRELMANT 0xf220
++#define F0900_P2_CORREL_MANT 0xf22000ff
++
++/*P2_CORRELABS*/
++#define R0900_P2_CORRELABS 0xf221
++#define F0900_P2_CORREL_ABS 0xf22100ff
++
++/*P2_CORRELEXP*/
++#define R0900_P2_CORRELEXP 0xf222
++#define F0900_P2_CORREL_ABSEXP 0xf22200f0
++#define F0900_P2_CORREL_EXP 0xf222000f
++
++/*P2_PLHMODCOD*/
++#define R0900_P2_PLHMODCOD 0xf224
++#define F0900_P2_SPECINV_DEMOD 0xf2240080
++#define F0900_P2_PLH_MODCOD 0xf224007c
++#define F0900_P2_PLH_TYPE 0xf2240003
++
++/*P2_DMDREG*/
++#define R0900_P2_DMDREG 0xf225
++#define F0900_P2_DECIM_PLFRAMES 0xf2250001
++
++/*P2_AGC2O*/
++#define R0900_P2_AGC2O 0xf22c
++#define F0900_P2_AGC2_COEF 0xf22c0007
++
++/*P2_AGC2REF*/
++#define R0900_P2_AGC2REF 0xf22d
++#define F0900_P2_AGC2_REF 0xf22d00ff
++
++/*P2_AGC1ADJ*/
++#define R0900_P2_AGC1ADJ 0xf22e
++#define F0900_P2_AGC1_ADJUSTED 0xf22e007f
++
++/*P2_AGC2I1*/
++#define R0900_P2_AGC2I1 0xf236
++#define F0900_P2_AGC2_INTEGRATOR1 0xf23600ff
++
++/*P2_AGC2I0*/
++#define R0900_P2_AGC2I0 0xf237
++#define F0900_P2_AGC2_INTEGRATOR0 0xf23700ff
++
++/*P2_CARCFG*/
++#define R0900_P2_CARCFG 0xf238
++#define F0900_P2_CFRUPLOW_AUTO 0xf2380080
++#define F0900_P2_CFRUPLOW_TEST 0xf2380040
++#define F0900_P2_ROTAON 0xf2380004
++#define F0900_P2_PH_DET_ALGO 0xf2380003
++
++/*P2_ACLC*/
++#define R0900_P2_ACLC 0xf239
++#define F0900_P2_CAR_ALPHA_MANT 0xf2390030
++#define F0900_P2_CAR_ALPHA_EXP 0xf239000f
++
++/*P2_BCLC*/
++#define R0900_P2_BCLC 0xf23a
++#define F0900_P2_CAR_BETA_MANT 0xf23a0030
++#define F0900_P2_CAR_BETA_EXP 0xf23a000f
++
++/*P2_CARFREQ*/
++#define R0900_P2_CARFREQ 0xf23d
++#define F0900_P2_KC_COARSE_EXP 0xf23d00f0
++#define F0900_P2_BETA_FREQ 0xf23d000f
++
++/*P2_CARHDR*/
++#define R0900_P2_CARHDR 0xf23e
++#define F0900_P2_K_FREQ_HDR 0xf23e00ff
++
++/*P2_LDT*/
++#define R0900_P2_LDT 0xf23f
++#define F0900_P2_CARLOCK_THRES 0xf23f01ff
++
++/*P2_LDT2*/
++#define R0900_P2_LDT2 0xf240
++#define F0900_P2_CARLOCK_THRES2 0xf24001ff
++
++/*P2_CFRICFG*/
++#define R0900_P2_CFRICFG 0xf241
++#define F0900_P2_NEG_CFRSTEP 0xf2410001
++
++/*P2_CFRUP1*/
++#define R0900_P2_CFRUP1 0xf242
++#define F0900_P2_CFR_UP1 0xf24201ff
++
++/*P2_CFRUP0*/
++#define R0900_P2_CFRUP0 0xf243
++#define F0900_P2_CFR_UP0 0xf24300ff
++
++/*P2_CFRLOW1*/
++#define R0900_P2_CFRLOW1 0xf246
++#define F0900_P2_CFR_LOW1 0xf24601ff
++
++/*P2_CFRLOW0*/
++#define R0900_P2_CFRLOW0 0xf247
++#define F0900_P2_CFR_LOW0 0xf24700ff
++
++/*P2_CFRINIT1*/
++#define R0900_P2_CFRINIT1 0xf248
++#define F0900_P2_CFR_INIT1 0xf24801ff
++
++/*P2_CFRINIT0*/
++#define R0900_P2_CFRINIT0 0xf249
++#define F0900_P2_CFR_INIT0 0xf24900ff
++
++/*P2_CFRINC1*/
++#define R0900_P2_CFRINC1 0xf24a
++#define F0900_P2_MANUAL_CFRINC 0xf24a0080
++#define F0900_P2_CFR_INC1 0xf24a003f
++
++/*P2_CFRINC0*/
++#define R0900_P2_CFRINC0 0xf24b
++#define F0900_P2_CFR_INC0 0xf24b00f8
++
++/*P2_CFR2*/
++#define R0900_P2_CFR2 0xf24c
++#define F0900_P2_CAR_FREQ2 0xf24c01ff
++
++/*P2_CFR1*/
++#define R0900_P2_CFR1 0xf24d
++#define F0900_P2_CAR_FREQ1 0xf24d00ff
++
++/*P2_CFR0*/
++#define R0900_P2_CFR0 0xf24e
++#define F0900_P2_CAR_FREQ0 0xf24e00ff
++
++/*P2_LDI*/
++#define R0900_P2_LDI 0xf24f
++#define F0900_P2_LOCK_DET_INTEGR 0xf24f01ff
++
++/*P2_TMGCFG*/
++#define R0900_P2_TMGCFG 0xf250
++#define F0900_P2_TMGLOCK_BETA 0xf25000c0
++#define F0900_P2_DO_TIMING_CORR 0xf2500010
++#define F0900_P2_TMG_MINFREQ 0xf2500003
++
++/*P2_RTC*/
++#define R0900_P2_RTC 0xf251
++#define F0900_P2_TMGALPHA_EXP 0xf25100f0
++#define F0900_P2_TMGBETA_EXP 0xf251000f
++
++/*P2_RTCS2*/
++#define R0900_P2_RTCS2 0xf252
++#define F0900_P2_TMGALPHAS2_EXP 0xf25200f0
++#define F0900_P2_TMGBETAS2_EXP 0xf252000f
++
++/*P2_TMGTHRISE*/
++#define R0900_P2_TMGTHRISE 0xf253
++#define F0900_P2_TMGLOCK_THRISE 0xf25300ff
++
++/*P2_TMGTHFALL*/
++#define R0900_P2_TMGTHFALL 0xf254
++#define F0900_P2_TMGLOCK_THFALL 0xf25400ff
++
++/*P2_SFRUPRATIO*/
++#define R0900_P2_SFRUPRATIO 0xf255
++#define F0900_P2_SFR_UPRATIO 0xf25500ff
++
++/*P2_SFRLOWRATIO*/
++#define R0900_P2_SFRLOWRATIO 0xf256
++#define F0900_P2_SFR_LOWRATIO 0xf25600ff
++
++/*P2_KREFTMG*/
++#define R0900_P2_KREFTMG 0xf258
++#define F0900_P2_KREF_TMG 0xf25800ff
++
++/*P2_SFRSTEP*/
++#define R0900_P2_SFRSTEP 0xf259
++#define F0900_P2_SFR_SCANSTEP 0xf25900f0
++#define F0900_P2_SFR_CENTERSTEP 0xf259000f
++
++/*P2_TMGCFG2*/
++#define R0900_P2_TMGCFG2 0xf25a
++#define F0900_P2_SFRRATIO_FINE 0xf25a0001
++
++/*P2_KREFTMG2*/
++#define R0900_P2_KREFTMG2 0xf25b
++#define F0900_P2_KREF_TMG2 0xf25b00ff
++
++/*P2_SFRINIT1*/
++#define R0900_P2_SFRINIT1 0xf25e
++#define F0900_P2_SFR_INIT1 0xf25e007f
++
++/*P2_SFRINIT0*/
++#define R0900_P2_SFRINIT0 0xf25f
++#define F0900_P2_SFR_INIT0 0xf25f00ff
++
++/*P2_SFRUP1*/
++#define R0900_P2_SFRUP1 0xf260
++#define F0900_P2_AUTO_GUP 0xf2600080
++#define F0900_P2_SYMB_FREQ_UP1 0xf260007f
++
++/*P2_SFRUP0*/
++#define R0900_P2_SFRUP0 0xf261
++#define F0900_P2_SYMB_FREQ_UP0 0xf26100ff
++
++/*P2_SFRLOW1*/
++#define R0900_P2_SFRLOW1 0xf262
++#define F0900_P2_AUTO_GLOW 0xf2620080
++#define F0900_P2_SYMB_FREQ_LOW1 0xf262007f
++
++/*P2_SFRLOW0*/
++#define R0900_P2_SFRLOW0 0xf263
++#define F0900_P2_SYMB_FREQ_LOW0 0xf26300ff
++
++/*P2_SFR3*/
++#define R0900_P2_SFR3 0xf264
++#define F0900_P2_SYMB_FREQ3 0xf26400ff
++
++/*P2_SFR2*/
++#define R0900_P2_SFR2 0xf265
++#define F0900_P2_SYMB_FREQ2 0xf26500ff
++
++/*P2_SFR1*/
++#define R0900_P2_SFR1 0xf266
++#define F0900_P2_SYMB_FREQ1 0xf26600ff
++
++/*P2_SFR0*/
++#define R0900_P2_SFR0 0xf267
++#define F0900_P2_SYMB_FREQ0 0xf26700ff
++
++/*P2_TMGREG2*/
++#define R0900_P2_TMGREG2 0xf268
++#define F0900_P2_TMGREG2 0xf26800ff
++
++/*P2_TMGREG1*/
++#define R0900_P2_TMGREG1 0xf269
++#define F0900_P2_TMGREG1 0xf26900ff
++
++/*P2_TMGREG0*/
++#define R0900_P2_TMGREG0 0xf26a
++#define F0900_P2_TMGREG0 0xf26a00ff
++
++/*P2_TMGLOCK1*/
++#define R0900_P2_TMGLOCK1 0xf26b
++#define F0900_P2_TMGLOCK_LEVEL1 0xf26b01ff
++
++/*P2_TMGLOCK0*/
++#define R0900_P2_TMGLOCK0 0xf26c
++#define F0900_P2_TMGLOCK_LEVEL0 0xf26c00ff
++
++/*P2_TMGOBS*/
++#define R0900_P2_TMGOBS 0xf26d
++#define F0900_P2_ROLLOFF_STATUS 0xf26d00c0
++
++/*P2_EQUALCFG*/
++#define R0900_P2_EQUALCFG 0xf26f
++#define F0900_P2_EQUAL_ON 0xf26f0040
++#define F0900_P2_MU_EQUALDFE 0xf26f0007
++
++/*P2_EQUAI1*/
++#define R0900_P2_EQUAI1 0xf270
++#define F0900_P2_EQUA_ACCI1 0xf27001ff
++
++/*P2_EQUAQ1*/
++#define R0900_P2_EQUAQ1 0xf271
++#define F0900_P2_EQUA_ACCQ1 0xf27101ff
++
++/*P2_EQUAI2*/
++#define R0900_P2_EQUAI2 0xf272
++#define F0900_P2_EQUA_ACCI2 0xf27201ff
++
++/*P2_EQUAQ2*/
++#define R0900_P2_EQUAQ2 0xf273
++#define F0900_P2_EQUA_ACCQ2 0xf27301ff
++
++/*P2_EQUAI3*/
++#define R0900_P2_EQUAI3 0xf274
++#define F0900_P2_EQUA_ACCI3 0xf27401ff
++
++/*P2_EQUAQ3*/
++#define R0900_P2_EQUAQ3 0xf275
++#define F0900_P2_EQUA_ACCQ3 0xf27501ff
++
++/*P2_EQUAI4*/
++#define R0900_P2_EQUAI4 0xf276
++#define F0900_P2_EQUA_ACCI4 0xf27601ff
++
++/*P2_EQUAQ4*/
++#define R0900_P2_EQUAQ4 0xf277
++#define F0900_P2_EQUA_ACCQ4 0xf27701ff
++
++/*P2_EQUAI5*/
++#define R0900_P2_EQUAI5 0xf278
++#define F0900_P2_EQUA_ACCI5 0xf27801ff
++
++/*P2_EQUAQ5*/
++#define R0900_P2_EQUAQ5 0xf279
++#define F0900_P2_EQUA_ACCQ5 0xf27901ff
++
++/*P2_EQUAI6*/
++#define R0900_P2_EQUAI6 0xf27a
++#define F0900_P2_EQUA_ACCI6 0xf27a01ff
++
++/*P2_EQUAQ6*/
++#define R0900_P2_EQUAQ6 0xf27b
++#define F0900_P2_EQUA_ACCQ6 0xf27b01ff
++
++/*P2_EQUAI7*/
++#define R0900_P2_EQUAI7 0xf27c
++#define F0900_P2_EQUA_ACCI7 0xf27c01ff
++
++/*P2_EQUAQ7*/
++#define R0900_P2_EQUAQ7 0xf27d
++#define F0900_P2_EQUA_ACCQ7 0xf27d01ff
++
++/*P2_EQUAI8*/
++#define R0900_P2_EQUAI8 0xf27e
++#define F0900_P2_EQUA_ACCI8 0xf27e01ff
++
++/*P2_EQUAQ8*/
++#define R0900_P2_EQUAQ8 0xf27f
++#define F0900_P2_EQUA_ACCQ8 0xf27f01ff
++
++/*P2_NNOSDATAT1*/
++#define R0900_P2_NNOSDATAT1 0xf280
++#define F0900_P2_NOSDATAT_NORMED1 0xf28000ff
++
++/*P2_NNOSDATAT0*/
++#define R0900_P2_NNOSDATAT0 0xf281
++#define F0900_P2_NOSDATAT_NORMED0 0xf28100ff
++
++/*P2_NNOSDATA1*/
++#define R0900_P2_NNOSDATA1 0xf282
++#define F0900_P2_NOSDATA_NORMED1 0xf28200ff
++
++/*P2_NNOSDATA0*/
++#define R0900_P2_NNOSDATA0 0xf283
++#define F0900_P2_NOSDATA_NORMED0 0xf28300ff
++
++/*P2_NNOSPLHT1*/
++#define R0900_P2_NNOSPLHT1 0xf284
++#define F0900_P2_NOSPLHT_NORMED1 0xf28400ff
++
++/*P2_NNOSPLHT0*/
++#define R0900_P2_NNOSPLHT0 0xf285
++#define F0900_P2_NOSPLHT_NORMED0 0xf28500ff
++
++/*P2_NNOSPLH1*/
++#define R0900_P2_NNOSPLH1 0xf286
++#define F0900_P2_NOSPLH_NORMED1 0xf28600ff
++
++/*P2_NNOSPLH0*/
++#define R0900_P2_NNOSPLH0 0xf287
++#define F0900_P2_NOSPLH_NORMED0 0xf28700ff
++
++/*P2_NOSDATAT1*/
++#define R0900_P2_NOSDATAT1 0xf288
++#define F0900_P2_NOSDATAT_UNNORMED1 0xf28800ff
++
++/*P2_NOSDATAT0*/
++#define R0900_P2_NOSDATAT0 0xf289
++#define F0900_P2_NOSDATAT_UNNORMED0 0xf28900ff
++
++/*P2_NOSDATA1*/
++#define R0900_P2_NOSDATA1 0xf28a
++#define F0900_P2_NOSDATA_UNNORMED1 0xf28a00ff
++
++/*P2_NOSDATA0*/
++#define R0900_P2_NOSDATA0 0xf28b
++#define F0900_P2_NOSDATA_UNNORMED0 0xf28b00ff
++
++/*P2_NOSPLHT1*/
++#define R0900_P2_NOSPLHT1 0xf28c
++#define F0900_P2_NOSPLHT_UNNORMED1 0xf28c00ff
++
++/*P2_NOSPLHT0*/
++#define R0900_P2_NOSPLHT0 0xf28d
++#define F0900_P2_NOSPLHT_UNNORMED0 0xf28d00ff
++
++/*P2_NOSPLH1*/
++#define R0900_P2_NOSPLH1 0xf28e
++#define F0900_P2_NOSPLH_UNNORMED1 0xf28e00ff
++
++/*P2_NOSPLH0*/
++#define R0900_P2_NOSPLH0 0xf28f
++#define F0900_P2_NOSPLH_UNNORMED0 0xf28f00ff
++
++/*P2_CAR2CFG*/
++#define R0900_P2_CAR2CFG 0xf290
++#define F0900_P2_CARRIER3_DISABLE 0xf2900040
++#define F0900_P2_ROTA2ON 0xf2900004
++#define F0900_P2_PH_DET_ALGO2 0xf2900003
++
++/*P2_CFR2CFR1*/
++#define R0900_P2_CFR2CFR1 0xf291
++#define F0900_P2_CFR2TOCFR1_DVBS1 0xf29100c0
++#define F0900_P2_EN_S2CAR2CENTER 0xf2910020
++#define F0900_P2_DIS_BCHERRCFR2 0xf2910010
++#define F0900_P2_CFR2TOCFR1_BETA 0xf2910007
++
++/*P2_CFR22*/
++#define R0900_P2_CFR22 0xf293
++#define F0900_P2_CAR2_FREQ2 0xf29301ff
++
++/*P2_CFR21*/
++#define R0900_P2_CFR21 0xf294
++#define F0900_P2_CAR2_FREQ1 0xf29400ff
++
++/*P2_CFR20*/
++#define R0900_P2_CFR20 0xf295
++#define F0900_P2_CAR2_FREQ0 0xf29500ff
++
++/*P2_ACLC2S2Q*/
++#define R0900_P2_ACLC2S2Q 0xf297
++#define F0900_P2_ENAB_SPSKSYMB 0xf2970080
++#define F0900_P2_CAR2S2_Q_ALPH_M 0xf2970030
++#define F0900_P2_CAR2S2_Q_ALPH_E 0xf297000f
++
++/*P2_ACLC2S28*/
++#define R0900_P2_ACLC2S28 0xf298
++#define F0900_P2_OLDI3Q_MODE 0xf2980080
++#define F0900_P2_CAR2S2_8_ALPH_M 0xf2980030
++#define F0900_P2_CAR2S2_8_ALPH_E 0xf298000f
++
++/*P2_ACLC2S216A*/
++#define R0900_P2_ACLC2S216A 0xf299
++#define F0900_P2_DIS_C3STOPA2 0xf2990080
++#define F0900_P2_CAR2S2_16ADERAT 0xf2990040
++#define F0900_P2_CAR2S2_16A_ALPH_M 0xf2990030
++#define F0900_P2_CAR2S2_16A_ALPH_E 0xf299000f
++
++/*P2_ACLC2S232A*/
++#define R0900_P2_ACLC2S232A 0xf29a
++#define F0900_P2_CAR2S2_32ADERAT 0xf29a0040
++#define F0900_P2_CAR2S2_32A_ALPH_M 0xf29a0030
++#define F0900_P2_CAR2S2_32A_ALPH_E 0xf29a000f
++
++/*P2_BCLC2S2Q*/
++#define R0900_P2_BCLC2S2Q 0xf29c
++#define F0900_P2_CAR2S2_Q_BETA_M 0xf29c0030
++#define F0900_P2_CAR2S2_Q_BETA_E 0xf29c000f
++
++/*P2_BCLC2S28*/
++#define R0900_P2_BCLC2S28 0xf29d
++#define F0900_P2_CAR2S2_8_BETA_M 0xf29d0030
++#define F0900_P2_CAR2S2_8_BETA_E 0xf29d000f
++
++/*P2_BCLC2S216A*/
++#define R0900_P2_BCLC2S216A 0xf29e
++
++/*P2_BCLC2S232A*/
++#define R0900_P2_BCLC2S232A 0xf29f
++
++/*P2_PLROOT2*/
++#define R0900_P2_PLROOT2 0xf2ac
++#define F0900_P2_PLSCRAMB_MODE 0xf2ac000c
++#define F0900_P2_PLSCRAMB_ROOT2 0xf2ac0003
++
++/*P2_PLROOT1*/
++#define R0900_P2_PLROOT1 0xf2ad
++#define F0900_P2_PLSCRAMB_ROOT1 0xf2ad00ff
++
++/*P2_PLROOT0*/
++#define R0900_P2_PLROOT0 0xf2ae
++#define F0900_P2_PLSCRAMB_ROOT0 0xf2ae00ff
++
++/*P2_MODCODLST0*/
++#define R0900_P2_MODCODLST0 0xf2b0
++
++/*P2_MODCODLST1*/
++#define R0900_P2_MODCODLST1 0xf2b1
++#define F0900_P2_DIS_MODCOD29 0xf2b100f0
++#define F0900_P2_DIS_32PSK_9_10 0xf2b1000f
++
++/*P2_MODCODLST2*/
++#define R0900_P2_MODCODLST2 0xf2b2
++#define F0900_P2_DIS_32PSK_8_9 0xf2b200f0
++#define F0900_P2_DIS_32PSK_5_6 0xf2b2000f
++
++/*P2_MODCODLST3*/
++#define R0900_P2_MODCODLST3 0xf2b3
++#define F0900_P2_DIS_32PSK_4_5 0xf2b300f0
++#define F0900_P2_DIS_32PSK_3_4 0xf2b3000f
++
++/*P2_MODCODLST4*/
++#define R0900_P2_MODCODLST4 0xf2b4
++#define F0900_P2_DIS_16PSK_9_10 0xf2b400f0
++#define F0900_P2_DIS_16PSK_8_9 0xf2b4000f
++
++/*P2_MODCODLST5*/
++#define R0900_P2_MODCODLST5 0xf2b5
++#define F0900_P2_DIS_16PSK_5_6 0xf2b500f0
++#define F0900_P2_DIS_16PSK_4_5 0xf2b5000f
++
++/*P2_MODCODLST6*/
++#define R0900_P2_MODCODLST6 0xf2b6
++#define F0900_P2_DIS_16PSK_3_4 0xf2b600f0
++#define F0900_P2_DIS_16PSK_2_3 0xf2b6000f
++
++/*P2_MODCODLST7*/
++#define R0900_P2_MODCODLST7 0xf2b7
++#define F0900_P2_DIS_8P_9_10 0xf2b700f0
++#define F0900_P2_DIS_8P_8_9 0xf2b7000f
++
++/*P2_MODCODLST8*/
++#define R0900_P2_MODCODLST8 0xf2b8
++#define F0900_P2_DIS_8P_5_6 0xf2b800f0
++#define F0900_P2_DIS_8P_3_4 0xf2b8000f
++
++/*P2_MODCODLST9*/
++#define R0900_P2_MODCODLST9 0xf2b9
++#define F0900_P2_DIS_8P_2_3 0xf2b900f0
++#define F0900_P2_DIS_8P_3_5 0xf2b9000f
++
++/*P2_MODCODLSTA*/
++#define R0900_P2_MODCODLSTA 0xf2ba
++#define F0900_P2_DIS_QP_9_10 0xf2ba00f0
++#define F0900_P2_DIS_QP_8_9 0xf2ba000f
++
++/*P2_MODCODLSTB*/
++#define R0900_P2_MODCODLSTB 0xf2bb
++#define F0900_P2_DIS_QP_5_6 0xf2bb00f0
++#define F0900_P2_DIS_QP_4_5 0xf2bb000f
++
++/*P2_MODCODLSTC*/
++#define R0900_P2_MODCODLSTC 0xf2bc
++#define F0900_P2_DIS_QP_3_4 0xf2bc00f0
++#define F0900_P2_DIS_QP_2_3 0xf2bc000f
++
++/*P2_MODCODLSTD*/
++#define R0900_P2_MODCODLSTD 0xf2bd
++#define F0900_P2_DIS_QP_3_5 0xf2bd00f0
++#define F0900_P2_DIS_QP_1_2 0xf2bd000f
++
++/*P2_MODCODLSTE*/
++#define R0900_P2_MODCODLSTE 0xf2be
++#define F0900_P2_DIS_QP_2_5 0xf2be00f0
++#define F0900_P2_DIS_QP_1_3 0xf2be000f
++
++/*P2_MODCODLSTF*/
++#define R0900_P2_MODCODLSTF 0xf2bf
++#define F0900_P2_DIS_QP_1_4 0xf2bf00f0
++
++/*P2_GAUSSR0*/
++#define R0900_P2_GAUSSR0 0xf2c0
++#define F0900_P2_EN_CCIMODE 0xf2c00080
++#define F0900_P2_R0_GAUSSIEN 0xf2c0007f
++
++/*P2_CCIR0*/
++#define R0900_P2_CCIR0 0xf2c1
++#define F0900_P2_CCIDETECT_PLHONLY 0xf2c10080
++#define F0900_P2_R0_CCI 0xf2c1007f
++
++/*P2_CCIQUANT*/
++#define R0900_P2_CCIQUANT 0xf2c2
++#define F0900_P2_CCI_BETA 0xf2c200e0
++#define F0900_P2_CCI_QUANT 0xf2c2001f
++
++/*P2_CCITHRES*/
++#define R0900_P2_CCITHRES 0xf2c3
++#define F0900_P2_CCI_THRESHOLD 0xf2c300ff
++
++/*P2_CCIACC*/
++#define R0900_P2_CCIACC 0xf2c4
++#define F0900_P2_CCI_VALUE 0xf2c400ff
++
++/*P2_DMDRESCFG*/
++#define R0900_P2_DMDRESCFG 0xf2c6
++#define F0900_P2_DMDRES_RESET 0xf2c60080
++#define F0900_P2_DMDRES_STRALL 0xf2c60008
++#define F0900_P2_DMDRES_NEWONLY 0xf2c60004
++#define F0900_P2_DMDRES_NOSTORE 0xf2c60002
++
++/*P2_DMDRESADR*/
++#define R0900_P2_DMDRESADR 0xf2c7
++#define F0900_P2_DMDRES_VALIDCFR 0xf2c70040
++#define F0900_P2_DMDRES_MEMFULL 0xf2c70030
++#define F0900_P2_DMDRES_RESNBR 0xf2c7000f
++
++/*P2_DMDRESDATA7*/
++#define R0900_P2_DMDRESDATA7 0xf2c8
++#define F0900_P2_DMDRES_DATA7 0xf2c800ff
++
++/*P2_DMDRESDATA6*/
++#define R0900_P2_DMDRESDATA6 0xf2c9
++#define F0900_P2_DMDRES_DATA6 0xf2c900ff
++
++/*P2_DMDRESDATA5*/
++#define R0900_P2_DMDRESDATA5 0xf2ca
++#define F0900_P2_DMDRES_DATA5 0xf2ca00ff
++
++/*P2_DMDRESDATA4*/
++#define R0900_P2_DMDRESDATA4 0xf2cb
++#define F0900_P2_DMDRES_DATA4 0xf2cb00ff
++
++/*P2_DMDRESDATA3*/
++#define R0900_P2_DMDRESDATA3 0xf2cc
++#define F0900_P2_DMDRES_DATA3 0xf2cc00ff
++
++/*P2_DMDRESDATA2*/
++#define R0900_P2_DMDRESDATA2 0xf2cd
++#define F0900_P2_DMDRES_DATA2 0xf2cd00ff
++
++/*P2_DMDRESDATA1*/
++#define R0900_P2_DMDRESDATA1 0xf2ce
++#define F0900_P2_DMDRES_DATA1 0xf2ce00ff
++
++/*P2_DMDRESDATA0*/
++#define R0900_P2_DMDRESDATA0 0xf2cf
++#define F0900_P2_DMDRES_DATA0 0xf2cf00ff
++
++/*P2_FFEI1*/
++#define R0900_P2_FFEI1 0xf2d0
++#define F0900_P2_FFE_ACCI1 0xf2d001ff
++
++/*P2_FFEQ1*/
++#define R0900_P2_FFEQ1 0xf2d1
++#define F0900_P2_FFE_ACCQ1 0xf2d101ff
++
++/*P2_FFEI2*/
++#define R0900_P2_FFEI2 0xf2d2
++#define F0900_P2_FFE_ACCI2 0xf2d201ff
++
++/*P2_FFEQ2*/
++#define R0900_P2_FFEQ2 0xf2d3
++#define F0900_P2_FFE_ACCQ2 0xf2d301ff
++
++/*P2_FFEI3*/
++#define R0900_P2_FFEI3 0xf2d4
++#define F0900_P2_FFE_ACCI3 0xf2d401ff
++
++/*P2_FFEQ3*/
++#define R0900_P2_FFEQ3 0xf2d5
++#define F0900_P2_FFE_ACCQ3 0xf2d501ff
++
++/*P2_FFEI4*/
++#define R0900_P2_FFEI4 0xf2d6
++#define F0900_P2_FFE_ACCI4 0xf2d601ff
++
++/*P2_FFEQ4*/
++#define R0900_P2_FFEQ4 0xf2d7
++#define F0900_P2_FFE_ACCQ4 0xf2d701ff
++
++/*P2_FFECFG*/
++#define R0900_P2_FFECFG 0xf2d8
++#define F0900_P2_EQUALFFE_ON 0xf2d80040
++#define F0900_P2_MU_EQUALFFE 0xf2d80007
++
++/*P2_TNRCFG*/
++#define R0900_P2_TNRCFG 0xf2e0
++#define F0900_P2_TUN_ACKFAIL 0xf2e00080
++#define F0900_P2_TUN_TYPE 0xf2e00070
++#define F0900_P2_TUN_SECSTOP 0xf2e00008
++#define F0900_P2_TUN_VCOSRCH 0xf2e00004
++#define F0900_P2_TUN_MADDRESS 0xf2e00003
++
++/*P2_TNRCFG2*/
++#define R0900_P2_TNRCFG2 0xf2e1
++#define F0900_P2_TUN_IQSWAP 0xf2e10080
++#define F0900_P2_DIS_BWCALC 0xf2e10004
++#define F0900_P2_SHORT_WAITSTATES 0xf2e10002
++
++/*P2_TNRXTAL*/
++#define R0900_P2_TNRXTAL 0xf2e4
++#define F0900_P2_TUN_XTALFREQ 0xf2e4001f
++
++/*P2_TNRSTEPS*/
++#define R0900_P2_TNRSTEPS 0xf2e7
++#define F0900_P2_TUNER_BW0P125 0xf2e70080
++#define F0900_P2_BWINC_OFFSET 0xf2e70170
++#define F0900_P2_SOFTSTEP_RNG 0xf2e70008
++#define F0900_P2_TUN_BWOFFSET 0xf2e70007
++
++/*P2_TNRGAIN*/
++#define R0900_P2_TNRGAIN 0xf2e8
++#define F0900_P2_TUN_KDIVEN 0xf2e800c0
++#define F0900_P2_STB6X00_OCK 0xf2e80030
++#define F0900_P2_TUN_GAIN 0xf2e8000f
++
++/*P2_TNRRF1*/
++#define R0900_P2_TNRRF1 0xf2e9
++#define F0900_P2_TUN_RFFREQ2 0xf2e900ff
++
++/*P2_TNRRF0*/
++#define R0900_P2_TNRRF0 0xf2ea
++#define F0900_P2_TUN_RFFREQ1 0xf2ea00ff
++
++/*P2_TNRBW*/
++#define R0900_P2_TNRBW 0xf2eb
++#define F0900_P2_TUN_RFFREQ0 0xf2eb00c0
++#define F0900_P2_TUN_BW 0xf2eb003f
++
++/*P2_TNRADJ*/
++#define R0900_P2_TNRADJ 0xf2ec
++#define F0900_P2_STB61X0_CALTIME 0xf2ec0040
++
++/*P2_TNRCTL2*/
++#define R0900_P2_TNRCTL2 0xf2ed
++#define F0900_P2_STB61X0_RCCKOFF 0xf2ed0080
++#define F0900_P2_STB61X0_ICP_SDOFF 0xf2ed0040
++#define F0900_P2_STB61X0_DCLOOPOFF 0xf2ed0020
++#define F0900_P2_STB61X0_REFOUTSEL 0xf2ed0010
++#define F0900_P2_STB61X0_CALOFF 0xf2ed0008
++#define F0900_P2_STB6XX0_LPT_BEN 0xf2ed0004
++#define F0900_P2_STB6XX0_RX_OSCP 0xf2ed0002
++#define F0900_P2_STB6XX0_SYN 0xf2ed0001
++
++/*P2_TNRCFG3*/
++#define R0900_P2_TNRCFG3 0xf2ee
++#define F0900_P2_TUN_PLLFREQ 0xf2ee001c
++#define F0900_P2_TUN_I2CFREQ_MODE 0xf2ee0003
++
++/*P2_TNRLAUNCH*/
++#define R0900_P2_TNRLAUNCH 0xf2f0
++
++/*P2_TNRLD*/
++#define R0900_P2_TNRLD 0xf2f0
++#define F0900_P2_TUNLD_VCOING 0xf2f00080
++#define F0900_P2_TUN_REG1FAIL 0xf2f00040
++#define F0900_P2_TUN_REG2FAIL 0xf2f00020
++#define F0900_P2_TUN_REG3FAIL 0xf2f00010
++#define F0900_P2_TUN_REG4FAIL 0xf2f00008
++#define F0900_P2_TUN_REG5FAIL 0xf2f00004
++#define F0900_P2_TUN_BWING 0xf2f00002
++#define F0900_P2_TUN_LOCKED 0xf2f00001
++
++/*P2_TNROBSL*/
++#define R0900_P2_TNROBSL 0xf2f6
++#define F0900_P2_TUN_I2CABORTED 0xf2f60080
++#define F0900_P2_TUN_LPEN 0xf2f60040
++#define F0900_P2_TUN_FCCK 0xf2f60020
++#define F0900_P2_TUN_I2CLOCKED 0xf2f60010
++#define F0900_P2_TUN_PROGDONE 0xf2f6000c
++#define F0900_P2_TUN_RFRESTE1 0xf2f60003
++
++/*P2_TNRRESTE*/
++#define R0900_P2_TNRRESTE 0xf2f7
++#define F0900_P2_TUN_RFRESTE0 0xf2f700ff
++
++/*P2_SMAPCOEF7*/
++#define R0900_P2_SMAPCOEF7 0xf300
++#define F0900_P2_DIS_QSCALE 0xf3000080
++#define F0900_P2_SMAPCOEF_Q_LLR12 0xf300017f
++
++/*P2_SMAPCOEF6*/
++#define R0900_P2_SMAPCOEF6 0xf301
++#define F0900_P2_ADJ_8PSKLLR1 0xf3010004
++#define F0900_P2_OLD_8PSKLLR1 0xf3010002
++#define F0900_P2_DIS_AB8PSK 0xf3010001
++
++/*P2_SMAPCOEF5*/
++#define R0900_P2_SMAPCOEF5 0xf302
++#define F0900_P2_DIS_8SCALE 0xf3020080
++#define F0900_P2_SMAPCOEF_8P_LLR23 0xf302017f
++
++/*P2_NCO2MAX1*/
++#define R0900_P2_NCO2MAX1 0xf314
++#define F0900_P2_TETA2_MAXVABS1 0xf31400ff
++
++/*P2_NCO2MAX0*/
++#define R0900_P2_NCO2MAX0 0xf315
++#define F0900_P2_TETA2_MAXVABS0 0xf31500ff
++
++/*P2_NCO2FR1*/
++#define R0900_P2_NCO2FR1 0xf316
++#define F0900_P2_NCO2FINAL_ANGLE1 0xf31600ff
++
++/*P2_NCO2FR0*/
++#define R0900_P2_NCO2FR0 0xf317
++#define F0900_P2_NCO2FINAL_ANGLE0 0xf31700ff
++
++/*P2_CFR2AVRGE1*/
++#define R0900_P2_CFR2AVRGE1 0xf318
++#define F0900_P2_I2C_CFR2AVERAGE1 0xf31800ff
++
++/*P2_CFR2AVRGE0*/
++#define R0900_P2_CFR2AVRGE0 0xf319
++#define F0900_P2_I2C_CFR2AVERAGE0 0xf31900ff
++
++/*P2_DMDPLHSTAT*/
++#define R0900_P2_DMDPLHSTAT 0xf320
++#define F0900_P2_PLH_STATISTIC 0xf32000ff
++
++/*P2_LOCKTIME3*/
++#define R0900_P2_LOCKTIME3 0xf322
++#define F0900_P2_DEMOD_LOCKTIME3 0xf32200ff
++
++/*P2_LOCKTIME2*/
++#define R0900_P2_LOCKTIME2 0xf323
++#define F0900_P2_DEMOD_LOCKTIME2 0xf32300ff
++
++/*P2_LOCKTIME1*/
++#define R0900_P2_LOCKTIME1 0xf324
++#define F0900_P2_DEMOD_LOCKTIME1 0xf32400ff
++
++/*P2_LOCKTIME0*/
++#define R0900_P2_LOCKTIME0 0xf325
++#define F0900_P2_DEMOD_LOCKTIME0 0xf32500ff
++
++/*P2_VITSCALE*/
++#define R0900_P2_VITSCALE 0xf332
++#define F0900_P2_NVTH_NOSRANGE 0xf3320080
++#define F0900_P2_VERROR_MAXMODE 0xf3320040
++#define F0900_P2_NSLOWSN_LOCKED 0xf3320008
++#define F0900_P2_DIS_RSFLOCK 0xf3320002
++
++/*P2_FECM*/
++#define R0900_P2_FECM 0xf333
++#define F0900_P2_DSS_DVB 0xf3330080
++#define F0900_P2_DSS_SRCH 0xf3330010
++#define F0900_P2_SYNCVIT 0xf3330002
++#define F0900_P2_IQINV 0xf3330001
++
++/*P2_VTH12*/
++#define R0900_P2_VTH12 0xf334
++#define F0900_P2_VTH12 0xf33400ff
++
++/*P2_VTH23*/
++#define R0900_P2_VTH23 0xf335
++#define F0900_P2_VTH23 0xf33500ff
++
++/*P2_VTH34*/
++#define R0900_P2_VTH34 0xf336
++#define F0900_P2_VTH34 0xf33600ff
++
++/*P2_VTH56*/
++#define R0900_P2_VTH56 0xf337
++#define F0900_P2_VTH56 0xf33700ff
++
++/*P2_VTH67*/
++#define R0900_P2_VTH67 0xf338
++#define F0900_P2_VTH67 0xf33800ff
++
++/*P2_VTH78*/
++#define R0900_P2_VTH78 0xf339
++#define F0900_P2_VTH78 0xf33900ff
++
++/*P2_VITCURPUN*/
++#define R0900_P2_VITCURPUN 0xf33a
++#define F0900_P2_VIT_CURPUN 0xf33a001f
++
++/*P2_VERROR*/
++#define R0900_P2_VERROR 0xf33b
++#define F0900_P2_REGERR_VIT 0xf33b00ff
++
++/*P2_PRVIT*/
++#define R0900_P2_PRVIT 0xf33c
++#define F0900_P2_DIS_VTHLOCK 0xf33c0040
++#define F0900_P2_E7_8VIT 0xf33c0020
++#define F0900_P2_E6_7VIT 0xf33c0010
++#define F0900_P2_E5_6VIT 0xf33c0008
++#define F0900_P2_E3_4VIT 0xf33c0004
++#define F0900_P2_E2_3VIT 0xf33c0002
++#define F0900_P2_E1_2VIT 0xf33c0001
++
++/*P2_VAVSRVIT*/
++#define R0900_P2_VAVSRVIT 0xf33d
++#define F0900_P2_AMVIT 0xf33d0080
++#define F0900_P2_FROZENVIT 0xf33d0040
++#define F0900_P2_SNVIT 0xf33d0030
++#define F0900_P2_TOVVIT 0xf33d000c
++#define F0900_P2_HYPVIT 0xf33d0003
++
++/*P2_VSTATUSVIT*/
++#define R0900_P2_VSTATUSVIT 0xf33e
++#define F0900_P2_PRFVIT 0xf33e0010
++#define F0900_P2_LOCKEDVIT 0xf33e0008
++
++/*P2_VTHINUSE*/
++#define R0900_P2_VTHINUSE 0xf33f
++#define F0900_P2_VIT_INUSE 0xf33f00ff
++
++/*P2_KDIV12*/
++#define R0900_P2_KDIV12 0xf340
++#define F0900_P2_K_DIVIDER_12 0xf340007f
++
++/*P2_KDIV23*/
++#define R0900_P2_KDIV23 0xf341
++#define F0900_P2_K_DIVIDER_23 0xf341007f
++
++/*P2_KDIV34*/
++#define R0900_P2_KDIV34 0xf342
++#define F0900_P2_K_DIVIDER_34 0xf342007f
++
++/*P2_KDIV56*/
++#define R0900_P2_KDIV56 0xf343
++#define F0900_P2_K_DIVIDER_56 0xf343007f
++
++/*P2_KDIV67*/
++#define R0900_P2_KDIV67 0xf344
++#define F0900_P2_K_DIVIDER_67 0xf344007f
++
++/*P2_KDIV78*/
++#define R0900_P2_KDIV78 0xf345
++#define F0900_P2_K_DIVIDER_78 0xf345007f
++
++/*P2_PDELCTRL1*/
++#define R0900_P2_PDELCTRL1 0xf350
++#define F0900_P2_INV_MISMASK 0xf3500080
++#define F0900_P2_FILTER_EN 0xf3500020
++#define F0900_P2_EN_MIS00 0xf3500002
++#define F0900_P2_ALGOSWRST 0xf3500001
++
++/*P2_PDELCTRL2*/
++#define R0900_P2_PDELCTRL2 0xf351
++#define F0900_P2_RESET_UPKO_COUNT 0xf3510040
++#define F0900_P2_FRAME_MODE 0xf3510002
++#define F0900_P2_NOBCHERRFLG_USE 0xf3510001
++
++/*P2_HYSTTHRESH*/
++#define R0900_P2_HYSTTHRESH 0xf354
++#define F0900_P2_UNLCK_THRESH 0xf35400f0
++#define F0900_P2_DELIN_LCK_THRESH 0xf354000f
++
++/*P2_ISIENTRY*/
++#define R0900_P2_ISIENTRY 0xf35e
++#define F0900_P2_ISI_ENTRY 0xf35e00ff
++
++/*P2_ISIBITENA*/
++#define R0900_P2_ISIBITENA 0xf35f
++#define F0900_P2_ISI_BIT_EN 0xf35f00ff
++
++/*P2_MATSTR1*/
++#define R0900_P2_MATSTR1 0xf360
++#define F0900_P2_MATYPE_CURRENT1 0xf36000ff
++
++/*P2_MATSTR0*/
++#define R0900_P2_MATSTR0 0xf361
++#define F0900_P2_MATYPE_CURRENT0 0xf36100ff
++
++/*P2_UPLSTR1*/
++#define R0900_P2_UPLSTR1 0xf362
++#define F0900_P2_UPL_CURRENT1 0xf36200ff
++
++/*P2_UPLSTR0*/
++#define R0900_P2_UPLSTR0 0xf363
++#define F0900_P2_UPL_CURRENT0 0xf36300ff
++
++/*P2_DFLSTR1*/
++#define R0900_P2_DFLSTR1 0xf364
++#define F0900_P2_DFL_CURRENT1 0xf36400ff
++
++/*P2_DFLSTR0*/
++#define R0900_P2_DFLSTR0 0xf365
++#define F0900_P2_DFL_CURRENT0 0xf36500ff
++
++/*P2_SYNCSTR*/
++#define R0900_P2_SYNCSTR 0xf366
++#define F0900_P2_SYNC_CURRENT 0xf36600ff
++
++/*P2_SYNCDSTR1*/
++#define R0900_P2_SYNCDSTR1 0xf367
++#define F0900_P2_SYNCD_CURRENT1 0xf36700ff
++
++/*P2_SYNCDSTR0*/
++#define R0900_P2_SYNCDSTR0 0xf368
++#define F0900_P2_SYNCD_CURRENT0 0xf36800ff
++
++/*P2_PDELSTATUS1*/
++#define R0900_P2_PDELSTATUS1 0xf369
++#define F0900_P2_PKTDELIN_DELOCK 0xf3690080
++#define F0900_P2_SYNCDUPDFL_BADDFL 0xf3690040
++#define F0900_P2_CONTINUOUS_STREAM 0xf3690020
++#define F0900_P2_UNACCEPTED_STREAM 0xf3690010
++#define F0900_P2_BCH_ERROR_FLAG 0xf3690008
++#define F0900_P2_PKTDELIN_LOCK 0xf3690002
++#define F0900_P2_FIRST_LOCK 0xf3690001
++
++/*P2_PDELSTATUS2*/
++#define R0900_P2_PDELSTATUS2 0xf36a
++#define F0900_P2_FRAME_MODCOD 0xf36a007c
++#define F0900_P2_FRAME_TYPE 0xf36a0003
++
++/*P2_BBFCRCKO1*/
++#define R0900_P2_BBFCRCKO1 0xf36b
++#define F0900_P2_BBHCRC_KOCNT1 0xf36b00ff
++
++/*P2_BBFCRCKO0*/
++#define R0900_P2_BBFCRCKO0 0xf36c
++#define F0900_P2_BBHCRC_KOCNT0 0xf36c00ff
++
++/*P2_UPCRCKO1*/
++#define R0900_P2_UPCRCKO1 0xf36d
++#define F0900_P2_PKTCRC_KOCNT1 0xf36d00ff
++
++/*P2_UPCRCKO0*/
++#define R0900_P2_UPCRCKO0 0xf36e
++#define F0900_P2_PKTCRC_KOCNT0 0xf36e00ff
++
++/*P2_PDELCTRL3*/
++#define R0900_P2_PDELCTRL3 0xf36f
++#define F0900_P2_PKTDEL_CONTFAIL 0xf36f0080
++#define F0900_P2_NOFIFO_BCHERR 0xf36f0020
++
++/*P2_TSSTATEM*/
++#define R0900_P2_TSSTATEM 0xf370
++#define F0900_P2_TSDIL_ON 0xf3700080
++#define F0900_P2_TSRS_ON 0xf3700020
++#define F0900_P2_TSDESCRAMB_ON 0xf3700010
++#define F0900_P2_TSFRAME_MODE 0xf3700008
++#define F0900_P2_TS_DISABLE 0xf3700004
++#define F0900_P2_TSOUT_NOSYNC 0xf3700001
++
++/*P2_TSCFGH*/
++#define R0900_P2_TSCFGH 0xf372
++#define F0900_P2_TSFIFO_DVBCI 0xf3720080
++#define F0900_P2_TSFIFO_SERIAL 0xf3720040
++#define F0900_P2_TSFIFO_TEIUPDATE 0xf3720020
++#define F0900_P2_TSFIFO_DUTY50 0xf3720010
++#define F0900_P2_TSFIFO_HSGNLOUT 0xf3720008
++#define F0900_P2_TSFIFO_ERRMODE 0xf3720006
++#define F0900_P2_RST_HWARE 0xf3720001
++
++/*P2_TSCFGM*/
++#define R0900_P2_TSCFGM 0xf373
++#define F0900_P2_TSFIFO_MANSPEED 0xf37300c0
++#define F0900_P2_TSFIFO_PERMDATA 0xf3730020
++#define F0900_P2_TSFIFO_DPUNACT 0xf3730002
++#define F0900_P2_TSFIFO_INVDATA 0xf3730001
++
++/*P2_TSCFGL*/
++#define R0900_P2_TSCFGL 0xf374
++#define F0900_P2_TSFIFO_BCLKDEL1CK 0xf37400c0
++#define F0900_P2_BCHERROR_MODE 0xf3740030
++#define F0900_P2_TSFIFO_NSGNL2DATA 0xf3740008
++#define F0900_P2_TSFIFO_EMBINDVB 0xf3740004
++#define F0900_P2_TSFIFO_BITSPEED 0xf3740003
++
++/*P2_TSINSDELH*/
++#define R0900_P2_TSINSDELH 0xf376
++#define F0900_P2_TSDEL_SYNCBYTE 0xf3760080
++#define F0900_P2_TSDEL_XXHEADER 0xf3760040
++#define F0900_P2_TSDEL_BBHEADER 0xf3760020
++#define F0900_P2_TSDEL_DATAFIELD 0xf3760010
++#define F0900_P2_TSINSDEL_ISCR 0xf3760008
++#define F0900_P2_TSINSDEL_NPD 0xf3760004
++#define F0900_P2_TSINSDEL_RSPARITY 0xf3760002
++#define F0900_P2_TSINSDEL_CRC8 0xf3760001
++
++/*P2_TSDIVN*/
++#define R0900_P2_TSDIVN 0xf379
++#define F0900_P2_TSFIFO_SPEEDMODE 0xf37900c0
++
++/*P2_TSCFG4*/
++#define R0900_P2_TSCFG4 0xf37a
++#define F0900_P2_TSFIFO_TSSPEEDMODE 0xf37a00c0
++
++/*P2_TSSPEED*/
++#define R0900_P2_TSSPEED 0xf380
++#define F0900_P2_TSFIFO_OUTSPEED 0xf38000ff
++
++/*P2_TSSTATUS*/
++#define R0900_P2_TSSTATUS 0xf381
++#define F0900_P2_TSFIFO_LINEOK 0xf3810080
++#define F0900_P2_TSFIFO_ERROR 0xf3810040
++#define F0900_P2_DIL_READY 0xf3810001
++
++/*P2_TSSTATUS2*/
++#define R0900_P2_TSSTATUS2 0xf382
++#define F0900_P2_TSFIFO_DEMODSEL 0xf3820080
++#define F0900_P2_TSFIFOSPEED_STORE 0xf3820040
++#define F0900_P2_DILXX_RESET 0xf3820020
++#define F0900_P2_TSSERIAL_IMPOS 0xf3820010
++#define F0900_P2_SCRAMBDETECT 0xf3820002
++
++/*P2_TSBITRATE1*/
++#define R0900_P2_TSBITRATE1 0xf383
++#define F0900_P2_TSFIFO_BITRATE1 0xf38300ff
++
++/*P2_TSBITRATE0*/
++#define R0900_P2_TSBITRATE0 0xf384
++#define F0900_P2_TSFIFO_BITRATE0 0xf38400ff
++
++/*P2_ERRCTRL1*/
++#define R0900_P2_ERRCTRL1 0xf398
++#define F0900_P2_ERR_SOURCE1 0xf39800f0
++#define F0900_P2_NUM_EVENT1 0xf3980007
++
++/*P2_ERRCNT12*/
++#define R0900_P2_ERRCNT12 0xf399
++#define F0900_P2_ERRCNT1_OLDVALUE 0xf3990080
++#define F0900_P2_ERR_CNT12 0xf399007f
++
++/*P2_ERRCNT11*/
++#define R0900_P2_ERRCNT11 0xf39a
++#define F0900_P2_ERR_CNT11 0xf39a00ff
++
++/*P2_ERRCNT10*/
++#define R0900_P2_ERRCNT10 0xf39b
++#define F0900_P2_ERR_CNT10 0xf39b00ff
++
++/*P2_ERRCTRL2*/
++#define R0900_P2_ERRCTRL2 0xf39c
++#define F0900_P2_ERR_SOURCE2 0xf39c00f0
++#define F0900_P2_NUM_EVENT2 0xf39c0007
++
++/*P2_ERRCNT22*/
++#define R0900_P2_ERRCNT22 0xf39d
++#define F0900_P2_ERRCNT2_OLDVALUE 0xf39d0080
++#define F0900_P2_ERR_CNT22 0xf39d007f
++
++/*P2_ERRCNT21*/
++#define R0900_P2_ERRCNT21 0xf39e
++#define F0900_P2_ERR_CNT21 0xf39e00ff
++
++/*P2_ERRCNT20*/
++#define R0900_P2_ERRCNT20 0xf39f
++#define F0900_P2_ERR_CNT20 0xf39f00ff
++
++/*P2_FECSPY*/
++#define R0900_P2_FECSPY 0xf3a0
++#define F0900_P2_SPY_ENABLE 0xf3a00080
++#define F0900_P2_NO_SYNCBYTE 0xf3a00040
++#define F0900_P2_SERIAL_MODE 0xf3a00020
++#define F0900_P2_UNUSUAL_PACKET 0xf3a00010
++#define F0900_P2_BERMETER_DATAMODE 0xf3a00008
++#define F0900_P2_BERMETER_LMODE 0xf3a00002
++#define F0900_P2_BERMETER_RESET 0xf3a00001
++
++/*P2_FSPYCFG*/
++#define R0900_P2_FSPYCFG 0xf3a1
++#define F0900_P2_FECSPY_INPUT 0xf3a100c0
++#define F0900_P2_RST_ON_ERROR 0xf3a10020
++#define F0900_P2_ONE_SHOT 0xf3a10010
++#define F0900_P2_I2C_MODE 0xf3a1000c
++#define F0900_P2_SPY_HYSTERESIS 0xf3a10003
++
++/*P2_FSPYDATA*/
++#define R0900_P2_FSPYDATA 0xf3a2
++#define F0900_P2_SPY_STUFFING 0xf3a20080
++#define F0900_P2_SPY_CNULLPKT 0xf3a20020
++#define F0900_P2_SPY_OUTDATA_MODE 0xf3a2001f
++
++/*P2_FSPYOUT*/
++#define R0900_P2_FSPYOUT 0xf3a3
++#define F0900_P2_FSPY_DIRECT 0xf3a30080
++#define F0900_P2_STUFF_MODE 0xf3a30007
++
++/*P2_FSTATUS*/
++#define R0900_P2_FSTATUS 0xf3a4
++#define F0900_P2_SPY_ENDSIM 0xf3a40080
++#define F0900_P2_VALID_SIM 0xf3a40040
++#define F0900_P2_FOUND_SIGNAL 0xf3a40020
++#define F0900_P2_DSS_SYNCBYTE 0xf3a40010
++#define F0900_P2_RESULT_STATE 0xf3a4000f
++
++/*P2_FBERCPT4*/
++#define R0900_P2_FBERCPT4 0xf3a8
++#define F0900_P2_FBERMETER_CPT4 0xf3a800ff
++
++/*P2_FBERCPT3*/
++#define R0900_P2_FBERCPT3 0xf3a9
++#define F0900_P2_FBERMETER_CPT3 0xf3a900ff
++
++/*P2_FBERCPT2*/
++#define R0900_P2_FBERCPT2 0xf3aa
++#define F0900_P2_FBERMETER_CPT2 0xf3aa00ff
++
++/*P2_FBERCPT1*/
++#define R0900_P2_FBERCPT1 0xf3ab
++#define F0900_P2_FBERMETER_CPT1 0xf3ab00ff
++
++/*P2_FBERCPT0*/
++#define R0900_P2_FBERCPT0 0xf3ac
++#define F0900_P2_FBERMETER_CPT0 0xf3ac00ff
++
++/*P2_FBERERR2*/
++#define R0900_P2_FBERERR2 0xf3ad
++#define F0900_P2_FBERMETER_ERR2 0xf3ad00ff
++
++/*P2_FBERERR1*/
++#define R0900_P2_FBERERR1 0xf3ae
++#define F0900_P2_FBERMETER_ERR1 0xf3ae00ff
++
++/*P2_FBERERR0*/
++#define R0900_P2_FBERERR0 0xf3af
++#define F0900_P2_FBERMETER_ERR0 0xf3af00ff
++
++/*P2_FSPYBER*/
++#define R0900_P2_FSPYBER 0xf3b2
++#define F0900_P2_FSPYBER_SYNCBYTE 0xf3b20010
++#define F0900_P2_FSPYBER_UNSYNC 0xf3b20008
++#define F0900_P2_FSPYBER_CTIME 0xf3b20007
++
++/*P1_IQCONST*/
++#define R0900_P1_IQCONST 0xf400
++#define IQCONST REGx(R0900_P1_IQCONST)
++#define F0900_P1_CONSTEL_SELECT 0xf4000060
++#define F0900_P1_IQSYMB_SEL 0xf400001f
++
++/*P1_NOSCFG*/
++#define R0900_P1_NOSCFG 0xf401
++#define NOSCFG REGx(R0900_P1_NOSCFG)
++#define F0900_P1_DUMMYPL_NOSDATA 0xf4010020
++#define F0900_P1_NOSPLH_BETA 0xf4010018
++#define F0900_P1_NOSDATA_BETA 0xf4010007
++
++/*P1_ISYMB*/
++#define R0900_P1_ISYMB 0xf402
++#define ISYMB REGx(R0900_P1_ISYMB)
++#define F0900_P1_I_SYMBOL 0xf40201ff
++
++/*P1_QSYMB*/
++#define R0900_P1_QSYMB 0xf403
++#define QSYMB REGx(R0900_P1_QSYMB)
++#define F0900_P1_Q_SYMBOL 0xf40301ff
++
++/*P1_AGC1CFG*/
++#define R0900_P1_AGC1CFG 0xf404
++#define AGC1CFG REGx(R0900_P1_AGC1CFG)
++#define F0900_P1_DC_FROZEN 0xf4040080
++#define F0900_P1_DC_CORRECT 0xf4040040
++#define F0900_P1_AMM_FROZEN 0xf4040020
++#define F0900_P1_AMM_CORRECT 0xf4040010
++#define F0900_P1_QUAD_FROZEN 0xf4040008
++#define F0900_P1_QUAD_CORRECT 0xf4040004
++
++/*P1_AGC1CN*/
++#define R0900_P1_AGC1CN 0xf406
++#define AGC1CN REGx(R0900_P1_AGC1CN)
++#define F0900_P1_AGC1_LOCKED 0xf4060080
++#define F0900_P1_AGC1_MINPOWER 0xf4060010
++#define F0900_P1_AGCOUT_FAST 0xf4060008
++#define F0900_P1_AGCIQ_BETA 0xf4060007
++
++/*P1_AGC1REF*/
++#define R0900_P1_AGC1REF 0xf407
++#define AGC1REF REGx(R0900_P1_AGC1REF)
++#define F0900_P1_AGCIQ_REF 0xf40700ff
++
++/*P1_IDCCOMP*/
++#define R0900_P1_IDCCOMP 0xf408
++#define IDCCOMP REGx(R0900_P1_IDCCOMP)
++#define F0900_P1_IAVERAGE_ADJ 0xf40801ff
++
++/*P1_QDCCOMP*/
++#define R0900_P1_QDCCOMP 0xf409
++#define QDCCOMP REGx(R0900_P1_QDCCOMP)
++#define F0900_P1_QAVERAGE_ADJ 0xf40901ff
++
++/*P1_POWERI*/
++#define R0900_P1_POWERI 0xf40a
++#define POWERI REGx(R0900_P1_POWERI)
++#define F0900_P1_POWER_I 0xf40a00ff
++#define POWER_I FLDx(F0900_P1_POWER_I)
++
++/*P1_POWERQ*/
++#define R0900_P1_POWERQ 0xf40b
++#define POWERQ REGx(R0900_P1_POWERQ)
++#define F0900_P1_POWER_Q 0xf40b00ff
++#define POWER_Q FLDx(F0900_P1_POWER_Q)
++
++/*P1_AGC1AMM*/
++#define R0900_P1_AGC1AMM 0xf40c
++#define AGC1AMM REGx(R0900_P1_AGC1AMM)
++#define F0900_P1_AMM_VALUE 0xf40c00ff
++
++/*P1_AGC1QUAD*/
++#define R0900_P1_AGC1QUAD 0xf40d
++#define AGC1QUAD REGx(R0900_P1_AGC1QUAD)
++#define F0900_P1_QUAD_VALUE 0xf40d01ff
++
++/*P1_AGCIQIN1*/
++#define R0900_P1_AGCIQIN1 0xf40e
++#define AGCIQIN1 REGx(R0900_P1_AGCIQIN1)
++#define F0900_P1_AGCIQ_VALUE1 0xf40e00ff
++#define AGCIQ_VALUE1 FLDx(F0900_P1_AGCIQ_VALUE1)
++
++/*P1_AGCIQIN0*/
++#define R0900_P1_AGCIQIN0 0xf40f
++#define AGCIQIN0 REGx(R0900_P1_AGCIQIN0)
++#define F0900_P1_AGCIQ_VALUE0 0xf40f00ff
++#define AGCIQ_VALUE0 FLDx(F0900_P1_AGCIQ_VALUE0)
++
++/*P1_DEMOD*/
++#define R0900_P1_DEMOD 0xf410
++#define DEMOD REGx(R0900_P1_DEMOD)
++#define F0900_P1_MANUALS2_ROLLOFF 0xf4100080
++#define MANUALS2_ROLLOFF FLDx(F0900_P1_MANUALS2_ROLLOFF)
++
++#define F0900_P1_SPECINV_CONTROL 0xf4100030
++#define SPECINV_CONTROL FLDx(F0900_P1_SPECINV_CONTROL)
++#define F0900_P1_FORCE_ENASAMP 0xf4100008
++#define F0900_P1_MANUALSX_ROLLOFF 0xf4100004
++#define MANUALSX_ROLLOFF FLDx(F0900_P1_MANUALSX_ROLLOFF)
++#define F0900_P1_ROLLOFF_CONTROL 0xf4100003
++#define ROLLOFF_CONTROL FLDx(F0900_P1_ROLLOFF_CONTROL)
++
++/*P1_DMDMODCOD*/
++#define R0900_P1_DMDMODCOD 0xf411
++#define DMDMODCOD REGx(R0900_P1_DMDMODCOD)
++#define F0900_P1_MANUAL_MODCOD 0xf4110080
++#define F0900_P1_DEMOD_MODCOD 0xf411007c
++#define DEMOD_MODCOD FLDx(F0900_P1_DEMOD_MODCOD)
++#define F0900_P1_DEMOD_TYPE 0xf4110003
++#define DEMOD_TYPE FLDx(F0900_P1_DEMOD_TYPE)
++
++/*P1_DSTATUS*/
++#define R0900_P1_DSTATUS 0xf412
++#define DSTATUS REGx(R0900_P1_DSTATUS)
++#define F0900_P1_CAR_LOCK 0xf4120080
++#define F0900_P1_TMGLOCK_QUALITY 0xf4120060
++#define TMGLOCK_QUALITY FLDx(F0900_P1_TMGLOCK_QUALITY)
++#define F0900_P1_LOCK_DEFINITIF 0xf4120008
++#define LOCK_DEFINITIF FLDx(F0900_P1_LOCK_DEFINITIF)
++#define F0900_P1_OVADC_DETECT 0xf4120001
++
++/*P1_DSTATUS2*/
++#define R0900_P1_DSTATUS2 0xf413
++#define DSTATUS2 REGx(R0900_P1_DSTATUS2)
++#define F0900_P1_DEMOD_DELOCK 0xf4130080
++#define F0900_P1_AGC1_NOSIGNALACK 0xf4130008
++#define F0900_P1_AGC2_OVERFLOW 0xf4130004
++#define F0900_P1_CFR_OVERFLOW 0xf4130002
++#define F0900_P1_GAMMA_OVERUNDER 0xf4130001
++
++/*P1_DMDCFGMD*/
++#define R0900_P1_DMDCFGMD 0xf414
++#define DMDCFGMD REGx(R0900_P1_DMDCFGMD)
++#define F0900_P1_DVBS2_ENABLE 0xf4140080
++#define DVBS2_ENABLE FLDx(F0900_P1_DVBS2_ENABLE)
++#define F0900_P1_DVBS1_ENABLE 0xf4140040
++#define DVBS1_ENABLE FLDx(F0900_P1_DVBS1_ENABLE)
++#define F0900_P1_SCAN_ENABLE 0xf4140010
++#define SCAN_ENABLE FLDx(F0900_P1_SCAN_ENABLE)
++#define F0900_P1_CFR_AUTOSCAN 0xf4140008
++#define CFR_AUTOSCAN FLDx(F0900_P1_CFR_AUTOSCAN)
++#define F0900_P1_TUN_RNG 0xf4140003
++
++/*P1_DMDCFG2*/
++#define R0900_P1_DMDCFG2 0xf415
++#define DMDCFG2 REGx(R0900_P1_DMDCFG2)
++#define F0900_P1_S1S2_SEQUENTIAL 0xf4150040
++#define S1S2_SEQUENTIAL FLDx(F0900_P1_S1S2_SEQUENTIAL)
++#define F0900_P1_INFINITE_RELOCK 0xf4150010
++
++/*P1_DMDISTATE*/
++#define R0900_P1_DMDISTATE 0xf416
++#define DMDISTATE REGx(R0900_P1_DMDISTATE)
++#define F0900_P1_I2C_DEMOD_MODE 0xf416001f
++#define DEMOD_MODE FLDx(F0900_P1_I2C_DEMOD_MODE)
++
++/*P1_DMDT0M*/
++#define R0900_P1_DMDT0M 0xf417
++#define DMDT0M REGx(R0900_P1_DMDT0M)
++#define F0900_P1_DMDT0_MIN 0xf41700ff
++
++/*P1_DMDSTATE*/
++#define R0900_P1_DMDSTATE 0xf41b
++#define DMDSTATE REGx(R0900_P1_DMDSTATE)
++#define F0900_P1_HEADER_MODE 0xf41b0060
++#define HEADER_MODE FLDx(F0900_P1_HEADER_MODE)
++
++/*P1_DMDFLYW*/
++#define R0900_P1_DMDFLYW 0xf41c
++#define DMDFLYW REGx(R0900_P1_DMDFLYW)
++#define F0900_P1_I2C_IRQVAL 0xf41c00f0
++#define F0900_P1_FLYWHEEL_CPT 0xf41c000f
++#define FLYWHEEL_CPT FLDx(F0900_P1_FLYWHEEL_CPT)
++
++/*P1_DSTATUS3*/
++#define R0900_P1_DSTATUS3 0xf41d
++#define DSTATUS3 REGx(R0900_P1_DSTATUS3)
++#define F0900_P1_DEMOD_CFGMODE 0xf41d0060
++
++/*P1_DMDCFG3*/
++#define R0900_P1_DMDCFG3 0xf41e
++#define DMDCFG3 REGx(R0900_P1_DMDCFG3)
++#define F0900_P1_NOSTOP_FIFOFULL 0xf41e0008
++
++/*P1_DMDCFG4*/
++#define R0900_P1_DMDCFG4 0xf41f
++#define DMDCFG4 REGx(R0900_P1_DMDCFG4)
++#define F0900_P1_TUNER_NRELAUNCH 0xf41f0008
++
++/*P1_CORRELMANT*/
++#define R0900_P1_CORRELMANT 0xf420
++#define CORRELMANT REGx(R0900_P1_CORRELMANT)
++#define F0900_P1_CORREL_MANT 0xf42000ff
++
++/*P1_CORRELABS*/
++#define R0900_P1_CORRELABS 0xf421
++#define CORRELABS REGx(R0900_P1_CORRELABS)
++#define F0900_P1_CORREL_ABS 0xf42100ff
++
++/*P1_CORRELEXP*/
++#define R0900_P1_CORRELEXP 0xf422
++#define CORRELEXP REGx(R0900_P1_CORRELEXP)
++#define F0900_P1_CORREL_ABSEXP 0xf42200f0
++#define F0900_P1_CORREL_EXP 0xf422000f
++
++/*P1_PLHMODCOD*/
++#define R0900_P1_PLHMODCOD 0xf424
++#define PLHMODCOD REGx(R0900_P1_PLHMODCOD)
++#define F0900_P1_SPECINV_DEMOD 0xf4240080
++#define SPECINV_DEMOD FLDx(F0900_P1_SPECINV_DEMOD)
++#define F0900_P1_PLH_MODCOD 0xf424007c
++#define F0900_P1_PLH_TYPE 0xf4240003
++
++/*P1_DMDREG*/
++#define R0900_P1_DMDREG 0xf425
++#define DMDREG REGx(R0900_P1_DMDREG)
++#define F0900_P1_DECIM_PLFRAMES 0xf4250001
++
++/*P1_AGC2O*/
++#define R0900_P1_AGC2O 0xf42c
++#define AGC2O REGx(R0900_P1_AGC2O)
++#define F0900_P1_AGC2_COEF 0xf42c0007
++
++/*P1_AGC2REF*/
++#define R0900_P1_AGC2REF 0xf42d
++#define AGC2REF REGx(R0900_P1_AGC2REF)
++#define F0900_P1_AGC2_REF 0xf42d00ff
++
++/*P1_AGC1ADJ*/
++#define R0900_P1_AGC1ADJ 0xf42e
++#define AGC1ADJ REGx(R0900_P1_AGC1ADJ)
++#define F0900_P1_AGC1_ADJUSTED 0xf42e007f
++
++/*P1_AGC2I1*/
++#define R0900_P1_AGC2I1 0xf436
++#define AGC2I1 REGx(R0900_P1_AGC2I1)
++#define F0900_P1_AGC2_INTEGRATOR1 0xf43600ff
++
++/*P1_AGC2I0*/
++#define R0900_P1_AGC2I0 0xf437
++#define AGC2I0 REGx(R0900_P1_AGC2I0)
++#define F0900_P1_AGC2_INTEGRATOR0 0xf43700ff
++
++/*P1_CARCFG*/
++#define R0900_P1_CARCFG 0xf438
++#define CARCFG REGx(R0900_P1_CARCFG)
++#define F0900_P1_CFRUPLOW_AUTO 0xf4380080
++#define F0900_P1_CFRUPLOW_TEST 0xf4380040
++#define F0900_P1_ROTAON 0xf4380004
++#define F0900_P1_PH_DET_ALGO 0xf4380003
++
++/*P1_ACLC*/
++#define R0900_P1_ACLC 0xf439
++#define ACLC REGx(R0900_P1_ACLC)
++#define F0900_P1_CAR_ALPHA_MANT 0xf4390030
++#define F0900_P1_CAR_ALPHA_EXP 0xf439000f
++
++/*P1_BCLC*/
++#define R0900_P1_BCLC 0xf43a
++#define BCLC REGx(R0900_P1_BCLC)
++#define F0900_P1_CAR_BETA_MANT 0xf43a0030
++#define F0900_P1_CAR_BETA_EXP 0xf43a000f
++
++/*P1_CARFREQ*/
++#define R0900_P1_CARFREQ 0xf43d
++#define CARFREQ REGx(R0900_P1_CARFREQ)
++#define F0900_P1_KC_COARSE_EXP 0xf43d00f0
++#define F0900_P1_BETA_FREQ 0xf43d000f
++
++/*P1_CARHDR*/
++#define R0900_P1_CARHDR 0xf43e
++#define CARHDR REGx(R0900_P1_CARHDR)
++#define F0900_P1_K_FREQ_HDR 0xf43e00ff
++
++/*P1_LDT*/
++#define R0900_P1_LDT 0xf43f
++#define LDT REGx(R0900_P1_LDT)
++#define F0900_P1_CARLOCK_THRES 0xf43f01ff
++
++/*P1_LDT2*/
++#define R0900_P1_LDT2 0xf440
++#define LDT2 REGx(R0900_P1_LDT2)
++#define F0900_P1_CARLOCK_THRES2 0xf44001ff
++
++/*P1_CFRICFG*/
++#define R0900_P1_CFRICFG 0xf441
++#define CFRICFG REGx(R0900_P1_CFRICFG)
++#define F0900_P1_NEG_CFRSTEP 0xf4410001
++
++/*P1_CFRUP1*/
++#define R0900_P1_CFRUP1 0xf442
++#define CFRUP1 REGx(R0900_P1_CFRUP1)
++#define F0900_P1_CFR_UP1 0xf44201ff
++#define CFR_UP1 FLDx(F0900_P1_CFR_UP1)
++
++/*P1_CFRUP0*/
++#define R0900_P1_CFRUP0 0xf443
++#define CFRUP0 REGx(R0900_P1_CFRUP0)
++#define F0900_P1_CFR_UP0 0xf44300ff
++#define CFR_UP0 FLDx(F0900_P1_CFR_UP0)
++
++/*P1_CFRLOW1*/
++#define R0900_P1_CFRLOW1 0xf446
++#define CFRLOW1 REGx(R0900_P1_CFRLOW1)
++#define F0900_P1_CFR_LOW1 0xf44601ff
++#define CFR_LOW1 FLDx(F0900_P1_CFR_LOW1)
++
++/*P1_CFRLOW0*/
++#define R0900_P1_CFRLOW0 0xf447
++#define CFRLOW0 REGx(R0900_P1_CFRLOW0)
++#define F0900_P1_CFR_LOW0 0xf44700ff
++#define CFR_LOW0 FLDx(F0900_P1_CFR_LOW0)
++
++/*P1_CFRINIT1*/
++#define R0900_P1_CFRINIT1 0xf448
++#define CFRINIT1 REGx(R0900_P1_CFRINIT1)
++#define F0900_P1_CFR_INIT1 0xf44801ff
++#define CFR_INIT1 FLDx(F0900_P1_CFR_INIT1)
++
++/*P1_CFRINIT0*/
++#define R0900_P1_CFRINIT0 0xf449
++#define CFRINIT0 REGx(R0900_P1_CFRINIT0)
++#define F0900_P1_CFR_INIT0 0xf44900ff
++#define CFR_INIT0 FLDx(F0900_P1_CFR_INIT0)
++
++/*P1_CFRINC1*/
++#define R0900_P1_CFRINC1 0xf44a
++#define CFRINC1 REGx(R0900_P1_CFRINC1)
++#define F0900_P1_MANUAL_CFRINC 0xf44a0080
++#define F0900_P1_CFR_INC1 0xf44a003f
++
++/*P1_CFRINC0*/
++#define R0900_P1_CFRINC0 0xf44b
++#define CFRINC0 REGx(R0900_P1_CFRINC0)
++#define F0900_P1_CFR_INC0 0xf44b00f8
++
++/*P1_CFR2*/
++#define R0900_P1_CFR2 0xf44c
++#define CFR2 REGx(R0900_P1_CFR2)
++#define F0900_P1_CAR_FREQ2 0xf44c01ff
++#define CAR_FREQ2 FLDx(F0900_P1_CAR_FREQ2)
++
++/*P1_CFR1*/
++#define R0900_P1_CFR1 0xf44d
++#define CFR1 REGx(R0900_P1_CFR1)
++#define F0900_P1_CAR_FREQ1 0xf44d00ff
++#define CAR_FREQ1 FLDx(F0900_P1_CAR_FREQ1)
++
++/*P1_CFR0*/
++#define R0900_P1_CFR0 0xf44e
++#define CFR0 REGx(R0900_P1_CFR0)
++#define F0900_P1_CAR_FREQ0 0xf44e00ff
++#define CAR_FREQ0 FLDx(F0900_P1_CAR_FREQ0)
++
++/*P1_LDI*/
++#define R0900_P1_LDI 0xf44f
++#define LDI REGx(R0900_P1_LDI)
++#define F0900_P1_LOCK_DET_INTEGR 0xf44f01ff
++
++/*P1_TMGCFG*/
++#define R0900_P1_TMGCFG 0xf450
++#define TMGCFG REGx(R0900_P1_TMGCFG)
++#define F0900_P1_TMGLOCK_BETA 0xf45000c0
++#define F0900_P1_DO_TIMING_CORR 0xf4500010
++#define F0900_P1_TMG_MINFREQ 0xf4500003
++
++/*P1_RTC*/
++#define R0900_P1_RTC 0xf451
++#define RTC REGx(R0900_P1_RTC)
++#define F0900_P1_TMGALPHA_EXP 0xf45100f0
++#define F0900_P1_TMGBETA_EXP 0xf451000f
++
++/*P1_RTCS2*/
++#define R0900_P1_RTCS2 0xf452
++#define RTCS2 REGx(R0900_P1_RTCS2)
++#define F0900_P1_TMGALPHAS2_EXP 0xf45200f0
++#define F0900_P1_TMGBETAS2_EXP 0xf452000f
++
++/*P1_TMGTHRISE*/
++#define R0900_P1_TMGTHRISE 0xf453
++#define TMGTHRISE REGx(R0900_P1_TMGTHRISE)
++#define F0900_P1_TMGLOCK_THRISE 0xf45300ff
++
++/*P1_TMGTHFALL*/
++#define R0900_P1_TMGTHFALL 0xf454
++#define TMGTHFALL REGx(R0900_P1_TMGTHFALL)
++#define F0900_P1_TMGLOCK_THFALL 0xf45400ff
++
++/*P1_SFRUPRATIO*/
++#define R0900_P1_SFRUPRATIO 0xf455
++#define SFRUPRATIO REGx(R0900_P1_SFRUPRATIO)
++#define F0900_P1_SFR_UPRATIO 0xf45500ff
++
++/*P1_SFRLOWRATIO*/
++#define R0900_P1_SFRLOWRATIO 0xf456
++#define F0900_P1_SFR_LOWRATIO 0xf45600ff
++
++/*P1_KREFTMG*/
++#define R0900_P1_KREFTMG 0xf458
++#define KREFTMG REGx(R0900_P1_KREFTMG)
++#define F0900_P1_KREF_TMG 0xf45800ff
++
++/*P1_SFRSTEP*/
++#define R0900_P1_SFRSTEP 0xf459
++#define SFRSTEP REGx(R0900_P1_SFRSTEP)
++#define F0900_P1_SFR_SCANSTEP 0xf45900f0
++#define F0900_P1_SFR_CENTERSTEP 0xf459000f
++
++/*P1_TMGCFG2*/
++#define R0900_P1_TMGCFG2 0xf45a
++#define TMGCFG2 REGx(R0900_P1_TMGCFG2)
++#define F0900_P1_SFRRATIO_FINE 0xf45a0001
++
++/*P1_KREFTMG2*/
++#define R0900_P1_KREFTMG2 0xf45b
++#define KREFTMG2 REGx(R0900_P1_KREFTMG2)
++#define F0900_P1_KREF_TMG2 0xf45b00ff
++
++/*P1_SFRINIT1*/
++#define R0900_P1_SFRINIT1 0xf45e
++#define SFRINIT1 REGx(R0900_P1_SFRINIT1)
++#define F0900_P1_SFR_INIT1 0xf45e007f
++
++/*P1_SFRINIT0*/
++#define R0900_P1_SFRINIT0 0xf45f
++#define SFRINIT0 REGx(R0900_P1_SFRINIT0)
++#define F0900_P1_SFR_INIT0 0xf45f00ff
++
++/*P1_SFRUP1*/
++#define R0900_P1_SFRUP1 0xf460
++#define SFRUP1 REGx(R0900_P1_SFRUP1)
++#define F0900_P1_AUTO_GUP 0xf4600080
++#define AUTO_GUP FLDx(F0900_P1_AUTO_GUP)
++#define F0900_P1_SYMB_FREQ_UP1 0xf460007f
++
++/*P1_SFRUP0*/
++#define R0900_P1_SFRUP0 0xf461
++#define SFRUP0 REGx(R0900_P1_SFRUP0)
++#define F0900_P1_SYMB_FREQ_UP0 0xf46100ff
++
++/*P1_SFRLOW1*/
++#define R0900_P1_SFRLOW1 0xf462
++#define SFRLOW1 REGx(R0900_P1_SFRLOW1)
++#define F0900_P1_AUTO_GLOW 0xf4620080
++#define AUTO_GLOW FLDx(F0900_P1_AUTO_GLOW)
++#define F0900_P1_SYMB_FREQ_LOW1 0xf462007f
++
++/*P1_SFRLOW0*/
++#define R0900_P1_SFRLOW0 0xf463
++#define SFRLOW0 REGx(R0900_P1_SFRLOW0)
++#define F0900_P1_SYMB_FREQ_LOW0 0xf46300ff
++
++/*P1_SFR3*/
++#define R0900_P1_SFR3 0xf464
++#define SFR3 REGx(R0900_P1_SFR3)
++#define F0900_P1_SYMB_FREQ3 0xf46400ff
++#define SYMB_FREQ3 FLDx(F0900_P1_SYMB_FREQ3)
++
++/*P1_SFR2*/
++#define R0900_P1_SFR2 0xf465
++#define SFR2 REGx(R0900_P1_SFR2)
++#define F0900_P1_SYMB_FREQ2 0xf46500ff
++#define SYMB_FREQ2 FLDx(F0900_P1_SYMB_FREQ2)
++
++/*P1_SFR1*/
++#define R0900_P1_SFR1 0xf466
++#define SFR1 REGx(R0900_P1_SFR1)
++#define F0900_P1_SYMB_FREQ1 0xf46600ff
++#define SYMB_FREQ1 FLDx(F0900_P1_SYMB_FREQ1)
++
++/*P1_SFR0*/
++#define R0900_P1_SFR0 0xf467
++#define SFR0 REGx(R0900_P1_SFR0)
++#define F0900_P1_SYMB_FREQ0 0xf46700ff
++#define SYMB_FREQ0 FLDx(F0900_P1_SYMB_FREQ0)
++
++/*P1_TMGREG2*/
++#define R0900_P1_TMGREG2 0xf468
++#define TMGREG2 REGx(R0900_P1_TMGREG2)
++#define F0900_P1_TMGREG2 0xf46800ff
++
++/*P1_TMGREG1*/
++#define R0900_P1_TMGREG1 0xf469
++#define TMGREG1 REGx(R0900_P1_TMGREG1)
++#define F0900_P1_TMGREG1 0xf46900ff
++
++/*P1_TMGREG0*/
++#define R0900_P1_TMGREG0 0xf46a
++#define TMGREG0 REGx(R0900_P1_TMGREG0)
++#define F0900_P1_TMGREG0 0xf46a00ff
++
++/*P1_TMGLOCK1*/
++#define R0900_P1_TMGLOCK1 0xf46b
++#define TMGLOCK1 REGx(R0900_P1_TMGLOCK1)
++#define F0900_P1_TMGLOCK_LEVEL1 0xf46b01ff
++
++/*P1_TMGLOCK0*/
++#define R0900_P1_TMGLOCK0 0xf46c
++#define TMGLOCK0 REGx(R0900_P1_TMGLOCK0)
++#define F0900_P1_TMGLOCK_LEVEL0 0xf46c00ff
++
++/*P1_TMGOBS*/
++#define R0900_P1_TMGOBS 0xf46d
++#define TMGOBS REGx(R0900_P1_TMGOBS)
++#define F0900_P1_ROLLOFF_STATUS 0xf46d00c0
++#define ROLLOFF_STATUS FLDx(F0900_P1_ROLLOFF_STATUS)
++
++/*P1_EQUALCFG*/
++#define R0900_P1_EQUALCFG 0xf46f
++#define EQUALCFG REGx(R0900_P1_EQUALCFG)
++#define F0900_P1_EQUAL_ON 0xf46f0040
++#define F0900_P1_MU_EQUALDFE 0xf46f0007
++
++/*P1_EQUAI1*/
++#define R0900_P1_EQUAI1 0xf470
++#define EQUAI1 REGx(R0900_P1_EQUAI1)
++#define F0900_P1_EQUA_ACCI1 0xf47001ff
++
++/*P1_EQUAQ1*/
++#define R0900_P1_EQUAQ1 0xf471
++#define EQUAQ1 REGx(R0900_P1_EQUAQ1)
++#define F0900_P1_EQUA_ACCQ1 0xf47101ff
++
++/*P1_EQUAI2*/
++#define R0900_P1_EQUAI2 0xf472
++#define EQUAI2 REGx(R0900_P1_EQUAI2)
++#define F0900_P1_EQUA_ACCI2 0xf47201ff
++
++/*P1_EQUAQ2*/
++#define R0900_P1_EQUAQ2 0xf473
++#define EQUAQ2 REGx(R0900_P1_EQUAQ2)
++#define F0900_P1_EQUA_ACCQ2 0xf47301ff
++
++/*P1_EQUAI3*/
++#define R0900_P1_EQUAI3 0xf474
++#define EQUAI3 REGx(R0900_P1_EQUAI3)
++#define F0900_P1_EQUA_ACCI3 0xf47401ff
++
++/*P1_EQUAQ3*/
++#define R0900_P1_EQUAQ3 0xf475
++#define EQUAQ3 REGx(R0900_P1_EQUAQ3)
++#define F0900_P1_EQUA_ACCQ3 0xf47501ff
++
++/*P1_EQUAI4*/
++#define R0900_P1_EQUAI4 0xf476
++#define EQUAI4 REGx(R0900_P1_EQUAI4)
++#define F0900_P1_EQUA_ACCI4 0xf47601ff
++
++/*P1_EQUAQ4*/
++#define R0900_P1_EQUAQ4 0xf477
++#define EQUAQ4 REGx(R0900_P1_EQUAQ4)
++#define F0900_P1_EQUA_ACCQ4 0xf47701ff
++
++/*P1_EQUAI5*/
++#define R0900_P1_EQUAI5 0xf478
++#define EQUAI5 REGx(R0900_P1_EQUAI5)
++#define F0900_P1_EQUA_ACCI5 0xf47801ff
++
++/*P1_EQUAQ5*/
++#define R0900_P1_EQUAQ5 0xf479
++#define EQUAQ5 REGx(R0900_P1_EQUAQ5)
++#define F0900_P1_EQUA_ACCQ5 0xf47901ff
++
++/*P1_EQUAI6*/
++#define R0900_P1_EQUAI6 0xf47a
++#define EQUAI6 REGx(R0900_P1_EQUAI6)
++#define F0900_P1_EQUA_ACCI6 0xf47a01ff
++
++/*P1_EQUAQ6*/
++#define R0900_P1_EQUAQ6 0xf47b
++#define EQUAQ6 REGx(R0900_P1_EQUAQ6)
++#define F0900_P1_EQUA_ACCQ6 0xf47b01ff
++
++/*P1_EQUAI7*/
++#define R0900_P1_EQUAI7 0xf47c
++#define EQUAI7 REGx(R0900_P1_EQUAI7)
++#define F0900_P1_EQUA_ACCI7 0xf47c01ff
++
++/*P1_EQUAQ7*/
++#define R0900_P1_EQUAQ7 0xf47d
++#define EQUAQ7 REGx(R0900_P1_EQUAQ7)
++#define F0900_P1_EQUA_ACCQ7 0xf47d01ff
++
++/*P1_EQUAI8*/
++#define R0900_P1_EQUAI8 0xf47e
++#define EQUAI8 REGx(R0900_P1_EQUAI8)
++#define F0900_P1_EQUA_ACCI8 0xf47e01ff
++
++/*P1_EQUAQ8*/
++#define R0900_P1_EQUAQ8 0xf47f
++#define EQUAQ8 REGx(R0900_P1_EQUAQ8)
++#define F0900_P1_EQUA_ACCQ8 0xf47f01ff
++
++/*P1_NNOSDATAT1*/
++#define R0900_P1_NNOSDATAT1 0xf480
++#define NNOSDATAT1 REGx(R0900_P1_NNOSDATAT1)
++#define F0900_P1_NOSDATAT_NORMED1 0xf48000ff
++#define NOSDATAT_NORMED1 FLDx(F0900_P1_NOSDATAT_NORMED1)
++
++/*P1_NNOSDATAT0*/
++#define R0900_P1_NNOSDATAT0 0xf481
++#define NNOSDATAT0 REGx(R0900_P1_NNOSDATAT0)
++#define F0900_P1_NOSDATAT_NORMED0 0xf48100ff
++#define NOSDATAT_NORMED0 FLDx(F0900_P1_NOSDATAT_NORMED0)
++
++/*P1_NNOSDATA1*/
++#define R0900_P1_NNOSDATA1 0xf482
++#define NNOSDATA1 REGx(R0900_P1_NNOSDATA1)
++#define F0900_P1_NOSDATA_NORMED1 0xf48200ff
++
++/*P1_NNOSDATA0*/
++#define R0900_P1_NNOSDATA0 0xf483
++#define NNOSDATA0 REGx(R0900_P1_NNOSDATA0)
++#define F0900_P1_NOSDATA_NORMED0 0xf48300ff
++
++/*P1_NNOSPLHT1*/
++#define R0900_P1_NNOSPLHT1 0xf484
++#define NNOSPLHT1 REGx(R0900_P1_NNOSPLHT1)
++#define F0900_P1_NOSPLHT_NORMED1 0xf48400ff
++#define NOSPLHT_NORMED1 FLDx(F0900_P1_NOSPLHT_NORMED1)
++
++/*P1_NNOSPLHT0*/
++#define R0900_P1_NNOSPLHT0 0xf485
++#define NNOSPLHT0 REGx(R0900_P1_NNOSPLHT0)
++#define F0900_P1_NOSPLHT_NORMED0 0xf48500ff
++#define NOSPLHT_NORMED0 FLDx(F0900_P1_NOSPLHT_NORMED0)
++
++/*P1_NNOSPLH1*/
++#define R0900_P1_NNOSPLH1 0xf486
++#define NNOSPLH1 REGx(R0900_P1_NNOSPLH1)
++#define F0900_P1_NOSPLH_NORMED1 0xf48600ff
++
++/*P1_NNOSPLH0*/
++#define R0900_P1_NNOSPLH0 0xf487
++#define NNOSPLH0 REGx(R0900_P1_NNOSPLH0)
++#define F0900_P1_NOSPLH_NORMED0 0xf48700ff
++
++/*P1_NOSDATAT1*/
++#define R0900_P1_NOSDATAT1 0xf488
++#define NOSDATAT1 REGx(R0900_P1_NOSDATAT1)
++#define F0900_P1_NOSDATAT_UNNORMED1 0xf48800ff
++
++/*P1_NOSDATAT0*/
++#define R0900_P1_NOSDATAT0 0xf489
++#define NOSDATAT0 REGx(R0900_P1_NOSDATAT0)
++#define F0900_P1_NOSDATAT_UNNORMED0 0xf48900ff
++
++/*P1_NOSDATA1*/
++#define R0900_P1_NOSDATA1 0xf48a
++#define NOSDATA1 REGx(R0900_P1_NOSDATA1)
++#define F0900_P1_NOSDATA_UNNORMED1 0xf48a00ff
++
++/*P1_NOSDATA0*/
++#define R0900_P1_NOSDATA0 0xf48b
++#define NOSDATA0 REGx(R0900_P1_NOSDATA0)
++#define F0900_P1_NOSDATA_UNNORMED0 0xf48b00ff
++
++/*P1_NOSPLHT1*/
++#define R0900_P1_NOSPLHT1 0xf48c
++#define NOSPLHT1 REGx(R0900_P1_NOSPLHT1)
++#define F0900_P1_NOSPLHT_UNNORMED1 0xf48c00ff
++
++/*P1_NOSPLHT0*/
++#define R0900_P1_NOSPLHT0 0xf48d
++#define NOSPLHT0 REGx(R0900_P1_NOSPLHT0)
++#define F0900_P1_NOSPLHT_UNNORMED0 0xf48d00ff
++
++/*P1_NOSPLH1*/
++#define R0900_P1_NOSPLH1 0xf48e
++#define NOSPLH1 REGx(R0900_P1_NOSPLH1)
++#define F0900_P1_NOSPLH_UNNORMED1 0xf48e00ff
++
++/*P1_NOSPLH0*/
++#define R0900_P1_NOSPLH0 0xf48f
++#define NOSPLH0 REGx(R0900_P1_NOSPLH0)
++#define F0900_P1_NOSPLH_UNNORMED0 0xf48f00ff
++
++/*P1_CAR2CFG*/
++#define R0900_P1_CAR2CFG 0xf490
++#define CAR2CFG REGx(R0900_P1_CAR2CFG)
++#define F0900_P1_CARRIER3_DISABLE 0xf4900040
++#define F0900_P1_ROTA2ON 0xf4900004
++#define F0900_P1_PH_DET_ALGO2 0xf4900003
++
++/*P1_CFR2CFR1*/
++#define R0900_P1_CFR2CFR1 0xf491
++#define CFR2CFR1 REGx(R0900_P1_CFR2CFR1)
++#define F0900_P1_CFR2TOCFR1_DVBS1 0xf49100c0
++#define F0900_P1_EN_S2CAR2CENTER 0xf4910020
++#define F0900_P1_DIS_BCHERRCFR2 0xf4910010
++#define F0900_P1_CFR2TOCFR1_BETA 0xf4910007
++
++/*P1_CFR22*/
++#define R0900_P1_CFR22 0xf493
++#define CFR22 REGx(R0900_P1_CFR22)
++#define F0900_P1_CAR2_FREQ2 0xf49301ff
++
++/*P1_CFR21*/
++#define R0900_P1_CFR21 0xf494
++#define CFR21 REGx(R0900_P1_CFR21)
++#define F0900_P1_CAR2_FREQ1 0xf49400ff
++
++/*P1_CFR20*/
++#define R0900_P1_CFR20 0xf495
++#define CFR20 REGx(R0900_P1_CFR20)
++#define F0900_P1_CAR2_FREQ0 0xf49500ff
++
++/*P1_ACLC2S2Q*/
++#define R0900_P1_ACLC2S2Q 0xf497
++#define ACLC2S2Q REGx(R0900_P1_ACLC2S2Q)
++#define F0900_P1_ENAB_SPSKSYMB 0xf4970080
++#define F0900_P1_CAR2S2_Q_ALPH_M 0xf4970030
++#define F0900_P1_CAR2S2_Q_ALPH_E 0xf497000f
++
++/*P1_ACLC2S28*/
++#define R0900_P1_ACLC2S28 0xf498
++#define ACLC2S28 REGx(R0900_P1_ACLC2S28)
++#define F0900_P1_OLDI3Q_MODE 0xf4980080
++#define F0900_P1_CAR2S2_8_ALPH_M 0xf4980030
++#define F0900_P1_CAR2S2_8_ALPH_E 0xf498000f
++
++/*P1_ACLC2S216A*/
++#define R0900_P1_ACLC2S216A 0xf499
++#define ACLC2S216A REGx(R0900_P1_ACLC2S216A)
++#define F0900_P1_DIS_C3STOPA2 0xf4990080
++#define F0900_P1_CAR2S2_16ADERAT 0xf4990040
++#define F0900_P1_CAR2S2_16A_ALPH_M 0xf4990030
++#define F0900_P1_CAR2S2_16A_ALPH_E 0xf499000f
++
++/*P1_ACLC2S232A*/
++#define R0900_P1_ACLC2S232A 0xf49a
++#define ACLC2S232A REGx(R0900_P1_ACLC2S232A)
++#define F0900_P1_CAR2S2_32ADERAT 0xf49a0040
++#define F0900_P1_CAR2S2_32A_ALPH_M 0xf49a0030
++#define F0900_P1_CAR2S2_32A_ALPH_E 0xf49a000f
++
++/*P1_BCLC2S2Q*/
++#define R0900_P1_BCLC2S2Q 0xf49c
++#define BCLC2S2Q REGx(R0900_P1_BCLC2S2Q)
++#define F0900_P1_CAR2S2_Q_BETA_M 0xf49c0030
++#define F0900_P1_CAR2S2_Q_BETA_E 0xf49c000f
++
++/*P1_BCLC2S28*/
++#define R0900_P1_BCLC2S28 0xf49d
++#define BCLC2S28 REGx(R0900_P1_BCLC2S28)
++#define F0900_P1_CAR2S2_8_BETA_M 0xf49d0030
++#define F0900_P1_CAR2S2_8_BETA_E 0xf49d000f
++
++/*P1_BCLC2S216A*/
++#define R0900_P1_BCLC2S216A 0xf49e
++#define BCLC2S216A REGx(R0900_P1_BCLC2S216A)
++
++/*P1_BCLC2S232A*/
++#define R0900_P1_BCLC2S232A 0xf49f
++#define BCLC2S232A REGx(R0900_P1_BCLC2S232A)
++
++/*P1_PLROOT2*/
++#define R0900_P1_PLROOT2 0xf4ac
++#define PLROOT2 REGx(R0900_P1_PLROOT2)
++#define F0900_P1_PLSCRAMB_MODE 0xf4ac000c
++#define F0900_P1_PLSCRAMB_ROOT2 0xf4ac0003
++
++/*P1_PLROOT1*/
++#define R0900_P1_PLROOT1 0xf4ad
++#define PLROOT1 REGx(R0900_P1_PLROOT1)
++#define F0900_P1_PLSCRAMB_ROOT1 0xf4ad00ff
++
++/*P1_PLROOT0*/
++#define R0900_P1_PLROOT0 0xf4ae
++#define PLROOT0 REGx(R0900_P1_PLROOT0)
++#define F0900_P1_PLSCRAMB_ROOT0 0xf4ae00ff
++
++/*P1_MODCODLST0*/
++#define R0900_P1_MODCODLST0 0xf4b0
++#define MODCODLST0 REGx(R0900_P1_MODCODLST0)
++
++/*P1_MODCODLST1*/
++#define R0900_P1_MODCODLST1 0xf4b1
++#define MODCODLST1 REGx(R0900_P1_MODCODLST1)
++#define F0900_P1_DIS_MODCOD29 0xf4b100f0
++#define F0900_P1_DIS_32PSK_9_10 0xf4b1000f
++
++/*P1_MODCODLST2*/
++#define R0900_P1_MODCODLST2 0xf4b2
++#define MODCODLST2 REGx(R0900_P1_MODCODLST2)
++#define F0900_P1_DIS_32PSK_8_9 0xf4b200f0
++#define F0900_P1_DIS_32PSK_5_6 0xf4b2000f
++
++/*P1_MODCODLST3*/
++#define R0900_P1_MODCODLST3 0xf4b3
++#define MODCODLST3 REGx(R0900_P1_MODCODLST3)
++#define F0900_P1_DIS_32PSK_4_5 0xf4b300f0
++#define F0900_P1_DIS_32PSK_3_4 0xf4b3000f
++
++/*P1_MODCODLST4*/
++#define R0900_P1_MODCODLST4 0xf4b4
++#define MODCODLST4 REGx(R0900_P1_MODCODLST4)
++#define F0900_P1_DIS_16PSK_9_10 0xf4b400f0
++#define F0900_P1_DIS_16PSK_8_9 0xf4b4000f
++
++/*P1_MODCODLST5*/
++#define R0900_P1_MODCODLST5 0xf4b5
++#define MODCODLST5 REGx(R0900_P1_MODCODLST5)
++#define F0900_P1_DIS_16PSK_5_6 0xf4b500f0
++#define F0900_P1_DIS_16PSK_4_5 0xf4b5000f
++
++/*P1_MODCODLST6*/
++#define R0900_P1_MODCODLST6 0xf4b6
++#define MODCODLST6 REGx(R0900_P1_MODCODLST6)
++#define F0900_P1_DIS_16PSK_3_4 0xf4b600f0
++#define F0900_P1_DIS_16PSK_2_3 0xf4b6000f
++
++/*P1_MODCODLST7*/
++#define R0900_P1_MODCODLST7 0xf4b7
++#define MODCODLST7 REGx(R0900_P1_MODCODLST7)
++#define F0900_P1_DIS_8P_9_10 0xf4b700f0
++#define F0900_P1_DIS_8P_8_9 0xf4b7000f
++
++/*P1_MODCODLST8*/
++#define R0900_P1_MODCODLST8 0xf4b8
++#define MODCODLST8 REGx(R0900_P1_MODCODLST8)
++#define F0900_P1_DIS_8P_5_6 0xf4b800f0
++#define F0900_P1_DIS_8P_3_4 0xf4b8000f
++
++/*P1_MODCODLST9*/
++#define R0900_P1_MODCODLST9 0xf4b9
++#define MODCODLST9 REGx(R0900_P1_MODCODLST9)
++#define F0900_P1_DIS_8P_2_3 0xf4b900f0
++#define F0900_P1_DIS_8P_3_5 0xf4b9000f
++
++/*P1_MODCODLSTA*/
++#define R0900_P1_MODCODLSTA 0xf4ba
++#define MODCODLSTA REGx(R0900_P1_MODCODLSTA)
++#define F0900_P1_DIS_QP_9_10 0xf4ba00f0
++#define F0900_P1_DIS_QP_8_9 0xf4ba000f
++
++/*P1_MODCODLSTB*/
++#define R0900_P1_MODCODLSTB 0xf4bb
++#define MODCODLSTB REGx(R0900_P1_MODCODLSTB)
++#define F0900_P1_DIS_QP_5_6 0xf4bb00f0
++#define F0900_P1_DIS_QP_4_5 0xf4bb000f
++
++/*P1_MODCODLSTC*/
++#define R0900_P1_MODCODLSTC 0xf4bc
++#define MODCODLSTC REGx(R0900_P1_MODCODLSTC)
++#define F0900_P1_DIS_QP_3_4 0xf4bc00f0
++#define F0900_P1_DIS_QP_2_3 0xf4bc000f
++
++/*P1_MODCODLSTD*/
++#define R0900_P1_MODCODLSTD 0xf4bd
++#define MODCODLSTD REGx(R0900_P1_MODCODLSTD)
++#define F0900_P1_DIS_QP_3_5 0xf4bd00f0
++#define F0900_P1_DIS_QP_1_2 0xf4bd000f
++
++/*P1_MODCODLSTE*/
++#define R0900_P1_MODCODLSTE 0xf4be
++#define MODCODLSTE REGx(R0900_P1_MODCODLSTE)
++#define F0900_P1_DIS_QP_2_5 0xf4be00f0
++#define F0900_P1_DIS_QP_1_3 0xf4be000f
++
++/*P1_MODCODLSTF*/
++#define R0900_P1_MODCODLSTF 0xf4bf
++#define MODCODLSTF REGx(R0900_P1_MODCODLSTF)
++#define F0900_P1_DIS_QP_1_4 0xf4bf00f0
++
++/*P1_GAUSSR0*/
++#define R0900_P1_GAUSSR0 0xf4c0
++#define GAUSSR0 REGx(R0900_P1_GAUSSR0)
++#define F0900_P1_EN_CCIMODE 0xf4c00080
++#define F0900_P1_R0_GAUSSIEN 0xf4c0007f
++
++/*P1_CCIR0*/
++#define R0900_P1_CCIR0 0xf4c1
++#define CCIR0 REGx(R0900_P1_CCIR0)
++#define F0900_P1_CCIDETECT_PLHONLY 0xf4c10080
++#define F0900_P1_R0_CCI 0xf4c1007f
++
++/*P1_CCIQUANT*/
++#define R0900_P1_CCIQUANT 0xf4c2
++#define CCIQUANT REGx(R0900_P1_CCIQUANT)
++#define F0900_P1_CCI_BETA 0xf4c200e0
++#define F0900_P1_CCI_QUANT 0xf4c2001f
++
++/*P1_CCITHRES*/
++#define R0900_P1_CCITHRES 0xf4c3
++#define CCITHRES REGx(R0900_P1_CCITHRES)
++#define F0900_P1_CCI_THRESHOLD 0xf4c300ff
++
++/*P1_CCIACC*/
++#define R0900_P1_CCIACC 0xf4c4
++#define CCIACC REGx(R0900_P1_CCIACC)
++#define F0900_P1_CCI_VALUE 0xf4c400ff
++
++/*P1_DMDRESCFG*/
++#define R0900_P1_DMDRESCFG 0xf4c6
++#define DMDRESCFG REGx(R0900_P1_DMDRESCFG)
++#define F0900_P1_DMDRES_RESET 0xf4c60080
++#define F0900_P1_DMDRES_STRALL 0xf4c60008
++#define F0900_P1_DMDRES_NEWONLY 0xf4c60004
++#define F0900_P1_DMDRES_NOSTORE 0xf4c60002
++
++/*P1_DMDRESADR*/
++#define R0900_P1_DMDRESADR 0xf4c7
++#define DMDRESADR REGx(R0900_P1_DMDRESADR)
++#define F0900_P1_DMDRES_VALIDCFR 0xf4c70040
++#define F0900_P1_DMDRES_MEMFULL 0xf4c70030
++#define F0900_P1_DMDRES_RESNBR 0xf4c7000f
++
++/*P1_DMDRESDATA7*/
++#define R0900_P1_DMDRESDATA7 0xf4c8
++#define F0900_P1_DMDRES_DATA7 0xf4c800ff
++
++/*P1_DMDRESDATA6*/
++#define R0900_P1_DMDRESDATA6 0xf4c9
++#define F0900_P1_DMDRES_DATA6 0xf4c900ff
++
++/*P1_DMDRESDATA5*/
++#define R0900_P1_DMDRESDATA5 0xf4ca
++#define F0900_P1_DMDRES_DATA5 0xf4ca00ff
++
++/*P1_DMDRESDATA4*/
++#define R0900_P1_DMDRESDATA4 0xf4cb
++#define F0900_P1_DMDRES_DATA4 0xf4cb00ff
++
++/*P1_DMDRESDATA3*/
++#define R0900_P1_DMDRESDATA3 0xf4cc
++#define F0900_P1_DMDRES_DATA3 0xf4cc00ff
++
++/*P1_DMDRESDATA2*/
++#define R0900_P1_DMDRESDATA2 0xf4cd
++#define F0900_P1_DMDRES_DATA2 0xf4cd00ff
++
++/*P1_DMDRESDATA1*/
++#define R0900_P1_DMDRESDATA1 0xf4ce
++#define F0900_P1_DMDRES_DATA1 0xf4ce00ff
++
++/*P1_DMDRESDATA0*/
++#define R0900_P1_DMDRESDATA0 0xf4cf
++#define F0900_P1_DMDRES_DATA0 0xf4cf00ff
++
++/*P1_FFEI1*/
++#define R0900_P1_FFEI1 0xf4d0
++#define FFEI1 REGx(R0900_P1_FFEI1)
++#define F0900_P1_FFE_ACCI1 0xf4d001ff
++
++/*P1_FFEQ1*/
++#define R0900_P1_FFEQ1 0xf4d1
++#define FFEQ1 REGx(R0900_P1_FFEQ1)
++#define F0900_P1_FFE_ACCQ1 0xf4d101ff
++
++/*P1_FFEI2*/
++#define R0900_P1_FFEI2 0xf4d2
++#define FFEI2 REGx(R0900_P1_FFEI2)
++#define F0900_P1_FFE_ACCI2 0xf4d201ff
++
++/*P1_FFEQ2*/
++#define R0900_P1_FFEQ2 0xf4d3
++#define FFEQ2 REGx(R0900_P1_FFEQ2)
++#define F0900_P1_FFE_ACCQ2 0xf4d301ff
++
++/*P1_FFEI3*/
++#define R0900_P1_FFEI3 0xf4d4
++#define FFEI3 REGx(R0900_P1_FFEI3)
++#define F0900_P1_FFE_ACCI3 0xf4d401ff
++
++/*P1_FFEQ3*/
++#define R0900_P1_FFEQ3 0xf4d5
++#define FFEQ3 REGx(R0900_P1_FFEQ3)
++#define F0900_P1_FFE_ACCQ3 0xf4d501ff
++
++/*P1_FFEI4*/
++#define R0900_P1_FFEI4 0xf4d6
++#define FFEI4 REGx(R0900_P1_FFEI4)
++#define F0900_P1_FFE_ACCI4 0xf4d601ff
++
++/*P1_FFEQ4*/
++#define R0900_P1_FFEQ4 0xf4d7
++#define FFEQ4 REGx(R0900_P1_FFEQ4)
++#define F0900_P1_FFE_ACCQ4 0xf4d701ff
++
++/*P1_FFECFG*/
++#define R0900_P1_FFECFG 0xf4d8
++#define FFECFG REGx(R0900_P1_FFECFG)
++#define F0900_P1_EQUALFFE_ON 0xf4d80040
++#define F0900_P1_MU_EQUALFFE 0xf4d80007
++
++/*P1_TNRCFG*/
++#define R0900_P1_TNRCFG 0xf4e0
++#define TNRCFG REGx(R0900_P1_TNRCFG)
++#define F0900_P1_TUN_ACKFAIL 0xf4e00080
++#define F0900_P1_TUN_TYPE 0xf4e00070
++#define F0900_P1_TUN_SECSTOP 0xf4e00008
++#define F0900_P1_TUN_VCOSRCH 0xf4e00004
++#define F0900_P1_TUN_MADDRESS 0xf4e00003
++
++/*P1_TNRCFG2*/
++#define R0900_P1_TNRCFG2 0xf4e1
++#define TNRCFG2 REGx(R0900_P1_TNRCFG2)
++#define F0900_P1_TUN_IQSWAP 0xf4e10080
++#define F0900_P1_DIS_BWCALC 0xf4e10004
++#define F0900_P1_SHORT_WAITSTATES 0xf4e10002
++
++/*P1_TNRXTAL*/
++#define R0900_P1_TNRXTAL 0xf4e4
++#define TNRXTAL REGx(R0900_P1_TNRXTAL)
++#define F0900_P1_TUN_XTALFREQ 0xf4e4001f
++
++/*P1_TNRSTEPS*/
++#define R0900_P1_TNRSTEPS 0xf4e7
++#define TNRSTEPS REGx(R0900_P1_TNRSTEPS)
++#define F0900_P1_TUNER_BW0P125 0xf4e70080
++#define F0900_P1_BWINC_OFFSET 0xf4e70170
++#define F0900_P1_SOFTSTEP_RNG 0xf4e70008
++#define F0900_P1_TUN_BWOFFSET 0xf4e70007
++
++/*P1_TNRGAIN*/
++#define R0900_P1_TNRGAIN 0xf4e8
++#define TNRGAIN REGx(R0900_P1_TNRGAIN)
++#define F0900_P1_TUN_KDIVEN 0xf4e800c0
++#define F0900_P1_STB6X00_OCK 0xf4e80030
++#define F0900_P1_TUN_GAIN 0xf4e8000f
++
++/*P1_TNRRF1*/
++#define R0900_P1_TNRRF1 0xf4e9
++#define TNRRF1 REGx(R0900_P1_TNRRF1)
++#define F0900_P1_TUN_RFFREQ2 0xf4e900ff
++#define TUN_RFFREQ2 FLDx(F0900_P1_TUN_RFFREQ2)
++
++/*P1_TNRRF0*/
++#define R0900_P1_TNRRF0 0xf4ea
++#define TNRRF0 REGx(R0900_P1_TNRRF0)
++#define F0900_P1_TUN_RFFREQ1 0xf4ea00ff
++#define TUN_RFFREQ1 FLDx(F0900_P1_TUN_RFFREQ1)
++
++/*P1_TNRBW*/
++#define R0900_P1_TNRBW 0xf4eb
++#define TNRBW REGx(R0900_P1_TNRBW)
++#define F0900_P1_TUN_RFFREQ0 0xf4eb00c0
++#define TUN_RFFREQ0 FLDx(F0900_P1_TUN_RFFREQ0)
++#define F0900_P1_TUN_BW 0xf4eb003f
++#define TUN_BW FLDx(F0900_P1_TUN_BW)
++
++/*P1_TNRADJ*/
++#define R0900_P1_TNRADJ 0xf4ec
++#define TNRADJ REGx(R0900_P1_TNRADJ)
++#define F0900_P1_STB61X0_CALTIME 0xf4ec0040
++
++/*P1_TNRCTL2*/
++#define R0900_P1_TNRCTL2 0xf4ed
++#define TNRCTL2 REGx(R0900_P1_TNRCTL2)
++#define F0900_P1_STB61X0_RCCKOFF 0xf4ed0080
++#define F0900_P1_STB61X0_ICP_SDOFF 0xf4ed0040
++#define F0900_P1_STB61X0_DCLOOPOFF 0xf4ed0020
++#define F0900_P1_STB61X0_REFOUTSEL 0xf4ed0010
++#define F0900_P1_STB61X0_CALOFF 0xf4ed0008
++#define F0900_P1_STB6XX0_LPT_BEN 0xf4ed0004
++#define F0900_P1_STB6XX0_RX_OSCP 0xf4ed0002
++#define F0900_P1_STB6XX0_SYN 0xf4ed0001
++
++/*P1_TNRCFG3*/
++#define R0900_P1_TNRCFG3 0xf4ee
++#define TNRCFG3 REGx(R0900_P1_TNRCFG3)
++#define F0900_P1_TUN_PLLFREQ 0xf4ee001c
++#define F0900_P1_TUN_I2CFREQ_MODE 0xf4ee0003
++
++/*P1_TNRLAUNCH*/
++#define R0900_P1_TNRLAUNCH 0xf4f0
++#define TNRLAUNCH REGx(R0900_P1_TNRLAUNCH)
++
++/*P1_TNRLD*/
++#define R0900_P1_TNRLD 0xf4f0
++#define TNRLD REGx(R0900_P1_TNRLD)
++#define F0900_P1_TUNLD_VCOING 0xf4f00080
++#define F0900_P1_TUN_REG1FAIL 0xf4f00040
++#define F0900_P1_TUN_REG2FAIL 0xf4f00020
++#define F0900_P1_TUN_REG3FAIL 0xf4f00010
++#define F0900_P1_TUN_REG4FAIL 0xf4f00008
++#define F0900_P1_TUN_REG5FAIL 0xf4f00004
++#define F0900_P1_TUN_BWING 0xf4f00002
++#define F0900_P1_TUN_LOCKED 0xf4f00001
++
++/*P1_TNROBSL*/
++#define R0900_P1_TNROBSL 0xf4f6
++#define TNROBSL REGx(R0900_P1_TNROBSL)
++#define F0900_P1_TUN_I2CABORTED 0xf4f60080
++#define F0900_P1_TUN_LPEN 0xf4f60040
++#define F0900_P1_TUN_FCCK 0xf4f60020
++#define F0900_P1_TUN_I2CLOCKED 0xf4f60010
++#define F0900_P1_TUN_PROGDONE 0xf4f6000c
++#define F0900_P1_TUN_RFRESTE1 0xf4f60003
++#define TUN_RFRESTE1 FLDx(F0900_P1_TUN_RFRESTE1)
++
++/*P1_TNRRESTE*/
++#define R0900_P1_TNRRESTE 0xf4f7
++#define TNRRESTE REGx(R0900_P1_TNRRESTE)
++#define F0900_P1_TUN_RFRESTE0 0xf4f700ff
++#define TUN_RFRESTE0 FLDx(F0900_P1_TUN_RFRESTE0)
++
++/*P1_SMAPCOEF7*/
++#define R0900_P1_SMAPCOEF7 0xf500
++#define SMAPCOEF7 REGx(R0900_P1_SMAPCOEF7)
++#define F0900_P1_DIS_QSCALE 0xf5000080
++#define F0900_P1_SMAPCOEF_Q_LLR12 0xf500017f
++
++/*P1_SMAPCOEF6*/
++#define R0900_P1_SMAPCOEF6 0xf501
++#define SMAPCOEF6 REGx(R0900_P1_SMAPCOEF6)
++#define F0900_P1_ADJ_8PSKLLR1 0xf5010004
++#define F0900_P1_OLD_8PSKLLR1 0xf5010002
++#define F0900_P1_DIS_AB8PSK 0xf5010001
++
++/*P1_SMAPCOEF5*/
++#define R0900_P1_SMAPCOEF5 0xf502
++#define SMAPCOEF5 REGx(R0900_P1_SMAPCOEF5)
++#define F0900_P1_DIS_8SCALE 0xf5020080
++#define F0900_P1_SMAPCOEF_8P_LLR23 0xf502017f
++
++/*P1_NCO2MAX1*/
++#define R0900_P1_NCO2MAX1 0xf514
++#define NCO2MAX1 REGx(R0900_P1_NCO2MAX1)
++#define F0900_P1_TETA2_MAXVABS1 0xf51400ff
++
++/*P1_NCO2MAX0*/
++#define R0900_P1_NCO2MAX0 0xf515
++#define NCO2MAX0 REGx(R0900_P1_NCO2MAX0)
++#define F0900_P1_TETA2_MAXVABS0 0xf51500ff
++
++/*P1_NCO2FR1*/
++#define R0900_P1_NCO2FR1 0xf516
++#define NCO2FR1 REGx(R0900_P1_NCO2FR1)
++#define F0900_P1_NCO2FINAL_ANGLE1 0xf51600ff
++
++/*P1_NCO2FR0*/
++#define R0900_P1_NCO2FR0 0xf517
++#define NCO2FR0 REGx(R0900_P1_NCO2FR0)
++#define F0900_P1_NCO2FINAL_ANGLE0 0xf51700ff
++
++/*P1_CFR2AVRGE1*/
++#define R0900_P1_CFR2AVRGE1 0xf518
++#define CFR2AVRGE1 REGx(R0900_P1_CFR2AVRGE1)
++#define F0900_P1_I2C_CFR2AVERAGE1 0xf51800ff
++
++/*P1_CFR2AVRGE0*/
++#define R0900_P1_CFR2AVRGE0 0xf519
++#define CFR2AVRGE0 REGx(R0900_P1_CFR2AVRGE0)
++#define F0900_P1_I2C_CFR2AVERAGE0 0xf51900ff
++
++/*P1_DMDPLHSTAT*/
++#define R0900_P1_DMDPLHSTAT 0xf520
++#define DMDPLHSTAT REGx(R0900_P1_DMDPLHSTAT)
++#define F0900_P1_PLH_STATISTIC 0xf52000ff
++
++/*P1_LOCKTIME3*/
++#define R0900_P1_LOCKTIME3 0xf522
++#define LOCKTIME3 REGx(R0900_P1_LOCKTIME3)
++#define F0900_P1_DEMOD_LOCKTIME3 0xf52200ff
++
++/*P1_LOCKTIME2*/
++#define R0900_P1_LOCKTIME2 0xf523
++#define LOCKTIME2 REGx(R0900_P1_LOCKTIME2)
++#define F0900_P1_DEMOD_LOCKTIME2 0xf52300ff
++
++/*P1_LOCKTIME1*/
++#define R0900_P1_LOCKTIME1 0xf524
++#define LOCKTIME1 REGx(R0900_P1_LOCKTIME1)
++#define F0900_P1_DEMOD_LOCKTIME1 0xf52400ff
++
++/*P1_LOCKTIME0*/
++#define R0900_P1_LOCKTIME0 0xf525
++#define LOCKTIME0 REGx(R0900_P1_LOCKTIME0)
++#define F0900_P1_DEMOD_LOCKTIME0 0xf52500ff
++
++/*P1_VITSCALE*/
++#define R0900_P1_VITSCALE 0xf532
++#define VITSCALE REGx(R0900_P1_VITSCALE)
++#define F0900_P1_NVTH_NOSRANGE 0xf5320080
++#define F0900_P1_VERROR_MAXMODE 0xf5320040
++#define F0900_P1_NSLOWSN_LOCKED 0xf5320008
++#define F0900_P1_DIS_RSFLOCK 0xf5320002
++
++/*P1_FECM*/
++#define R0900_P1_FECM 0xf533
++#define FECM REGx(R0900_P1_FECM)
++#define F0900_P1_DSS_DVB 0xf5330080
++#define DSS_DVB FLDx(F0900_P1_DSS_DVB)
++#define F0900_P1_DSS_SRCH 0xf5330010
++#define F0900_P1_SYNCVIT 0xf5330002
++#define F0900_P1_IQINV 0xf5330001
++#define IQINV FLDx(F0900_P1_IQINV)
++
++/*P1_VTH12*/
++#define R0900_P1_VTH12 0xf534
++#define VTH12 REGx(R0900_P1_VTH12)
++#define F0900_P1_VTH12 0xf53400ff
++
++/*P1_VTH23*/
++#define R0900_P1_VTH23 0xf535
++#define VTH23 REGx(R0900_P1_VTH23)
++#define F0900_P1_VTH23 0xf53500ff
++
++/*P1_VTH34*/
++#define R0900_P1_VTH34 0xf536
++#define VTH34 REGx(R0900_P1_VTH34)
++#define F0900_P1_VTH34 0xf53600ff
++
++/*P1_VTH56*/
++#define R0900_P1_VTH56 0xf537
++#define VTH56 REGx(R0900_P1_VTH56)
++#define F0900_P1_VTH56 0xf53700ff
++
++/*P1_VTH67*/
++#define R0900_P1_VTH67 0xf538
++#define VTH67 REGx(R0900_P1_VTH67)
++#define F0900_P1_VTH67 0xf53800ff
++
++/*P1_VTH78*/
++#define R0900_P1_VTH78 0xf539
++#define VTH78 REGx(R0900_P1_VTH78)
++#define F0900_P1_VTH78 0xf53900ff
++
++/*P1_VITCURPUN*/
++#define R0900_P1_VITCURPUN 0xf53a
++#define VITCURPUN REGx(R0900_P1_VITCURPUN)
++#define F0900_P1_VIT_CURPUN 0xf53a001f
++#define VIT_CURPUN FLDx(F0900_P1_VIT_CURPUN)
++
++/*P1_VERROR*/
++#define R0900_P1_VERROR 0xf53b
++#define VERROR REGx(R0900_P1_VERROR)
++#define F0900_P1_REGERR_VIT 0xf53b00ff
++
++/*P1_PRVIT*/
++#define R0900_P1_PRVIT 0xf53c
++#define PRVIT REGx(R0900_P1_PRVIT)
++#define F0900_P1_DIS_VTHLOCK 0xf53c0040
++#define F0900_P1_E7_8VIT 0xf53c0020
++#define F0900_P1_E6_7VIT 0xf53c0010
++#define F0900_P1_E5_6VIT 0xf53c0008
++#define F0900_P1_E3_4VIT 0xf53c0004
++#define F0900_P1_E2_3VIT 0xf53c0002
++#define F0900_P1_E1_2VIT 0xf53c0001
++
++/*P1_VAVSRVIT*/
++#define R0900_P1_VAVSRVIT 0xf53d
++#define VAVSRVIT REGx(R0900_P1_VAVSRVIT)
++#define F0900_P1_AMVIT 0xf53d0080
++#define F0900_P1_FROZENVIT 0xf53d0040
++#define F0900_P1_SNVIT 0xf53d0030
++#define F0900_P1_TOVVIT 0xf53d000c
++#define F0900_P1_HYPVIT 0xf53d0003
++
++/*P1_VSTATUSVIT*/
++#define R0900_P1_VSTATUSVIT 0xf53e
++#define VSTATUSVIT REGx(R0900_P1_VSTATUSVIT)
++#define F0900_P1_PRFVIT 0xf53e0010
++#define PRFVIT FLDx(F0900_P1_PRFVIT)
++#define F0900_P1_LOCKEDVIT 0xf53e0008
++#define LOCKEDVIT FLDx(F0900_P1_LOCKEDVIT)
++
++/*P1_VTHINUSE*/
++#define R0900_P1_VTHINUSE 0xf53f
++#define VTHINUSE REGx(R0900_P1_VTHINUSE)
++#define F0900_P1_VIT_INUSE 0xf53f00ff
++
++/*P1_KDIV12*/
++#define R0900_P1_KDIV12 0xf540
++#define KDIV12 REGx(R0900_P1_KDIV12)
++#define F0900_P1_K_DIVIDER_12 0xf540007f
++
++/*P1_KDIV23*/
++#define R0900_P1_KDIV23 0xf541
++#define KDIV23 REGx(R0900_P1_KDIV23)
++#define F0900_P1_K_DIVIDER_23 0xf541007f
++
++/*P1_KDIV34*/
++#define R0900_P1_KDIV34 0xf542
++#define KDIV34 REGx(R0900_P1_KDIV34)
++#define F0900_P1_K_DIVIDER_34 0xf542007f
++
++/*P1_KDIV56*/
++#define R0900_P1_KDIV56 0xf543
++#define KDIV56 REGx(R0900_P1_KDIV56)
++#define F0900_P1_K_DIVIDER_56 0xf543007f
++
++/*P1_KDIV67*/
++#define R0900_P1_KDIV67 0xf544
++#define KDIV67 REGx(R0900_P1_KDIV67)
++#define F0900_P1_K_DIVIDER_67 0xf544007f
++
++/*P1_KDIV78*/
++#define R0900_P1_KDIV78 0xf545
++#define KDIV78 REGx(R0900_P1_KDIV78)
++#define F0900_P1_K_DIVIDER_78 0xf545007f
++
++/*P1_PDELCTRL1*/
++#define R0900_P1_PDELCTRL1 0xf550
++#define PDELCTRL1 REGx(R0900_P1_PDELCTRL1)
++#define F0900_P1_INV_MISMASK 0xf5500080
++#define F0900_P1_FILTER_EN 0xf5500020
++#define F0900_P1_EN_MIS00 0xf5500002
++#define F0900_P1_ALGOSWRST 0xf5500001
++#define ALGOSWRST FLDx(F0900_P1_ALGOSWRST)
++
++/*P1_PDELCTRL2*/
++#define R0900_P1_PDELCTRL2 0xf551
++#define PDELCTRL2 REGx(R0900_P1_PDELCTRL2)
++#define F0900_P1_RESET_UPKO_COUNT 0xf5510040
++#define RESET_UPKO_COUNT FLDx(F0900_P1_RESET_UPKO_COUNT)
++#define F0900_P1_FRAME_MODE 0xf5510002
++#define F0900_P1_NOBCHERRFLG_USE 0xf5510001
++
++/*P1_HYSTTHRESH*/
++#define R0900_P1_HYSTTHRESH 0xf554
++#define HYSTTHRESH REGx(R0900_P1_HYSTTHRESH)
++#define F0900_P1_UNLCK_THRESH 0xf55400f0
++#define F0900_P1_DELIN_LCK_THRESH 0xf554000f
++
++/*P1_ISIENTRY*/
++#define R0900_P1_ISIENTRY 0xf55e
++#define ISIENTRY REGx(R0900_P1_ISIENTRY)
++#define F0900_P1_ISI_ENTRY 0xf55e00ff
++
++/*P1_ISIBITENA*/
++#define R0900_P1_ISIBITENA 0xf55f
++#define ISIBITENA REGx(R0900_P1_ISIBITENA)
++#define F0900_P1_ISI_BIT_EN 0xf55f00ff
++
++/*P1_MATSTR1*/
++#define R0900_P1_MATSTR1 0xf560
++#define MATSTR1 REGx(R0900_P1_MATSTR1)
++#define F0900_P1_MATYPE_CURRENT1 0xf56000ff
++
++/*P1_MATSTR0*/
++#define R0900_P1_MATSTR0 0xf561
++#define MATSTR0 REGx(R0900_P1_MATSTR0)
++#define F0900_P1_MATYPE_CURRENT0 0xf56100ff
++
++/*P1_UPLSTR1*/
++#define R0900_P1_UPLSTR1 0xf562
++#define UPLSTR1 REGx(R0900_P1_UPLSTR1)
++#define F0900_P1_UPL_CURRENT1 0xf56200ff
++
++/*P1_UPLSTR0*/
++#define R0900_P1_UPLSTR0 0xf563
++#define UPLSTR0 REGx(R0900_P1_UPLSTR0)
++#define F0900_P1_UPL_CURRENT0 0xf56300ff
++
++/*P1_DFLSTR1*/
++#define R0900_P1_DFLSTR1 0xf564
++#define DFLSTR1 REGx(R0900_P1_DFLSTR1)
++#define F0900_P1_DFL_CURRENT1 0xf56400ff
++
++/*P1_DFLSTR0*/
++#define R0900_P1_DFLSTR0 0xf565
++#define DFLSTR0 REGx(R0900_P1_DFLSTR0)
++#define F0900_P1_DFL_CURRENT0 0xf56500ff
++
++/*P1_SYNCSTR*/
++#define R0900_P1_SYNCSTR 0xf566
++#define SYNCSTR REGx(R0900_P1_SYNCSTR)
++#define F0900_P1_SYNC_CURRENT 0xf56600ff
++
++/*P1_SYNCDSTR1*/
++#define R0900_P1_SYNCDSTR1 0xf567
++#define SYNCDSTR1 REGx(R0900_P1_SYNCDSTR1)
++#define F0900_P1_SYNCD_CURRENT1 0xf56700ff
++
++/*P1_SYNCDSTR0*/
++#define R0900_P1_SYNCDSTR0 0xf568
++#define SYNCDSTR0 REGx(R0900_P1_SYNCDSTR0)
++#define F0900_P1_SYNCD_CURRENT0 0xf56800ff
++
++/*P1_PDELSTATUS1*/
++#define R0900_P1_PDELSTATUS1 0xf569
++#define F0900_P1_PKTDELIN_DELOCK 0xf5690080
++#define F0900_P1_SYNCDUPDFL_BADDFL 0xf5690040
++#define F0900_P1_CONTINUOUS_STREAM 0xf5690020
++#define F0900_P1_UNACCEPTED_STREAM 0xf5690010
++#define F0900_P1_BCH_ERROR_FLAG 0xf5690008
++#define F0900_P1_PKTDELIN_LOCK 0xf5690002
++#define PKTDELIN_LOCK FLDx(F0900_P1_PKTDELIN_LOCK)
++#define F0900_P1_FIRST_LOCK 0xf5690001
++
++/*P1_PDELSTATUS2*/
++#define R0900_P1_PDELSTATUS2 0xf56a
++#define F0900_P1_FRAME_MODCOD 0xf56a007c
++#define F0900_P1_FRAME_TYPE 0xf56a0003
++
++/*P1_BBFCRCKO1*/
++#define R0900_P1_BBFCRCKO1 0xf56b
++#define BBFCRCKO1 REGx(R0900_P1_BBFCRCKO1)
++#define F0900_P1_BBHCRC_KOCNT1 0xf56b00ff
++
++/*P1_BBFCRCKO0*/
++#define R0900_P1_BBFCRCKO0 0xf56c
++#define BBFCRCKO0 REGx(R0900_P1_BBFCRCKO0)
++#define F0900_P1_BBHCRC_KOCNT0 0xf56c00ff
++
++/*P1_UPCRCKO1*/
++#define R0900_P1_UPCRCKO1 0xf56d
++#define UPCRCKO1 REGx(R0900_P1_UPCRCKO1)
++#define F0900_P1_PKTCRC_KOCNT1 0xf56d00ff
++
++/*P1_UPCRCKO0*/
++#define R0900_P1_UPCRCKO0 0xf56e
++#define UPCRCKO0 REGx(R0900_P1_UPCRCKO0)
++#define F0900_P1_PKTCRC_KOCNT0 0xf56e00ff
++
++/*P1_PDELCTRL3*/
++#define R0900_P1_PDELCTRL3 0xf56f
++#define PDELCTRL3 REGx(R0900_P1_PDELCTRL3)
++#define F0900_P1_PKTDEL_CONTFAIL 0xf56f0080
++#define F0900_P1_NOFIFO_BCHERR 0xf56f0020
++
++/*P1_TSSTATEM*/
++#define R0900_P1_TSSTATEM 0xf570
++#define TSSTATEM REGx(R0900_P1_TSSTATEM)
++#define F0900_P1_TSDIL_ON 0xf5700080
++#define F0900_P1_TSRS_ON 0xf5700020
++#define F0900_P1_TSDESCRAMB_ON 0xf5700010
++#define F0900_P1_TSFRAME_MODE 0xf5700008
++#define F0900_P1_TS_DISABLE 0xf5700004
++#define F0900_P1_TSOUT_NOSYNC 0xf5700001
++
++/*P1_TSCFGH*/
++#define R0900_P1_TSCFGH 0xf572
++#define TSCFGH REGx(R0900_P1_TSCFGH)
++#define F0900_P1_TSFIFO_DVBCI 0xf5720080
++#define F0900_P1_TSFIFO_SERIAL 0xf5720040
++#define F0900_P1_TSFIFO_TEIUPDATE 0xf5720020
++#define F0900_P1_TSFIFO_DUTY50 0xf5720010
++#define F0900_P1_TSFIFO_HSGNLOUT 0xf5720008
++#define F0900_P1_TSFIFO_ERRMODE 0xf5720006
++#define F0900_P1_RST_HWARE 0xf5720001
++#define RST_HWARE FLDx(F0900_P1_RST_HWARE)
++
++/*P1_TSCFGM*/
++#define R0900_P1_TSCFGM 0xf573
++#define TSCFGM REGx(R0900_P1_TSCFGM)
++#define F0900_P1_TSFIFO_MANSPEED 0xf57300c0
++#define F0900_P1_TSFIFO_PERMDATA 0xf5730020
++#define F0900_P1_TSFIFO_DPUNACT 0xf5730002
++#define F0900_P1_TSFIFO_INVDATA 0xf5730001
++
++/*P1_TSCFGL*/
++#define R0900_P1_TSCFGL 0xf574
++#define TSCFGL REGx(R0900_P1_TSCFGL)
++#define F0900_P1_TSFIFO_BCLKDEL1CK 0xf57400c0
++#define F0900_P1_BCHERROR_MODE 0xf5740030
++#define F0900_P1_TSFIFO_NSGNL2DATA 0xf5740008
++#define F0900_P1_TSFIFO_EMBINDVB 0xf5740004
++#define F0900_P1_TSFIFO_BITSPEED 0xf5740003
++
++/*P1_TSINSDELH*/
++#define R0900_P1_TSINSDELH 0xf576
++#define TSINSDELH REGx(R0900_P1_TSINSDELH)
++#define F0900_P1_TSDEL_SYNCBYTE 0xf5760080
++#define F0900_P1_TSDEL_XXHEADER 0xf5760040
++#define F0900_P1_TSDEL_BBHEADER 0xf5760020
++#define F0900_P1_TSDEL_DATAFIELD 0xf5760010
++#define F0900_P1_TSINSDEL_ISCR 0xf5760008
++#define F0900_P1_TSINSDEL_NPD 0xf5760004
++#define F0900_P1_TSINSDEL_RSPARITY 0xf5760002
++#define F0900_P1_TSINSDEL_CRC8 0xf5760001
++
++/*P1_TSDIVN*/
++#define R0900_P1_TSDIVN 0xf579
++#define TSDIVN REGx(R0900_P1_TSDIVN)
++#define F0900_P1_TSFIFO_SPEEDMODE 0xf57900c0
++
++/*P1_TSCFG4*/
++#define R0900_P1_TSCFG4 0xf57a
++#define TSCFG4 REGx(R0900_P1_TSCFG4)
++#define F0900_P1_TSFIFO_TSSPEEDMODE 0xf57a00c0
++
++/*P1_TSSPEED*/
++#define R0900_P1_TSSPEED 0xf580
++#define TSSPEED REGx(R0900_P1_TSSPEED)
++#define F0900_P1_TSFIFO_OUTSPEED 0xf58000ff
++
++/*P1_TSSTATUS*/
++#define R0900_P1_TSSTATUS 0xf581
++#define TSSTATUS REGx(R0900_P1_TSSTATUS)
++#define F0900_P1_TSFIFO_LINEOK 0xf5810080
++#define TSFIFO_LINEOK FLDx(F0900_P1_TSFIFO_LINEOK)
++#define F0900_P1_TSFIFO_ERROR 0xf5810040
++#define F0900_P1_DIL_READY 0xf5810001
++
++/*P1_TSSTATUS2*/
++#define R0900_P1_TSSTATUS2 0xf582
++#define TSSTATUS2 REGx(R0900_P1_TSSTATUS2)
++#define F0900_P1_TSFIFO_DEMODSEL 0xf5820080
++#define F0900_P1_TSFIFOSPEED_STORE 0xf5820040
++#define F0900_P1_DILXX_RESET 0xf5820020
++#define F0900_P1_TSSERIAL_IMPOS 0xf5820010
++#define F0900_P1_SCRAMBDETECT 0xf5820002
++
++/*P1_TSBITRATE1*/
++#define R0900_P1_TSBITRATE1 0xf583
++#define TSBITRATE1 REGx(R0900_P1_TSBITRATE1)
++#define F0900_P1_TSFIFO_BITRATE1 0xf58300ff
++
++/*P1_TSBITRATE0*/
++#define R0900_P1_TSBITRATE0 0xf584
++#define TSBITRATE0 REGx(R0900_P1_TSBITRATE0)
++#define F0900_P1_TSFIFO_BITRATE0 0xf58400ff
++
++/*P1_ERRCTRL1*/
++#define R0900_P1_ERRCTRL1 0xf598
++#define ERRCTRL1 REGx(R0900_P1_ERRCTRL1)
++#define F0900_P1_ERR_SOURCE1 0xf59800f0
++#define F0900_P1_NUM_EVENT1 0xf5980007
++
++/*P1_ERRCNT12*/
++#define R0900_P1_ERRCNT12 0xf599
++#define ERRCNT12 REGx(R0900_P1_ERRCNT12)
++#define F0900_P1_ERRCNT1_OLDVALUE 0xf5990080
++#define F0900_P1_ERR_CNT12 0xf599007f
++#define ERR_CNT12 FLDx(F0900_P1_ERR_CNT12)
++
++/*P1_ERRCNT11*/
++#define R0900_P1_ERRCNT11 0xf59a
++#define ERRCNT11 REGx(R0900_P1_ERRCNT11)
++#define F0900_P1_ERR_CNT11 0xf59a00ff
++#define ERR_CNT11 FLDx(F0900_P1_ERR_CNT11)
++
++/*P1_ERRCNT10*/
++#define R0900_P1_ERRCNT10 0xf59b
++#define ERRCNT10 REGx(R0900_P1_ERRCNT10)
++#define F0900_P1_ERR_CNT10 0xf59b00ff
++#define ERR_CNT10 FLDx(F0900_P1_ERR_CNT10)
++
++/*P1_ERRCTRL2*/
++#define R0900_P1_ERRCTRL2 0xf59c
++#define ERRCTRL2 REGx(R0900_P1_ERRCTRL2)
++#define F0900_P1_ERR_SOURCE2 0xf59c00f0
++#define F0900_P1_NUM_EVENT2 0xf59c0007
++
++/*P1_ERRCNT22*/
++#define R0900_P1_ERRCNT22 0xf59d
++#define ERRCNT22 REGx(R0900_P1_ERRCNT22)
++#define F0900_P1_ERRCNT2_OLDVALUE 0xf59d0080
++#define F0900_P1_ERR_CNT22 0xf59d007f
++#define ERR_CNT22 FLDx(F0900_P1_ERR_CNT22)
++
++/*P1_ERRCNT21*/
++#define R0900_P1_ERRCNT21 0xf59e
++#define ERRCNT21 REGx(R0900_P1_ERRCNT21)
++#define F0900_P1_ERR_CNT21 0xf59e00ff
++#define ERR_CNT21 FLDx(F0900_P1_ERR_CNT21)
++
++/*P1_ERRCNT20*/
++#define R0900_P1_ERRCNT20 0xf59f
++#define ERRCNT20 REGx(R0900_P1_ERRCNT20)
++#define F0900_P1_ERR_CNT20 0xf59f00ff
++#define ERR_CNT20 FLDx(F0900_P1_ERR_CNT20)
++
++/*P1_FECSPY*/
++#define R0900_P1_FECSPY 0xf5a0
++#define FECSPY REGx(R0900_P1_FECSPY)
++#define F0900_P1_SPY_ENABLE 0xf5a00080
++#define F0900_P1_NO_SYNCBYTE 0xf5a00040
++#define F0900_P1_SERIAL_MODE 0xf5a00020
++#define F0900_P1_UNUSUAL_PACKET 0xf5a00010
++#define F0900_P1_BERMETER_DATAMODE 0xf5a00008
++#define F0900_P1_BERMETER_LMODE 0xf5a00002
++#define F0900_P1_BERMETER_RESET 0xf5a00001
++
++/*P1_FSPYCFG*/
++#define R0900_P1_FSPYCFG 0xf5a1
++#define FSPYCFG REGx(R0900_P1_FSPYCFG)
++#define F0900_P1_FECSPY_INPUT 0xf5a100c0
++#define F0900_P1_RST_ON_ERROR 0xf5a10020
++#define F0900_P1_ONE_SHOT 0xf5a10010
++#define F0900_P1_I2C_MODE 0xf5a1000c
++#define F0900_P1_SPY_HYSTERESIS 0xf5a10003
++
++/*P1_FSPYDATA*/
++#define R0900_P1_FSPYDATA 0xf5a2
++#define FSPYDATA REGx(R0900_P1_FSPYDATA)
++#define F0900_P1_SPY_STUFFING 0xf5a20080
++#define F0900_P1_SPY_CNULLPKT 0xf5a20020
++#define F0900_P1_SPY_OUTDATA_MODE 0xf5a2001f
++
++/*P1_FSPYOUT*/
++#define R0900_P1_FSPYOUT 0xf5a3
++#define FSPYOUT REGx(R0900_P1_FSPYOUT)
++#define F0900_P1_FSPY_DIRECT 0xf5a30080
++#define F0900_P1_STUFF_MODE 0xf5a30007
++
++/*P1_FSTATUS*/
++#define R0900_P1_FSTATUS 0xf5a4
++#define FSTATUS REGx(R0900_P1_FSTATUS)
++#define F0900_P1_SPY_ENDSIM 0xf5a40080
++#define F0900_P1_VALID_SIM 0xf5a40040
++#define F0900_P1_FOUND_SIGNAL 0xf5a40020
++#define F0900_P1_DSS_SYNCBYTE 0xf5a40010
++#define F0900_P1_RESULT_STATE 0xf5a4000f
++
++/*P1_FBERCPT4*/
++#define R0900_P1_FBERCPT4 0xf5a8
++#define FBERCPT4 REGx(R0900_P1_FBERCPT4)
++#define F0900_P1_FBERMETER_CPT4 0xf5a800ff
++
++/*P1_FBERCPT3*/
++#define R0900_P1_FBERCPT3 0xf5a9
++#define FBERCPT3 REGx(R0900_P1_FBERCPT3)
++#define F0900_P1_FBERMETER_CPT3 0xf5a900ff
++
++/*P1_FBERCPT2*/
++#define R0900_P1_FBERCPT2 0xf5aa
++#define FBERCPT2 REGx(R0900_P1_FBERCPT2)
++#define F0900_P1_FBERMETER_CPT2 0xf5aa00ff
++
++/*P1_FBERCPT1*/
++#define R0900_P1_FBERCPT1 0xf5ab
++#define FBERCPT1 REGx(R0900_P1_FBERCPT1)
++#define F0900_P1_FBERMETER_CPT1 0xf5ab00ff
++
++/*P1_FBERCPT0*/
++#define R0900_P1_FBERCPT0 0xf5ac
++#define FBERCPT0 REGx(R0900_P1_FBERCPT0)
++#define F0900_P1_FBERMETER_CPT0 0xf5ac00ff
++
++/*P1_FBERERR2*/
++#define R0900_P1_FBERERR2 0xf5ad
++#define FBERERR2 REGx(R0900_P1_FBERERR2)
++#define F0900_P1_FBERMETER_ERR2 0xf5ad00ff
++
++/*P1_FBERERR1*/
++#define R0900_P1_FBERERR1 0xf5ae
++#define FBERERR1 REGx(R0900_P1_FBERERR1)
++#define F0900_P1_FBERMETER_ERR1 0xf5ae00ff
++
++/*P1_FBERERR0*/
++#define R0900_P1_FBERERR0 0xf5af
++#define FBERERR0 REGx(R0900_P1_FBERERR0)
++#define F0900_P1_FBERMETER_ERR0 0xf5af00ff
++
++/*P1_FSPYBER*/
++#define R0900_P1_FSPYBER 0xf5b2
++#define FSPYBER REGx(R0900_P1_FSPYBER)
++#define F0900_P1_FSPYBER_SYNCBYTE 0xf5b20010
++#define F0900_P1_FSPYBER_UNSYNC 0xf5b20008
++#define F0900_P1_FSPYBER_CTIME 0xf5b20007
++
++/*RCCFG2*/
++#define R0900_RCCFG2 0xf600
++
++/*TSGENERAL*/
++#define R0900_TSGENERAL 0xf630
++#define F0900_TSFIFO_DISTS2PAR 0xf6300040
++#define F0900_MUXSTREAM_OUTMODE 0xf6300008
++#define F0900_TSFIFO_PERMPARAL 0xf6300006
++
++/*TSGENERAL1X*/
++#define R0900_TSGENERAL1X 0xf670
++
++/*NBITER_NF4*/
++#define R0900_NBITER_NF4 0xfa03
++#define F0900_NBITER_NF_QP_1_2 0xfa0300ff
++
++/*NBITER_NF5*/
++#define R0900_NBITER_NF5 0xfa04
++#define F0900_NBITER_NF_QP_3_5 0xfa0400ff
++
++/*NBITER_NF6*/
++#define R0900_NBITER_NF6 0xfa05
++#define F0900_NBITER_NF_QP_2_3 0xfa0500ff
++
++/*NBITER_NF7*/
++#define R0900_NBITER_NF7 0xfa06
++#define F0900_NBITER_NF_QP_3_4 0xfa0600ff
++
++/*NBITER_NF8*/
++#define R0900_NBITER_NF8 0xfa07
++#define F0900_NBITER_NF_QP_4_5 0xfa0700ff
++
++/*NBITER_NF9*/
++#define R0900_NBITER_NF9 0xfa08
++#define F0900_NBITER_NF_QP_5_6 0xfa0800ff
++
++/*NBITER_NF10*/
++#define R0900_NBITER_NF10 0xfa09
++#define F0900_NBITER_NF_QP_8_9 0xfa0900ff
++
++/*NBITER_NF11*/
++#define R0900_NBITER_NF11 0xfa0a
++#define F0900_NBITER_NF_QP_9_10 0xfa0a00ff
++
++/*NBITER_NF12*/
++#define R0900_NBITER_NF12 0xfa0b
++#define F0900_NBITER_NF_8P_3_5 0xfa0b00ff
++
++/*NBITER_NF13*/
++#define R0900_NBITER_NF13 0xfa0c
++#define F0900_NBITER_NF_8P_2_3 0xfa0c00ff
++
++/*NBITER_NF14*/
++#define R0900_NBITER_NF14 0xfa0d
++#define F0900_NBITER_NF_8P_3_4 0xfa0d00ff
++
++/*NBITER_NF15*/
++#define R0900_NBITER_NF15 0xfa0e
++#define F0900_NBITER_NF_8P_5_6 0xfa0e00ff
++
++/*NBITER_NF16*/
++#define R0900_NBITER_NF16 0xfa0f
++#define F0900_NBITER_NF_8P_8_9 0xfa0f00ff
++
++/*NBITER_NF17*/
++#define R0900_NBITER_NF17 0xfa10
++#define F0900_NBITER_NF_8P_9_10 0xfa1000ff
++
++/*NBITERNOERR*/
++#define R0900_NBITERNOERR 0xfa3f
++#define F0900_NBITER_STOP_CRIT 0xfa3f000f
++
++/*GAINLLR_NF4*/
++#define R0900_GAINLLR_NF4 0xfa43
++#define F0900_GAINLLR_NF_QP_1_2 0xfa43007f
++
++/*GAINLLR_NF5*/
++#define R0900_GAINLLR_NF5 0xfa44
++#define F0900_GAINLLR_NF_QP_3_5 0xfa44007f
++
++/*GAINLLR_NF6*/
++#define R0900_GAINLLR_NF6 0xfa45
++#define F0900_GAINLLR_NF_QP_2_3 0xfa45007f
++
++/*GAINLLR_NF7*/
++#define R0900_GAINLLR_NF7 0xfa46
++#define F0900_GAINLLR_NF_QP_3_4 0xfa46007f
++
++/*GAINLLR_NF8*/
++#define R0900_GAINLLR_NF8 0xfa47
++#define F0900_GAINLLR_NF_QP_4_5 0xfa47007f
++
++/*GAINLLR_NF9*/
++#define R0900_GAINLLR_NF9 0xfa48
++#define F0900_GAINLLR_NF_QP_5_6 0xfa48007f
++
++/*GAINLLR_NF10*/
++#define R0900_GAINLLR_NF10 0xfa49
++#define F0900_GAINLLR_NF_QP_8_9 0xfa49007f
++
++/*GAINLLR_NF11*/
++#define R0900_GAINLLR_NF11 0xfa4a
++#define F0900_GAINLLR_NF_QP_9_10 0xfa4a007f
++
++/*GAINLLR_NF12*/
++#define R0900_GAINLLR_NF12 0xfa4b
++#define F0900_GAINLLR_NF_8P_3_5 0xfa4b007f
++
++/*GAINLLR_NF13*/
++#define R0900_GAINLLR_NF13 0xfa4c
++#define F0900_GAINLLR_NF_8P_2_3 0xfa4c007f
++
++/*GAINLLR_NF14*/
++#define R0900_GAINLLR_NF14 0xfa4d
++#define F0900_GAINLLR_NF_8P_3_4 0xfa4d007f
++
++/*GAINLLR_NF15*/
++#define R0900_GAINLLR_NF15 0xfa4e
++#define F0900_GAINLLR_NF_8P_5_6 0xfa4e007f
++
++/*GAINLLR_NF16*/
++#define R0900_GAINLLR_NF16 0xfa4f
++#define F0900_GAINLLR_NF_8P_8_9 0xfa4f007f
++
++/*GAINLLR_NF17*/
++#define R0900_GAINLLR_NF17 0xfa50
++#define F0900_GAINLLR_NF_8P_9_10 0xfa50007f
++
++/*CFGEXT*/
++#define R0900_CFGEXT 0xfa80
++#define F0900_STAGMODE 0xfa800080
++#define F0900_BYPBCH 0xfa800040
++#define F0900_BYPLDPC 0xfa800020
++#define F0900_LDPCMODE 0xfa800010
++#define F0900_INVLLRSIGN 0xfa800008
++#define F0900_SHORTMULT 0xfa800004
++#define F0900_EXTERNTX 0xfa800001
++
++/*GENCFG*/
++#define R0900_GENCFG 0xfa86
++#define F0900_BROADCAST 0xfa860010
++#define F0900_PRIORITY 0xfa860002
++#define F0900_DDEMOD 0xfa860001
++
++/*LDPCERR1*/
++#define R0900_LDPCERR1 0xfa96
++#define F0900_LDPC_ERRORS_COUNTER1 0xfa9600ff
++
++/*LDPCERR0*/
++#define R0900_LDPCERR0 0xfa97
++#define F0900_LDPC_ERRORS_COUNTER0 0xfa9700ff
++
++/*BCHERR*/
++#define R0900_BCHERR 0xfa98
++#define F0900_ERRORFLAG 0xfa980010
++#define F0900_BCH_ERRORS_COUNTER 0xfa98000f
++
++/*TSTRES0*/
++#define R0900_TSTRES0 0xff11
++#define F0900_FRESFEC 0xff110080
++
++/*P2_TCTL4*/
++#define R0900_P2_TCTL4 0xff28
++#define F0900_P2_PN4_SELECT 0xff280020
++
++/*P1_TCTL4*/
++#define R0900_P1_TCTL4 0xff48
++#define TCTL4 shiftx(R0900_P1_TCTL4, demod, 0x20)
++#define F0900_P1_PN4_SELECT 0xff480020
++
++/*P2_TSTDISRX*/
++#define R0900_P2_TSTDISRX 0xff65
++#define F0900_P2_PIN_SELECT1 0xff650008
++
++/*P1_TSTDISRX*/
++#define R0900_P1_TSTDISRX 0xff67
++#define TSTDISRX shiftx(R0900_P1_TSTDISRX, demod, 2)
++#define F0900_P1_PIN_SELECT1 0xff670008
++#define PIN_SELECT1 shiftx(F0900_P1_PIN_SELECT1, demod, 0x20000)
++
++#define STV0900_NBREGS 723
++#define STV0900_NBFIELDS 1420
++
++#endif
++
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/stv090x.h linux-2.6.18/drivers/media/dvb/frontends/stv090x.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/stv090x.h    1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/stv090x.h 2010-09-09 12:38:50.000000000 +0000
+@@ -0,0 +1,118 @@
++/*
++      STV0900/0903 Multistandard Broadcast Frontend driver
++      Copyright (C) Manu Abraham <abraham.manu@gmail.com>
++
++      Copyright (C) ST Microelectronics
++
++      This program is free software; you can redistribute it and/or modify
++      it under the terms of the GNU General Public License as published by
++      the Free Software Foundation; either version 2 of the License, or
++      (at your option) any later version.
++
++      This program is distributed in the hope that it will be useful,
++      but WITHOUT ANY WARRANTY; without even the implied warranty of
++      MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++      GNU General Public License for more details.
++
++      You should have received a copy of the GNU General Public License
++      along with this program; if not, write to the Free Software
++      Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++*/
++
++#ifndef __STV090x_H
++#define __STV090x_H
++
++enum stv090x_demodulator {
++      STV090x_DEMODULATOR_0 = 1,
++      STV090x_DEMODULATOR_1
++};
++
++enum stv090x_device {
++      STV0903 =  0,
++      STV0900,
++};
++
++enum stv090x_mode {
++      STV090x_DUAL = 0,
++      STV090x_SINGLE
++};
++
++enum stv090x_tsmode {
++      STV090x_TSMODE_SERIAL_PUNCTURED = 1,
++      STV090x_TSMODE_SERIAL_CONTINUOUS,
++      STV090x_TSMODE_PARALLEL_PUNCTURED,
++      STV090x_TSMODE_DVBCI
++};
++
++enum stv090x_clkmode {
++      STV090x_CLK_INT = 0, /* Clk i/p = CLKI */
++      STV090x_CLK_EXT = 2 /* Clk i/p = XTALI */
++};
++
++enum stv090x_i2crpt {
++      STV090x_RPTLEVEL_256    = 0,
++      STV090x_RPTLEVEL_128    = 1,
++      STV090x_RPTLEVEL_64     = 2,
++      STV090x_RPTLEVEL_32     = 3,
++      STV090x_RPTLEVEL_16     = 4,
++      STV090x_RPTLEVEL_8      = 5,
++      STV090x_RPTLEVEL_4      = 6,
++      STV090x_RPTLEVEL_2      = 7,
++};
++
++enum stv090x_adc_range {
++      STV090x_ADC_2Vpp        = 0,
++      STV090x_ADC_1Vpp        = 1
++};
++
++struct stv090x_config {
++      enum stv090x_device     device;
++      enum stv090x_mode       demod_mode;
++      enum stv090x_clkmode    clk_mode;
++
++      u32 xtal; /* default: 8000000 */
++      u8 address; /* default: 0x68 */
++
++      u8 ts1_mode;
++      u8 ts2_mode;
++      u32 ts1_clk;
++      u32 ts2_clk;
++
++      enum stv090x_i2crpt     repeater_level;
++
++      u8                      tuner_bbgain; /* default: 10db */
++      enum stv090x_adc_range  adc1_range; /* default: 2Vpp */
++      enum stv090x_adc_range  adc2_range; /* default: 2Vpp */
++
++      bool diseqc_envelope_mode;
++
++      int (*tuner_init) (struct dvb_frontend *fe);
++      int (*tuner_sleep) (struct dvb_frontend *fe);
++      int (*tuner_set_mode) (struct dvb_frontend *fe, enum tuner_mode mode);
++      int (*tuner_set_frequency) (struct dvb_frontend *fe, u32 frequency);
++      int (*tuner_get_frequency) (struct dvb_frontend *fe, u32 *frequency);
++      int (*tuner_set_bandwidth) (struct dvb_frontend *fe, u32 bandwidth);
++      int (*tuner_get_bandwidth) (struct dvb_frontend *fe, u32 *bandwidth);
++      int (*tuner_set_bbgain) (struct dvb_frontend *fe, u32 gain);
++      int (*tuner_get_bbgain) (struct dvb_frontend *fe, u32 *gain);
++      int (*tuner_set_refclk)  (struct dvb_frontend *fe, u32 refclk);
++      int (*tuner_get_status) (struct dvb_frontend *fe, u32 *status);
++};
++
++#if defined(CONFIG_DVB_STV090x) || (defined(CONFIG_DVB_STV090x_MODULE) && defined(MODULE))
++
++extern struct dvb_frontend *stv090x_attach(const struct stv090x_config *config,
++                                         struct i2c_adapter *i2c,
++                                         enum stv090x_demodulator demod);
++#else
++
++static inline struct dvb_frontend *stv090x_attach(const struct stv090x_config *config,
++                                                struct i2c_adapter *i2c,
++                                                enum stv090x_demodulator demod)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return NULL;
++}
++#endif /* CONFIG_DVB_STV090x */
++
++#endif /* __STV090x_H */
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/stv090x_priv.h linux-2.6.18/drivers/media/dvb/frontends/stv090x_priv.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/stv090x_priv.h       1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/stv090x_priv.h    2010-09-09 12:38:50.000000000 +0000
+@@ -0,0 +1,279 @@
++/*
++      STV0900/0903 Multistandard Broadcast Frontend driver
++      Copyright (C) Manu Abraham <abraham.manu@gmail.com>
++
++      Copyright (C) ST Microelectronics
++
++      This program is free software; you can redistribute it and/or modify
++      it under the terms of the GNU General Public License as published by
++      the Free Software Foundation; either version 2 of the License, or
++      (at your option) any later version.
++
++      This program is distributed in the hope that it will be useful,
++      but WITHOUT ANY WARRANTY; without even the implied warranty of
++      MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++      GNU General Public License for more details.
++
++      You should have received a copy of the GNU General Public License
++      along with this program; if not, write to the Free Software
++      Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++*/
++
++#ifndef __STV090x_PRIV_H
++#define __STV090x_PRIV_H
++
++#include "dvb_frontend.h"
++
++#define FE_ERROR                              0
++#define FE_NOTICE                             1
++#define FE_INFO                                       2
++#define FE_DEBUG                              3
++#define FE_DEBUGREG                           4
++
++#define dprintk(__y, __z, format, arg...) do {                                                \
++      if (__z) {                                                                      \
++              if      ((verbose > FE_ERROR) && (verbose > __y))                       \
++                      printk(KERN_ERR "%s: " format "\n", __func__ , ##arg);          \
++              else if ((verbose > FE_NOTICE) && (verbose > __y))                      \
++                      printk(KERN_NOTICE "%s: " format "\n", __func__ , ##arg);       \
++              else if ((verbose > FE_INFO) && (verbose > __y))                        \
++                      printk(KERN_INFO "%s: " format "\n", __func__ , ##arg);         \
++              else if ((verbose > FE_DEBUG) && (verbose > __y))                       \
++                      printk(KERN_DEBUG "%s: " format "\n", __func__ , ##arg);        \
++      } else {                                                                        \
++              if (verbose > __y)                                                      \
++                      printk(format, ##arg);                                          \
++      }                                                                               \
++} while (0)
++
++#define STV090x_READ_DEMOD(__state, __reg) ((                 \
++      (__state)->demod == STV090x_DEMODULATOR_1)      ?       \
++      stv090x_read_reg(__state, STV090x_P2_##__reg) :         \
++      stv090x_read_reg(__state, STV090x_P1_##__reg))
++
++#define STV090x_WRITE_DEMOD(__state, __reg, __data) ((                \
++      (__state)->demod == STV090x_DEMODULATOR_1)      ?       \
++      stv090x_write_reg(__state, STV090x_P2_##__reg, __data) :\
++      stv090x_write_reg(__state, STV090x_P1_##__reg, __data))
++
++#define STV090x_ADDR_OFFST(__state, __x) ((                   \
++      (__state->demod) == STV090x_DEMODULATOR_1)      ?       \
++              STV090x_P1_##__x :                              \
++              STV090x_P2_##__x)
++
++
++#define STV090x_SETFIELD(mask, bitf, val)     (mask = (mask & (~(((1 << STV090x_WIDTH_##bitf) - 1) <<\
++                                                       STV090x_OFFST_##bitf))) | \
++                                                       (val << STV090x_OFFST_##bitf))
++
++#define STV090x_GETFIELD(val, bitf)           ((val >> STV090x_OFFST_##bitf) & ((1 << STV090x_WIDTH_##bitf) - 1))
++
++
++#define STV090x_SETFIELD_Px(mask, bitf, val)  (mask = (mask & (~(((1 << STV090x_WIDTH_Px_##bitf) - 1) <<\
++                                                       STV090x_OFFST_Px_##bitf))) | \
++                                                       (val << STV090x_OFFST_Px_##bitf))
++
++#define STV090x_GETFIELD_Px(val, bitf)                ((val >> STV090x_OFFST_Px_##bitf) & ((1 << STV090x_WIDTH_Px_##bitf) - 1))
++
++#define MAKEWORD16(__a, __b)                  (((__a) << 8) | (__b))
++
++#define MSB(__x)                              ((__x >> 8) & 0xff)
++#define LSB(__x)                              (__x & 0xff)
++
++
++#define STV090x_IQPOWER_THRESHOLD       30
++#define STV090x_SEARCH_AGC2_TH_CUT20   700
++#define STV090x_SEARCH_AGC2_TH_CUT30  1400
++
++#define STV090x_SEARCH_AGC2_TH(__ver) \
++      ((__ver <= 0x20) ?              \
++      STV090x_SEARCH_AGC2_TH_CUT20 :  \
++      STV090x_SEARCH_AGC2_TH_CUT30)
++
++enum stv090x_signal_state {
++      STV090x_NOAGC1,
++      STV090x_NOCARRIER,
++      STV090x_NODATA,
++      STV090x_DATAOK,
++      STV090x_RANGEOK,
++      STV090x_OUTOFRANGE
++};
++
++enum stv090x_fec {
++      STV090x_PR12 = 0,
++      STV090x_PR23,
++      STV090x_PR34,
++      STV090x_PR45,
++      STV090x_PR56,
++      STV090x_PR67,
++      STV090x_PR78,
++      STV090x_PR89,
++      STV090x_PR910,
++      STV090x_PRERR
++};
++
++enum stv090x_modulation {
++      STV090x_QPSK,
++      STV090x_8PSK,
++      STV090x_16APSK,
++      STV090x_32APSK,
++      STV090x_UNKNOWN
++};
++
++enum stv090x_frame {
++      STV090x_LONG_FRAME,
++      STV090x_SHORT_FRAME
++};
++
++enum stv090x_pilot {
++      STV090x_PILOTS_OFF,
++      STV090x_PILOTS_ON
++};
++
++enum stv090x_rolloff {
++      STV090x_RO_35,
++      STV090x_RO_25,
++      STV090x_RO_20
++};
++
++enum stv090x_inversion {
++      STV090x_IQ_AUTO,
++      STV090x_IQ_NORMAL,
++      STV090x_IQ_SWAP
++};
++
++enum stv090x_modcod {
++      STV090x_DUMMY_PLF = 0,
++      STV090x_QPSK_14,
++      STV090x_QPSK_13,
++      STV090x_QPSK_25,
++      STV090x_QPSK_12,
++      STV090x_QPSK_35,
++      STV090x_QPSK_23,
++      STV090x_QPSK_34,
++      STV090x_QPSK_45,
++      STV090x_QPSK_56,
++      STV090x_QPSK_89,
++      STV090x_QPSK_910,
++      STV090x_8PSK_35,
++      STV090x_8PSK_23,
++      STV090x_8PSK_34,
++      STV090x_8PSK_56,
++      STV090x_8PSK_89,
++      STV090x_8PSK_910,
++      STV090x_16APSK_23,
++      STV090x_16APSK_34,
++      STV090x_16APSK_45,
++      STV090x_16APSK_56,
++      STV090x_16APSK_89,
++      STV090x_16APSK_910,
++      STV090x_32APSK_34,
++      STV090x_32APSK_45,
++      STV090x_32APSK_56,
++      STV090x_32APSK_89,
++      STV090x_32APSK_910,
++      STV090x_MODCODE_UNKNOWN
++};
++
++enum stv090x_search {
++      STV090x_SEARCH_DSS = 0,
++      STV090x_SEARCH_DVBS1,
++      STV090x_SEARCH_DVBS2,
++      STV090x_SEARCH_AUTO
++};
++
++enum stv090x_algo {
++      STV090x_BLIND_SEARCH,
++      STV090x_COLD_SEARCH,
++      STV090x_WARM_SEARCH
++};
++
++enum stv090x_delsys {
++      STV090x_ERROR = 0,
++      STV090x_DVBS1 = 1,
++      STV090x_DVBS2,
++      STV090x_DSS
++};
++
++struct stv090x_long_frame_crloop {
++      enum stv090x_modcod     modcod;
++
++      u8 crl_pilots_on_2;
++      u8 crl_pilots_off_2;
++      u8 crl_pilots_on_5;
++      u8 crl_pilots_off_5;
++      u8 crl_pilots_on_10;
++      u8 crl_pilots_off_10;
++      u8 crl_pilots_on_20;
++      u8 crl_pilots_off_20;
++      u8 crl_pilots_on_30;
++      u8 crl_pilots_off_30;
++};
++
++struct stv090x_short_frame_crloop {
++      enum stv090x_modulation modulation;
++
++      u8 crl_2;  /*      SR <   3M */
++      u8 crl_5;  /*  3 < SR <=  7M */
++      u8 crl_10; /*  7 < SR <= 15M */
++      u8 crl_20; /* 10 < SR <= 25M */
++      u8 crl_30; /* 10 < SR <= 45M */
++};
++
++struct stv090x_reg {
++      u16 addr;
++      u8  data;
++};
++
++struct stv090x_tab {
++      s32 real;
++      s32 read;
++};
++
++struct stv090x_internal {
++      struct i2c_adapter      *i2c_adap;
++      u8                      i2c_addr;
++
++      struct mutex            demod_lock; /* Lock access to shared register */
++      struct mutex            tuner_lock; /* Lock access to tuners */
++      s32                     mclk; /* Masterclock Divider factor */
++      u32                     dev_ver;
++
++      int                     num_used;
++};
++
++struct stv090x_state {
++      enum stv090x_device             device;
++      enum stv090x_demodulator        demod;
++      enum stv090x_mode               demod_mode;
++      struct stv090x_internal         *internal;
++
++      struct i2c_adapter              *i2c;
++      const struct stv090x_config     *config;
++      struct dvb_frontend             frontend;
++
++      u32                             *verbose; /* Cached module verbosity */
++
++      enum stv090x_delsys             delsys;
++      enum stv090x_fec                fec;
++      enum stv090x_modulation         modulation;
++      enum stv090x_modcod             modcod;
++      enum stv090x_search             search_mode;
++      enum stv090x_frame              frame_len;
++      enum stv090x_pilot              pilots;
++      enum stv090x_rolloff            rolloff;
++      enum stv090x_inversion          inversion;
++      enum stv090x_algo               algo;
++
++      u32                             frequency;
++      u32                             srate;
++
++      s32                             tuner_bw;
++
++      s32                             search_range;
++
++      s32                             DemodTimeout;
++      s32                             FecTimeout;
++};
++
++#endif /* __STV090x_PRIV_H */
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/stv090x_reg.h linux-2.6.18/drivers/media/dvb/frontends/stv090x_reg.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/stv090x_reg.h        1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/stv090x_reg.h     2010-09-09 12:38:50.000000000 +0000
+@@ -0,0 +1,2371 @@
++/*
++      STV0900/0903 Multistandard Broadcast Frontend driver
++      Copyright (C) Manu Abraham <abraham.manu@gmail.com>
++
++      Copyright (C) ST Microelectronics
++
++      This program is free software; you can redistribute it and/or modify
++      it under the terms of the GNU General Public License as published by
++      the Free Software Foundation; either version 2 of the License, or
++      (at your option) any later version.
++
++      This program is distributed in the hope that it will be useful,
++      but WITHOUT ANY WARRANTY; without even the implied warranty of
++      MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++      GNU General Public License for more details.
++
++      You should have received a copy of the GNU General Public License
++      along with this program; if not, write to the Free Software
++      Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++*/
++
++#ifndef __STV090x_REG_H
++#define __STV090x_REG_H
++
++#define STV090x_MID                           0xf100
++#define STV090x_OFFST_MCHIP_IDENT_FIELD               4
++#define STV090x_WIDTH_MCHIP_IDENT_FIELD               4
++#define STV090x_OFFST_MRELEASE_FIELD          0
++#define STV090x_WIDTH_MRELEASE_FIELD          4
++
++#define STV090x_DACR1                         0xf113
++#define STV090x_OFFST_DACR1_MODE_FIELD                5
++#define STV090x_WIDTH_DACR1_MODE_FIELD                3
++#define STV090x_OFFST_DACR1_VALUE_FIELD               0
++#define STV090x_WIDTH_DACR1_VALUE_FIELD               4
++
++#define STV090x_DACR2                         0xf114
++#define STV090x_OFFST_DACR2_VALUE_FIELD               0
++#define STV090x_WIDTH_DACR2_VALUE_FIELD               8
++
++#define STV090x_OUTCFG                                0xf11c
++#define STV090x_OFFST_OUTSERRS1_HZ_FIELD      6
++#define STV090x_WIDTH_OUTSERRS1_HZ_FIELD      1
++#define STV090x_OFFST_OUTSERRS2_HZ_FIELD      5
++#define STV090x_WIDTH_OUTSERRS2_HZ_FIELD      1
++#define STV090x_OFFST_OUTSERRS3_HZ_FIELD      4
++#define STV090x_WIDTH_OUTSERRS3_HZ_FIELD      1
++#define STV090x_OFFST_OUTPARRS3_HZ_FIELD      3
++#define STV090x_WIDTH_OUTPARRS3_HZ_FIELD      1
++
++#define STV090x_MODECFG                               0xf11d
++
++#define STV090x_IRQSTATUS3                    0xf120
++#define STV090x_OFFST_SPLL_LOCK_FIELD         5
++#define STV090x_WIDTH_SPLL_LOCK_FIELD         1
++#define STV090x_OFFST_SSTREAM_LCK_3_FIELD     4
++#define STV090x_WIDTH_SSTREAM_LCK_3_FIELD     1
++#define STV090x_OFFST_SSTREAM_LCK_2_FIELD     3
++#define STV090x_WIDTH_SSTREAM_LCK_2_FIELD     1
++#define STV090x_OFFST_SSTREAM_LCK_1_FIELD     2
++#define STV090x_WIDTH_SSTREAM_LCK_1_FIELD     1
++#define STV090x_OFFST_SDVBS1_PRF_2_FIELD      1
++#define STV090x_WIDTH_SDVBS1_PRF_2_FIELD      1
++#define STV090x_OFFST_SDVBS1_PRF_1_FIELD      0
++#define STV090x_WIDTH_SDVBS1_PRF_1_FIELD      1
++
++#define STV090x_IRQSTATUS2                    0xf121
++#define STV090x_OFFST_SSPY_ENDSIM_3_FIELD     7
++#define STV090x_WIDTH_SSPY_ENDSIM_3_FIELD     1
++#define STV090x_OFFST_SSPY_ENDSIM_2_FIELD     6
++#define STV090x_WIDTH_SSPY_ENDSIM_2_FIELD     1
++#define STV090x_OFFST_SSPY_ENDSIM_1_FIELD     5
++#define STV090x_WIDTH_SSPY_ENDSIM_1_FIELD     1
++#define STV090x_OFFST_SPKTDEL_ERROR_2_FIELD   4
++#define STV090x_WIDTH_SPKTDEL_ERROR_2_FIELD   1
++#define STV090x_OFFST_SPKTDEL_LOCKB_2_FIELD   3
++#define STV090x_WIDTH_SPKTDEL_LOCKB_2_FIELD   1
++#define STV090x_OFFST_SPKTDEL_LOCK_2_FIELD    2
++#define STV090x_WIDTH_SPKTDEL_LOCK_2_FIELD    1
++#define STV090x_OFFST_SPKTDEL_ERROR_1_FIELD   1
++#define STV090x_WIDTH_SPKTDEL_ERROR_1_FIELD   1
++#define STV090x_OFFST_SPKTDEL_LOCKB_1_FIELD   0
++#define STV090x_WIDTH_SPKTDEL_LOCKB_1_FIELD   1
++
++#define STV090x_IRQSTATUS1                    0xf122
++#define STV090x_OFFST_SPKTDEL_LOCK_1_FIELD    7
++#define STV090x_WIDTH_SPKTDEL_LOCK_1_FIELD    1
++#define STV090x_OFFST_SDEMOD_LOCKB_2_FIELD    2
++#define STV090x_WIDTH_SDEMOD_LOCKB_2_FIELD    1
++#define STV090x_OFFST_SDEMOD_LOCK_2_FIELD     1
++#define STV090x_WIDTH_SDEMOD_LOCK_2_FIELD     1
++#define STV090x_OFFST_SDEMOD_IRQ_2_FIELD      0
++#define STV090x_WIDTH_SDEMOD_IRQ_2_FIELD      1
++
++#define STV090x_IRQSTATUS0                    0xf123
++#define STV090x_OFFST_SDEMOD_LOCKB_1_FIELD    7
++#define STV090x_WIDTH_SDEMOD_LOCKB_1_FIELD    1
++#define STV090x_OFFST_SDEMOD_LOCK_1_FIELD     6
++#define STV090x_WIDTH_SDEMOD_LOCK_1_FIELD     1
++#define STV090x_OFFST_SDEMOD_IRQ_1_FIELD      5
++#define STV090x_WIDTH_SDEMOD_IRQ_1_FIELD      1
++#define STV090x_OFFST_SBCH_ERRFLAG_FIELD      4
++#define STV090x_WIDTH_SBCH_ERRFLAG_FIELD      1
++#define STV090x_OFFST_SDISEQC2RX_IRQ_FIELD    3
++#define STV090x_WIDTH_SDISEQC2RX_IRQ_FIELD    1
++#define STV090x_OFFST_SDISEQC2TX_IRQ_FIELD    2
++#define STV090x_WIDTH_SDISEQC2TX_IRQ_FIELD    1
++#define STV090x_OFFST_SDISEQC1RX_IRQ_FIELD    1
++#define STV090x_WIDTH_SDISEQC1RX_IRQ_FIELD    1
++#define STV090x_OFFST_SDISEQC1TX_IRQ_FIELD    0
++#define STV090x_WIDTH_SDISEQC1TX_IRQ_FIELD    1
++
++#define STV090x_IRQMASK3                      0xf124
++#define STV090x_OFFST_MPLL_LOCK_FIELD         5
++#define STV090x_WIDTH_MPLL_LOCK_FIELD         1
++#define STV090x_OFFST_MSTREAM_LCK_3_FIELD     4
++#define STV090x_WIDTH_MSTREAM_LCK_3_FIELD     1
++#define STV090x_OFFST_MSTREAM_LCK_2_FIELD     3
++#define STV090x_WIDTH_MSTREAM_LCK_2_FIELD     1
++#define STV090x_OFFST_MSTREAM_LCK_1_FIELD     2
++#define STV090x_WIDTH_MSTREAM_LCK_1_FIELD     1
++#define STV090x_OFFST_MDVBS1_PRF_2_FIELD      1
++#define STV090x_WIDTH_MDVBS1_PRF_2_FIELD      1
++#define STV090x_OFFST_MDVBS1_PRF_1_FIELD      0
++#define STV090x_WIDTH_MDVBS1_PRF_1_FIELD      1
++
++#define STV090x_IRQMASK2                      0xf125
++#define STV090x_OFFST_MSPY_ENDSIM_3_FIELD     7
++#define STV090x_WIDTH_MSPY_ENDSIM_3_FIELD     1
++#define STV090x_OFFST_MSPY_ENDSIM_2_FIELD     6
++#define STV090x_WIDTH_MSPY_ENDSIM_2_FIELD     1
++#define STV090x_OFFST_MSPY_ENDSIM_1_FIELD     5
++#define STV090x_WIDTH_MSPY_ENDSIM_1_FIELD     1
++#define STV090x_OFFST_MPKTDEL_ERROR_2_FIELD   4
++#define STV090x_WIDTH_MPKTDEL_ERROR_2_FIELD   1
++#define STV090x_OFFST_MPKTDEL_LOCKB_2_FIELD   3
++#define STV090x_WIDTH_MPKTDEL_LOCKB_2_FIELD   1
++#define STV090x_OFFST_MPKTDEL_LOCK_2_FIELD    2
++#define STV090x_WIDTH_MPKTDEL_LOCK_2_FIELD    1
++#define STV090x_OFFST_MPKTDEL_ERROR_1_FIELD   1
++#define STV090x_WIDTH_MPKTDEL_ERROR_1_FIELD   1
++#define STV090x_OFFST_MPKTDEL_LOCKB_1_FIELD   0
++#define STV090x_WIDTH_MPKTDEL_LOCKB_1_FIELD   1
++
++#define STV090x_IRQMASK1                      0xf126
++#define STV090x_OFFST_MPKTDEL_LOCK_1_FIELD    7
++#define STV090x_WIDTH_MPKTDEL_LOCK_1_FIELD    1
++#define STV090x_OFFST_MEXTPINB2_FIELD         6
++#define STV090x_WIDTH_MEXTPINB2_FIELD         1
++#define STV090x_OFFST_MEXTPIN2_FIELD          5
++#define STV090x_WIDTH_MEXTPIN2_FIELD          1
++#define STV090x_OFFST_MEXTPINB1_FIELD         4
++#define STV090x_WIDTH_MEXTPINB1_FIELD         1
++#define STV090x_OFFST_MEXTPIN1_FIELD          3
++#define STV090x_WIDTH_MEXTPIN1_FIELD          1
++#define STV090x_OFFST_MDEMOD_LOCKB_2_FIELD    2
++#define STV090x_WIDTH_MDEMOD_LOCKB_2_FIELD    1
++#define STV090x_OFFST_MDEMOD_LOCK_2_FIELD     1
++#define STV090x_WIDTH_MDEMOD_LOCK_2_FIELD     1
++#define STV090x_OFFST_MDEMOD_IRQ_2_FIELD      0
++#define STV090x_WIDTH_MDEMOD_IRQ_2_FIELD      1
++
++#define STV090x_IRQMASK0                      0xf127
++#define STV090x_OFFST_MDEMOD_LOCKB_1_FIELD    7
++#define STV090x_WIDTH_MDEMOD_LOCKB_1_FIELD    1
++#define STV090x_OFFST_MDEMOD_LOCK_1_FIELD     6
++#define STV090x_WIDTH_MDEMOD_LOCK_1_FIELD     1
++#define STV090x_OFFST_MDEMOD_IRQ_1_FIELD      5
++#define STV090x_WIDTH_MDEMOD_IRQ_1_FIELD      1
++#define STV090x_OFFST_MBCH_ERRFLAG_FIELD      4
++#define STV090x_WIDTH_MBCH_ERRFLAG_FIELD      1
++#define STV090x_OFFST_MDISEQC2RX_IRQ_FIELD    3
++#define STV090x_WIDTH_MDISEQC2RX_IRQ_FIELD    1
++#define STV090x_OFFST_MDISEQC2TX_IRQ_FIELD    2
++#define STV090x_WIDTH_MDISEQC2TX_IRQ_FIELD    1
++#define STV090x_OFFST_MDISEQC1RX_IRQ_FIELD    1
++#define STV090x_WIDTH_MDISEQC1RX_IRQ_FIELD    1
++#define STV090x_OFFST_MDISEQC1TX_IRQ_FIELD    0
++#define STV090x_WIDTH_MDISEQC1TX_IRQ_FIELD    1
++
++#define STV090x_I2CCFG                                0xf129
++#define STV090x_OFFST_12C_FASTMODE_FIELD      3
++#define STV090x_WIDTH_12C_FASTMODE_FIELD      1
++#define STV090x_OFFST_12CADDR_INC_FIELD               0
++#define STV090x_WIDTH_12CADDR_INC_FIELD               2
++
++#define STV090x_Px_I2CRPT(__x)                        (0xf12a + (__x - 1) * 0x1)
++#define STV090x_P1_I2CRPT                     STV090x_Px_I2CRPT(1)
++#define STV090x_P2_I2CRPT                     STV090x_Px_I2CRPT(2)
++#define STV090x_OFFST_Px_I2CT_ON_FIELD                7
++#define STV090x_WIDTH_Px_I2CT_ON_FIELD                1
++#define STV090x_OFFST_Px_ENARPT_LEVEL_FIELD   4
++#define STV090x_WIDTH_Px_ENARPT_LEVEL_FIELD   3
++#define STV090x_OFFST_Px_SCLT_DELAY_FIELD     3
++#define STV090x_WIDTH_Px_SCLT_DELAY_FIELD     1
++#define STV090x_OFFST_Px_STOP_ENABLE_FIELD    2
++#define STV090x_WIDTH_Px_STOP_ENABLE_FIELD    1
++#define STV090x_OFFST_Px_STOP_SDAT2SDA_FIELD  1
++#define STV090x_WIDTH_Px_STOP_SDAT2SDA_FIELD  1
++
++#define STV090x_CLKI2CFG                      0xf140
++#define STV090x_OFFST_CLKI2_OPD_FIELD         7
++#define STV090x_WIDTH_CLKI2_OPD_FIELD         1
++#define STV090x_OFFST_CLKI2_CONFIG_FIELD      1
++#define STV090x_WIDTH_CLKI2_CONFIG_FIELD      6
++#define STV090x_OFFST_CLKI2_XOR_FIELD         0
++#define STV090x_WIDTH_CLKI2_XOR_FIELD         1
++
++#define STV090x_GPIOxCFG(__x)                 (0xf141 + (__x - 1))
++#define STV090x_GPIO1CFG                      STV090x_GPIOxCFG(1)
++#define STV090x_GPIO2CFG                      STV090x_GPIOxCFG(2)
++#define STV090x_GPIO3CFG                      STV090x_GPIOxCFG(3)
++#define STV090x_GPIO4CFG                      STV090x_GPIOxCFG(4)
++#define STV090x_GPIO5CFG                      STV090x_GPIOxCFG(5)
++#define STV090x_GPIO6CFG                      STV090x_GPIOxCFG(6)
++#define STV090x_GPIO7CFG                      STV090x_GPIOxCFG(7)
++#define STV090x_GPIO8CFG                      STV090x_GPIOxCFG(8)
++#define STV090x_GPIO9CFG                      STV090x_GPIOxCFG(9)
++#define STV090x_GPIO10CFG                     STV090x_GPIOxCFG(10)
++#define STV090x_GPIO11CFG                     STV090x_GPIOxCFG(11)
++#define STV090x_GPIO12CFG                     STV090x_GPIOxCFG(12)
++#define STV090x_GPIO13CFG                     STV090x_GPIOxCFG(13)
++#define STV090x_OFFST_GPIOx_OPD_FIELD         7
++#define STV090x_WIDTH_GPIOx_OPD_FIELD         1
++#define STV090x_OFFST_GPIOx_CONFIG_FIELD      1
++#define STV090x_WIDTH_GPIOx_CONFIG_FIELD      6
++#define STV090x_OFFST_GPIOx_XOR_FIELD         0
++#define STV090x_WIDTH_GPIOx_XOR_FIELD         1
++
++#define STV090x_CSxCFG(__x)                   (0xf14e + __x * 0x1)
++#define STV090x_CS0CFG                                STV090x_CSxCFG(0)
++#define STV090x_CS1CFG                                STV090x_CSxCFG(1)
++#define STV090x_OFFST_CSX_OPD_FIELD           7
++#define STV090x_WIDTH_CSX_OPD_FIELD           1
++#define STV090x_OFFST_CSX_CONFIG_FIELD                1
++#define STV090x_WIDTH_CSX_CONFIG_FIELD                6
++#define STV090x_OFFST_CSX_XOR_FIELD           0
++#define STV090x_WIDTH_CSX_XOR_FIELD           1
++
++
++#define STV090x_STDBYCFG                      0xf150
++#define STV090x_OFFST_STDBY_OPD_FIELD         7
++#define STV090x_WIDTH_STDBY_OPD_FIELD         1
++#define STV090x_OFFST_STDBY_CONFIG_FIELD      1
++#define STV090x_WIDTH_STDBY_CONFIG_FIELD      6
++#define STV090x_OFFST_STDBY_XOR_FIELD         0
++#define STV090x_WIDTH_STDBY_XOR_FIELD         1
++
++#define STV090x_DIRCLKCFG                     0xf151
++#define STV090x_OFFST_DIRCLK_OPD_FIELD                7
++#define STV090x_WIDTH_DIRCLK_OPD_FIELD                1
++#define STV090x_OFFST_DIRCLK_CONFIG_FIELD     1
++#define STV090x_WIDTH_DIRCLK_CONFIG_FIELD     6
++#define STV090x_OFFST_DIRCLK_XOR_FIELD                0
++#define STV090x_WIDTH_DIRCLK_XOR_FIELD                1
++
++
++#define STV090x_AGCRFxCFG(__x)                        (0xf152 + (__x - 1) * 0x4)
++#define STV090x_AGCRF1CFG                     STV090x_AGCRFxCFG(1)
++#define STV090x_AGCRF2CFG                     STV090x_AGCRFxCFG(2)
++#define STV090x_OFFST_AGCRFx_OPD_FIELD                7
++#define STV090x_WIDTH_AGCRFx_OPD_FIELD                1
++#define STV090x_OFFST_AGCRFx_CONFIG_FIELD     1
++#define STV090x_WIDTH_AGCRFx_CONFIG_FIELD     6
++#define STV090x_OFFST_AGCRFx_XOR_FIELD                0
++#define STV090x_WIDTH_AGCRFx_XOR_FIELD                1
++
++#define STV090x_SDATxCFG(__x)                 (0xf153 + (__x - 1) * 0x4)
++#define STV090x_SDAT1CFG                      STV090x_SDATxCFG(1)
++#define STV090x_SDAT2CFG                      STV090x_SDATxCFG(2)
++#define STV090x_OFFST_SDATx_OPD_FIELD         7
++#define STV090x_WIDTH_SDATx_OPD_FIELD         1
++#define STV090x_OFFST_SDATx_CONFIG_FIELD      1
++#define STV090x_WIDTH_SDATx_CONFIG_FIELD      6
++#define STV090x_OFFST_SDATx_XOR_FIELD         0
++#define STV090x_WIDTH_SDATx_XOR_FIELD         1
++
++#define STV090x_SCLTxCFG(__x)                 (0xf154 + (__x - 1) * 0x4)
++#define STV090x_SCLT1CFG                      STV090x_SCLTxCFG(1)
++#define STV090x_SCLT2CFG                      STV090x_SCLTxCFG(2)
++#define STV090x_OFFST_SCLTx_OPD_FIELD         7
++#define STV090x_WIDTH_SCLTx_OPD_FIELD         1
++#define STV090x_OFFST_SCLTx_CONFIG_FIELD      1
++#define STV090x_WIDTH_SCLTx_CONFIG_FIELD      6
++#define STV090x_OFFST_SCLTx_XOR_FIELD         0
++#define STV090x_WIDTH_SCLTx_XOR_FIELD         1
++
++#define STV090x_DISEQCOxCFG(__x)              (0xf155 + (__x - 1) * 0x4)
++#define STV090x_DISEQCO1CFG                   STV090x_DISEQCOxCFG(1)
++#define STV090x_DISEQCO2CFG                   STV090x_DISEQCOxCFG(2)
++#define STV090x_OFFST_DISEQCOx_OPD_FIELD      7
++#define STV090x_WIDTH_DISEQCOx_OPD_FIELD      1
++#define STV090x_OFFST_DISEQCOx_CONFIG_FIELD   1
++#define STV090x_WIDTH_DISEQCOx_CONFIG_FIELD   6
++#define STV090x_OFFST_DISEQCOx_XOR_FIELD      0
++#define STV090x_WIDTH_DISEQCOx_XOR_FIELD      1
++
++#define STV090x_CLKOUT27CFG                   0xf15a
++#define STV090x_OFFST_CLKOUT27_OPD_FIELD      7
++#define STV090x_WIDTH_CLKOUT27_OPD_FIELD      1
++#define STV090x_OFFST_CLKOUT27_CONFIG_FIELD   1
++#define STV090x_WIDTH_CLKOUT27_CONFIG_FIELD   6
++#define STV090x_OFFST_CLKOUT27_XOR_FIELD      0
++#define STV090x_WIDTH_CLKOUT27_XOR_FIELD      1
++
++#define STV090x_ERRORxCFG(__x)                        (0xf15b + (__x - 1) * 0x5)
++#define STV090x_ERROR1CFG                     STV090x_ERRORxCFG(1)
++#define STV090x_ERROR2CFG                     STV090x_ERRORxCFG(2)
++#define STV090x_ERROR3CFG                     STV090x_ERRORxCFG(3)
++#define STV090x_OFFST_ERRORx_OPD_FIELD                7
++#define STV090x_WIDTH_ERRORx_OPD_FIELD                1
++#define STV090x_OFFST_ERRORx_CONFIG_FIELD     1
++#define STV090x_WIDTH_ERRORx_CONFIG_FIELD     6
++#define STV090x_OFFST_ERRORx_XOR_FIELD                0
++#define STV090x_WIDTH_ERRORx_XOR_FIELD                1
++
++#define STV090x_DPNxCFG(__x)                  (0xf15c + (__x - 1) * 0x5)
++#define STV090x_DPN1CFG                               STV090x_DPNxCFG(1)
++#define STV090x_DPN2CFG                               STV090x_DPNxCFG(2)
++#define STV090x_DPN3CFG                               STV090x_DPNxCFG(3)
++#define STV090x_OFFST_DPNx_OPD_FIELD          7
++#define STV090x_WIDTH_DPNx_OPD_FIELD          1
++#define STV090x_OFFST_DPNx_CONFIG_FIELD               1
++#define STV090x_WIDTH_DPNx_CONFIG_FIELD               6
++#define STV090x_OFFST_DPNx_XOR_FIELD          0
++#define STV090x_WIDTH_DPNx_XOR_FIELD          1
++
++#define STV090x_STROUTxCFG(__x)                       (0xf15d + (__x - 1) * 0x5)
++#define STV090x_STROUT1CFG                    STV090x_STROUTxCFG(1)
++#define STV090x_STROUT2CFG                    STV090x_STROUTxCFG(2)
++#define STV090x_STROUT3CFG                    STV090x_STROUTxCFG(3)
++#define STV090x_OFFST_STROUTx_OPD_FIELD               7
++#define STV090x_WIDTH_STROUTx_OPD_FIELD               1
++#define STV090x_OFFST_STROUTx_CONFIG_FIELD    1
++#define STV090x_WIDTH_STROUTx_CONFIG_FIELD    6
++#define STV090x_OFFST_STROUTx_XOR_FIELD               0
++#define STV090x_WIDTH_STROUTx_XOR_FIELD               1
++
++#define STV090x_CLKOUTxCFG(__x)                       (0xf15e + (__x - 1) * 0x5)
++#define STV090x_CLKOUT1CFG                    STV090x_CLKOUTxCFG(1)
++#define STV090x_CLKOUT2CFG                    STV090x_CLKOUTxCFG(2)
++#define STV090x_CLKOUT3CFG                    STV090x_CLKOUTxCFG(3)
++#define STV090x_OFFST_CLKOUTx_OPD_FIELD               7
++#define STV090x_WIDTH_CLKOUTx_OPD_FIELD               1
++#define STV090x_OFFST_CLKOUTx_CONFIG_FIELD    1
++#define STV090x_WIDTH_CLKOUTx_CONFIG_FIELD    6
++#define STV090x_OFFST_CLKOUTx_XOR_FIELD               0
++#define STV090x_WIDTH_CLKOUTx_XOR_FIELD               1
++
++#define STV090x_DATAxCFG(__x)                 (0xf15f + (__x - 71) * 0x5)
++#define STV090x_DATA71CFG                     STV090x_DATAxCFG(71)
++#define STV090x_DATA72CFG                     STV090x_DATAxCFG(72)
++#define STV090x_DATA73CFG                     STV090x_DATAxCFG(73)
++#define STV090x_OFFST_DATAx_OPD_FIELD         7
++#define STV090x_WIDTH_DATAx_OPD_FIELD         1
++#define STV090x_OFFST_DATAx_CONFIG_FIELD      1
++#define STV090x_WIDTH_DATAx_CONFIG_FIELD      6
++#define STV090x_OFFST_DATAx_XOR_FIELD         0
++#define STV090x_WIDTH_DATAx_XOR_FIELD         1
++
++#define STV090x_NCOARSE                               0xf1b3
++#define STV090x_OFFST_M_DIV_FIELD             0
++#define STV090x_WIDTH_M_DIV_FIELD             8
++
++#define STV090x_SYNTCTRL                      0xf1b6
++#define STV090x_OFFST_STANDBY_FIELD           7
++#define STV090x_WIDTH_STANDBY_FIELD           1
++#define STV090x_OFFST_BYPASSPLLCORE_FIELD     6
++#define STV090x_WIDTH_BYPASSPLLCORE_FIELD     1
++#define STV090x_OFFST_SELX1RATIO_FIELD                5
++#define STV090x_WIDTH_SELX1RATIO_FIELD                1
++#define STV090x_OFFST_STOP_PLL_FIELD          3
++#define STV090x_WIDTH_STOP_PLL_FIELD          1
++#define STV090x_OFFST_BYPASSPLLFSK_FIELD      2
++#define STV090x_WIDTH_BYPASSPLLFSK_FIELD      1
++#define STV090x_OFFST_SELOSCI_FIELD           1
++#define STV090x_WIDTH_SELOSCI_FIELD           1
++#define STV090x_OFFST_BYPASSPLLADC_FIELD      0
++#define STV090x_WIDTH_BYPASSPLLADC_FIELD      1
++
++#define STV090x_FILTCTRL                      0xf1b7
++#define STV090x_OFFST_INV_CLK135_FIELD                7
++#define STV090x_WIDTH_INV_CLK135_FIELD                1
++#define STV090x_OFFST_SEL_FSKCKDIV_FIELD      2
++#define STV090x_WIDTH_SEL_FSKCKDIV_FIELD      1
++#define STV090x_OFFST_INV_CLKFSK_FIELD                1
++#define STV090x_WIDTH_INV_CLKFSK_FIELD                1
++#define STV090x_OFFST_BYPASS_APPLI_FIELD      0
++#define STV090x_WIDTH_BYPASS_APPLI_FIELD      1
++
++#define STV090x_PLLSTAT                               0xf1b8
++#define STV090x_OFFST_PLLLOCK_FIELD           0
++#define STV090x_WIDTH_PLLLOCK_FIELD           1
++
++#define STV090x_STOPCLK1                      0xf1c2
++#define STV090x_OFFST_STOP_CLKPKDT2_FIELD     6
++#define STV090x_WIDTH_STOP_CLKPKDT2_FIELD     1
++#define STV090x_OFFST_STOP_CLKPKDT1_FIELD     5
++#define STV090x_WIDTH_STOP_CLKPKDT1_FIELD     1
++#define STV090x_OFFST_STOP_CLKFEC_FIELD               4
++#define STV090x_WIDTH_STOP_CLKFEC_FIELD               1
++#define STV090x_OFFST_STOP_CLKADCI2_FIELD     3
++#define STV090x_WIDTH_STOP_CLKADCI2_FIELD     1
++#define STV090x_OFFST_INV_CLKADCI2_FIELD      2
++#define STV090x_WIDTH_INV_CLKADCI2_FIELD      1
++#define STV090x_OFFST_STOP_CLKADCI1_FIELD     1
++#define STV090x_WIDTH_STOP_CLKADCI1_FIELD     1
++#define STV090x_OFFST_INV_CLKADCI1_FIELD      0
++#define STV090x_WIDTH_INV_CLKADCI1_FIELD      1
++
++#define STV090x_STOPCLK2                      0xf1c3
++#define STV090x_OFFST_STOP_CLKSAMP2_FIELD     4
++#define STV090x_WIDTH_STOP_CLKSAMP2_FIELD     1
++#define STV090x_OFFST_STOP_CLKSAMP1_FIELD     3
++#define STV090x_WIDTH_STOP_CLKSAMP1_FIELD     1
++#define STV090x_OFFST_STOP_CLKVIT2_FIELD      2
++#define STV090x_WIDTH_STOP_CLKVIT2_FIELD      1
++#define STV090x_OFFST_STOP_CLKVIT1_FIELD      1
++#define STV090x_WIDTH_STOP_CLKVIT1_FIELD      1
++#define STV090x_OFFST_STOP_CLKTS_FIELD                0
++#define STV090x_WIDTH_STOP_CLKTS_FIELD                1
++
++#define STV090x_TSTTNR0                               0xf1df
++#define STV090x_OFFST_SEL_FSK_FIELD           7
++#define STV090x_WIDTH_SEL_FSK_FIELD           1
++#define STV090x_OFFST_FSK_PON_FIELD           2
++#define STV090x_WIDTH_FSK_PON_FIELD           1
++
++#define STV090x_TSTTNR1                               0xf1e0
++#define STV090x_OFFST_ADC1_PON_FIELD          1
++#define STV090x_WIDTH_ADC1_PON_FIELD          1
++#define STV090x_OFFST_ADC1_INMODE_FIELD               0
++#define STV090x_WIDTH_ADC1_INMODE_FIELD               1
++
++#define STV090x_TSTTNR2                               0xf1e1
++#define STV090x_OFFST_DISEQC1_PON_FIELD               5
++#define STV090x_WIDTH_DISEQC1_PON_FIELD               1
++
++#define STV090x_TSTTNR3                               0xf1e2
++#define STV090x_OFFST_ADC2_PON_FIELD          1
++#define STV090x_WIDTH_ADC2_PON_FIELD          1
++#define STV090x_OFFST_ADC2_INMODE_FIELD               0
++#define STV090x_WIDTH_ADC2_INMODE_FIELD               1
++
++#define STV090x_TSTTNR4                               0xf1e3
++#define STV090x_OFFST_DISEQC2_PON_FIELD               5
++#define STV090x_WIDTH_DISEQC2_PON_FIELD               1
++
++#define STV090x_FSKTFC2                               0xf170
++#define STV090x_OFFST_FSKT_KMOD_FIELD         2
++#define STV090x_WIDTH_FSKT_KMOD_FIELD         6
++#define STV090x_OFFST_FSKT_CAR_FIELD          0
++#define STV090x_WIDTH_FSKT_CAR_FIELD          2
++
++#define STV090x_FSKTFC1                               0xf171
++#define STV090x_OFFST_FSKTC1_CAR_FIELD                0
++#define STV090x_WIDTH_FSKTC1_CAR_FIELD                8
++
++#define STV090x_FSKTFC0                               0xf172
++#define STV090x_OFFST_FSKTC0_CAR_FIELD                0
++#define STV090x_WIDTH_FSKTC0_CAR_FIELD                8
++
++#define STV090x_FSKTDELTAF1                   0xf173
++#define STV090x_OFFST_FSKTF1_DELTAF_FIELD     0
++#define STV090x_WIDTH_FSKTF1_DELTAF_FIELD     4
++
++#define STV090x_FSKTDELTAF0                   0xf174
++#define STV090x_OFFST_FSKTF0_DELTAF_FIELD     0
++#define STV090x_WIDTH_FSKTF0_DELTAF_FIELD     8
++
++#define STV090x_FSKTCTRL                      0xf175
++#define STV090x_OFFST_FSKT_EN_SGN_FIELD               6
++#define STV090x_WIDTH_FSKT_EN_SGN_FIELD               1
++#define STV090x_OFFST_FSKT_MOD_SGN_FIELD      5
++#define STV090x_WIDTH_FSKT_MOD_SGN_FIELD      1
++#define STV090x_OFFST_FSKT_MOD_EN_FIELD               2
++#define STV090x_WIDTH_FSKT_MOD_EN_FIELD               3
++#define STV090x_OFFST_FSKT_DACMODE_FIELD      0
++#define STV090x_WIDTH_FSKT_DACMODE_FIELD      2
++
++#define STV090x_FSKRFC2                               0xf176
++#define STV090x_OFFST_FSKRC2_DETSGN_FIELD     6
++#define STV090x_WIDTH_FSKRC2_DETSGN_FIELD     1
++#define STV090x_OFFST_FSKRC2_OUTSGN_FIELD     5
++#define STV090x_WIDTH_FSKRC2_OUTSGN_FIELD     1
++#define STV090x_OFFST_FSKRC2_KAGC_FIELD               2
++#define STV090x_WIDTH_FSKRC2_KAGC_FIELD               3
++#define STV090x_OFFST_FSKRC2_CAR_FIELD                0
++#define STV090x_WIDTH_FSKRC2_CAR_FIELD                2
++
++#define STV090x_FSKRFC1                               0xf177
++#define STV090x_OFFST_FSKRC1_CAR_FIELD                0
++#define STV090x_WIDTH_FSKRC1_CAR_FIELD                8
++
++#define STV090x_FSKRFC0                               0xf178
++#define STV090x_OFFST_FSKRC0_CAR_FIELD                0
++#define STV090x_WIDTH_FSKRC0_CAR_FIELD                8
++
++#define STV090x_FSKRK1                                0xf179
++#define STV090x_OFFST_FSKR_K1_EXP_FIELD               5
++#define STV090x_WIDTH_FSKR_K1_EXP_FIELD               3
++#define STV090x_OFFST_FSKR_K1_MANT_FIELD      0
++#define STV090x_WIDTH_FSKR_K1_MANT_FIELD      5
++
++#define STV090x_FSKRK2                                0xf17a
++#define STV090x_OFFST_FSKR_K2_EXP_FIELD               5
++#define STV090x_WIDTH_FSKR_K2_EXP_FIELD               3
++#define STV090x_OFFST_FSKR_K2_MANT_FIELD      0
++#define STV090x_WIDTH_FSKR_K2_MANT_FIELD      5
++
++#define STV090x_FSKRAGCR                      0xf17b
++#define STV090x_OFFST_FSKR_OUTCTL_FIELD               6
++#define STV090x_WIDTH_FSKR_OUTCTL_FIELD               2
++#define STV090x_OFFST_FSKR_AGC_REF_FIELD      0
++#define STV090x_WIDTH_FSKR_AGC_REF_FIELD      6
++
++#define STV090x_FSKRAGC                               0xf17c
++#define STV090x_OFFST_FSKR_AGC_ACCU_FIELD     0
++#define STV090x_WIDTH_FSKR_AGC_ACCU_FIELD     8
++
++#define STV090x_FSKRALPHA                     0xf17d
++#define STV090x_OFFST_FSKR_ALPHA_EXP_FIELD    2
++#define STV090x_WIDTH_FSKR_ALPHA_EXP_FIELD    3
++#define STV090x_OFFST_FSKR_ALPHA_M_FIELD      0
++#define STV090x_WIDTH_FSKR_ALPHA_M_FIELD      2
++
++#define STV090x_FSKRPLTH1                     0xf17e
++#define STV090x_OFFST_FSKR_BETA_FIELD         4
++#define STV090x_WIDTH_FSKR_BETA_FIELD         4
++#define STV090x_OFFST_FSKR_PLL_TRESH1_FIELD   0
++#define STV090x_WIDTH_FSKR_PLL_TRESH1_FIELD   4
++
++#define STV090x_FSKRPLTH0                     0xf17f
++#define STV090x_OFFST_FSKR_PLL_TRESH0_FIELD   0
++#define STV090x_WIDTH_FSKR_PLL_TRESH0_FIELD   8
++
++#define STV090x_FSKRDF1                               0xf180
++#define STV090x_OFFST_FSKR_DELTAF1_FIELD      0
++#define STV090x_WIDTH_FSKR_DELTAF1_FIELD      5
++
++#define STV090x_FSKRDF0                               0xf181
++#define STV090x_OFFST_FSKR_DELTAF0_FIELD      0
++#define STV090x_WIDTH_FSKR_DELTAF0_FIELD      8
++
++#define STV090x_FSKRSTEPP                     0xf182
++#define STV090x_OFFST_FSKR_STEP_PLUS_FIELD    0
++#define STV090x_WIDTH_FSKR_STEP_PLUS_FIELD    8
++
++#define STV090x_FSKRSTEPM                     0xf183
++#define STV090x_OFFST_FSKR_STEP_MINUS_FIELD   0
++#define STV090x_WIDTH_FSKR_STEP_MINUS_FIELD   8
++
++#define STV090x_FSKRDET1                      0xf184
++#define STV090x_OFFST_FSKR_CARDET1_ACCU_FIELD 0
++#define STV090x_WIDTH_FSKR_CARDET1_ACCU_FIELD 4
++
++#define STV090x_FSKRDET0                      0xf185
++#define STV090x_OFFST_FSKR_CARDET0_ACCU_FIELD 0
++#define STV090x_WIDTH_FSKR_CARDET0_ACCU_FIELD 8
++
++#define STV090x_FSKRDTH1                              0xf186
++#define STV090x_OFFST_FSKR_CARLOSS_THRESH1_FIELD      4
++#define STV090x_WIDTH_FSKR_CARLOSS_THRESH1_FIELD      4
++#define STV090x_OFFST_FSKR_CARDET_THRESH1_FIELD               0
++#define STV090x_WIDTH_FSKR_CARDET_THRESH1_FIELD               4
++
++#define STV090x_FSKRDTH0                      0xf187
++#define STV090x_OFFST_FSKR_CARDET_THRESH0_FIELD       0
++#define STV090x_WIDTH_FSKR_CARDET_THRESH0_FIELD       8
++
++#define STV090x_FSKRLOSS                      0xf188
++#define STV090x_OFFST_FSKR_CARLOSS_THRESH_FIELD       0
++#define STV090x_WIDTH_FSKR_CARLOSS_THRESH_FIELD       8
++
++#define STV090x_Px_DISTXCTL(__x)              (0xF1A0 - (__x - 1) * 0x10)
++#define STV090x_P1_DISTXCTL                   STV090x_Px_DISTXCTL(1)
++#define STV090x_P2_DISTXCTL                   STV090x_Px_DISTXCTL(2)
++#define STV090x_OFFST_Px_TIM_OFF_FIELD                7
++#define STV090x_WIDTH_Px_TIM_OFF_FIELD                1
++#define STV090x_OFFST_Px_DISEQC_RESET_FIELD   6
++#define STV090x_WIDTH_Px_DISEQC_RESET_FIELD   1
++#define STV090x_OFFST_Px_TIM_CMD_FIELD                4
++#define STV090x_WIDTH_Px_TIM_CMD_FIELD                2
++#define STV090x_OFFST_Px_DIS_PRECHARGE_FIELD  3
++#define STV090x_WIDTH_Px_DIS_PRECHARGE_FIELD  1
++#define STV090x_OFFST_Px_DISTX_MODE_FIELD     0
++#define STV090x_WIDTH_Px_DISTX_MODE_FIELD     3
++
++#define STV090x_Px_DISRXCTL(__x)              (0xf1a1 - (__x - 1) * 0x10)
++#define STV090x_P1_DISRXCTL                   STV090x_Px_DISRXCTL(1)
++#define STV090x_P2_DISRXCTL                   STV090x_Px_DISRXCTL(2)
++#define STV090x_OFFST_Px_RECEIVER_ON_FIELD    7
++#define STV090x_WIDTH_Px_RECEIVER_ON_FIELD    1
++#define STV090x_OFFST_Px_IGNO_SHORT22K_FIELD  6
++#define STV090x_WIDTH_Px_IGNO_SHORT22K_FIELD  1
++#define STV090x_OFFST_Px_ONECHIP_TRX_FIELD    5
++#define STV090x_WIDTH_Px_ONECHIP_TRX_FIELD    1
++#define STV090x_OFFST_Px_EXT_ENVELOP_FIELD    4
++#define STV090x_WIDTH_Px_EXT_ENVELOP_FIELD    1
++#define STV090x_OFFST_Px_PIN_SELECT_FIELD     2
++#define STV090x_WIDTH_Px_PIN_SELECT_FIELD     2
++#define STV090x_OFFST_Px_IRQ_RXEND_FIELD      1
++#define STV090x_WIDTH_Px_IRQ_RXEND_FIELD      1
++#define STV090x_OFFST_Px_IRQ_4NBYTES_FIELD    0
++#define STV090x_WIDTH_Px_IRQ_4NBYTES_FIELD    1
++
++#define STV090x_Px_DISRX_ST0(__x)             (0xf1a4 - (__x - 1) * 0x10)
++#define STV090x_P1_DISRX_ST0                  STV090x_Px_DISRX_ST0(1)
++#define STV090x_P2_DISRX_ST0                  STV090x_Px_DISRX_ST0(2)
++#define STV090x_OFFST_Px_RX_END_FIELD         7
++#define STV090x_WIDTH_Px_RX_END_FIELD         1
++#define STV090x_OFFST_Px_RX_ACTIVE_FIELD      6
++#define STV090x_WIDTH_Px_RX_ACTIVE_FIELD      1
++#define STV090x_OFFST_Px_SHORT_22KHZ_FIELD    5
++#define STV090x_WIDTH_Px_SHORT_22KHZ_FIELD    1
++#define STV090x_OFFST_Px_CONT_TONE_FIELD      4
++#define STV090x_WIDTH_Px_CONT_TONE_FIELD      1
++#define STV090x_OFFST_Px_FIFO_4BREADY_FIELD   3
++#define STV090x_WIDTH_Px_FIFO_4BREADY_FIELD   1
++#define STV090x_OFFST_Px_FIFO_EMPTY_FIELD     2
++#define STV090x_WIDTH_Px_FIFO_EMPTY_FIELD     1
++#define STV090x_OFFST_Px_ABORT_DISRX_FIELD    0
++#define STV090x_WIDTH_Px_ABORT_DISRX_FIELD    1
++
++#define STV090x_Px_DISRX_ST1(__x)             (0xf1a5 - (__x - 1) * 0x10)
++#define STV090x_P1_DISRX_ST1                  STV090x_Px_DISRX_ST1(1)
++#define STV090x_P2_DISRX_ST1                  STV090x_Px_DISRX_ST1(2)
++#define STV090x_OFFST_Px_RX_FAIL_FIELD                7
++#define STV090x_WIDTH_Px_RX_FAIL_FIELD                1
++#define STV090x_OFFST_Px_FIFO_PARITYFAIL_FIELD        6
++#define STV090x_WIDTH_Px_FIFO_PARITYFAIL_FIELD        1
++#define STV090x_OFFST_Px_RX_NONBYTE_FIELD     5
++#define STV090x_WIDTH_Px_RX_NONBYTE_FIELD     1
++#define STV090x_OFFST_Px_FIFO_OVERFLOW_FIELD  4
++#define STV090x_WIDTH_Px_FIFO_OVERFLOW_FIELD  1
++#define STV090x_OFFST_Px_FIFO_BYTENBR_FIELD   0
++#define STV090x_WIDTH_Px_FIFO_BYTENBR_FIELD   4
++
++#define STV090x_Px_DISRXDATA(__x)             (0xf1a6 - (__x - 1) * 0x10)
++#define STV090x_P1_DISRXDATA                  STV090x_Px_DISRXDATA(1)
++#define STV090x_P2_DISRXDATA                  STV090x_Px_DISRXDATA(2)
++#define STV090x_OFFST_Px_DISRX_DATA_FIELD     0
++#define STV090x_WIDTH_Px_DISRX_DATA_FIELD     8
++
++#define STV090x_Px_DISTXDATA(__x)             (0xf1a7 - (__x - 1) * 0x10)
++#define STV090x_P1_DISTXDATA                  STV090x_Px_DISTXDATA(1)
++#define STV090x_P2_DISTXDATA                  STV090x_Px_DISTXDATA(2)
++#define STV090x_OFFST_Px_DISEQC_FIFO_FIELD    0
++#define STV090x_WIDTH_Px_DISEQC_FIFO_FIELD    8
++
++#define STV090x_Px_DISTXSTATUS(__x)           (0xf1a8 - (__x - 1) * 0x10)
++#define STV090x_P1_DISTXSTATUS                        STV090x_Px_DISTXSTATUS(1)
++#define STV090x_P2_DISTXSTATUS                        STV090x_Px_DISTXSTATUS(2)
++#define STV090x_OFFST_Px_TX_FAIL_FIELD                7
++#define STV090x_WIDTH_Px_TX_FAIL_FIELD                1
++#define STV090x_OFFST_Px_FIFO_FULL_FIELD      6
++#define STV090x_WIDTH_Px_FIFO_FULL_FIELD      1
++#define STV090x_OFFST_Px_TX_IDLE_FIELD                5
++#define STV090x_WIDTH_Px_TX_IDLE_FIELD                1
++#define STV090x_OFFST_Px_GAP_BURST_FIELD      4
++#define STV090x_WIDTH_Px_GAP_BURST_FIELD      1
++#define STV090x_OFFST_Px_TXFIFO_BYTES_FIELD   0
++#define STV090x_WIDTH_Px_TXFIFO_BYTES_FIELD   4
++
++#define STV090x_Px_F22TX(__x)                 (0xf1a9 - (__x - 1) * 0x10)
++#define STV090x_P1_F22TX                      STV090x_Px_F22TX(1)
++#define STV090x_P2_F22TX                      STV090x_Px_F22TX(2)
++#define STV090x_OFFST_Px_F22_REG_FIELD                0
++#define STV090x_WIDTH_Px_F22_REG_FIELD                8
++
++#define STV090x_Px_F22RX(__x)                 (0xf1aa - (__x - 1) * 0x10)
++#define STV090x_P1_F22RX                      STV090x_Px_F22RX(1)
++#define STV090x_P2_F22RX                      STV090x_Px_F22RX(2)
++#define STV090x_OFFST_Px_F22RX_REG_FIELD      0
++#define STV090x_WIDTH_Px_F22RX_REG_FIELD      8
++
++#define STV090x_Px_ACRPRESC(__x)              (0xf1ac - (__x - 1) * 0x10)
++#define STV090x_P1_ACRPRESC                   STV090x_Px_ACRPRESC(1)
++#define STV090x_P2_ACRPRESC                   STV090x_Px_ACRPRESC(2)
++#define STV090x_OFFST_Px_ACR_PRESC_FIELD      0
++#define STV090x_WIDTH_Px_ACR_PRESC_FIELD      3
++
++#define STV090x_Px_ACRDIV(__x)                        (0xf1ad - (__x - 1) * 0x10)
++#define STV090x_P1_ACRDIV                     STV090x_Px_ACRDIV(1)
++#define STV090x_P2_ACRDIV                     STV090x_Px_ACRDIV(2)
++#define STV090x_OFFST_Px_ACR_DIV_FIELD                0
++#define STV090x_WIDTH_Px_ACR_DIV_FIELD                8
++
++#define STV090x_Px_IQCONST(__x)                       (0xF400 - (__x - 1) * 0x200)
++#define STV090x_P1_IQCONST                    STV090x_Px_IQCONST(1)
++#define STV090x_P2_IQCONST                    STV090x_Px_IQCONST(2)
++#define STV090x_OFFST_Px_CONSTEL_SELECT_FIELD 5
++#define STV090x_WIDTH_Px_CONSTEL_SELECT_FIELD 2
++
++#define STV090x_Px_NOSCFG(__x)                        (0xF401 - (__x - 1) * 0x200)
++#define STV090x_P1_NOSCFG                     STV090x_Px_NOSCFG(1)
++#define STV090x_P2_NOSCFG                     STV090x_Px_NOSCFG(2)
++#define STV090x_OFFST_Px_NOSPLH_BETA_FIELD    3
++#define STV090x_WIDTH_Px_NOSPLH_BETA_FIELD    2
++#define STV090x_OFFST_Px_NOSDATA_BETA_FIELD   0
++#define STV090x_WIDTH_Px_NOSDATA_BETA_FIELD   3
++
++#define STV090x_Px_ISYMB(__x)                 (0xF402 - (__x - 1) * 0x200)
++#define STV090x_P1_ISYMB                      STV090x_Px_ISYMB(1)
++#define STV090x_P2_ISYMB                      STV090x_Px_ISYMB(2)
++#define STV090x_OFFST_Px_I_SYMBOL_FIELD               0
++#define STV090x_WIDTH_Px_I_SYMBOL_FIELD               8
++
++#define STV090x_Px_QSYMB(__x)                 (0xF403 - (__x - 1) * 0x200)
++#define STV090x_P1_QSYMB                      STV090x_Px_QSYMB(1)
++#define STV090x_P2_QSYMB                      STV090x_Px_QSYMB(2)
++#define STV090x_OFFST_Px_Q_SYMBOL_FIELD               0
++#define STV090x_WIDTH_Px_Q_SYMBOL_FIELD               8
++
++#define STV090x_Px_AGC1CFG(__x)                       (0xF404 - (__x - 1) * 0x200)
++#define STV090x_P1_AGC1CFG                    STV090x_Px_AGC1CFG(1)
++#define STV090x_P2_AGC1CFG                    STV090x_Px_AGC1CFG(2)
++#define STV090x_OFFST_Px_DC_FROZEN_FIELD      7
++#define STV090x_WIDTH_Px_DC_FROZEN_FIELD      1
++#define STV090x_OFFST_Px_DC_CORRECT_FIELD     6
++#define STV090x_WIDTH_Px_DC_CORRECT_FIELD     1
++#define STV090x_OFFST_Px_AMM_FROZEN_FIELD     5
++#define STV090x_WIDTH_Px_AMM_FROZEN_FIELD     1
++#define STV090x_OFFST_Px_AMM_CORRECT_FIELD    4
++#define STV090x_WIDTH_Px_AMM_CORRECT_FIELD    1
++#define STV090x_OFFST_Px_QUAD_FROZEN_FIELD    3
++#define STV090x_WIDTH_Px_QUAD_FROZEN_FIELD    1
++#define STV090x_OFFST_Px_QUAD_CORRECT_FIELD   2
++#define STV090x_WIDTH_Px_QUAD_CORRECT_FIELD   1
++
++#define STV090x_Px_AGC1CN(__x)                        (0xF406 - (__x - 1) * 0x200)
++#define STV090x_P1_AGC1CN                     STV090x_Px_AGC1CN(1)
++#define STV090x_P2_AGC1CN                     STV090x_Px_AGC1CN(2)
++#define STV090x_WIDTH_Px_AGC1_LOCKED_FIELD    7
++#define STV090x_OFFST_Px_AGC1_LOCKED_FIELD    1
++#define STV090x_OFFST_Px_AGC1_MINPOWER_FIELD  4
++#define STV090x_WIDTH_Px_AGC1_MINPOWER_FIELD  1
++#define STV090x_OFFST_Px_AGCOUT_FAST_FIELD    3
++#define STV090x_WIDTH_Px_AGCOUT_FAST_FIELD    1
++#define STV090x_OFFST_Px_AGCIQ_BETA_FIELD     0
++#define STV090x_WIDTH_Px_AGCIQ_BETA_FIELD     3
++
++#define STV090x_Px_AGC1REF(__x)                       (0xF407 - (__x - 1) * 0x200)
++#define STV090x_P1_AGC1REF                    STV090x_Px_AGC1REF(1)
++#define STV090x_P2_AGC1REF                    STV090x_Px_AGC1REF(2)
++#define STV090x_OFFST_Px_AGCIQ_REF_FIELD      0
++#define STV090x_WIDTH_Px_AGCIQ_REF_FIELD      8
++
++#define STV090x_Px_IDCCOMP(__x)                       (0xF408 - (__x - 1) * 0x200)
++#define STV090x_P1_IDCCOMP                    STV090x_Px_IDCCOMP(1)
++#define STV090x_P2_IDCCOMP                    STV090x_Px_IDCCOMP(2)
++#define STV090x_OFFST_Px_IAVERAGE_ADJ_FIELD   0
++#define STV090x_WIDTH_Px_IAVERAGE_ADJ_FIELD   8
++
++#define STV090x_Px_QDCCOMP(__x)                       (0xF409 - (__x - 1) * 0x200)
++#define STV090x_P1_QDCCOMP                    STV090x_Px_QDCCOMP(1)
++#define STV090x_P2_QDCCOMP                    STV090x_Px_QDCCOMP(2)
++#define STV090x_OFFST_Px_QAVERAGE_ADJ_FIELD   0
++#define STV090x_WIDTH_Px_QAVERAGE_ADJ_FIELD   8
++
++#define STV090x_Px_POWERI(__x)                        (0xF40A - (__x - 1) * 0x200)
++#define STV090x_P1_POWERI                     STV090x_Px_POWERI(1)
++#define STV090x_P2_POWERI                     STV090x_Px_POWERI(2)
++#define STV090x_OFFST_Px_POWER_I_FIELD                0
++#define STV090x_WIDTH_Px_POWER_I_FIELD                8
++
++#define STV090x_Px_POWERQ(__x)                        (0xF40B - (__x - 1) * 0x200)
++#define STV090x_P1_POWERQ                     STV090x_Px_POWERQ(1)
++#define STV090x_P2_POWERQ                     STV090x_Px_POWERQ(2)
++#define STV090x_OFFST_Px_POWER_Q_FIELD                0
++#define STV090x_WIDTH_Px_POWER_Q_FIELD                8
++
++#define STV090x_Px_AGC1AMM(__x)                       (0xF40C - (__x - 1) * 0x200)
++#define STV090x_P1_AGC1AMM                    STV090x_Px_AGC1AMM(1)
++#define STV090x_P2_AGC1AMM                    STV090x_Px_AGC1AMM(2)
++#define STV090x_OFFST_Px_AMM_VALUE_FIELD      0
++#define STV090x_WIDTH_Px_AMM_VALUE_FIELD      8
++
++#define STV090x_Px_AGC1QUAD(__x)              (0xF40D - (__x - 1) * 0x200)
++#define STV090x_P1_AGC1QUAD                   STV090x_Px_AGC1QUAD(1)
++#define STV090x_P2_AGC1QUAD                   STV090x_Px_AGC1QUAD(2)
++#define STV090x_OFFST_Px_QUAD_VALUE_FIELD     0
++#define STV090x_WIDTH_Px_QUAD_VALUE_FIELD     8
++
++#define STV090x_Px_AGCIQINy(__x, __y)         (0xF40F - (__x-1) * 0x200 - __y * 0x1)
++#define STV090x_P1_AGCIQIN0                   STV090x_Px_AGCIQINy(1, 0)
++#define STV090x_P1_AGCIQIN1                   STV090x_Px_AGCIQINy(1, 1)
++#define STV090x_P2_AGCIQIN0                   STV090x_Px_AGCIQINy(2, 0)
++#define STV090x_P2_AGCIQIN1                   STV090x_Px_AGCIQINy(2, 1)
++#define STV090x_OFFST_Px_AGCIQ_VALUE_FIELD    0
++#define STV090x_WIDTH_Px_AGCIQ_VALUE_FIELD    8
++
++#define STV090x_Px_DEMOD(__x)                 (0xF410 - (__x - 1) * 0x200)
++#define STV090x_P1_DEMOD                      STV090x_Px_DEMOD(1)
++#define STV090x_P2_DEMOD                      STV090x_Px_DEMOD(2)
++#define STV090x_OFFST_Px_MANUAL_S2ROLLOFF_FIELD       7
++#define STV090x_WIDTH_Px_MANUAL_S2ROLLOFF_FIELD       1
++#define STV090x_OFFST_Px_DEMOD_STOP_FIELD     6
++#define STV090x_WIDTH_Px_DEMOD_STOP_FIELD     1
++#define STV090x_OFFST_Px_SPECINV_CONTROL_FIELD        4
++#define STV090x_WIDTH_Px_SPECINV_CONTROL_FIELD        2
++#define STV090x_OFFST_Px_FORCE_ENASAMP_FIELD  3
++#define STV090x_WIDTH_Px_FORCE_ENASAMP_FIELD  1
++#define STV090x_OFFST_Px_MANUAL_SXROLLOFF_FIELD       2
++#define STV090x_WIDTH_Px_MANUAL_SXROLLOFF_FIELD       1
++#define STV090x_OFFST_Px_ROLLOFF_CONTROL_FIELD        0
++#define STV090x_WIDTH_Px_ROLLOFF_CONTROL_FIELD        2
++
++#define STV090x_Px_DMDMODCOD(__x)             (0xF411 - (__x - 1) * 0x200)
++#define STV090x_P1_DMDMODCOD                  STV090x_Px_DMDMODCOD(1)
++#define STV090x_P2_DMDMODCOD                  STV090x_Px_DMDMODCOD(2)
++#define STV090x_OFFST_Px_MANUAL_MODCOD_FIELD  7
++#define STV090x_WIDTH_Px_MANUAL_MODCOD_FIELD  1
++#define STV090x_OFFST_Px_DEMOD_MODCOD_FIELD   2
++#define STV090x_WIDTH_Px_DEMOD_MODCOD_FIELD   5
++#define STV090x_OFFST_Px_DEMOD_TYPE_FIELD     0
++#define STV090x_WIDTH_Px_DEMOD_TYPE_FIELD     2
++
++#define STV090x_Px_DSTATUS(__x)                       (0xF412 - (__x - 1) * 0x200)
++#define STV090x_P1_DSTATUS                    STV090x_Px_DSTATUS(1)
++#define STV090x_P2_DSTATUS                    STV090x_Px_DSTATUS(2)
++#define STV090x_OFFST_Px_CAR_LOCK_FIELD               7
++#define STV090x_WIDTH_Px_CAR_LOCK_FIELD               1
++#define STV090x_OFFST_Px_TMGLOCK_QUALITY_FIELD        5
++#define STV090x_WIDTH_Px_TMGLOCK_QUALITY_FIELD        2
++#define STV090x_OFFST_Px_LOCK_DEFINITIF_FIELD 3
++#define STV090x_WIDTH_Px_LOCK_DEFINITIF_FIELD 1
++
++#define STV090x_Px_DSTATUS2(__x)              (0xF413 - (__x - 1) * 0x200)
++#define STV090x_P1_DSTATUS2                   STV090x_Px_DSTATUS2(1)
++#define STV090x_P2_DSTATUS2                   STV090x_Px_DSTATUS2(2)
++#define STV090x_OFFST_Px_DEMOD_DELOCK_FIELD   7
++#define STV090x_WIDTH_Px_DEMOD_DELOCK_FIELD   1
++#define STV090x_OFFST_Px_AGC1_NOSIGNALACK_FIELD       3
++#define STV090x_WIDTH_Px_AGC1_NOSIGNALACK_FIELD       1
++#define STV090x_OFFST_Px_AGC2_OVERFLOW_FIELD  2
++#define STV090x_WIDTH_Px_AGC2_OVERFLOW_FIELD  1
++#define STV090x_OFFST_Px_CFR_OVERFLOW_FIELD   1
++#define STV090x_WIDTH_Px_CFR_OVERFLOW_FIELD   1
++#define STV090x_OFFST_Px_GAMMA_OVERUNDER_FIELD        0
++#define STV090x_WIDTH_Px_GAMMA_OVERUNDER_FIELD        1
++
++#define STV090x_Px_DMDCFGMD(__x)              (0xF414 - (__x - 1) * 0x200)
++#define STV090x_P1_DMDCFGMD                   STV090x_Px_DMDCFGMD(1)
++#define STV090x_P2_DMDCFGMD                   STV090x_Px_DMDCFGMD(2)
++#define STV090x_OFFST_Px_DVBS2_ENABLE_FIELD   7
++#define STV090x_WIDTH_Px_DVBS2_ENABLE_FIELD   1
++#define STV090x_OFFST_Px_DVBS1_ENABLE_FIELD   6
++#define STV090x_WIDTH_Px_DVBS1_ENABLE_FIELD   1
++#define STV090x_OFFST_Px_SCAN_ENABLE_FIELD    4
++#define STV090x_WIDTH_Px_SCAN_ENABLE_FIELD    1
++#define STV090x_OFFST_Px_CFR_AUTOSCAN_FIELD   3
++#define STV090x_WIDTH_Px_CFR_AUTOSCAN_FIELD   1
++#define STV090x_OFFST_Px_NOFORCE_RELOCK_FIELD 2
++#define STV090x_WIDTH_Px_NOFORCE_RELOCK_FIELD 1
++#define STV090x_OFFST_Px_TUN_RNG_FIELD                0
++#define STV090x_WIDTH_Px_TUN_RNG_FIELD                2
++
++#define STV090x_Px_DMDCFG2(__x)                       (0xF415 - (__x - 1) * 0x200)
++#define STV090x_P1_DMDCFG2                    STV090x_Px_DMDCFG2(1)
++#define STV090x_P2_DMDCFG2                    STV090x_Px_DMDCFG2(2)
++#define STV090x_OFFST_Px_S1S2_SEQUENTIAL_FIELD        6
++#define STV090x_WIDTH_Px_S1S2_SEQUENTIAL_FIELD        1
++
++#define STV090x_Px_DMDISTATE(__x)             (0xF416 - (__x - 1) * 0x200)
++#define STV090x_P1_DMDISTATE                  STV090x_Px_DMDISTATE(1)
++#define STV090x_P2_DMDISTATE                  STV090x_Px_DMDISTATE(2)
++#define STV090x_OFFST_Px_I2C_DEMOD_MODE_FIELD 0
++#define STV090x_WIDTH_Px_I2C_DEMOD_MODE_FIELD 5
++
++#define STV090x_Px_DMDTOM(__x)                        (0xF417 - (__x - 1) * 0x200) /* check */
++#define STV090x_P1_DMDTOM                     STV090x_Px_DMDTOM(1)
++#define STV090x_P2_DMDTOM                     STV090x_Px_DMDTOM(2)
++
++#define STV090x_Px_DMDSTATE(__x)              (0xF41B - (__x - 1) * 0x200)
++#define STV090x_P1_DMDSTATE                   STV090x_Px_DMDSTATE(1)
++#define STV090x_P2_DMDSTATE                   STV090x_Px_DMDSTATE(2)
++#define STV090x_OFFST_Px_HEADER_MODE_FIELD    5
++#define STV090x_WIDTH_Px_HEADER_MODE_FIELD    2
++
++#define STV090x_Px_DMDFLYW(__x)                       (0xF41C - (__x - 1) * 0x200)
++#define STV090x_P1_DMDFLYW                    STV090x_Px_DMDFLYW(1)
++#define STV090x_P2_DMDFLYW                    STV090x_Px_DMDFLYW(2)
++#define STV090x_OFFST_Px_I2C_IRQVAL_FIELD     4
++#define STV090x_WIDTH_Px_I2C_IRQVAL_FIELD     4
++#define STV090x_OFFST_Px_FLYWHEEL_CPT_FIELD   0
++#define STV090x_WIDTH_Px_FLYWHEEL_CPT_FIELD   4
++
++#define STV090x_Px_DSTATUS3(__x)              (0xF41D - (__x - 1) * 0x200)
++#define STV090x_P1_DSTATUS3                   STV090x_Px_DSTATUS3(1)
++#define STV090x_P2_DSTATUS3                   STV090x_Px_DSTATUS3(2)
++#define STV090x_OFFST_Px_DEMOD_CFGMODE_FIELD  5
++#define STV090x_WIDTH_Px_DEMOD_CFGMODE_FIELD  2
++
++#define STV090x_Px_DMDCFG3(__x)                       (0xF41E - (__x - 1) * 0x200)
++#define STV090x_P1_DMDCFG3                    STV090x_Px_DMDCFG3(1)
++#define STV090x_P2_DMDCFG3                    STV090x_Px_DMDCFG3(2)
++#define STV090x_OFFST_Px_NOSTOP_FIFOFULL_FIELD        3
++#define STV090x_WIDTH_Px_NOSTOP_FIFOFULL_FIELD        1
++
++#define STV090x_Px_DMDCFG4(__x)                       (0xf41f - (__x - 1) * 0x200)
++#define STV090x_P1_DMDCFG4                    STV090x_Px_DMDCFG4(1)
++#define STV090x_P2_DMDCFG4                    STV090x_Px_DMDCFG4(2)
++
++#define STV090x_Px_CORRELMANT(__x)            (0xF420 - (__x - 1) * 0x200)
++#define STV090x_P1_CORRELMANT                 STV090x_Px_CORRELMANT(1)
++#define STV090x_P2_CORRELMANT                 STV090x_Px_CORRELMANT(2)
++#define STV090x_OFFST_Px_CORREL_MANT_FIELD    0
++#define STV090x_WIDTH_Px_CORREL_MANT_FIELD    8
++
++#define STV090x_Px_CORRELABS(__x)             (0xF421 - (__x - 1) * 0x200)
++#define STV090x_P1_CORRELABS                  STV090x_Px_CORRELABS(1)
++#define STV090x_P2_CORRELABS                  STV090x_Px_CORRELABS(2)
++#define STV090x_OFFST_Px_CORREL_ABS_FIELD     0
++#define STV090x_WIDTH_Px_CORREL_ABS_FIELD     8
++
++#define STV090x_Px_CORRELEXP(__x)             (0xF422 - (__x - 1) * 0x200)
++#define STV090x_P1_CORRELEXP                  STV090x_Px_CORRELEXP(1)
++#define STV090x_P2_CORRELEXP                  STV090x_Px_CORRELEXP(2)
++#define STV090x_OFFST_Px_CORREL_ABSEXP_FIELD  4
++#define STV090x_WIDTH_Px_CORREL_ABSEXP_FIELD  4
++#define STV090x_OFFST_Px_CORREL_EXP_FIELD     0
++#define STV090x_WIDTH_Px_CORREL_EXP_FIELD     4
++
++#define STV090x_Px_PLHMODCOD(__x)             (0xF424 - (__x - 1) * 0x200)
++#define STV090x_P1_PLHMODCOD                  STV090x_Px_PLHMODCOD(1)
++#define STV090x_P2_PLHMODCOD                  STV090x_Px_PLHMODCOD(2)
++#define STV090x_OFFST_Px_SPECINV_DEMOD_FIELD  7
++#define STV090x_WIDTH_Px_SPECINV_DEMOD_FIELD  1
++#define STV090x_OFFST_Px_PLH_MODCOD_FIELD     2
++#define STV090x_WIDTH_Px_PLH_MODCOD_FIELD     5
++#define STV090x_OFFST_Px_PLH_TYPE_FIELD               0
++#define STV090x_WIDTH_Px_PLH_TYPE_FIELD               2
++
++#define STV090x_Px_AGCK32(__x)                        (0xf42b - (__x - 1) * 0x200)
++#define STV090x_P1_AGCK32                     STV090x_Px_AGCK32(1)
++#define STV090x_P2_AGCK32                     STV090x_Px_AGCK32(2)
++
++#define STV090x_Px_AGC2O(__x)                 (0xF42C - (__x - 1) * 0x200)
++#define STV090x_P1_AGC2O                      STV090x_Px_AGC2O(1)
++#define STV090x_P2_AGC2O                      STV090x_Px_AGC2O(2)
++
++#define STV090x_Px_AGC2REF(__x)                       (0xF42D - (__x - 1) * 0x200)
++#define STV090x_P1_AGC2REF                    STV090x_Px_AGC2REF(1)
++#define STV090x_P2_AGC2REF                    STV090x_Px_AGC2REF(2)
++#define STV090x_OFFST_Px_AGC2_REF_FIELD               0
++#define STV090x_WIDTH_Px_AGC2_REF_FIELD               8
++
++#define STV090x_Px_AGC1ADJ(__x)                       (0xF42E - (__x - 1) * 0x200)
++#define STV090x_P1_AGC1ADJ                    STV090x_Px_AGC1ADJ(1)
++#define STV090x_P2_AGC1ADJ                    STV090x_Px_AGC1ADJ(2)
++#define STV090x_OFFST_Px_AGC1_ADJUSTED_FIELD  0
++#define STV090x_WIDTH_Px_AGC1_ADJUSTED_FIELD  7
++
++#define STV090x_Px_AGC2Iy(__x, __y)           (0xF437 - (__x - 1) * 0x200 - __y * 0x1)
++#define STV090x_P1_AGC2I0                     STV090x_Px_AGC2Iy(1, 0)
++#define STV090x_P1_AGC2I1                     STV090x_Px_AGC2Iy(1, 1)
++#define STV090x_P2_AGC2I0                     STV090x_Px_AGC2Iy(2, 0)
++#define STV090x_P2_AGC2I1                     STV090x_Px_AGC2Iy(2, 1)
++#define STV090x_OFFST_Px_AGC2_INTEGRATOR_FIELD        0
++#define STV090x_WIDTH_Px_AGC2_INTEGRATOR_FIELD        8
++
++#define STV090x_Px_CARCFG(__x)                        (0xF438 - (__x - 1) * 0x200)
++#define STV090x_P1_CARCFG                     STV090x_Px_CARCFG(1)
++#define STV090x_P2_CARCFG                     STV090x_Px_CARCFG(2)
++#define STV090x_OFFST_Px_EN_CAR2CENTER_FIELD  5
++#define STV090x_WIDTH_Px_EN_CAR2CENTER_FIELD  1
++#define STV090x_OFFST_Px_ROTATON_FIELD                2
++#define STV090x_WIDTH_Px_ROTATON_FIELD                1
++#define STV090x_OFFST_Px_PH_DET_ALGO_FIELD    0
++#define STV090x_WIDTH_Px_PH_DET_ALGO_FIELD    2
++
++#define STV090x_Px_ACLC(__x)                  (0xF439 - (__x - 1) * 0x200)
++#define STV090x_P1_ACLC                               STV090x_Px_ACLC(1)
++#define STV090x_P2_ACLC                               STV090x_Px_ACLC(2)
++#define STV090x_OFFST_Px_CAR_ALPHA_MANT_FIELD 4
++#define STV090x_WIDTH_Px_CAR_ALPHA_MANT_FIELD 2
++#define STV090x_OFFST_Px_CAR_ALPHA_EXP_FIELD  0
++#define STV090x_WIDTH_Px_CAR_ALPHA_EXP_FIELD  4
++
++#define STV090x_Px_BCLC(__x)                  (0xF43A - (__x - 1) * 0x200)
++#define STV090x_P1_BCLC                               STV090x_Px_BCLC(1)
++#define STV090x_P2_BCLC                               STV090x_Px_BCLC(2)
++#define STV090x_OFFST_Px_CAR_BETA_MANT_FIELD  4
++#define STV090x_WIDTH_Px_CAR_BETA_MANT_FIELD  2
++#define STV090x_OFFST_Px_CAR_BETA_EXP_FIELD   0
++#define STV090x_WIDTH_Px_CAR_BETA_EXP_FIELD   4
++
++#define STV090x_Px_CARFREQ(__x)                       (0xF43D - (__x - 1) * 0x200)
++#define STV090x_P1_CARFREQ                    STV090x_Px_CARFREQ(1)
++#define STV090x_P2_CARFREQ                    STV090x_Px_CARFREQ(2)
++#define STV090x_OFFST_Px_KC_COARSE_EXP_FIELD  4
++#define STV090x_WIDTH_Px_KC_COARSE_EXP_FIELD  4
++#define STV090x_OFFST_Px_BETA_FREQ_FIELD      0
++#define STV090x_WIDTH_Px_BETA_FREQ_FIELD      4
++
++#define STV090x_Px_CARHDR(__x)                        (0xF43E - (__x - 1) * 0x200)
++#define STV090x_P1_CARHDR                     STV090x_Px_CARHDR(1)
++#define STV090x_P2_CARHDR                     STV090x_Px_CARHDR(2)
++#define STV090x_OFFST_Px_FREQ_HDR_FIELD               0
++#define STV090x_WIDTH_Px_FREQ_HDR_FIELD               8
++
++#define STV090x_Px_LDT(__x)                   (0xF43F - (__x - 1) * 0x200)
++#define STV090x_P1_LDT                                STV090x_Px_LDT(1)
++#define STV090x_P2_LDT                                STV090x_Px_LDT(2)
++#define STV090x_OFFST_Px_CARLOCK_THRES_FIELD  0
++#define STV090x_WIDTH_Px_CARLOCK_THRES_FIELD  8
++
++#define STV090x_Px_LDT2(__x)                  (0xF440 - (__x - 1) * 0x200)
++#define STV090x_P1_LDT2                               STV090x_Px_LDT2(1)
++#define STV090x_P2_LDT2                               STV090x_Px_LDT2(2)
++#define STV090x_OFFST_Px_CARLOCK_THRES2_FIELD 0
++#define STV090x_WIDTH_Px_CARLOCK_THRES2_FIELD 8
++
++#define STV090x_Px_CFRICFG(__x)                       (0xF441 - (__x - 1) * 0x200)
++#define STV090x_P1_CFRICFG                    STV090x_Px_CFRICFG(1)
++#define STV090x_P2_CFRICFG                    STV090x_Px_CFRICFG(2)
++#define STV090x_OFFST_Px_NEG_CFRSTEP_FIELD    0
++#define STV090x_WIDTH_Px_NEG_CFRSTEP_FIELD    1
++
++#define STV090x_Pn_CFRUPy(__x, __y)           (0xF443 - (__x - 1) * 0x200 - __y * 0x1)
++#define STV090x_P1_CFRUP0                     STV090x_Pn_CFRUPy(1, 0)
++#define STV090x_P1_CFRUP1                     STV090x_Pn_CFRUPy(1, 1)
++#define STV090x_P2_CFRUP0                     STV090x_Pn_CFRUPy(2, 0)
++#define STV090x_P2_CFRUP1                     STV090x_Pn_CFRUPy(2, 1)
++#define STV090x_OFFST_Px_CFR_UP_FIELD         0
++#define STV090x_WIDTH_Px_CFR_UP_FIELD         8
++
++#define STV090x_Pn_CFRLOWy(__x, __y)          (0xF447 - (__x - 1) * 0x200 - __y * 0x1)
++#define STV090x_P1_CFRLOW0                    STV090x_Pn_CFRLOWy(1, 0)
++#define STV090x_P1_CFRLOW1                    STV090x_Pn_CFRLOWy(1, 1)
++#define STV090x_P2_CFRLOW0                    STV090x_Pn_CFRLOWy(2, 0)
++#define STV090x_P2_CFRLOW1                    STV090x_Pn_CFRLOWy(2, 1)
++#define STV090x_OFFST_Px_CFR_LOW_FIELD                0
++#define STV090x_WIDTH_Px_CFR_LOW_FIELD                8
++
++#define STV090x_Pn_CFRINITy(__x, __y)         (0xF449 - (__x - 1) * 0x200 - __y * 0x1)
++#define STV090x_P1_CFRINIT0                   STV090x_Pn_CFRINITy(1, 0)
++#define STV090x_P1_CFRINIT1                   STV090x_Pn_CFRINITy(1, 1)
++#define STV090x_P2_CFRINIT0                   STV090x_Pn_CFRINITy(2, 0)
++#define STV090x_P2_CFRINIT1                   STV090x_Pn_CFRINITy(2, 1)
++#define STV090x_OFFST_Px_CFR_INIT_FIELD               0
++#define STV090x_WIDTH_Px_CFR_INIT_FIELD               8
++
++#define STV090x_Px_CFRINC1(__x)                       (0xF44A - (__x - 1) * 0x200)
++#define STV090x_P1_CFRINC1                    STV090x_Px_CFRINC1(1)
++#define STV090x_P2_CFRINC1                    STV090x_Px_CFRINC1(2)
++#define STV090x_OFFST_Px_CFR_INC1_FIELD               0
++#define STV090x_WIDTH_Px_CFR_INC1_FIELD               7 /* check */
++
++#define STV090x_Px_CFRINC0(__x)                       (0xF44B - (__x - 1) * 0x200)
++#define STV090x_P1_CFRINC0                    STV090x_Px_CFRINC0(1)
++#define STV090x_P2_CFRINC0                    STV090x_Px_CFRINC0(2)
++#define STV090x_OFFST_Px_CFR_INC0_FIELD               4 /* check */
++#define STV090x_WIDTH_Px_CFR_INC0_FIELD               4
++
++#define STV090x_Pn_CFRy(__x, __y)             (0xF44E - (__x - 1) * 0x200 - __y * 0x1)
++#define STV090x_P1_CFR0                               STV090x_Pn_CFRy(1, 0)
++#define STV090x_P1_CFR1                               STV090x_Pn_CFRy(1, 1)
++#define STV090x_P1_CFR2                               STV090x_Pn_CFRy(1, 2)
++#define STV090x_P2_CFR0                               STV090x_Pn_CFRy(2, 0)
++#define STV090x_P2_CFR1                               STV090x_Pn_CFRy(2, 1)
++#define STV090x_P2_CFR2                               STV090x_Pn_CFRy(2, 2)
++#define STV090x_OFFST_Px_CAR_FREQ_FIELD               0
++#define STV090x_WIDTH_Px_CAR_FREQ_FIELD               8
++
++#define STV090x_Px_LDI(__x)                   (0xF44F - (__x - 1) * 0x200)
++#define STV090x_P1_LDI                                STV090x_Px_LDI(1)
++#define STV090x_P2_LDI                                STV090x_Px_LDI(2)
++#define STV090x_OFFST_Px_LOCK_DET_INTEGR_FIELD        0
++#define STV090x_WIDTH_Px_LOCK_DET_INTEGR_FIELD        8
++
++#define STV090x_Px_TMGCFG(__x)                        (0xF450 - (__x - 1) * 0x200)
++#define STV090x_P1_TMGCFG                     STV090x_Px_TMGCFG(1)
++#define STV090x_P2_TMGCFG                     STV090x_Px_TMGCFG(2)
++#define STV090x_OFFST_Px_TMGLOCK_BETA_FIELD   6
++#define STV090x_WIDTH_Px_TMGLOCK_BETA_FIELD   2
++#define STV090x_OFFST_Px_DO_TIMING_FIELD      4
++#define STV090x_WIDTH_Px_DO_TIMING_FIELD      1
++#define STV090x_OFFST_Px_TMG_MINFREQ_FIELD    0
++#define STV090x_WIDTH_Px_TMG_MINFREQ_FIELD    2
++
++#define STV090x_Px_RTC(__x)                   (0xF451 - (__x - 1) * 0x200)
++#define STV090x_P1_RTC                                STV090x_Px_RTC(1)
++#define STV090x_P2_RTC                                STV090x_Px_RTC(2)
++#define STV090x_OFFST_Px_TMGALPHA_EXP_FIELD   4
++#define STV090x_WIDTH_Px_TMGALPHA_EXP_FIELD   4
++#define STV090x_OFFST_Px_TMGBETA_EXP_FIELD    0
++#define STV090x_WIDTH_Px_TMGBETA_EXP_FIELD    4
++
++#define STV090x_Px_RTCS2(__x)                 (0xF452 - (__x - 1) * 0x200)
++#define STV090x_P1_RTCS2                      STV090x_Px_RTCS2(1)
++#define STV090x_P2_RTCS2                      STV090x_Px_RTCS2(2)
++#define STV090x_OFFST_Px_TMGALPHAS2_EXP_FIELD 4
++#define STV090x_WIDTH_Px_TMGALPHAS2_EXP_FIELD 4
++#define STV090x_OFFST_Px_TMGBETAS2_EXP_FIELD  0
++#define STV090x_WIDTH_Px_TMGBETAS2_EXP_FIELD  4
++
++#define STV090x_Px_TMGTHRISE(__x)             (0xF453 - (__x - 1) * 0x200)
++#define STV090x_P1_TMGTHRISE                  STV090x_Px_TMGTHRISE(1)
++#define STV090x_P2_TMGTHRISE                  STV090x_Px_TMGTHRISE(2)
++#define STV090x_OFFST_Px_TMGLOCK_THRISE_FIELD 0
++#define STV090x_WIDTH_Px_TMGLOCK_THRISE_FIELD 8
++
++#define STV090x_Px_TMGTHFALL(__x)             (0xF454 - (__x - 1) * 0x200)
++#define STV090x_P1_TMGTHFALL                  STV090x_Px_TMGTHFALL(1)
++#define STV090x_P2_TMGTHFALL                  STV090x_Px_TMGTHFALL(2)
++#define STV090x_OFFST_Px_TMGLOCK_THFALL_FIELD 0
++#define STV090x_WIDTH_Px_TMGLOCK_THFALL_FIELD 8
++
++#define STV090x_Px_SFRUPRATIO(__x)            (0xF455 - (__x - 1) * 0x200)
++#define STV090x_P1_SFRUPRATIO                 STV090x_Px_SFRUPRATIO(1)
++#define STV090x_P2_SFRUPRATIO                 STV090x_Px_SFRUPRATIO(2)
++#define STV090x_OFFST_Px_SFR_UPRATIO_FIELD    0
++#define STV090x_WIDTH_Px_SFR_UPRATIO_FIELD    8
++
++#define STV090x_Px_SFRLOWRATIO(__x)           (0xF456 - (__x - 1) * 0x200)
++#define STV090x_P1_SFRLOWRATIO                        STV090x_Px_SFRLOWRATIO(1)
++#define STV090x_P2_SFRLOWRATIO                        STV090x_Px_SFRLOWRATIO(2)
++#define STV090x_OFFST_Px_SFR_LOWRATIO_FIELD   0
++#define STV090x_WIDTH_Px_SFR_LOWRATIO_FIELD   8
++
++#define STV090x_Px_KREFTMG(__x)                       (0xF458 - (__x - 1) * 0x200)
++#define STV090x_P1_KREFTMG                    STV090x_Px_KREFTMG(1)
++#define STV090x_P2_KREFTMG                    STV090x_Px_KREFTMG(2)
++#define STV090x_OFFST_Px_KREF_TMG_FIELD               0
++#define STV090x_WIDTH_Px_KREF_TMG_FIELD               8
++
++#define STV090x_Px_SFRSTEP(__x)                       (0xF459 - (__x - 1) * 0x200)
++#define STV090x_P1_SFRSTEP                    STV090x_Px_SFRSTEP(1)
++#define STV090x_P2_SFRSTEP                    STV090x_Px_SFRSTEP(2)
++#define STV090x_OFFST_Px_SFR_SCANSTEP_FIELD   4
++#define STV090x_WIDTH_Px_SFR_SCANSTEP_FIELD   4
++#define STV090x_OFFST_Px_SFR_CENTERSTEP_FIELD 0
++#define STV090x_WIDTH_Px_SFR_CENTERSTEP_FIELD 4
++
++#define STV090x_Px_TMGCFG2(__x)                       (0xF45A - (__x - 1) * 0x200)
++#define STV090x_P1_TMGCFG2                    STV090x_Px_TMGCFG2(1)
++#define STV090x_P2_TMGCFG2                    STV090x_Px_TMGCFG2(2)
++#define STV090x_OFFST_Px_SFRRATIO_FINE_FIELD  0
++#define STV090x_WIDTH_Px_SFRRATIO_FINE_FIELD  1
++
++#define STV090x_Px_SFRINIT1(__x)              (0xF45E - (__x - 1) * 0x200)
++#define STV090x_P1_SFRINIT1                   STV090x_Px_SFRINIT1(1)
++#define STV090x_P2_SFRINIT1                   STV090x_Px_SFRINIT1(2)
++#define STV090x_OFFST_Px_SFR_INIT1_FIELD      0
++#define STV090x_WIDTH_Px_SFR_INIT1_FIELD      7
++
++#define STV090x_Px_SFRINIT0(__x)              (0xF45F - (__x - 1) * 0x200)
++#define STV090x_P1_SFRINIT0                   STV090x_Px_SFRINIT0(1)
++#define STV090x_P2_SFRINIT0                   STV090x_Px_SFRINIT0(2)
++#define STV090x_OFFST_Px_SFR_INIT0_FIELD      0
++#define STV090x_WIDTH_Px_SFR_INIT0_FIELD      8
++
++#define STV090x_Px_SFRUP1(__x)                        (0xF460 - (__x - 1) * 0x200)
++#define STV090x_P1_SFRUP1                     STV090x_Px_SFRUP1(1)
++#define STV090x_P2_SFRUP1                     STV090x_Px_SFRUP1(2)
++#define STV090x_OFFST_Px_SYMB_FREQ_UP1_FIELD  0
++#define STV090x_WIDTH_Px_SYMB_FREQ_UP1_FIELD  7
++
++#define STV090x_Px_SFRUP0(__x)                        (0xF461 - (__x - 1) * 0x200)
++#define STV090x_P1_SFRUP0                     STV090x_Px_SFRUP0(1)
++#define STV090x_P2_SFRUP0                     STV090x_Px_SFRUP0(2)
++#define STV090x_OFFST_Px_SYMB_FREQ_UP0_FIELD  0
++#define STV090x_WIDTH_Px_SYMB_FREQ_UP0_FIELD  8
++
++#define STV090x_Px_SFRLOW1(__x)                       (0xF462 - (__x - 1) * 0x200)
++#define STV090x_P1_SFRLOW1                    STV090x_Px_SFRLOW1(1)
++#define STV090x_P2_SFRLOW1                    STV090x_Px_SFRLOW1(2)
++#define STV090x_OFFST_Px_SYMB_FREQ_LOW1_FIELD 0
++#define STV090x_WIDTH_Px_SYMB_FREQ_LOW1_FIELD 7
++
++#define STV090x_Px_SFRLOW0(__x)                       (0xF463 - (__x - 1) * 0x200)
++#define STV090x_P1_SFRLOW0                    STV090x_Px_SFRLOW0(1)
++#define STV090x_P2_SFRLOW0                    STV090x_Px_SFRLOW0(2)
++#define STV090x_OFFST_Px_SYMB_FREQ_LOW0_FIELD 0
++#define STV090x_WIDTH_Px_SYMB_FREQ_LOW0_FIELD 8
++
++#define STV090x_Px_SFRy(__x, __y)             (0xF467 - (__x-1) * 0x200 - __y)
++#define STV090x_P1_SFR0                               STV090x_Px_SFRy(1, 0)
++#define STV090x_P1_SFR1                               STV090x_Px_SFRy(1, 1)
++#define STV090x_P1_SFR2                               STV090x_Px_SFRy(1, 2)
++#define STV090x_P1_SFR3                               STV090x_Px_SFRy(1, 3)
++#define STV090x_P2_SFR0                               STV090x_Px_SFRy(2, 0)
++#define STV090x_P2_SFR1                               STV090x_Px_SFRy(2, 1)
++#define STV090x_P2_SFR2                               STV090x_Px_SFRy(2, 2)
++#define STV090x_P2_SFR3                               STV090x_Px_SFRy(2, 3)
++#define STV090x_OFFST_Px_SYMB_FREQ_FIELD      0
++#define STV090x_WIDTH_Px_SYMB_FREQ_FIELD      8
++
++#define STV090x_Px_TMGREG2(__x)                       (0xF468 - (__x - 1) * 0x200)
++#define STV090x_P1_TMGREG2                    STV090x_Px_TMGREG2(1)
++#define STV090x_P2_TMGREG2                    STV090x_Px_TMGREG2(2)
++#define STV090x_OFFST_Px_TMGREG_FIELD         0
++#define STV090x_WIDTH_Px_TMGREG_FIELD         8
++
++#define STV090x_Px_TMGREG1(__x)                       (0xF469 - (__x - 1) * 0x200)
++#define STV090x_P1_TMGREG1                    STV090x_Px_TMGREG1(1)
++#define STV090x_P2_TMGREG1                    STV090x_Px_TMGREG1(2)
++#define STV090x_OFFST_Px_TMGREG_FIELD         0
++#define STV090x_WIDTH_Px_TMGREG_FIELD         8
++
++#define STV090x_Px_TMGREG0(__x)                       (0xF46A - (__x - 1) * 0x200)
++#define STV090x_P1_TMGREG0                    STV090x_Px_TMGREG0(1)
++#define STV090x_P2_TMGREG0                    STV090x_Px_TMGREG0(2)
++#define STV090x_OFFST_Px_TMGREG_FIELD         0
++#define STV090x_WIDTH_Px_TMGREG_FIELD         8
++
++#define STV090x_Px_TMGLOCKy(__x, __y)         (0xF46C - (__x - 1) * 0x200 - __y * 0x1)
++#define STV090x_P1_TMGLOCK0                   STV090x_Px_TMGLOCKy(1, 0)
++#define STV090x_P1_TMGLOCK1                   STV090x_Px_TMGLOCKy(1, 1)
++#define STV090x_P2_TMGLOCK0                   STV090x_Px_TMGLOCKy(2, 0)
++#define STV090x_P2_TMGLOCK1                   STV090x_Px_TMGLOCKy(2, 1)
++#define STV090x_OFFST_Px_TMGLOCK_LEVEL_FIELD  0
++#define STV090x_WIDTH_Px_TMGLOCK_LEVEL_FIELD  8
++
++#define STV090x_Px_TMGOBS(__x)                        (0xF46D - (__x - 1) * 0x200)
++#define STV090x_P1_TMGOBS                     STV090x_Px_TMGOBS(1)
++#define STV090x_P2_TMGOBS                     STV090x_Px_TMGOBS(2)
++#define STV090x_OFFST_Px_ROLLOFF_STATUS_FIELD 6
++#define STV090x_WIDTH_Px_ROLLOFF_STATUS_FIELD 2
++
++#define STV090x_Px_EQUALCFG(__x)              (0xF46F - (__x - 1) * 0x200)
++#define STV090x_P1_EQUALCFG                   STV090x_Px_EQUALCFG(1)
++#define STV090x_P2_EQUALCFG                   STV090x_Px_EQUALCFG(2)
++#define STV090x_OFFST_Px_EQUAL_ON_FIELD               6
++#define STV090x_WIDTH_Px_EQUAL_ON_FIELD               1
++#define STV090x_OFFST_Px_MU_EQUALDFE_FIELD    0
++#define STV090x_WIDTH_Px_MU_EQUALDFE_FIELD    3
++
++#define STV090x_Px_EQUAIy(__x, __y)   (0xf470 - (__x-1) * 0x200 + 2 * (__y-1))
++#define STV090x_P1_EQUAI1                     STV090x_Px_EQUAIy(1, 1)
++#define STV090x_P1_EQUAI2                     STV090x_Px_EQUAIy(1, 2)
++#define STV090x_P1_EQUAI3                     STV090x_Px_EQUAIy(1, 3)
++#define STV090x_P1_EQUAI4                     STV090x_Px_EQUAIy(1, 4)
++#define STV090x_P1_EQUAI5                     STV090x_Px_EQUAIy(1, 5)
++#define STV090x_P1_EQUAI6                     STV090x_Px_EQUAIy(1, 6)
++#define STV090x_P1_EQUAI7                     STV090x_Px_EQUAIy(1, 7)
++#define STV090x_P1_EQUAI8                     STV090x_Px_EQUAIy(1, 8)
++
++#define STV090x_P2_EQUAI1                     STV090x_Px_EQUAIy(2, 1)
++#define STV090x_P2_EQUAI2                     STV090x_Px_EQUAIy(2, 2)
++#define STV090x_P2_EQUAI3                     STV090x_Px_EQUAIy(2, 3)
++#define STV090x_P2_EQUAI4                     STV090x_Px_EQUAIy(2, 4)
++#define STV090x_P2_EQUAI5                     STV090x_Px_EQUAIy(2, 5)
++#define STV090x_P2_EQUAI6                     STV090x_Px_EQUAIy(2, 6)
++#define STV090x_P2_EQUAI7                     STV090x_Px_EQUAIy(2, 7)
++#define STV090x_P2_EQUAI8                     STV090x_Px_EQUAIy(2, 8)
++#define STV090x_OFFST_Px_EQUA_ACCIy_FIELD     0
++#define STV090x_WIDTH_Px_EQUA_ACCIy_FIELD     8
++
++#define STV090x_Px_EQUAQy(__x, __y)   (0xf471 - (__x-1) * 0x200 + 2 * (__y-1))
++#define STV090x_P1_EQUAQ1                     STV090x_Px_EQUAQy(1, 1)
++#define STV090x_P1_EQUAQ2                     STV090x_Px_EQUAQy(1, 2)
++#define STV090x_P1_EQUAQ3                     STV090x_Px_EQUAQy(1, 3)
++#define STV090x_P1_EQUAQ4                     STV090x_Px_EQUAQy(1, 4)
++#define STV090x_P1_EQUAQ5                     STV090x_Px_EQUAQy(1, 5)
++#define STV090x_P1_EQUAQ6                     STV090x_Px_EQUAQy(1, 6)
++#define STV090x_P1_EQUAQ7                     STV090x_Px_EQUAQy(1, 7)
++#define STV090x_P1_EQUAQ8                     STV090x_Px_EQUAQy(1, 8)
++
++#define STV090x_P2_EQUAQ1                     STV090x_Px_EQUAQy(2, 1)
++#define STV090x_P2_EQUAQ2                     STV090x_Px_EQUAQy(2, 2)
++#define STV090x_P2_EQUAQ3                     STV090x_Px_EQUAQy(2, 3)
++#define STV090x_P2_EQUAQ4                     STV090x_Px_EQUAQy(2, 4)
++#define STV090x_P2_EQUAQ5                     STV090x_Px_EQUAQy(2, 5)
++#define STV090x_P2_EQUAQ6                     STV090x_Px_EQUAQy(2, 6)
++#define STV090x_P2_EQUAQ7                     STV090x_Px_EQUAQy(2, 7)
++#define STV090x_P2_EQUAQ8                     STV090x_Px_EQUAQy(2, 8)
++#define STV090x_OFFST_Px_EQUA_ACCQy_FIELD     0
++#define STV090x_WIDTH_Px_EQUA_ACCQy_FIELD     8
++
++#define STV090x_Px_NNOSDATATy(__x, __y)               (0xf481 - (__x - 1) * 0x200 - __y * 0x1)
++#define STV090x_P1_NNOSDATAT0                 STV090x_Px_NNOSDATATy(1, 0)
++#define STV090x_P1_NNOSDATAT1                 STV090x_Px_NNOSDATATy(1, 1)
++#define STV090x_P2_NNOSDATAT0                 STV090x_Px_NNOSDATATy(2, 0)
++#define STV090x_P2_NNOSDATAT1                 STV090x_Px_NNOSDATATy(2, 1)
++#define STV090x_OFFST_Px_NOSDATAT_NORMED_FIELD        0
++#define STV090x_WIDTH_Px_NOSDATAT_NORMED_FIELD        8
++
++#define STV090x_Px_NNOSDATAy(__x, __y)                (0xf483 - (__x - 1) * 0x200 - __y * 0x1)
++#define STV090x_P1_NNOSDATA0                  STV090x_Px_NNOSDATAy(1, 0)
++#define STV090x_P1_NNOSDATA1                  STV090x_Px_NNOSDATAy(1, 1)
++#define STV090x_P2_NNOSDATA0                  STV090x_Px_NNOSDATAy(2, 0)
++#define STV090x_P2_NNOSDATA1                  STV090x_Px_NNOSDATAy(2, 1)
++#define STV090x_OFFST_Px_NOSDATA_NORMED_FIELD 0
++#define STV090x_WIDTH_Px_NOSDATA_NORMED_FIELD 8
++
++#define STV090x_Px_NNOSPLHTy(__x, __y)                (0xf485 - (__x - 1) * 0x200 - __y * 0x1)
++#define STV090x_P1_NNOSPLHT0                  STV090x_Px_NNOSPLHTy(1, 0)
++#define STV090x_P1_NNOSPLHT1                  STV090x_Px_NNOSPLHTy(1, 1)
++#define STV090x_P2_NNOSPLHT0                  STV090x_Px_NNOSPLHTy(2, 0)
++#define STV090x_P2_NNOSPLHT1                  STV090x_Px_NNOSPLHTy(2, 1)
++#define STV090x_OFFST_Px_NOSPLHT_NORMED_FIELD 0
++#define STV090x_WIDTH_Px_NOSPLHT_NORMED_FIELD 8
++
++#define STV090x_Px_NNOSPLHy(__x, __y)         (0xf487 - (__x - 1) * 0x200 - __y * 0x1)
++#define STV090x_P1_NNOSPLH0                   STV090x_Px_NNOSPLHy(1, 0)
++#define STV090x_P1_NNOSPLH1                   STV090x_Px_NNOSPLHy(1, 1)
++#define STV090x_P2_NNOSPLH0                   STV090x_Px_NNOSPLHy(2, 0)
++#define STV090x_P2_NNOSPLH1                   STV090x_Px_NNOSPLHy(2, 1)
++#define STV090x_OFFST_Px_NOSPLH_NORMED_FIELD  0
++#define STV090x_WIDTH_Px_NOSPLH_NORMED_FIELD  8
++
++#define STV090x_Px_NOSDATATy(__x, __y)                        (0xf489 - (__x - 1) * 0x200 - __y * 0x1)
++#define STV090x_P1_NOSDATAT0                          STV090x_Px_NOSDATATy(1, 0)
++#define STV090x_P1_NOSDATAT1                          STV090x_Px_NOSDATATy(1, 1)
++#define STV090x_P2_NOSDATAT0                          STV090x_Px_NOSDATATy(2, 0)
++#define STV090x_P2_NOSDATAT1                          STV090x_Px_NOSDATATy(2, 1)
++#define STV090x_OFFST_Px_NOSDATAT_UNNORMED_FIELD      0
++#define STV090x_WIDTH_Px_NOSDATAT_UNNORMED_FIELD      8
++
++#define STV090x_Px_NOSDATAy(__x, __y)         (0xf48b - (__x - 1) * 0x200 - __y * 0x1)
++#define STV090x_P1_NOSDATA0                   STV090x_Px_NOSDATAy(1, 0)
++#define STV090x_P1_NOSDATA1                   STV090x_Px_NOSDATAy(1, 1)
++#define STV090x_P2_NOSDATA0                   STV090x_Px_NOSDATAy(2, 0)
++#define STV090x_P2_NOSDATA1                   STV090x_Px_NOSDATAy(2, 1)
++#define STV090x_OFFST_Px_NOSDATA_UNNORMED_FIELD       0
++#define STV090x_WIDTH_Px_NOSDATA_UNNORMED_FIELD       8
++
++#define STV090x_Px_NOSPLHTy(__x, __y)         (0xf48d - (__x - 1) * 0x200 - __y * 0x1)
++#define STV090x_P1_NOSPLHT0                   STV090x_Px_NOSPLHTy(1, 0)
++#define STV090x_P1_NOSPLHT1                   STV090x_Px_NOSPLHTy(1, 1)
++#define STV090x_P2_NOSPLHT0                   STV090x_Px_NOSPLHTy(2, 0)
++#define STV090x_P2_NOSPLHT1                   STV090x_Px_NOSPLHTy(2, 1)
++#define STV090x_OFFST_Px_NOSPLHT_UNNORMED_FIELD       0
++#define STV090x_WIDTH_Px_NOSPLHT_UNNORMED_FIELD       8
++
++#define STV090x_Px_NOSPLHy(__x, __y)          (0xf48f - (__x - 1) * 0x200 - __y * 0x1)
++#define STv090x_P1_NOSPLH0                    STV090x_Px_NOSPLHy(1, 0)
++#define STv090x_P1_NOSPLH1                    STV090x_Px_NOSPLHy(1, 1)
++#define STv090x_P2_NOSPLH0                    STV090x_Px_NOSPLHy(2, 0)
++#define STv090x_P2_NOSPLH1                    STV090x_Px_NOSPLHy(2, 1)
++#define STV090x_OFFST_Px_NOSPLH_UNNORMED_FIELD        0
++#define STV090x_WIDTH_Px_NOSPLH_UNNORMED_FIELD        8
++
++#define STV090x_Px_CAR2CFG(__x)                       (0xf490 - (__x - 1) * 0x200)
++#define STV090x_P1_CAR2CFG                    STV090x_Px_CAR2CFG(1)
++#define STV090x_P2_CAR2CFG                    STV090x_Px_CAR2CFG(2)
++#define STV090x_OFFST_Px_PN4_SELECT_FIELD     6
++#define STV090x_WIDTH_Px_PN4_SELECT_FIELD     1
++#define STV090x_OFFST_Px_CFR2_STOPDVBS1_FIELD 5
++#define STV090x_WIDTH_Px_CFR2_STOPDVBS1_FIELD 1
++#define STV090x_OFFST_Px_ROTA2ON_FIELD                2
++#define STV090x_WIDTH_Px_ROTA2ON_FIELD                1
++#define STV090x_OFFST_Px_PH_DET_ALGO2_FIELD   0
++#define STV090x_WIDTH_Px_PH_DET_ALGO2_FIELD   2
++
++#define STV090x_Px_ACLC2(__x)                 (0xf491 - (__x - 1) * 0x200)
++#define STV090x_P1_ACLC2                      STV090x_Px_ACLC2(1)
++#define STV090x_P2_ACLC2                      STV090x_Px_ACLC2(2)
++#define STV090x_OFFST_Px_CAR2_ALPHA_MANT_FIELD        4
++#define STV090x_WIDTH_Px_CAR2_ALPHA_MANT_FIELD        2
++#define STV090x_OFFST_Px_CAR2_ALPHA_EXP_FIELD 0
++#define STV090x_WIDTH_Px_CAR2_ALPHA_EXP_FIELD 4
++
++#define STV090x_Px_BCLC2(__x)                 (0xf492 - (__x - 1) * 0x200)
++#define STV090x_P1_BCLC2                      STV090x_Px_BCLC2(1)
++#define STV090x_P2_BCLC2                      STV090x_Px_BCLC2(2)
++#define STV090x_OFFST_Px_CAR2_BETA_MANT_FIELD 4
++#define STV090x_WIDTH_Px_CAR2_BETA_MANT_FIELD 2
++#define STV090x_OFFST_Px_CAR2_BETA_EXP_FIELD  0
++#define STV090x_WIDTH_Px_CAR2_BETA_EXP_FIELD  4
++
++#define STV090x_Px_ACLC2S2Q(__x)              (0xf497 - (__x - 1) * 0x200)
++#define STV090x_P1_ACLC2S2Q                   STV090x_Px_ACLC2S2Q(1)
++#define STV090x_P2_ACLC2S2Q                   STV090x_Px_ACLC2S2Q(2)
++#define STV090x_OFFST_Px_ENAB_SPSKSYMB_FIELD  7
++#define STV090x_WIDTH_Px_ENAB_SPSKSYMB_FIELD  1
++#define STV090x_OFFST_Px_CAR2S2_Q_ALPH_M_FIELD        4
++#define STV090x_WIDTH_Px_CAR2S2_Q_ALPH_M_FIELD        2
++#define STV090x_OFFST_Px_CAR2S2_Q_ALPH_E_FIELD        0
++#define STV090x_WIDTH_Px_CAR2S2_Q_ALPH_E_FIELD        4
++
++#define STV090x_Px_ACLC2S28(__x)              (0xf498 - (__x - 1) * 0x200)
++#define STV090x_P1_ACLC2S28                   STV090x_Px_ACLC2S28(1)
++#define STV090x_P2_ACLC2S28                   STV090x_Px_ACLC2S28(2)
++#define STV090x_OFFST_Px_CAR2S2_8_ALPH_M_FIELD        4
++#define STV090x_WIDTH_Px_CAR2S2_8_ALPH_M_FIELD        2
++#define STV090x_OFFST_Px_CAR2S2_8_ALPH_E_FIELD        0
++#define STV090x_WIDTH_Px_CAR2S2_8_ALPH_E_FIELD        4
++
++#define STV090x_Px_ACLC2S216A(__x)            (0xf499 - (__x - 1) * 0x200)
++#define STV090x_P1_ACLC2S216A                 STV090x_Px_ACLC2S216A(1)
++#define STV090x_P2_ACLC2S216A                 STV090x_Px_ACLC2S216A(2)
++#define STV090x_OFFST_Px_CAR2S2_16A_ALPH_M_FIELD      4
++#define STV090x_WIDTH_Px_CAR2S2_16A_ALPH_M_FIELD      2
++#define STV090x_OFFST_Px_CAR2S2_16A_ALPH_E_FIELD      0
++#define STV090x_WIDTH_Px_CAR2S2_16A_ALPH_E_FIELD      4
++
++#define STV090x_Px_ACLC2S232A(__x)            (0xf49A - (__x - 1) * 0x200)
++#define STV090x_P1_ACLC2S232A                 STV090x_Px_ACLC2S232A(1)
++#define STV090x_P2_ACLC2S232A                 STV090x_Px_ACLC2S232A(2)
++#define STV090x_OFFST_Px_CAR2S2_32A_ALPH_M_FIELD      4
++#define STV090x_WIDTH_Px_CAR2S2_32A_ALPH_M_FIELD      2
++#define STV090x_OFFST_Px_CAR2S2_32A_ALPH_E_FIELD      0
++#define STV090x_WIDTH_Px_CAR2S2_32A_ALPH_E_FIELD      4
++
++#define STV090x_Px_BCLC2S2Q(__x)              (0xf49c - (__x - 1) * 0x200)
++#define STV090x_P1_BCLC2S2Q                   STV090x_Px_BCLC2S2Q(1)
++#define STV090x_P2_BCLC2S2Q                   STV090x_Px_BCLC2S2Q(2)
++#define STV090x_OFFST_Px_CAR2S2_Q_BETA_M_FIELD        4
++#define STV090x_WIDTH_Px_CAR2S2_Q_BETA_M_FIELD        2
++#define STV090x_OFFST_Px_CAR2S2_Q_BETA_E_FIELD        0
++#define STV090x_WIDTH_Px_CAR2S2_Q_BETA_E_FIELD        4
++
++#define STV090x_Px_BCLC2S28(__x)              (0xf49d - (__x - 1) * 0x200)
++#define STV090x_P1_BCLC2S28                   STV090x_Px_BCLC2S28(1)
++#define STV090x_P2_BCLC2S28                   STV090x_Px_BCLC2S28(1)
++#define STV090x_OFFST_Px_CAR2S2_8_BETA_M_FIELD        4
++#define STV090x_WIDTH_Px_CAR2S2_8_BETA_M_FIELD        2
++#define STV090x_OFFST_Px_CAR2S2_8_BETA_E_FIELD        0
++#define STV090x_WIDTH_Px_CAR2S2_8_BETA_E_FIELD        4
++
++#define STV090x_Px_BCLC2S216A(__x)            (0xf49e - (__x - 1) * 0x200)
++#define STV090x_P1_BCLC2S216A                 STV090x_Px_BCLC2S216A(1)
++#define STV090x_P2_BCLC2S216A                 STV090x_Px_BCLC2S216A(1)
++#define STV090x_OFFST_Px_CAR2S2_16A_BETA_M_FIELD      4
++#define STV090x_WIDTH_Px_CAR2S2_16A_BETA_M_FIELD      2
++#define STV090x_OFFST_Px_CAR2S2_16A_BETA_E_FIELD      0
++#define STV090x_WIDTH_Px_CAR2S2_16A_BETA_E_FIELD      4
++
++#define STV090x_Px_BCLC2S232A(__x)            (0xf49f - (__x - 1) * 0x200)
++#define STV090x_P1_BCLC2S232A                 STV090x_Px_BCLC2S232A(1)
++#define STV090x_P2_BCLC2S232A                 STV090x_Px_BCLC2S232A(1)
++#define STV090x_OFFST_Px_CAR2S2_32A_BETA_M_FIELD      4
++#define STV090x_WIDTH_Px_CAR2S2_32A_BETA_M_FIELD      2
++#define STV090x_OFFST_Px_CAR2S2_32A_BETA_E_FIELD      0
++#define STV090x_WIDTH_Px_CAR2S2_32A_BETA_E_FIELD      4
++
++#define STV090x_Px_PLROOT2(__x)                       (0xf4ac - (__x - 1) * 0x200)
++#define STV090x_P1_PLROOT2                    STV090x_Px_PLROOT2(1)
++#define STV090x_P2_PLROOT2                    STV090x_Px_PLROOT2(2)
++#define STV090x_OFFST_Px_PLSCRAMB_MODE_FIELD  2
++#define STV090x_WIDTH_Px_PLSCRAMB_MODE_FIELD  2
++#define STV090x_OFFST_Px_PLSCRAMB_ROOT_FIELD  0
++#define STV090x_WIDTH_Px_PLSCRAMB_ROOT_FIELD  2
++
++#define STV090x_Px_PLROOT1(__x)                       (0xf4ad - (__x - 1) * 0x200)
++#define STV090x_P1_PLROOT1                    STV090x_Px_PLROOT1(1)
++#define STV090x_P2_PLROOT1                    STV090x_Px_PLROOT1(2)
++#define STV090x_OFFST_Px_PLSCRAMB_ROOT1_FIELD 0
++#define STV090x_WIDTH_Px_PLSCRAMB_ROOT1_FIELD 8
++
++#define STV090x_Px_PLROOT0(__x)                       (0xf4ae - (__x - 1) * 0x200)
++#define STV090x_P1_PLROOT0                    STV090x_Px_PLROOT0(1)
++#define STV090x_P2_PLROOT0                    STV090x_Px_PLROOT0(2)
++#define STV090x_OFFST_Px_PLSCRAMB_ROOT0_FIELD 0
++#define STV090x_WIDTH_Px_PLSCRAMB_ROOT0_FIELD 8
++
++#define STV090x_Px_MODCODLST0(__x)            (0xf4b0 - (__x - 1) * 0x200) /* check */
++#define STV090x_P1_MODCODLST0                 STV090x_Px_MODCODLST0(1)
++#define STV090x_P2_MODCODLST0                 STV090x_Px_MODCODLST0(2)
++
++#define STV090x_Px_MODCODLST1(__x)            (0xf4b1 - (__x - 1) * 0x200)
++#define STV090x_P1_MODCODLST1                 STV090x_Px_MODCODLST1(1)
++#define STV090x_P2_MODCODLST1                 STV090x_Px_MODCODLST1(2)
++#define STV090x_OFFST_Px_DIS_MODCOD29_FIELD   4
++#define STV090x_WIDTH_Px_DIS_MODCOD29_FIELD   4
++#define STV090x_OFFST_Px_DIS_32PSK_9_10_FIELD 0
++#define STV090x_WIDTH_Px_DIS_32PSK_9_10_FIELD 4
++
++#define STV090x_Px_MODCODLST2(__x)            (0xf4b2 - (__x - 1) * 0x200)
++#define STV090x_P1_MODCODLST2                 STV090x_Px_MODCODLST2(1)
++#define STV090x_P2_MODCODLST2                 STV090x_Px_MODCODLST2(2)
++#define STV090x_OFFST_Px_DIS_32PSK_8_9_FIELD  4
++#define STV090x_WIDTH_Px_DIS_32PSK_8_9_FIELD  4
++#define STV090x_OFFST_Px_DIS_32PSK_5_6_FIELD  0
++#define STV090x_WIDTH_Px_DIS_32PSK_5_6_FIELD  4
++
++#define STV090x_Px_MODCODLST3(__x)            (0xf4b3 - (__x - 1) * 0x200)
++#define STV090x_P1_MODCODLST3                 STV090x_Px_MODCODLST3(1)
++#define STV090x_P2_MODCODLST3                 STV090x_Px_MODCODLST3(2)
++#define STV090x_OFFST_Px_DIS_32PSK_4_5_FIELD  4
++#define STV090x_WIDTH_Px_DIS_32PSK_4_5_FIELD  4
++#define STV090x_OFFST_Px_DIS_32PSK_3_4_FIELD  0
++#define STV090x_WIDTH_Px_DIS_32PSK_3_4_FIELD  4
++
++#define STV090x_Px_MODCODLST4(__x)            (0xf4b4 - (__x - 1) * 0x200)
++#define STV090x_P1_MODCODLST4                 STV090x_Px_MODCODLST4(1)
++#define STV090x_P2_MODCODLST4                 STV090x_Px_MODCODLST4(2)
++#define STV090x_OFFST_Px_DIS_16PSK_9_10_FIELD 4
++#define STV090x_WIDTH_Px_DIS_16PSK_9_10_FIELD 4
++#define STV090x_OFFST_Px_DIS_16PSK_8_9_FIELD  0
++#define STV090x_WIDTH_Px_DIS_16PSK_8_9_FIELD  4
++
++#define STV090x_Px_MODCODLST5(__x)            (0xf4b5 - (__x - 1) * 0x200)
++#define STV090x_P1_MODCODLST5                 STV090x_Px_MODCODLST5(1)
++#define STV090x_P2_MODCODLST5                 STV090x_Px_MODCODLST5(2)
++#define STV090x_OFFST_Px_DIS_16PSK_5_6_FIELD  4
++#define STV090x_WIDTH_Px_DIS_16PSK_5_6_FIELD  4
++#define STV090x_OFFST_Px_DIS_16PSK_4_5_FIELD  0
++#define STV090x_WIDTH_Px_DIS_16PSK_4_5_FIELD  4
++
++#define STV090x_Px_MODCODLST6(__x)            (0xf4b6 - (__x - 1) * 0x200)
++#define STV090x_P1_MODCODLST6                 STV090x_Px_MODCODLST6(1)
++#define STV090x_P2_MODCODLST6                 STV090x_Px_MODCODLST6(2)
++#define STV090x_OFFST_Px_DIS_16PSK_3_4_FIELD  4
++#define STV090x_WIDTH_Px_DIS_16PSK_3_4_FIELD  4
++#define STV090x_OFFST_Px_DIS_16PSK_2_3_FIELD  0
++#define STV090x_WIDTH_Px_DIS_16PSK_2_3_FIELD  4
++
++#define STV090x_Px_MODCODLST7(__x)            (0xf4b7 - (__x - 1) * 0x200)
++#define STV090x_P1_MODCODLST7                 STV090x_Px_MODCODLST7(1)
++#define STV090x_P2_MODCODLST7                 STV090x_Px_MODCODLST7(2)
++#define STV090x_OFFST_Px_DIS_8P_9_10_FIELD    4
++#define STV090x_WIDTH_Px_DIS_8P_9_10_FIELD    4
++#define STV090x_OFFST_Px_DIS_8P_8_9_FIELD     0
++#define STV090x_WIDTH_Px_DIS_8P_8_9_FIELD     4
++
++#define STV090x_Px_MODCODLST8(__x)            (0xf4b8 - (__x - 1) * 0x200)
++#define STV090x_P1_MODCODLST8                 STV090x_Px_MODCODLST8(1)
++#define STV090x_P2_MODCODLST8                 STV090x_Px_MODCODLST8(2)
++#define STV090x_OFFST_Px_DIS_8P_5_6_FIELD     4
++#define STV090x_WIDTH_Px_DIS_8P_5_6_FIELD     4
++#define STV090x_OFFST_Px_DIS_8P_3_4_FIELD     0
++#define STV090x_WIDTH_Px_DIS_8P_3_4_FIELD     4
++
++#define STV090x_Px_MODCODLST9(__x)            (0xf4b9 - (__x - 1) * 0x200)
++#define STV090x_P1_MODCODLST9                 STV090x_Px_MODCODLST9(1)
++#define STV090x_P2_MODCODLST9                 STV090x_Px_MODCODLST9(2)
++#define STV090x_OFFST_Px_DIS_8P_2_3_FIELD     4
++#define STV090x_WIDTH_Px_DIS_8P_2_3_FIELD     4
++#define STV090x_OFFST_Px_DIS_8P_3_5_FIELD     0
++#define STV090x_WIDTH_Px_DIS_8P_3_5_FIELD     4
++
++#define STV090x_Px_MODCODLSTA(__x)            (0xf4ba - (__x - 1) * 0x200)
++#define STV090x_P1_MODCODLSTA                 STV090x_Px_MODCODLSTA(1)
++#define STV090x_P2_MODCODLSTA                 STV090x_Px_MODCODLSTA(2)
++#define STV090x_OFFST_Px_DIS_QP_9_10_FIELD    4
++#define STV090x_WIDTH_Px_DIS_QP_9_10_FIELD    4
++#define STV090x_OFFST_Px_DIS_QP_8_9_FIELD     0
++#define STV090x_WIDTH_Px_DIS_QP_8_9_FIELD     4
++
++#define STV090x_Px_MODCODLSTB(__x)            (0xf4bb - (__x - 1) * 0x200)
++#define STV090x_P1_MODCODLSTB                 STV090x_Px_MODCODLSTB(1)
++#define STV090x_P2_MODCODLSTB                 STV090x_Px_MODCODLSTB(2)
++#define STV090x_OFFST_Px_DIS_QP_5_6_FIELD     4
++#define STV090x_WIDTH_Px_DIS_QP_5_6_FIELD     4
++#define STV090x_OFFST_Px_DIS_QP_4_5_FIELD     0
++#define STV090x_WIDTH_Px_DIS_QP_4_5_FIELD     4
++
++#define STV090x_Px_MODCODLSTC(__x)            (0xf4bc - (__x - 1) * 0x200)
++#define STV090x_P1_MODCODLSTC                 STV090x_Px_MODCODLSTC(1)
++#define STV090x_P2_MODCODLSTC                 STV090x_Px_MODCODLSTC(2)
++#define STV090x_OFFST_Px_DIS_QP_3_4_FIELD     4
++#define STV090x_WIDTH_Px_DIS_QP_3_4_FIELD     4
++#define STV090x_OFFST_Px_DIS_QP_2_3_FIELD     0
++#define STV090x_WIDTH_Px_DIS_QP_2_3_FIELD     4
++
++#define STV090x_Px_MODCODLSTD(__x)            (0xf4bd - (__x - 1) * 0x200)
++#define STV090x_P1_MODCODLSTD                 STV090x_Px_MODCODLSTD(1)
++#define STV090x_P2_MODCODLSTD                 STV090x_Px_MODCODLSTD(2)
++#define STV090x_OFFST_Px_DIS_QP_3_5_FIELD     4
++#define STV090x_WIDTH_Px_DIS_QP_3_5_FIELD     4
++#define STV090x_OFFST_Px_DIS_QP_1_2_FIELD     0
++#define STV090x_WIDTH_Px_DIS_QP_1_2_FIELD     4
++
++#define STV090x_Px_MODCODLSTE(__x)            (0xf4be - (__x - 1) * 0x200)
++#define STV090x_P1_MODCODLSTE                 STV090x_Px_MODCODLSTE(1)
++#define STV090x_P2_MODCODLSTE                 STV090x_Px_MODCODLSTE(2)
++#define STV090x_OFFST_Px_DIS_QP_2_5_FIELD     4
++#define STV090x_WIDTH_Px_DIS_QP_2_5_FIELD     4
++#define STV090x_OFFST_Px_DIS_QP_1_3_FIELD     0
++#define STV090x_WIDTH_Px_DIS_QP_1_3_FIELD     4
++
++#define STV090x_Px_MODCODLSTF(__x)            (0xf4bf - (__x - 1) * 0x200)
++#define STV090x_P1_MODCODLSTF                 STV090x_Px_MODCODLSTF(1)
++#define STV090x_P2_MODCODLSTF                 STV090x_Px_MODCODLSTF(2)
++#define STV090x_OFFST_Px_DIS_QP_1_4_FIELD     4
++#define STV090x_WIDTH_Px_DIS_QP_1_4_FIELD     4
++
++#define STV090x_Px_GAUSSR0(__x)                       (0xf4c0 - (__x - 1) * 0x200)
++#define STV090x_P1_GAUSSR0                    STV090x_Px_GAUSSR0(1)
++#define STV090x_P2_GAUSSR0                    STV090x_Px_GAUSSR0(2)
++#define STV090x_OFFST_Px_EN_CCIMODE_FIELD     7
++#define STV090x_WIDTH_Px_EN_CCIMODE_FIELD     1
++#define STV090x_OFFST_Px_R0_GAUSSIEN_FIELD    0
++#define STV090x_WIDTH_Px_R0_GAUSSIEN_FIELD    7
++
++#define STV090x_Px_CCIR0(__x)                 (0xf4c1 - (__x - 1) * 0x200)
++#define STV090x_P1_CCIR0                      STV090x_Px_CCIR0(1)
++#define STV090x_P2_CCIR0                      STV090x_Px_CCIR0(2)
++#define STV090x_OFFST_Px_CCIDETECT_PLH_FIELD  7
++#define STV090x_WIDTH_Px_CCIDETECT_PLH_FIELD  1
++#define STV090x_OFFST_Px_R0_CCI_FIELD         0
++#define STV090x_WIDTH_Px_R0_CCI_FIELD         7
++
++#define STV090x_Px_CCIQUANT(__x)              (0xf4c2 - (__x - 1) * 0x200)
++#define STV090x_P1_CCIQUANT                   STV090x_Px_CCIQUANT(1)
++#define STV090x_P2_CCIQUANT                   STV090x_Px_CCIQUANT(2)
++#define STV090x_OFFST_Px_CCI_BETA_FIELD               5
++#define STV090x_WIDTH_Px_CCI_BETA_FIELD               3
++#define STV090x_OFFST_Px_CCI_QUANT_FIELD      0
++#define STV090x_WIDTH_Px_CCI_QUANT_FIELD      5
++
++#define STV090x_Px_CCITHRESH(__x)             (0xf4c3 - (__x - 1) * 0x200)
++#define STV090x_P1_CCITHRESH                  STV090x_Px_CCITHRESH(1)
++#define STV090x_P2_CCITHRESH                  STV090x_Px_CCITHRESH(2)
++#define STV090x_OFFST_Px_CCI_THRESHOLD_FIELD  0
++#define STV090x_WIDTH_Px_CCI_THRESHOLD_FIELD  8
++
++#define STV090x_Px_CCIACC(__x)                        (0xf4c4 - (__x - 1) * 0x200)
++#define STV090x_P1_CCIACC                     STV090x_Px_CCIACC(1)
++#define STV090x_P2_CCIACC                     STV090x_Px_CCIACC(1)
++#define STV090x_OFFST_Px_CCI_VALUE_FIELD      0
++#define STV090x_WIDTH_Px_CCI_VALUE_FIELD      8
++
++#define STV090x_Px_DMDRESCFG(__x)             (0xF4C6 - (__x - 1) * 0x200)
++#define STV090x_P1_DMDRESCFG                  STV090x_Px_DMDRESCFG(1)
++#define STV090x_P2_DMDRESCFG                  STV090x_Px_DMDRESCFG(2)
++#define STV090x_OFFST_Px_DMDRES_RESET_FIELD   7
++#define STV090x_WIDTH_Px_DMDRES_RESET_FIELD   1
++
++#define STV090x_Px_DMDRESADR(__x)             (0xF4C7 - (__x - 1) * 0x200)
++#define STV090x_P1_DMDRESADR                  STV090x_Px_DMDRESADR(1)
++#define STV090x_P2_DMDRESADR                  STV090x_Px_DMDRESADR(2)
++#define STV090x_OFFST_Px_DMDRES_RESNBR_FIELD  0
++#define STV090x_WIDTH_Px_DMDRES_RESNBR_FIELD  4
++
++#define STV090x_Px_DMDRESDATAy(__x, __y)      (0xF4C8 - (__x - 1) * 0x200 + (7 - __y))
++#define STV090x_P1_DMDRESDATA0                        STV090x_Px_DMDRESDATAy(1, 0)
++#define STV090x_P1_DMDRESDATA1                        STV090x_Px_DMDRESDATAy(1, 1)
++#define STV090x_P1_DMDRESDATA2                        STV090x_Px_DMDRESDATAy(1, 2)
++#define STV090x_P1_DMDRESDATA3                        STV090x_Px_DMDRESDATAy(1, 3)
++#define STV090x_P1_DMDRESDATA4                        STV090x_Px_DMDRESDATAy(1, 4)
++#define STV090x_P1_DMDRESDATA5                        STV090x_Px_DMDRESDATAy(1, 5)
++#define STV090x_P1_DMDRESDATA6                        STV090x_Px_DMDRESDATAy(1, 6)
++#define STV090x_P1_DMDRESDATA7                        STV090x_Px_DMDRESDATAy(1, 7)
++#define STV090x_P2_DMDRESDATA0                        STV090x_Px_DMDRESDATAy(2, 0)
++#define STV090x_P2_DMDRESDATA1                        STV090x_Px_DMDRESDATAy(2, 1)
++#define STV090x_P2_DMDRESDATA2                        STV090x_Px_DMDRESDATAy(2, 2)
++#define STV090x_P2_DMDRESDATA3                        STV090x_Px_DMDRESDATAy(2, 3)
++#define STV090x_P2_DMDRESDATA4                        STV090x_Px_DMDRESDATAy(2, 4)
++#define STV090x_P2_DMDRESDATA5                        STV090x_Px_DMDRESDATAy(2, 5)
++#define STV090x_P2_DMDRESDATA6                        STV090x_Px_DMDRESDATAy(2, 6)
++#define STV090x_P2_DMDRESDATA7                        STV090x_Px_DMDRESDATAy(2, 7)
++#define STV090x_OFFST_Px_DMDRES_DATA_FIELD    0
++#define STV090x_WIDTH_Px_DMDRES_DATA_FIELD    8
++
++#define STV090x_Px_FFEIy(__x, __y)            (0xf4d0 - (__x - 1) * 0x200 + 0x2 * (__y - 1))
++#define STV090x_P1_FFEI1                      STV090x_Px_FFEIy(1, 1)
++#define STV090x_P1_FFEI2                      STV090x_Px_FFEIy(1, 2)
++#define STV090x_P1_FFEI3                      STV090x_Px_FFEIy(1, 3)
++#define STV090x_P1_FFEI4                      STV090x_Px_FFEIy(1, 4)
++#define STV090x_P2_FFEI1                      STV090x_Px_FFEIy(2, 1)
++#define STV090x_P2_FFEI2                      STV090x_Px_FFEIy(2, 2)
++#define STV090x_P2_FFEI3                      STV090x_Px_FFEIy(2, 3)
++#define STV090x_P2_FFEI4                      STV090x_Px_FFEIy(2, 4)
++#define STV090x_OFFST_Px_FFE_ACCIy_FIELD      0
++#define STV090x_WIDTH_Px_FFE_ACCIy_FIELD      8
++
++#define STV090x_Px_FFEQy(__x, __y)            (0xf4d1 - (__x - 1) * 0x200 + 0x2 * (__y - 1))
++#define STV090x_P1_FFEQ1                      STV090x_Px_FFEQy(1, 1)
++#define STV090x_P1_FFEQ2                      STV090x_Px_FFEQy(1, 2)
++#define STV090x_P1_FFEQ3                      STV090x_Px_FFEQy(1, 3)
++#define STV090x_P1_FFEQ4                      STV090x_Px_FFEQy(1, 4)
++#define STV090x_P2_FFEQ1                      STV090x_Px_FFEQy(2, 1)
++#define STV090x_P2_FFEQ2                      STV090x_Px_FFEQy(2, 2)
++#define STV090x_P2_FFEQ3                      STV090x_Px_FFEQy(2, 3)
++#define STV090x_P2_FFEQ4                      STV090x_Px_FFEQy(2, 4)
++#define STV090x_OFFST_Px_FFE_ACCQy_FIELD      0
++#define STV090x_WIDTH_Px_FFE_ACCQy_FIELD      8
++
++#define STV090x_Px_FFECFG(__x)                        (0xf4d8 - (__x - 1) * 0x200)
++#define STV090x_P1_FFECFG                     STV090x_Px_FFECFG(1)
++#define STV090x_P2_FFECFG                     STV090x_Px_FFECFG(2)
++#define STV090x_OFFST_Px_EQUALFFE_ON_FIELD    6
++#define STV090x_WIDTH_Px_EQUALFFE_ON_FIELD    1
++
++#define STV090x_Px_SMAPCOEF7(__x)             (0xf500 - (__x - 1) * 0x200)
++#define STV090x_P1_SMAPCOEF7                  STV090x_Px_SMAPCOEF7(1)
++#define STV090x_P2_SMAPCOEF7                  STV090x_Px_SMAPCOEF7(2)
++#define STV090x_OFFST_Px_DIS_QSCALE_FIELD     7
++#define STV090x_WIDTH_Px_DIS_QSCALE_FIELD     1
++#define STV090x_OFFST_Px_SMAPCOEF_Q_LLR12_FIELD       0
++#define STV090x_WIDTH_Px_SMAPCOEF_Q_LLR12_FIELD       7
++
++#define STV090x_Px_SMAPCOEF6(__x)             (0xf501 - (__x - 1) * 0x200)
++#define STV090x_P1_SMAPCOEF6                  STV090x_Px_SMAPCOEF6(1)
++#define STV090x_P2_SMAPCOEF6                  STV090x_Px_SMAPCOEF6(2)
++#define STV090x_OFFST_Px_ADJ_8PSKLLR1_FIELD   2
++#define STV090x_WIDTH_Px_ADJ_8PSKLLR1_FIELD   1
++#define STV090x_OFFST_Px_OLD_8PSKLLR1_FIELD   1
++#define STV090x_WIDTH_Px_OLD_8PSKLLR1_FIELD   1
++#define STV090x_OFFST_Px_DIS_AB8PSK_FIELD     0
++#define STV090x_WIDTH_Px_DIS_AB8PSK_FIELD     1
++
++#define STV090x_Px_SMAPCOEF5(__x)                     (0xf502 - (__x - 1) * 0x200)
++#define STV090x_P1_SMAPCOEF5                          STV090x_Px_SMAPCOEF5(1)
++#define STV090x_P2_SMAPCOEF5                          STV090x_Px_SMAPCOEF5(2)
++#define STV090x_OFFST_Px_DIS_8SCALE_FIELD             7
++#define STV090x_WIDTH_Px_DIS_8SCALE_FIELD             1
++#define STV090x_OFFST_Px_SMAPCOEF_8P_LLR23_FIELD      0
++#define STV090x_WIDTH_Px_SMAPCOEF_8P_LLR23_FIELD      7
++
++#define STV090x_Px_DMDPLHSTAT(__x)            (0xF520 - (__x - 1) * 0x200)
++#define STV090x_P1_DMDPLHSTAT                 STV090x_Px_DMDPLHSTAT(1)
++#define STV090x_P2_DMDPLHSTAT                 STV090x_Px_DMDPLHSTAT(2)
++#define STV090x_OFFST_Px_PLH_STATISTIC_FIELD  0
++#define STV090x_WIDTH_Px_PLH_STATISTIC_FIELD  8
++
++#define STV090x_Px_LOCKTIMEy(__x, __y)                (0xF525 - (__x - 1) * 0x200 - __y * 0x1)
++#define STV090x_P1_LOCKTIME0                  STV090x_Px_LOCKTIMEy(1, 0)
++#define STV090x_P1_LOCKTIME1                  STV090x_Px_LOCKTIMEy(1, 1)
++#define STV090x_P1_LOCKTIME2                  STV090x_Px_LOCKTIMEy(1, 2)
++#define STV090x_P1_LOCKTIME3                  STV090x_Px_LOCKTIMEy(1, 3)
++#define STV090x_P2_LOCKTIME0                  STV090x_Px_LOCKTIMEy(2, 0)
++#define STV090x_P2_LOCKTIME1                  STV090x_Px_LOCKTIMEy(2, 1)
++#define STV090x_P2_LOCKTIME2                  STV090x_Px_LOCKTIMEy(2, 2)
++#define STV090x_P2_LOCKTIME3                  STV090x_Px_LOCKTIMEy(2, 3)
++#define STV090x_OFFST_Px_DEMOD_LOCKTIME_FIELD 0
++#define STV090x_WIDTH_Px_DEMOD_LOCKTIME_FIELD 8
++
++#define STV090x_Px_TNRCFG(__x)                        (0xf4e0 - (__x - 1) * 0x200) /* check */
++#define STV090x_P1_TNRCFG                     STV090x_Px_TNRCFG(1)
++#define STV090x_P2_TNRCFG                     STV090x_Px_TNRCFG(2)
++
++#define STV090x_Px_TNRCFG2(__x)                       (0xf4e1 - (__x - 1) * 0x200)
++#define STV090x_P1_TNRCFG2                    STV090x_Px_TNRCFG2(1)
++#define STV090x_P2_TNRCFG2                    STV090x_Px_TNRCFG2(2)
++#define STV090x_OFFST_Px_TUN_IQSWAP_FIELD     7
++#define STV090x_WIDTH_Px_TUN_IQSWAP_FIELD     1
++
++#define STV090x_Px_VITSCALE(__x)              (0xf532 - (__x - 1) * 0x200)
++#define STV090x_P1_VITSCALE                   STV090x_Px_VITSCALE(1)
++#define STV090x_P2_VITSCALE                   STV090x_Px_VITSCALE(2)
++#define STV090x_OFFST_Px_NVTH_NOSRANGE_FIELD  7
++#define STV090x_WIDTH_Px_NVTH_NOSRANGE_FIELD  1
++#define STV090x_OFFST_Px_VERROR_MAXMODE_FIELD 6
++#define STV090x_WIDTH_Px_VERROR_MAXMODE_FIELD 1
++#define STV090x_OFFST_Px_NSLOWSN_LOCKED_FIELD 3
++#define STV090x_WIDTH_Px_NSLOWSN_LOCKED_FIELD 1
++#define STV090x_OFFST_Px_DIS_RSFLOCK_FIELD    1
++#define STV090x_WIDTH_Px_DIS_RSFLOCK_FIELD    1
++
++#define STV090x_Px_FECM(__x)                  (0xf533 - (__x - 1) * 0x200)
++#define STV090x_P1_FECM                               STV090x_Px_FECM(1)
++#define STV090x_P2_FECM                               STV090x_Px_FECM(2)
++#define STV090x_OFFST_Px_DSS_DVB_FIELD                7
++#define STV090x_WIDTH_Px_DSS_DVB_FIELD                1
++#define STV090x_OFFST_Px_DSS_SRCH_FIELD               4
++#define STV090x_WIDTH_Px_DSS_SRCH_FIELD               1
++#define STV090x_OFFST_Px_SYNCVIT_FIELD                1
++#define STV090x_WIDTH_Px_SYNCVIT_FIELD                1
++#define STV090x_OFFST_Px_IQINV_FIELD          0
++#define STV090x_WIDTH_Px_IQINV_FIELD          1
++
++#define STV090x_Px_VTH12(__x)                 (0xf534 - (__x - 1) * 0x200)
++#define STV090x_P1_VTH12                      STV090x_Px_VTH12(1)
++#define STV090x_P2_VTH12                      STV090x_Px_VTH12(2)
++#define STV090x_OFFST_Px_VTH12_FIELD          0
++#define STV090x_WIDTH_Px_VTH12_FIELD          8
++
++#define STV090x_Px_VTH23(__x)                 (0xf535 - (__x - 1) * 0x200)
++#define STV090x_P1_VTH23                      STV090x_Px_VTH23(1)
++#define STV090x_P2_VTH23                      STV090x_Px_VTH23(2)
++#define STV090x_OFFST_Px_VTH23_FIELD          0
++#define STV090x_WIDTH_Px_VTH23_FIELD          8
++
++#define STV090x_Px_VTH34(__x)                 (0xf536 - (__x - 1) * 0x200)
++#define STV090x_P1_VTH34                      STV090x_Px_VTH34(1)
++#define STV090x_P2_VTH34                      STV090x_Px_VTH34(2)
++#define STV090x_OFFST_Px_VTH34_FIELD          0
++#define STV090x_WIDTH_Px_VTH34_FIELD          8
++
++#define STV090x_Px_VTH56(__x)                 (0xf537 - (__x - 1) * 0x200)
++#define STV090x_P1_VTH56                      STV090x_Px_VTH56(1)
++#define STV090x_P2_VTH56                      STV090x_Px_VTH56(2)
++#define STV090x_OFFST_Px_VTH56_FIELD          0
++#define STV090x_WIDTH_Px_VTH56_FIELD          8
++
++#define STV090x_Px_VTH67(__x)                 (0xf538 - (__x - 1) * 0x200)
++#define STV090x_P1_VTH67                      STV090x_Px_VTH67(1)
++#define STV090x_P2_VTH67                      STV090x_Px_VTH67(2)
++#define STV090x_OFFST_Px_VTH67_FIELD          0
++#define STV090x_WIDTH_Px_VTH67_FIELD          8
++
++#define STV090x_Px_VTH78(__x)                 (0xf539 - (__x - 1) * 0x200)
++#define STV090x_P1_VTH78                      STV090x_Px_VTH78(1)
++#define STV090x_P2_VTH78                      STV090x_Px_VTH78(2)
++#define STV090x_OFFST_Px_VTH78_FIELD          0
++#define STV090x_WIDTH_Px_VTH78_FIELD          8
++
++#define STV090x_Px_VITCURPUN(__x)             (0xf53a - (__x - 1) * 0x200)
++#define STV090x_P1_VITCURPUN                  STV090x_Px_VITCURPUN(1)
++#define STV090x_P2_VITCURPUN                  STV090x_Px_VITCURPUN(2)
++#define STV090x_OFFST_Px_VIT_CURPUN_FIELD     0
++#define STV090x_WIDTH_Px_VIT_CURPUN_FIELD     5
++
++#define STV090x_Px_VERROR(__x)                        (0xf53b - (__x - 1) * 0x200)
++#define STV090x_P1_VERROR                     STV090x_Px_VERROR(1)
++#define STV090x_P2_VERROR                     STV090x_Px_VERROR(2)
++#define STV090x_OFFST_Px_REGERR_VIT_FIELD     0
++#define STV090x_WIDTH_Px_REGERR_VIT_FIELD     8
++
++#define STV090x_Px_PRVIT(__x)                 (0xf53c - (__x - 1) * 0x200)
++#define STV090x_P1_PRVIT                      STV090x_Px_PRVIT(1)
++#define STV090x_P2_PRVIT                      STV090x_Px_PRVIT(2)
++#define STV090x_OFFST_Px_DIS_VTHLOCK_FIELD    6
++#define STV090x_WIDTH_Px_DIS_VTHLOCK_FIELD    1
++#define STV090x_OFFST_Px_E7_8VIT_FIELD                5
++#define STV090x_WIDTH_Px_E7_8VIT_FIELD                1
++#define STV090x_OFFST_Px_E6_7VIT_FIELD                4
++#define STV090x_WIDTH_Px_E6_7VIT_FIELD                1
++#define STV090x_OFFST_Px_E5_6VIT_FIELD                3
++#define STV090x_WIDTH_Px_E5_6VIT_FIELD                1
++#define STV090x_OFFST_Px_E3_4VIT_FIELD                2
++#define STV090x_WIDTH_Px_E3_4VIT_FIELD                1
++#define STV090x_OFFST_Px_E2_3VIT_FIELD                1
++#define STV090x_WIDTH_Px_E2_3VIT_FIELD                1
++#define STV090x_OFFST_Px_E1_2VIT_FIELD                0
++#define STV090x_WIDTH_Px_E1_2VIT_FIELD                1
++
++#define STV090x_Px_VAVSRVIT(__x)              (0xf53d - (__x - 1) * 0x200)
++#define STV090x_P1_VAVSRVIT                   STV090x_Px_VAVSRVIT(1)
++#define STV090x_P2_VAVSRVIT                   STV090x_Px_VAVSRVIT(2)
++#define STV090x_OFFST_Px_SNVIT_FIELD          4
++#define STV090x_WIDTH_Px_SNVIT_FIELD          2
++#define STV090x_OFFST_Px_TOVVIT_FIELD         2
++#define STV090x_WIDTH_Px_TOVVIT_FIELD         2
++#define STV090x_OFFST_Px_HYPVIT_FIELD         0
++#define STV090x_WIDTH_Px_HYPVIT_FIELD         2
++
++#define STV090x_Px_VSTATUSVIT(__x)            (0xf53e - (__x - 1) * 0x200)
++#define STV090x_P1_VSTATUSVIT                 STV090x_Px_VSTATUSVIT(1)
++#define STV090x_P2_VSTATUSVIT                 STV090x_Px_VSTATUSVIT(2)
++#define STV090x_OFFST_Px_PRFVIT_FIELD         4
++#define STV090x_WIDTH_Px_PRFVIT_FIELD         1
++#define STV090x_OFFST_Px_LOCKEDVIT_FIELD      3
++#define STV090x_WIDTH_Px_LOCKEDVIT_FIELD      1
++
++#define STV090x_Px_VTHINUSE(__x)              (0xf53f - (__x - 1) * 0x200)
++#define STV090x_P1_VTHINUSE                   STV090x_Px_VTHINUSE(1)
++#define STV090x_P2_VTHINUSE                   STV090x_Px_VTHINUSE(2)
++#define STV090x_OFFST_Px_VIT_INUSE_FIELD      0
++#define STV090x_WIDTH_Px_VIT_INUSE_FIELD      8
++
++#define STV090x_Px_KDIV12(__x)                        (0xf540 - (__x - 1) * 0x200)
++#define STV090x_P1_KDIV12                     STV090x_Px_KDIV12(1)
++#define STV090x_P2_KDIV12                     STV090x_Px_KDIV12(2)
++#define STV090x_OFFST_Px_K_DIVIDER_12_FIELD   0
++#define STV090x_WIDTH_Px_K_DIVIDER_12_FIELD   7
++
++#define STV090x_Px_KDIV23(__x)                        (0xf541 - (__x - 1) * 0x200)
++#define STV090x_P1_KDIV23                     STV090x_Px_KDIV23(1)
++#define STV090x_P2_KDIV23                     STV090x_Px_KDIV23(2)
++#define STV090x_OFFST_Px_K_DIVIDER_23_FIELD   0
++#define STV090x_WIDTH_Px_K_DIVIDER_23_FIELD   7
++
++#define STV090x_Px_KDIV34(__x)                        (0xf542 - (__x - 1) * 0x200)
++#define STV090x_P1_KDIV34                     STV090x_Px_KDIV34(1)
++#define STV090x_P2_KDIV34                     STV090x_Px_KDIV34(2)
++#define STV090x_OFFST_Px_K_DIVIDER_34_FIELD   0
++#define STV090x_WIDTH_Px_K_DIVIDER_34_FIELD   7
++
++#define STV090x_Px_KDIV56(__x)                        (0xf543 - (__x - 1) * 0x200)
++#define STV090x_P1_KDIV56                     STV090x_Px_KDIV56(1)
++#define STV090x_P2_KDIV56                     STV090x_Px_KDIV56(2)
++#define STV090x_OFFST_Px_K_DIVIDER_56_FIELD   0
++#define STV090x_WIDTH_Px_K_DIVIDER_56_FIELD   7
++
++#define STV090x_Px_KDIV67(__x)                        (0xf544 - (__x - 1) * 0x200)
++#define STV090x_P1_KDIV67                     STV090x_Px_KDIV67(1)
++#define STV090x_P2_KDIV67                     STV090x_Px_KDIV67(2)
++#define STV090x_OFFST_Px_K_DIVIDER_67_FIELD   0
++#define STV090x_WIDTH_Px_K_DIVIDER_67_FIELD   7
++
++#define STV090x_Px_KDIV78(__x)                        (0xf545 - (__x - 1) * 0x200)
++#define STV090x_P1_KDIV78                     STV090x_Px_KDIV78(1)
++#define STV090x_P2_KDIV78                     STV090x_Px_KDIV78(2)
++#define STV090x_OFFST_Px_K_DIVIDER_78_FIELD   0
++#define STV090x_WIDTH_Px_K_DIVIDER_78_FIELD   7
++
++#define STV090x_Px_PDELCTRL1(__x)             (0xf550 - (__x - 1) * 0x200)
++#define STV090x_P1_PDELCTRL1                  STV090x_Px_PDELCTRL1(1)
++#define STV090x_P2_PDELCTRL1                  STV090x_Px_PDELCTRL1(2)
++#define STV090x_OFFST_Px_INV_MISMASK_FIELD    7
++#define STV090x_WIDTH_Px_INV_MISMASK_FIELD    1
++#define STV090x_OFFST_Px_FILTER_EN_FIELD      5
++#define STV090x_WIDTH_Px_FILTER_EN_FIELD      1
++#define STV090x_OFFST_Px_EN_MIS00_FIELD               1
++#define STV090x_WIDTH_Px_EN_MIS00_FIELD               1
++#define STV090x_OFFST_Px_ALGOSWRST_FIELD      0
++#define STV090x_WIDTH_Px_ALGOSWRST_FIELD      1
++
++#define STV090x_Px_PDELCTRL2(__x)             (0xf551 - (__x - 1) * 0x200)
++#define STV090x_P1_PDELCTRL2                  STV090x_Px_PDELCTRL2(1)
++#define STV090x_P2_PDELCTRL2                  STV090x_Px_PDELCTRL2(2)
++#define STV090x_OFFST_Px_FORCE_CONTINUOUS     7
++#define STV090x_WIDTH_Px_FORCE_CONTINUOUS     1
++#define STV090x_OFFST_Px_RESET_UPKO_COUNT     6
++#define STV090x_WIDTH_Px_RESET_UPKO_COUNT     1
++#define STV090x_OFFST_Px_USER_PKTDELIN_NB     5
++#define STV090x_WIDTH_Px_USER_PKTDELIN_NB     1
++#define STV090x_OFFST_Px_FORCE_LOCKED         4
++#define STV090x_WIDTH_Px_FORCE_LOCKED         1
++#define STV090x_OFFST_Px_DATA_UNBBSCRAM               3
++#define STV090x_WIDTH_Px_DATA_UNBBSCRAM               1
++#define STV090x_OFFST_Px_FORCE_LONGPACKET     2
++#define STV090x_WIDTH_Px_FORCE_LONGPACKET     1
++#define STV090x_OFFST_Px_FRAME_MODE_FIELD     1
++#define STV090x_WIDTH_Px_FRAME_MODE_FIELD     1
++
++#define STV090x_Px_HYSTTHRESH(__x)            (0xf554 - (__x - 1) * 0x200)
++#define STV090x_P1_HYSTTHRESH                 STV090x_Px_HYSTTHRESH(1)
++#define STV090x_P2_HYSTTHRESH                 STV090x_Px_HYSTTHRESH(2)
++#define STV090x_OFFST_Px_UNLCK_THRESH_FIELD   4
++#define STV090x_WIDTH_Px_UNLCK_THRESH_FIELD   4
++#define STV090x_OFFST_Px_DELIN_LCK_THRESH_FIELD       0
++#define STV090x_WIDTH_Px_DELIN_LCK_THRESH_FIELD       4
++
++#define STV090x_Px_ISIENTRY(__x)              (0xf55e - (__x - 1) * 0x200)
++#define STV090x_P1_ISIENTRY                   STV090x_Px_ISIENTRY(1)
++#define STV090x_P2_ISIENTRY                   STV090x_Px_ISIENTRY(2)
++#define STV090x_OFFST_Px_ISI_ENTRY_FIELD      0
++#define STV090x_WIDTH_Px_ISI_ENTRY_FIELD      8
++
++#define STV090x_Px_ISIBITENA(__x)             (0xf55f - (__x - 1) * 0x200)
++#define STV090x_P1_ISIBITENA                  STV090x_Px_ISIBITENA(1)
++#define STV090x_P2_ISIBITENA                  STV090x_Px_ISIBITENA(2)
++#define STV090x_OFFST_Px_ISI_BIT_EN_FIELD     0
++#define STV090x_WIDTH_Px_ISI_BIT_EN_FIELD     8
++
++#define STV090x_Px_MATSTRy(__x, __y)          (0xf561 - (__x - 1) * 0x200 - __y * 0x1)
++#define STV090x_P1_MATSTR0                    STV090x_Px_MATSTRy(1, 0)
++#define STV090x_P1_MATSTR1                    STV090x_Px_MATSTRy(1, 1)
++#define STV090x_P2_MATSTR0                    STV090x_Px_MATSTRy(2, 0)
++#define STV090x_P2_MATSTR1                    STV090x_Px_MATSTRy(2, 1)
++#define STV090x_OFFST_Px_MATYPE_CURRENT_FIELD 0
++#define STV090x_WIDTH_Px_MATYPE_CURRENT_FIELD 8
++
++#define STV090x_Px_UPLSTRy(__x, __y)          (0xf563 - (__x - 1) * 0x200 - __y * 0x1)
++#define STV090x_P1_UPLSTR0                    STV090x_Px_UPLSTRy(1, 0)
++#define STV090x_P1_UPLSTR1                    STV090x_Px_UPLSTRy(1, 1)
++#define STV090x_P2_UPLSTR0                    STV090x_Px_UPLSTRy(2, 0)
++#define STV090x_P2_UPLSTR1                    STV090x_Px_UPLSTRy(2, 1)
++#define STV090x_OFFST_Px_UPL_CURRENT_FIELD    0
++#define STV090x_WIDTH_Px_UPL_CURRENT_FIELD    8
++
++#define STV090x_Px_DFLSTRy(__x, __y)          (0xf565 - (__x - 1) * 0x200 - __y * 0x1)
++#define STV090x_P1_DFLSTR0                    STV090x_Px_DFLSTRy(1, 0)
++#define STV090x_P1_DFLSTR1                    STV090x_Px_DFLSTRy(1, 1)
++#define STV090x_P2_DFLSTR0                    STV090x_Px_DFLSTRy(2, 0)
++#define STV090x_P2_DFLSTR1                    STV090x_Px_DFLSTRy(2, 1)
++#define STV090x_OFFST_Px_DFL_CURRENT_FIELD    0
++#define STV090x_WIDTH_Px_DFL_CURRENT_FIELD    8
++
++#define STV090x_Px_SYNCSTR(__x)                       (0xf566 - (__x - 1) * 0x200)
++#define STV090x_P1_SYNCSTR                    STV090x_Px_SYNCSTR(1)
++#define STV090x_P2_SYNCSTR                    STV090x_Px_SYNCSTR(2)
++#define STV090x_OFFST_Px_SYNC_CURRENT_FIELD   0
++#define STV090x_WIDTH_Px_SYNC_CURRENT_FIELD   8
++
++#define STV090x_Px_SYNCDSTRy(__x, __y)                (0xf568 - (__x - 1) * 0x200 - __y * 0x1)
++#define STV090x_P1_SYNCDSTR0                  STV090x_Px_SYNCDSTRy(1, 0)
++#define STV090x_P1_SYNCDSTR1                  STV090x_Px_SYNCDSTRy(1, 1)
++#define STV090x_P2_SYNCDSTR0                  STV090x_Px_SYNCDSTRy(2, 0)
++#define STV090x_P2_SYNCDSTR1                  STV090x_Px_SYNCDSTRy(2, 1)
++#define STV090x_OFFST_Px_SYNCD_CURRENT_FIELD  0
++#define STV090x_WIDTH_Px_SYNCD_CURRENT_FIELD  8
++
++#define STV090x_Px_PDELSTATUS1(__x)           (0xf569 - (__x - 1) * 0x200)
++#define STV090x_P1_PDELSTATUS1                        STV090x_Px_PDELSTATUS1(1)
++#define STV090x_P2_PDELSTATUS1                        STV090x_Px_PDELSTATUS1(2)
++#define STV090x_OFFST_Px_PKTDELIN_LOCK_FIELD  1
++#define STV090x_WIDTH_Px_PKTDELIN_LOCK_FIELD  1
++#define STV090x_OFFST_Px_FIRST_LOCK_FIELD     0
++#define STV090x_WIDTH_Px_FIRST_LOCK_FIELD     1
++
++#define STV090x_Px_PDELSTATUS2(__x)           (0xf56a - (__x - 1) * 0x200)
++#define STV090x_P1_PDELSTATUS2                        STV090x_Px_PDELSTATUS2(1)
++#define STV090x_P2_PDELSTATUS2                        STV090x_Px_PDELSTATUS2(2)
++#define STV090x_OFFST_Px_FRAME_MODCOD_FIELD   2
++#define STV090x_WIDTH_Px_FRAME_MODCOD_FIELD   5
++#define STV090x_OFFST_Px_FRAME_TYPE_FIELD     0
++#define STV090x_WIDTH_Px_FRAME_TYPE_FIELD     2
++
++#define STV090x_Px_BBFCRCKO1(__x)             (0xf56b - (__x - 1) * 0x200)
++#define STV090x_P1_BBFCRCKO1                  STV090x_Px_BBFCRCKO1(1)
++#define STV090x_P2_BBFCRCKO1                  STV090x_Px_BBFCRCKO1(2)
++#define STV090x_OFFST_Px_BBHCRC_KOCNT_FIELD   0
++#define STV090x_WIDTH_Px_BBHCRC_KOCNT_FIELD   8
++
++#define STV090x_Px_BBFCRCKO0(__x)             (0xf56c - (__x - 1) * 0x200)
++#define STV090x_P1_BBFCRCKO0                  STV090x_Px_BBFCRCKO0(1)
++#define STV090x_P2_BBFCRCKO0                  STV090x_Px_BBFCRCKO0(2)
++#define STV090x_OFFST_Px_BBHCRC_KOCNT_FIELD   0
++#define STV090x_WIDTH_Px_BBHCRC_KOCNT_FIELD   8
++
++#define STV090x_Px_UPCRCKO1(__x)              (0xf56d - (__x - 1) * 0x200)
++#define STV090x_P1_UPCRCKO1                   STV090x_Px_UPCRCKO1(1)
++#define STV090x_P2_UPCRCKO1                   STV090x_Px_UPCRCKO1(2)
++#define STV090x_OFFST_Px_PKTCRC_KOCNT_FIELD   0
++#define STV090x_WIDTH_Px_PKTCRC_KOCNT_FIELD   8
++
++#define STV090x_Px_UPCRCKO0(__x)              (0xf56e - (__x - 1) * 0x200)
++#define STV090x_P1_UPCRCKO0                   STV090x_Px_UPCRCKO0(1)
++#define STV090x_P2_UPCRCKO0                   STV090x_Px_UPCRCKO0(2)
++#define STV090x_OFFST_Px_PKTCRC_KOCNT_FIELD   0
++#define STV090x_WIDTH_Px_PKTCRC_KOCNT_FIELD   8
++
++#define STV090x_NBITER_NFx(__x)                               (0xFA03 + (__x - 4) * 0x1)
++#define STV090x_NBITER_NF4                            STV090x_NBITER_NFx(4)
++#define STV090x_NBITER_NF5                            STV090x_NBITER_NFx(5)
++#define STV090x_NBITER_NF6                            STV090x_NBITER_NFx(6)
++#define STV090x_NBITER_NF7                            STV090x_NBITER_NFx(7)
++#define STV090x_NBITER_NF8                            STV090x_NBITER_NFx(8)
++#define STV090x_NBITER_NF9                            STV090x_NBITER_NFx(9)
++#define STV090x_NBITER_NF10                           STV090x_NBITER_NFx(10)
++#define STV090x_NBITER_NF11                           STV090x_NBITER_NFx(11)
++#define STV090x_NBITER_NF12                           STV090x_NBITER_NFx(12)
++#define STV090x_NBITER_NF13                           STV090x_NBITER_NFx(13)
++#define STV090x_NBITER_NF14                           STV090x_NBITER_NFx(14)
++#define STV090x_NBITER_NF15                           STV090x_NBITER_NFx(15)
++#define STV090x_NBITER_NF16                           STV090x_NBITER_NFx(16)
++#define STV090x_NBITER_NF17                           STV090x_NBITER_NFx(17)
++
++#define STV090x_NBITERNOERR                           0xFA3F
++#define STV090x_OFFST_NBITER_STOP_CRIT_FIELD          0
++#define STV090x_WIDTH_NBITER_STOP_CRIT_FIELD          4
++
++#define STV090x_GAINLLR_NFx(__x)                      (0xFA43 + (__x - 4) * 0x1)
++#define STV090x_GAINLLR_NF4                           STV090x_GAINLLR_NFx(4)
++#define STV090x_OFFST_GAINLLR_NF_QP_1_2_FIELD         0
++#define STV090x_WIDTH_GAINLLR_NF_QP_1_2_FIELD         7
++
++#define STV090x_GAINLLR_NF5                           STV090x_GAINLLR_NFx(5)
++#define STV090x_OFFST_GAINLLR_NF_QP_3_5_FIELD         0
++#define STV090x_WIDTH_GAINLLR_NF_QP_3_5_FIELD         7
++
++#define STV090x_GAINLLR_NF6                           STV090x_GAINLLR_NFx(6)
++#define STV090x_OFFST_GAINLLR_NF_QP_2_3_FIELD         0
++#define STV090x_WIDTH_GAINLLR_NF_QP_2_3_FIELD         7
++
++#define STV090x_GAINLLR_NF7                           STV090x_GAINLLR_NFx(7)
++#define STV090x_OFFST_GAINLLR_NF_QP_3_4_FIELD         0
++#define STV090x_WIDTH_GAINLLR_NF_QP_3_4_FIELD         7
++
++#define STV090x_GAINLLR_NF8                           STV090x_GAINLLR_NFx(8)
++#define STV090x_OFFST_GAINLLR_NF_QP_4_5_FIELD         0
++#define STV090x_WIDTH_GAINLLR_NF_QP_4_5_FIELD         7
++
++#define STV090x_GAINLLR_NF9                           STV090x_GAINLLR_NFx(9)
++#define STV090x_OFFST_GAINLLR_NF_QP_5_6_FIELD         0
++#define STV090x_WIDTH_GAINLLR_NF_QP_5_6_FIELD         7
++
++#define STV090x_GAINLLR_NF10                          STV090x_GAINLLR_NFx(10)
++#define STV090x_OFFST_GAINLLR_NF_QP_8_9_FIELD         0
++#define STV090x_WIDTH_GAINLLR_NF_QP_8_9_FIELD         7
++
++#define STV090x_GAINLLR_NF11                          STV090x_GAINLLR_NFx(11)
++#define STV090x_OFFST_GAINLLR_NF_QP_9_10_FIELD                0
++#define STV090x_WIDTH_GAINLLR_NF_QP_9_10_FIELD                7
++
++#define STV090x_GAINLLR_NF12                          STV090x_GAINLLR_NFx(12)
++#define STV090x_OFFST_GAINLLR_NF_8P_3_5_FIELD         0
++#define STV090x_WIDTH_GAINLLR_NF_8P_3_5_FIELD         7
++
++#define STV090x_GAINLLR_NF13                          STV090x_GAINLLR_NFx(13)
++#define STV090x_OFFST_GAINLLR_NF_8P_2_3_FIELD         0
++#define STV090x_WIDTH_GAINLLR_NF_8P_2_3_FIELD         7
++
++#define STV090x_GAINLLR_NF14                          STV090x_GAINLLR_NFx(14)
++#define STV090x_OFFST_GAINLLR_NF_8P_3_4_FIELD         0
++#define STV090x_WIDTH_GAINLLR_NF_8P_3_4_FIELD         7
++
++#define STV090x_GAINLLR_NF15                          STV090x_GAINLLR_NFx(15)
++#define STV090x_OFFST_GAINLLR_NF_8P_5_6_FIELD         0
++#define STV090x_WIDTH_GAINLLR_NF_8P_5_6_FIELD         7
++
++#define STV090x_GAINLLR_NF16                          STV090x_GAINLLR_NFx(16)
++#define STV090x_OFFST_GAINLLR_NF_8P_8_9_FIELD         0
++#define STV090x_WIDTH_GAINLLR_NF_8P_8_9_FIELD         7
++
++#define STV090x_GAINLLR_NF17                          STV090x_GAINLLR_NFx(17)
++#define STV090x_OFFST_GAINLLR_NF_8P_9_10_FIELD                0
++#define STV090x_WIDTH_GAINLLR_NF_8P_9_10_FIELD                7
++
++#define STV090x_GENCFG                                        0xFA86
++#define STV090x_OFFST_BROADCAST_FIELD                 4
++#define STV090x_WIDTH_BROADCAST_FIELD                 1
++#define STV090x_OFFST_PRIORITY_FIELD                  1
++#define STV090x_WIDTH_PRIORITY_FIELD                  1
++#define STV090x_OFFST_DDEMOD_FIELD                    0
++#define STV090x_WIDTH_DDEMOD_FIELD                    1
++
++#define STV090x_LDPCERRx(__x)                         (0xFA97 - (__x  * 0x1))
++#define STV090x_LDPCERR0                              STV090x_LDPCERRx(0)
++#define STV090x_LDPCERR1                              STV090x_LDPCERRx(1)
++#define STV090x_OFFST_Px_LDPC_ERRORS_COUNTER_FIELD    0
++#define STV090x_WIDTH_Px_LDPC_ERRORS_COUNTER_FIELD    8
++
++#define STV090x_BCHERR                                        0xFA98
++#define STV090x_OFFST_Px_ERRORFLAG_FIELD              4
++#define STV090x_WIDTH_Px_ERRORFLAG_FIELD              1
++#define STV090x_OFFST_Px_BCH_ERRORS_COUNTER_FIELD     0
++#define STV090x_WIDTH_Px_BCH_ERRORS_COUNTER_FIELD     4
++
++#define STV090x_Px_TSSTATEM(__x)                      (0xF570 - (__x - 1) * 0x200)
++#define STV090x_P1_TSSTATEM                           STV090x_Px_TSSTATEM(1)
++#define STV090x_P2_TSSTATEM                           STV090x_Px_TSSTATEM(2)
++#define STV090x_OFFST_Px_TSDIL_ON_FIELD                       7
++#define STV090x_WIDTH_Px_TSDIL_ON_FIELD                       1
++#define STV090x_OFFST_Px_TSRS_ON_FIELD                        5
++#define STV090x_WIDTH_Px_TSRS_ON_FIELD                        1
++
++#define STV090x_Px_TSCFGH(__x)                                (0xF572 - (__x - 1) * 0x200)
++#define STV090x_P1_TSCFGH                             STV090x_Px_TSCFGH(1)
++#define STV090x_P2_TSCFGH                             STV090x_Px_TSCFGH(2)
++#define STV090x_OFFST_Px_TSFIFO_DVBCI_FIELD           7
++#define STV090x_WIDTH_Px_TSFIFO_DVBCI_FIELD           1
++#define STV090x_OFFST_Px_TSFIFO_SERIAL_FIELD          6
++#define STV090x_WIDTH_Px_TSFIFO_SERIAL_FIELD          1
++#define STV090x_OFFST_Px_TSFIFO_TEIUPDATE_FIELD               5
++#define STV090x_WIDTH_Px_TSFIFO_TEIUPDATE_FIELD               1
++#define STV090x_OFFST_Px_TSFIFO_DUTY50_FIELD          4
++#define STV090x_WIDTH_Px_TSFIFO_DUTY50_FIELD          1
++#define STV090x_OFFST_Px_TSFIFO_HSGNLOUT_FIELD                3
++#define STV090x_WIDTH_Px_TSFIFO_HSGNLOUT_FIELD                1
++#define STV090x_OFFST_Px_TSFIFO_ERRORMODE_FIELD               1
++#define STV090x_WIDTH_Px_TSFIFO_ERRORMODE_FIELD               2
++#define STV090x_OFFST_Px_RST_HWARE_FIELD              0
++#define STV090x_WIDTH_Px_RST_HWARE_FIELD              1
++
++#define STV090x_Px_TSCFGM(__x)                                (0xF573 - (__x - 1) * 0x200)
++#define STV090x_P1_TSCFGM                             STV090x_Px_TSCFGM(1)
++#define STV090x_P2_TSCFGM                             STV090x_Px_TSCFGM(2)
++#define STV090x_OFFST_Px_TSFIFO_MANSPEED_FIELD                6
++#define STV090x_WIDTH_Px_TSFIFO_MANSPEED_FIELD                2
++#define STV090x_OFFST_Px_TSFIFO_PERMDATA_FIELD                5
++#define STV090x_WIDTH_Px_TSFIFO_PERMDATA_FIELD                1
++#define STV090x_OFFST_Px_TSFIFO_INVDATA_FIELD         0
++#define STV090x_WIDTH_Px_TSFIFO_INVDATA_FIELD         1
++
++#define STV090x_Px_TSCFGL(__x)                                (0xF574 - (__x - 1) * 0x200)
++#define STV090x_P1_TSCFGL                             STV090x_Px_TSCFGL(1)
++#define STV090x_P2_TSCFGL                             STV090x_Px_TSCFGL(2)
++#define STV090x_OFFST_Px_TSFIFO_BCLKDEL1CK_FIELD      6
++#define STV090x_WIDTH_Px_TSFIFO_BCLKDEL1CK_FIELD      2
++#define STV090x_OFFST_Px_BCHERROR_MODE_FIELD          4
++#define STV090x_WIDTH_Px_BCHERROR_MODE_FIELD          2
++#define STV090x_OFFST_Px_TSFIFO_NSGNL2DATA_FIELD      3
++#define STV090x_WIDTH_Px_TSFIFO_NSGNL2DATA_FIELD      1
++#define STV090x_OFFST_Px_TSFIFO_EMBINDVB_FIELD                2
++#define STV090x_WIDTH_Px_TSFIFO_EMBINDVB_FIELD                1
++#define STV090x_OFFST_Px_TSFIFO_DPUNACT_FIELD         1
++#define STV090x_WIDTH_Px_TSFIFO_DPUNACT_FIELD         1
++
++#define STV090x_Px_TSINSDELH(__x)                     (0xF576 - (__x - 1) * 0x200)
++#define STV090x_P1_TSINSDELH                          STV090x_Px_TSINSDELH(1)
++#define STV090x_P2_TSINSDELH                          STV090x_Px_TSINSDELH(2)
++#define STV090x_OFFST_Px_TSDEL_SYNCBYTE_FIELD         7
++#define STV090x_WIDTH_Px_TSDEL_SYNCBYTE_FIELD         1
++#define STV090x_OFFST_Px_TSDEL_XXHEADER_FIELD         6
++#define STV090x_WIDTH_Px_TSDEL_XXHEADER_FIELD         1
++
++#define STV090x_Px_TSSPEED(__x)                               (0xF580 - (__x - 1) * 0x200)
++#define STV090x_P1_TSSPEED                            STV090x_Px_TSSPEED(1)
++#define STV090x_P2_TSSPEED                            STV090x_Px_TSSPEED(2)
++#define STV090x_OFFST_Px_TSFIFO_OUTSPEED_FIELD                0
++#define STV090x_WIDTH_Px_TSFIFO_OUTSPEED_FIELD                8
++
++#define STV090x_Px_TSSTATUS(__x)                      (0xF581 - (__x - 1) * 0x200)
++#define STV090x_P1_TSSTATUS                           STV090x_Px_TSSTATUS(1)
++#define STV090x_P2_TSSTATUS                           STV090x_Px_TSSTATUS(2)
++#define STV090x_OFFST_Px_TSFIFO_LINEOK_FIELD          7
++#define STV090x_WIDTH_Px_TSFIFO_LINEOK_FIELD          1
++#define STV090x_OFFST_Px_TSFIFO_ERROR_FIELD           6
++#define STV090x_WIDTH_Px_TSFIFO_ERROR_FIELD           1
++
++#define STV090x_Px_TSSTATUS2(__x)                     (0xF582 - (__x - 1) * 0x200)
++#define STV090x_P1_TSSTATUS2                          STV090x_Px_TSSTATUS2(1)
++#define STV090x_P2_TSSTATUS2                          STV090x_Px_TSSTATUS2(2)
++#define STV090x_OFFST_Px_TSFIFO_DEMODSEL_FIELD                7
++#define STV090x_WIDTH_Px_TSFIFO_DEMODSEL_FIELD                1
++#define STV090x_OFFST_Px_TSFIFOSPEED_STORE_FIELD      6
++#define STV090x_WIDTH_Px_TSFIFOSPEED_STORE_FIELD      1
++#define STV090x_OFFST_Px_DILXX_RESET_FIELD            5
++#define STV090x_WIDTH_Px_DILXX_RESET_FIELD            1
++#define STV090x_OFFST_Px_TSSERIAL_IMPOS_FIELD         4
++#define STV090x_WIDTH_Px_TSSERIAL_IMPOS_FIELD         1
++#define STV090x_OFFST_Px_SCRAMBDETECT_FIELD           1
++#define STV090x_WIDTH_Px_SCRAMBDETECT_FIELD           1
++
++#define STV090x_Px_TSBITRATEy(__x, __y)                       (0xF584 - (__x - 1) * 0x200 - __y * 0x1)
++#define STV090x_P1_TSBITRATE0                         STV090x_Px_TSBITRATEy(1, 0)
++#define STV090x_P1_TSBITRATE1                         STV090x_Px_TSBITRATEy(1, 1)
++#define STV090x_P2_TSBITRATE0                         STV090x_Px_TSBITRATEy(2, 0)
++#define STV090x_P2_TSBITRATE1                         STV090x_Px_TSBITRATEy(2, 1)
++#define STV090x_OFFST_Px_TSFIFO_BITRATE_FIELD         0
++#define STV090x_WIDTH_Px_TSFIFO_BITRATE_FIELD         8
++
++#define STV090x_Px_ERRCTRL1(__x)                      (0xF598 - (__x - 1) * 0x200)
++#define STV090x_P1_ERRCTRL1                           STV090x_Px_ERRCTRL1(1)
++#define STV090x_P2_ERRCTRL1                           STV090x_Px_ERRCTRL1(2)
++#define STV090x_OFFST_Px_ERR_SOURCE_FIELD             4
++#define STV090x_WIDTH_Px_ERR_SOURCE_FIELD             4
++#define STV090x_OFFST_Px_NUM_EVENT_FIELD              0
++#define STV090x_WIDTH_Px_NUM_EVENT_FIELD              3
++
++#define STV090x_Px_ERRCNT12(__x)                      (0xF599 - (__x - 1) * 0x200)
++#define STV090x_P1_ERRCNT12                           STV090x_Px_ERRCNT12(1)
++#define STV090x_P2_ERRCNT12                           STV090x_Px_ERRCNT12(2)
++#define STV090x_OFFST_Px_ERRCNT1_OLDVALUE_FIELD               7
++#define STV090x_WIDTH_Px_ERRCNT1_OLDVALUE_FIELD               1
++#define STV090x_OFFST_Px_ERR_CNT12_FIELD              0
++#define STV090x_WIDTH_Px_ERR_CNT12_FIELD              7
++
++#define STV090x_Px_ERRCNT11(__x)                      (0xF59A - (__x - 1) * 0x200)
++#define STV090x_P1_ERRCNT11                           STV090x_Px_ERRCNT11(1)
++#define STV090x_P2_ERRCNT11                           STV090x_Px_ERRCNT11(2)
++#define STV090x_OFFST_Px_ERR_CNT11_FIELD              0
++#define STV090x_WIDTH_Px_ERR_CNT11_FIELD              8
++
++#define STV090x_Px_ERRCNT10(__x)                      (0xF59B - (__x - 1) * 0x200)
++#define STV090x_P1_ERRCNT10                           STV090x_Px_ERRCNT10(1)
++#define STV090x_P2_ERRCNT10                           STV090x_Px_ERRCNT10(2)
++#define STV090x_OFFST_Px_ERR_CNT10_FIELD              0
++#define STV090x_WIDTH_Px_ERR_CNT10_FIELD              8
++
++#define STV090x_Px_ERRCTRL2(__x)                      (0xF59C - (__x - 1) * 0x200)
++#define STV090x_P1_ERRCTRL2                           STV090x_Px_ERRCTRL2(1)
++#define STV090x_P2_ERRCTRL2                           STV090x_Px_ERRCTRL2(2)
++#define STV090x_OFFST_Px_ERR_SOURCE2_FIELD            4
++#define STV090x_WIDTH_Px_ERR_SOURCE2_FIELD            4
++#define STV090x_OFFST_Px_NUM_EVENT2_FIELD             0
++#define STV090x_WIDTH_Px_NUM_EVENT2_FIELD             3
++
++#define STV090x_Px_ERRCNT22(__x)                      (0xF59D - (__x - 1) * 0x200)
++#define STV090x_P1_ERRCNT22                           STV090x_Px_ERRCNT22(1)
++#define STV090x_P2_ERRCNT22                           STV090x_Px_ERRCNT22(2)
++#define STV090x_OFFST_Px_ERRCNT2_OLDVALUE_FIELD               7
++#define STV090x_WIDTH_Px_ERRCNT2_OLDVALUE_FIELD               1
++#define STV090x_OFFST_Px_ERR_CNT2_FIELD                       0
++#define STV090x_WIDTH_Px_ERR_CNT2_FIELD                       7
++
++#define STV090x_Px_ERRCNT21(__x)                      (0xF59E - (__x - 1) * 0x200)
++#define STV090x_P1_ERRCNT21                           STV090x_Px_ERRCNT21(1)
++#define STV090x_P2_ERRCNT21                           STV090x_Px_ERRCNT21(2)
++#define STV090x_OFFST_Px_ERR_CNT21_FIELD              0
++#define STV090x_WIDTH_Px_ERR_CNT21_FIELD              8
++
++#define STV090x_Px_ERRCNT20(__x)                      (0xF59F - (__x - 1) * 0x200)
++#define STV090x_P1_ERRCNT20                           STV090x_Px_ERRCNT20(1)
++#define STV090x_P2_ERRCNT20                           STV090x_Px_ERRCNT20(2)
++#define STV090x_OFFST_Px_ERR_CNT20_FIELD              0
++#define STV090x_WIDTH_Px_ERR_CNT20_FIELD              8
++
++#define STV090x_Px_FECSPY(__x)                                (0xF5A0 - (__x - 1) * 0x200)
++#define STV090x_P1_FECSPY                             STV090x_Px_FECSPY(1)
++#define STV090x_P2_FECSPY                             STV090x_Px_FECSPY(2)
++#define STV090x_OFFST_Px_SPY_ENABLE_FIELD             7
++#define STV090x_WIDTH_Px_SPY_ENABLE_FIELD             1
++#define STV090x_OFFST_Px_BERMETER_DATAMAODE_FIELD     2
++#define STV090x_WIDTH_Px_BERMETER_DATAMAODE_FIELD     2
++
++#define STV090x_Px_FSPYCFG(__x)                               (0xF5A1 - (__x - 1) * 0x200)
++#define STV090x_P1_FSPYCFG                            STV090x_Px_FSPYCFG(1)
++#define STV090x_P2_FSPYCFG                            STV090x_Px_FSPYCFG(2)
++#define STV090x_OFFST_Px_RST_ON_ERROR_FIELD           5
++#define STV090x_WIDTH_Px_RST_ON_ERROR_FIELD           1
++#define STV090x_OFFST_Px_ONE_SHOT_FIELD                       4
++#define STV090x_WIDTH_Px_ONE_SHOT_FIELD                       1
++#define STV090x_OFFST_Px_I2C_MODE_FIELD                       2
++#define STV090x_WIDTH_Px_I2C_MODE_FIELD                       2
++
++#define STV090x_Px_FSPYDATA(__x)                      (0xF5A2 - (__x - 1) * 0x200)
++#define STV090x_P1_FSPYDATA                           STV090x_Px_FSPYDATA(1)
++#define STV090x_P2_FSPYDATA                           STV090x_Px_FSPYDATA(2)
++#define STV090x_OFFST_Px_SPY_STUFFING_FIELD           7
++#define STV090x_WIDTH_Px_SPY_STUFFING_FIELD           1
++#define STV090x_OFFST_Px_SPY_CNULLPKT_FIELD           5
++#define STV090x_WIDTH_Px_SPY_CNULLPKT_FIELD           1
++#define STV090x_OFFST_Px_SPY_OUTDATA_MODE_FIELD               0
++#define STV090x_WIDTH_Px_SPY_OUTDATA_MODE_FIELD               5
++
++#define STV090x_Px_FSPYOUT(__x)                               (0xF5A3 - (__x - 1) * 0x200)
++#define STV090x_P1_FSPYOUT                            STV090x_Px_FSPYOUT(1)
++#define STV090x_P2_FSPYOUT                            STV090x_Px_FSPYOUT(2)
++#define STV090x_OFFST_Px_FSPY_DIRECT_FIELD            7
++#define STV090x_WIDTH_Px_FSPY_DIRECT_FIELD            1
++#define STV090x_OFFST_Px_STUFF_MODE_FIELD             0
++#define STV090x_WIDTH_Px_STUFF_MODE_FIELD             3
++
++#define STV090x_Px_FSTATUS(__x)                               (0xF5A4 - (__x - 1) * 0x200)
++#define STV090x_P1_FSTATUS                            STV090x_Px_FSTATUS(1)
++#define STV090x_P2_FSTATUS                            STV090x_Px_FSTATUS(2)
++#define STV090x_OFFST_Px_SPY_ENDSIM_FIELD             7
++#define STV090x_WIDTH_Px_SPY_ENDSIM_FIELD             1
++#define STV090x_OFFST_Px_VALID_SIM_FIELD              6
++#define STV090x_WIDTH_Px_VALID_SIM_FIELD              1
++#define STV090x_OFFST_Px_FOUND_SIGNAL_FIELD           5
++#define STV090x_WIDTH_Px_FOUND_SIGNAL_FIELD           1
++#define STV090x_OFFST_Px_DSS_SYNCBYTE_FIELD           4
++#define STV090x_WIDTH_Px_DSS_SYNCBYTE_FIELD           1
++#define STV090x_OFFST_Px_RESULT_STATE_FIELD           0
++#define STV090x_WIDTH_Px_RESULT_STATE_FIELD           4
++
++#define STV090x_Px_FBERCPT4(__x)                      (0xF5A8 - (__x - 1) * 0x200)
++#define STV090x_P1_FBERCPT4                           STV090x_Px_FBERCPT4(1)
++#define STV090x_P2_FBERCPT4                           STV090x_Px_FBERCPT4(2)
++#define STV090x_OFFST_Px_FBERMETER_CPT_FIELD          0
++#define STV090x_WIDTH_Px_FBERMETER_CPT_FIELD          8
++
++#define STV090x_Px_FBERCPT3(__x)                      (0xF5A9 - (__x - 1) * 0x200)
++#define STV090x_P1_FBERCPT3                           STV090x_Px_FBERCPT3(1)
++#define STV090x_P2_FBERCPT3                           STV090x_Px_FBERCPT3(2)
++#define STV090x_OFFST_Px_FBERMETER_CPT_FIELD          0
++#define STV090x_WIDTH_Px_FBERMETER_CPT_FIELD          8
++
++#define STV090x_Px_FBERCPT2(__x)                      (0xF5AA - (__x - 1) * 0x200)
++#define STV090x_P1_FBERCPT2                           STV090x_Px_FBERCPT2(1)
++#define STV090x_P2_FBERCPT2                           STV090x_Px_FBERCPT2(2)
++#define STV090x_OFFST_Px_FBERMETER_CPT_FIELD          0
++#define STV090x_WIDTH_Px_FBERMETER_CPT_FIELD          8
++
++#define STV090x_Px_FBERCPT1(__x)                      (0xF5AB - (__x - 1) * 0x200)
++#define STV090x_P1_FBERCPT1                           STV090x_Px_FBERCPT1(1)
++#define STV090x_P2_FBERCPT1                           STV090x_Px_FBERCPT1(2)
++#define STV090x_OFFST_Px_FBERMETER_CPT_FIELD          0
++#define STV090x_WIDTH_Px_FBERMETER_CPT_FIELD          8
++
++#define STV090x_Px_FBERCPT0(__x)                      (0xF5AC - (__x - 1) * 0x200)
++#define STV090x_P1_FBERCPT0                           STV090x_Px_FBERCPT0(1)
++#define STV090x_P2_FBERCPT0                           STV090x_Px_FBERCPT0(2)
++#define STV090x_OFFST_Px_FBERMETER_CPT_FIELD          0
++#define STV090x_WIDTH_Px_FBERMETER_CPT_FIELD          8
++
++#define STV090x_Px_FBERERRy(__x, __y)                 (0xF5AF - (__x - 1) * 0x200 - __y * 0x1)
++#define STV090x_P1_FBERERR0                           STV090x_Px_FBERERRy(1, 0)
++#define STV090x_P1_FBERERR1                           STV090x_Px_FBERERRy(1, 1)
++#define STV090x_P1_FBERERR2                           STV090x_Px_FBERERRy(1, 2)
++#define STV090x_P2_FBERERR0                           STV090x_Px_FBERERRy(2, 0)
++#define STV090x_P2_FBERERR1                           STV090x_Px_FBERERRy(2, 1)
++#define STV090x_P2_FBERERR2                           STV090x_Px_FBERERRy(2, 2)
++#define STV090x_OFFST_Px_FBERMETER_CPT_ERR_FIELD      0
++#define STV090x_WIDTH_Px_FBERMETER_CPT_ERR_FIELD      8
++
++#define STV090x_Px_FSPYBER(__x)                               (0xF5B2 - (__x - 1) * 0x200)
++#define STV090x_P1_FSPYBER                            STV090x_Px_FSPYBER(1)
++#define STV090x_P2_FSPYBER                            STV090x_Px_FSPYBER(2)
++#define STV090x_OFFST_Px_FSPYBER_SYNCBYTE_FIELD               4
++#define STV090x_WIDTH_Px_FSPYBER_SYNCBYTE_FIELD               1
++#define STV090x_OFFST_Px_FSPYBER_UNSYNC_FIELD         3
++#define STV090x_WIDTH_Px_FSPYBER_UNSYNC_FIELD         1
++#define STV090x_OFFST_Px_FSPYBER_CTIME_FIELD          0
++#define STV090x_WIDTH_Px_FSPYBER_CTIME_FIELD          3
++
++#define STV090x_RCCFGH                                        0xf600
++
++#define STV090x_TSGENERAL                             0xF630
++#define STV090x_OFFST_Px_MUXSTREAM_OUT_FIELD          3
++#define STV090x_WIDTH_Px_MUXSTREAM_OUT_FIELD          1
++#define STV090x_OFFST_Px_TSFIFO_PERMPARAL_FIELD               1
++#define STV090x_WIDTH_Px_TSFIFO_PERMPARAL_FIELD               2
++
++#define STV090x_TSGENERAL1X                           0xf670
++#define STV090x_CFGEXT                                        0xfa80
++
++#define STV090x_TSTRES0                                       0xFF11
++#define STV090x_OFFST_FRESFEC_FIELD                   7
++#define STV090x_WIDTH_FRESFEC_FIELD                   1
++
++#define STV090x_Px_TSTDISRX(__x)                      (0xFF67 - (__x - 1) * 0x2)
++#define STV090x_P1_TSTDISRX                           STV090x_Px_TSTDISRX(1)
++#define STV090x_P2_TSTDISRX                           STV090x_Px_TSTDISRX(2)
++#define STV090x_OFFST_Px_TSTDISRX_SELECT_FIELD                3
++#define STV090x_WIDTH_Px_TSTDISRX_SELECT_FIELD                1
++
++#endif /* __STV090x_REG_H */
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/stv6110.h linux-2.6.18/drivers/media/dvb/frontends/stv6110.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/stv6110.h    1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/stv6110.h 2010-09-09 12:38:50.000000000 +0000
+@@ -0,0 +1,63 @@
++/*
++ * stv6110.h
++ *
++ * Driver for ST STV6110 satellite tuner IC.
++ *
++ * Copyright (C) 2009 NetUP Inc.
++ * Copyright (C) 2009 Igor M. Liplianin <liplianin@netup.ru>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ *
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++ */
++
++#ifndef __DVB_STV6110_H__
++#define __DVB_STV6110_H__
++
++#include <linux/i2c.h>
++#include "dvb_frontend.h"
++
++/* registers */
++#define RSTV6110_CTRL1                0
++#define RSTV6110_CTRL2                1
++#define RSTV6110_TUNING1      2
++#define RSTV6110_TUNING2      3
++#define RSTV6110_CTRL3                4
++#define RSTV6110_STAT1                5
++#define RSTV6110_STAT2                6
++#define RSTV6110_STAT3                7
++
++struct stv6110_config {
++      u8 i2c_address;
++      u32 mclk;
++      u8 gain;
++      u8 clk_div;     /* divisor value for the output clock */
++};
++
++#if defined(CONFIG_DVB_STV6110) || (defined(CONFIG_DVB_STV6110_MODULE) \
++                                                      && defined(MODULE))
++extern struct dvb_frontend *stv6110_attach(struct dvb_frontend *fe,
++                                      const struct stv6110_config *config,
++                                      struct i2c_adapter *i2c);
++#else
++static inline struct dvb_frontend *stv6110_attach(struct dvb_frontend *fe,
++                                      const struct stv6110_config *config,
++                                      struct i2c_adapter *i2c)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return NULL;
++}
++#endif
++
++#endif
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/stv6110x.h linux-2.6.18/drivers/media/dvb/frontends/stv6110x.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/stv6110x.h   1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/stv6110x.h        2010-09-09 12:38:50.000000000 +0000
+@@ -0,0 +1,73 @@
++/*
++      STV6110(A) Silicon tuner driver
++
++      Copyright (C) Manu Abraham <abraham.manu@gmail.com>
++
++      Copyright (C) ST Microelectronics
++
++      This program is free software; you can redistribute it and/or modify
++      it under the terms of the GNU General Public License as published by
++      the Free Software Foundation; either version 2 of the License, or
++      (at your option) any later version.
++
++      This program is distributed in the hope that it will be useful,
++      but WITHOUT ANY WARRANTY; without even the implied warranty of
++      MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++      GNU General Public License for more details.
++
++      You should have received a copy of the GNU General Public License
++      along with this program; if not, write to the Free Software
++      Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++*/
++
++#ifndef __STV6110x_H
++#define __STV6110x_H
++
++struct stv6110x_config {
++      u8      addr;
++      u32     refclk;
++      u8      clk_div; /* divisor value for the output clock */
++};
++
++enum tuner_mode {
++      TUNER_SLEEP = 1,
++      TUNER_WAKE,
++};
++
++enum tuner_status {
++      TUNER_PHASELOCKED = 1,
++};
++
++struct stv6110x_devctl {
++      int (*tuner_init) (struct dvb_frontend *fe);
++      int (*tuner_sleep) (struct dvb_frontend *fe);
++      int (*tuner_set_mode) (struct dvb_frontend *fe, enum tuner_mode mode);
++      int (*tuner_set_frequency) (struct dvb_frontend *fe, u32 frequency);
++      int (*tuner_get_frequency) (struct dvb_frontend *fe, u32 *frequency);
++      int (*tuner_set_bandwidth) (struct dvb_frontend *fe, u32 bandwidth);
++      int (*tuner_get_bandwidth) (struct dvb_frontend *fe, u32 *bandwidth);
++      int (*tuner_set_bbgain) (struct dvb_frontend *fe, u32 gain);
++      int (*tuner_get_bbgain) (struct dvb_frontend *fe, u32 *gain);
++      int (*tuner_set_refclk)  (struct dvb_frontend *fe, u32 refclk);
++      int (*tuner_get_status) (struct dvb_frontend *fe, u32 *status);
++};
++
++
++#if defined(CONFIG_DVB_STV6110x) || (defined(CONFIG_DVB_STV6110x_MODULE) && defined(MODULE))
++
++extern struct stv6110x_devctl *stv6110x_attach(struct dvb_frontend *fe,
++                                             const struct stv6110x_config *config,
++                                             struct i2c_adapter *i2c);
++
++#else
++static inline struct stv6110x_devctl *stv6110x_attach(struct dvb_frontend *fe,
++                                                    const struct stv6110x_config *config,
++                                                    struct i2c_adapter *i2c)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return NULL;
++}
++
++#endif /* CONFIG_DVB_STV6110x */
++
++#endif /* __STV6110x_H */
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/stv6110x_priv.h linux-2.6.18/drivers/media/dvb/frontends/stv6110x_priv.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/stv6110x_priv.h      1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/stv6110x_priv.h   2010-09-09 12:38:50.000000000 +0000
+@@ -0,0 +1,76 @@
++/*
++      STV6110(A) Silicon tuner driver
++
++      Copyright (C) Manu Abraham <abraham.manu@gmail.com>
++
++      Copyright (C) ST Microelectronics
++
++      This program is free software; you can redistribute it and/or modify
++      it under the terms of the GNU General Public License as published by
++      the Free Software Foundation; either version 2 of the License, or
++      (at your option) any later version.
++
++      This program is distributed in the hope that it will be useful,
++      but WITHOUT ANY WARRANTY; without even the implied warranty of
++      MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++      GNU General Public License for more details.
++
++      You should have received a copy of the GNU General Public License
++      along with this program; if not, write to the Free Software
++      Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++*/
++
++#ifndef __STV6110x_PRIV_H
++#define __STV6110x_PRIV_H
++
++#define FE_ERROR                              0
++#define FE_NOTICE                             1
++#define FE_INFO                                       2
++#define FE_DEBUG                              3
++#define FE_DEBUGREG                           4
++
++#define dprintk(__y, __z, format, arg...) do {                                                \
++      if (__z) {                                                                      \
++              if      ((verbose > FE_ERROR) && (verbose > __y))                       \
++                      printk(KERN_ERR "%s: " format "\n", __func__ , ##arg);          \
++              else if ((verbose > FE_NOTICE) && (verbose > __y))                      \
++                      printk(KERN_NOTICE "%s: " format "\n", __func__ , ##arg);       \
++              else if ((verbose > FE_INFO) && (verbose > __y))                        \
++                      printk(KERN_INFO "%s: " format "\n", __func__ , ##arg);         \
++              else if ((verbose > FE_DEBUG) && (verbose > __y))                       \
++                      printk(KERN_DEBUG "%s: " format "\n", __func__ , ##arg);        \
++      } else {                                                                        \
++              if (verbose > __y)                                                      \
++                      printk(format, ##arg);                                          \
++      }                                                                               \
++} while (0)
++
++
++#define STV6110x_SETFIELD(mask, bitf, val)                            \
++      (mask = (mask & (~(((1 << STV6110x_WIDTH_##bitf) - 1) <<        \
++                                STV6110x_OFFST_##bitf))) |            \
++                        (val << STV6110x_OFFST_##bitf))
++
++#define STV6110x_GETFIELD(bitf, val)                                  \
++      ((val >> STV6110x_OFFST_##bitf) &                               \
++      ((1 << STV6110x_WIDTH_##bitf) - 1))
++
++#define MAKEWORD16(a, b)                      (((a) << 8) | (b))
++
++#define LSB(x)                                        ((x & 0xff))
++#define MSB(y)                                        ((y >> 8) & 0xff)
++
++#define TRIALS                                        10
++#define R_DIV(__div)                          (1 << (__div + 1))
++#define REFCLOCK_kHz                          (stv6110x->config->refclk /    1000)
++#define REFCLOCK_MHz                          (stv6110x->config->refclk / 1000000)
++
++struct stv6110x_state {
++      struct i2c_adapter              *i2c;
++      const struct stv6110x_config    *config;
++      u8                              regs[8];
++
++      struct stv6110x_devctl          *devctl;
++};
++
++#endif /* __STV6110x_PRIV_H */
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/stv6110x_reg.h linux-2.6.18/drivers/media/dvb/frontends/stv6110x_reg.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/stv6110x_reg.h       1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/stv6110x_reg.h    2010-09-09 12:38:50.000000000 +0000
+@@ -0,0 +1,82 @@
++/*
++      STV6110(A) Silicon tuner driver
++
++      Copyright (C) Manu Abraham <abraham.manu@gmail.com>
++
++      Copyright (C) ST Microelectronics
++
++      This program is free software; you can redistribute it and/or modify
++      it under the terms of the GNU General Public License as published by
++      the Free Software Foundation; either version 2 of the License, or
++      (at your option) any later version.
++
++      This program is distributed in the hope that it will be useful,
++      but WITHOUT ANY WARRANTY; without even the implied warranty of
++      MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++      GNU General Public License for more details.
++
++      You should have received a copy of the GNU General Public License
++      along with this program; if not, write to the Free Software
++      Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++*/
++
++#ifndef __STV6110x_REG_H
++#define __STV6110x_REG_H
++
++#define STV6110x_CTRL1                                0x00
++#define STV6110x_OFFST_CTRL1_K                        3
++#define STV6110x_WIDTH_CTRL1_K                        5
++#define STV6110x_OFFST_CTRL1_LPT              2
++#define STV6110x_WIDTH_CTRL1_LPT              1
++#define STV6110x_OFFST_CTRL1_RX                       1
++#define STV6110x_WIDTH_CTRL1_RX                       1
++#define STV6110x_OFFST_CTRL1_SYN              0
++#define STV6110x_WIDTH_CTRL1_SYN              1
++
++#define STV6110x_CTRL2                                0x01
++#define STV6110x_OFFST_CTRL2_CO_DIV           6
++#define STV6110x_WIDTH_CTRL2_CO_DIV           2
++#define STV6110x_OFFST_CTRL2_RSVD             5
++#define STV6110x_WIDTH_CTRL2_RSVD             1
++#define STV6110x_OFFST_CTRL2_REFOUT_SEL               4
++#define STV6110x_WIDTH_CTRL2_REFOUT_SEL               1
++#define STV6110x_OFFST_CTRL2_BBGAIN           0
++#define STV6110x_WIDTH_CTRL2_BBGAIN           4
++
++#define STV6110x_TNG0                         0x02
++#define STV6110x_OFFST_TNG0_N_DIV_7_0         0
++#define STV6110x_WIDTH_TNG0_N_DIV_7_0         8
++
++#define STV6110x_TNG1                         0x03
++#define STV6110x_OFFST_TNG1_R_DIV             6
++#define STV6110x_WIDTH_TNG1_R_DIV             2
++#define STV6110x_OFFST_TNG1_PRESC32_ON                5
++#define STV6110x_WIDTH_TNG1_PRESC32_ON                1
++#define STV6110x_OFFST_TNG1_DIV4SEL           4
++#define STV6110x_WIDTH_TNG1_DIV4SEL           1
++#define STV6110x_OFFST_TNG1_N_DIV_11_8                0
++#define STV6110x_WIDTH_TNG1_N_DIV_11_8                4
++
++
++#define STV6110x_CTRL3                                0x04
++#define STV6110x_OFFST_CTRL3_DCLOOP_OFF               7
++#define STV6110x_WIDTH_CTRL3_DCLOOP_OFF               1
++#define STV6110x_OFFST_CTRL3_RCCLK_OFF                6
++#define STV6110x_WIDTH_CTRL3_RCCLK_OFF                1
++#define STV6110x_OFFST_CTRL3_ICP              5
++#define STV6110x_WIDTH_CTRL3_ICP              1
++#define STV6110x_OFFST_CTRL3_CF                       0
++#define STV6110x_WIDTH_CTRL3_CF                       5
++
++#define STV6110x_STAT1                                0x05
++#define STV6110x_OFFST_STAT1_CALVCO_STRT      2
++#define STV6110x_WIDTH_STAT1_CALVCO_STRT      1
++#define STV6110x_OFFST_STAT1_CALRC_STRT               1
++#define STV6110x_WIDTH_STAT1_CALRC_STRT               1
++#define STV6110x_OFFST_STAT1_LOCK             0
++#define STV6110x_WIDTH_STAT1_LOCK             1
++
++#define STV6110x_STAT2                                0x06
++#define STV6110x_STAT3                                0x07
++
++#endif /* __STV6110x_REG_H */
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/tda10021.h linux-2.6.18/drivers/media/dvb/frontends/tda10021.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/tda10021.h   2006-09-20 03:42:06.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/tda10021.h        1970-01-01 00:00:00.000000000 +0000
+@@ -1,40 +0,0 @@
+-/*
+-    TDA10021  - Single Chip Cable Channel Receiver driver module
+-             used on the the Siemens DVB-C cards
+-
+-    Copyright (C) 1999 Convergence Integrated Media GmbH <ralph@convergence.de>
+-    Copyright (C) 2004 Markus Schulz <msc@antzsystem.de>
+-                 Support for TDA10021
+-
+-    This program is free software; you can redistribute it and/or modify
+-    it under the terms of the GNU General Public License as published by
+-    the Free Software Foundation; either version 2 of the License, or
+-    (at your option) any later version.
+-
+-    This program is distributed in the hope that it will be useful,
+-    but WITHOUT ANY WARRANTY; without even the implied warranty of
+-    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+-    GNU General Public License for more details.
+-
+-    You should have received a copy of the GNU General Public License
+-    along with this program; if not, write to the Free Software
+-    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+-*/
+-
+-#ifndef TDA10021_H
+-#define TDA10021_H
+-
+-#include <linux/dvb/frontend.h>
+-
+-struct tda10021_config
+-{
+-      /* the demodulator's i2c address */
+-      u8 demod_address;
+-};
+-
+-extern struct dvb_frontend* tda10021_attach(const struct tda10021_config* config,
+-                                          struct i2c_adapter* i2c, u8 pwm);
+-
+-extern int tda10021_write_byte(struct dvb_frontend* fe, int reg, int data);
+-
+-#endif // TDA10021_H
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/tda1002x.h linux-2.6.18/drivers/media/dvb/frontends/tda1002x.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/tda1002x.h   1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/tda1002x.h        2010-09-09 12:38:50.000000000 +0000
+@@ -0,0 +1,87 @@
++/*
++    TDA10021/TDA10023  - Single Chip Cable Channel Receiver driver module
++                       used on the the Siemens DVB-C cards
++
++    Copyright (C) 1999 Convergence Integrated Media GmbH <ralph@convergence.de>
++    Copyright (C) 2004 Markus Schulz <msc@antzsystem.de>
++                 Support for TDA10021
++
++    This program is free software; you can redistribute it and/or modify
++    it under the terms of the GNU General Public License as published by
++    the Free Software Foundation; either version 2 of the License, or
++    (at your option) any later version.
++
++    This program is distributed in the hope that it will be useful,
++    but WITHOUT ANY WARRANTY; without even the implied warranty of
++    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++    GNU General Public License for more details.
++
++    You should have received a copy of the GNU General Public License
++    along with this program; if not, write to the Free Software
++    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++*/
++
++#ifndef TDA1002x_H
++#define TDA1002x_H
++
++#include <linux/dvb/frontend.h>
++
++struct tda1002x_config {
++      /* the demodulator's i2c address */
++      u8 demod_address;
++      u8 invert;
++};
++
++enum tda10023_output_mode {
++      TDA10023_OUTPUT_MODE_PARALLEL_A = 0xe0,
++      TDA10023_OUTPUT_MODE_PARALLEL_B = 0xa1,
++      TDA10023_OUTPUT_MODE_PARALLEL_C = 0xa0,
++      TDA10023_OUTPUT_MODE_SERIAL, /* TODO: not implemented */
++};
++
++struct tda10023_config {
++      /* the demodulator's i2c address */
++      u8 demod_address;
++      u8 invert;
++
++      /* clock settings */
++      u32 xtal; /* defaults: 28920000 */
++      u8 pll_m; /* defaults: 8 */
++      u8 pll_p; /* defaults: 4 */
++      u8 pll_n; /* defaults: 1 */
++
++      /* MPEG2 TS output mode */
++      u8 output_mode;
++
++      /* input freq offset + baseband conversion type */
++      u16 deltaf;
++};
++
++#if defined(CONFIG_DVB_TDA10021) || (defined(CONFIG_DVB_TDA10021_MODULE) && defined(MODULE))
++extern struct dvb_frontend* tda10021_attach(const struct tda1002x_config* config,
++                                          struct i2c_adapter* i2c, u8 pwm);
++#else
++static inline struct dvb_frontend* tda10021_attach(const struct tda1002x_config* config,
++                                          struct i2c_adapter* i2c, u8 pwm)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return NULL;
++}
++#endif // CONFIG_DVB_TDA10021
++
++#if defined(CONFIG_DVB_TDA10023) || \
++      (defined(CONFIG_DVB_TDA10023_MODULE) && defined(MODULE))
++extern struct dvb_frontend *tda10023_attach(
++      const struct tda10023_config *config,
++      struct i2c_adapter *i2c, u8 pwm);
++#else
++static inline struct dvb_frontend *tda10023_attach(
++      const struct tda10023_config *config,
++      struct i2c_adapter *i2c, u8 pwm)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return NULL;
++}
++#endif // CONFIG_DVB_TDA10023
++
++#endif // TDA1002x_H
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/tda10048.h linux-2.6.18/drivers/media/dvb/frontends/tda10048.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/tda10048.h   1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/tda10048.h        2010-09-09 12:38:50.000000000 +0000
+@@ -0,0 +1,82 @@
++/*
++    NXP TDA10048HN DVB OFDM demodulator driver
++
++    Copyright (C) 2009 Steven Toth <stoth@kernellabs.com>
++
++    This program is free software; you can redistribute it and/or modify
++    it under the terms of the GNU General Public License as published by
++    the Free Software Foundation; either version 2 of the License, or
++    (at your option) any later version.
++
++    This program is distributed in the hope that it will be useful,
++    but WITHOUT ANY WARRANTY; without even the implied warranty of
++    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++    GNU General Public License for more details.
++
++    You should have received a copy of the GNU General Public License
++    along with this program; if not, write to the Free Software
++    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++
++*/
++
++#ifndef TDA10048_H
++#define TDA10048_H
++
++#include <linux/dvb/frontend.h>
++#include <linux/firmware.h>
++
++struct tda10048_config {
++
++      /* the demodulator's i2c address */
++      u8 demod_address;
++
++      /* serial/parallel output */
++#define TDA10048_PARALLEL_OUTPUT 0
++#define TDA10048_SERIAL_OUTPUT   1
++      u8 output_mode;
++
++#define TDA10048_BULKWRITE_200        200
++#define TDA10048_BULKWRITE_50 50
++      u8 fwbulkwritelen;
++
++      /* Spectral Inversion */
++#define TDA10048_INVERSION_OFF 0
++#define TDA10048_INVERSION_ON  1
++      u8 inversion;
++
++#define TDA10048_IF_3300  3300
++#define TDA10048_IF_3500  3500
++#define TDA10048_IF_3800  3800
++#define TDA10048_IF_4000  4000
++#define TDA10048_IF_4300  4300
++#define TDA10048_IF_4500  4500
++#define TDA10048_IF_4750  4750
++#define TDA10048_IF_36130 36130
++      u16 dtv6_if_freq_khz;
++      u16 dtv7_if_freq_khz;
++      u16 dtv8_if_freq_khz;
++
++#define TDA10048_CLK_4000  4000
++#define TDA10048_CLK_16000 16000
++      u16 clk_freq_khz;
++
++      /* Disable I2C gate access */
++      u8 disable_gate_access;
++};
++
++#if defined(CONFIG_DVB_TDA10048) || \
++      (defined(CONFIG_DVB_TDA10048_MODULE) && defined(MODULE))
++extern struct dvb_frontend *tda10048_attach(
++      const struct tda10048_config *config,
++      struct i2c_adapter *i2c);
++#else
++static inline struct dvb_frontend *tda10048_attach(
++      const struct tda10048_config *config,
++      struct i2c_adapter *i2c)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return NULL;
++}
++#endif /* CONFIG_DVB_TDA10048 */
++
++#endif /* TDA10048_H */
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/tda1004x.h linux-2.6.18/drivers/media/dvb/frontends/tda1004x.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/tda1004x.h   2006-09-20 03:42:06.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/tda1004x.h        2010-09-09 12:38:50.000000000 +0000
+@@ -36,7 +36,22 @@
+       TDA10046_AGC_IFO_AUTO_NEG,      /* IF AGC only, automatic, negtive */
+       TDA10046_AGC_IFO_AUTO_POS,      /* IF AGC only, automatic, positive */
+       TDA10046_AGC_TDA827X,           /* IF AGC only, special setup for tda827x */
+-      TDA10046_AGC_TDA827X_GPL,       /* same as above, but GPIOs 0 */
++};
++
++/* Many (hybrid) boards use GPIO 1 and 3
++      GPIO1   analog - dvb switch
++      GPIO3   firmware eeprom address switch
++*/
++enum tda10046_gpio {
++      TDA10046_GPTRI  = 0x00,         /* All GPIOs tristate */
++      TDA10046_GP00   = 0x40,         /* GPIO3=0, GPIO1=0 */
++      TDA10046_GP01   = 0x42,         /* GPIO3=0, GPIO1=1 */
++      TDA10046_GP10   = 0x48,         /* GPIO3=1, GPIO1=0 */
++      TDA10046_GP11   = 0x4a,         /* GPIO3=1, GPIO1=1 */
++      TDA10046_GP00_I = 0x80,         /* GPIO3=0, GPIO1=0, invert in sleep mode*/
++      TDA10046_GP01_I = 0x82,         /* GPIO3=0, GPIO1=1, invert in sleep mode */
++      TDA10046_GP10_I = 0x88,         /* GPIO3=1, GPIO1=0, invert in sleep mode */
++      TDA10046_GP11_I = 0x8a,         /* GPIO3=1, GPIO1=1, invert in sleep mode */
+ };
+ 
+ enum tda10046_if {
+@@ -46,6 +61,11 @@
+       TDA10046_FREQ_052,              /* low IF, 5.1667 MHZ for tda9889 */
+ };
+ 
++enum tda10046_tsout {
++      TDA10046_TS_PARALLEL  = 0x00,   /* parallel transport stream, default */
++      TDA10046_TS_SERIAL    = 0x01,   /* serial transport stream */
++};
++
+ struct tda1004x_config
+ {
+       /* the demodulator's i2c address */
+@@ -57,6 +77,9 @@
+       /* Does the OCLK signal need inverted? */
+       u8 invert_oclk;
+ 
++      /* parallel or serial transport stream */
++      enum tda10046_tsout ts_mode;
++
+       /* Xtal frequency, 4 or 16MHz*/
+       enum tda10046_xtal xtal_freq;
+ 
+@@ -66,17 +89,61 @@
+       /* AGC configuration */
+       enum tda10046_agc agc_config;
+ 
++      /* setting of GPIO1 and 3 */
++      enum tda10046_gpio gpio_config;
++
++      /* slave address and configuration of the tuner */
++      u8 tuner_address;
++      u8 antenna_switch;
++
++      /* if the board uses another I2c Bridge (tda8290), its address */
++      u8 i2c_gate;
++
+       /* request firmware for device */
+-      /* set this to NULL if the card has a firmware EEPROM */
+       int (*request_firmware)(struct dvb_frontend* fe, const struct firmware **fw, char* name);
+ };
+ 
++enum tda1004x_demod {
++      TDA1004X_DEMOD_TDA10045,
++      TDA1004X_DEMOD_TDA10046,
++};
++
++struct tda1004x_state {
++      struct i2c_adapter* i2c;
++      const struct tda1004x_config* config;
++      struct dvb_frontend frontend;
++
++      /* private demod data */
++      enum tda1004x_demod demod_type;
++};
++
++#if defined(CONFIG_DVB_TDA1004X) || (defined(CONFIG_DVB_TDA1004X_MODULE) && defined(MODULE))
+ extern struct dvb_frontend* tda10045_attach(const struct tda1004x_config* config,
+                                           struct i2c_adapter* i2c);
+ 
+ extern struct dvb_frontend* tda10046_attach(const struct tda1004x_config* config,
+                                           struct i2c_adapter* i2c);
+-
+-extern int tda1004x_write_byte(struct dvb_frontend* fe, int reg, int data);
++#else
++static inline struct dvb_frontend* tda10045_attach(const struct tda1004x_config* config,
++                                          struct i2c_adapter* i2c)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return NULL;
++}
++static inline struct dvb_frontend* tda10046_attach(const struct tda1004x_config* config,
++                                          struct i2c_adapter* i2c)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return NULL;
++}
++#endif // CONFIG_DVB_TDA1004X
++
++static inline int tda1004x_writereg(struct dvb_frontend *fe, u8 reg, u8 val) {
++      int r = 0;
++      u8 buf[] = {reg, val};
++      if (fe->ops.write)
++              r = fe->ops.write(fe, buf, 2);
++      return r;
++}
+ 
+ #endif // TDA1004X_H
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/tda10086.h linux-2.6.18/drivers/media/dvb/frontends/tda10086.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/tda10086.h   1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/tda10086.h        2010-09-09 12:38:50.000000000 +0000
+@@ -0,0 +1,61 @@
++  /*
++     Driver for Philips tda10086 DVBS Frontend
++
++     (c) 2006 Andrew de Quincey
++
++     This program is free software; you can redistribute it and/or modify
++     it under the terms of the GNU General Public License as published by
++     the Free Software Foundation; either version 2 of the License, or
++     (at your option) any later version.
++
++     This program is distributed in the hope that it will be useful,
++     but WITHOUT ANY WARRANTY; without even the implied warranty of
++     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++
++     GNU General Public License for more details.
++
++     You should have received a copy of the GNU General Public License
++     along with this program; if not, write to the Free Software
++     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++
++   */
++
++#ifndef TDA10086_H
++#define TDA10086_H
++
++#include <linux/dvb/frontend.h>
++#include <linux/firmware.h>
++
++enum tda10086_xtal {
++      TDA10086_XTAL_16M,
++      TDA10086_XTAL_4M
++};
++
++struct tda10086_config
++{
++      /* the demodulator's i2c address */
++      u8 demod_address;
++
++      /* does the "inversion" need inverted? */
++      u8 invert;
++
++      /* do we need the diseqc signal with carrier? */
++      u8 diseqc_tone;
++
++      /* frequency of the reference xtal */
++      enum tda10086_xtal xtal_freq;
++};
++
++#if defined(CONFIG_DVB_TDA10086) || (defined(CONFIG_DVB_TDA10086_MODULE) && defined(MODULE))
++extern struct dvb_frontend* tda10086_attach(const struct tda10086_config* config,
++                                          struct i2c_adapter* i2c);
++#else
++static inline struct dvb_frontend* tda10086_attach(const struct tda10086_config* config,
++                                                 struct i2c_adapter* i2c)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return NULL;
++}
++#endif /* CONFIG_DVB_TDA10086 */
++
++#endif /* TDA10086_H */
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/tda665x.h linux-2.6.18/drivers/media/dvb/frontends/tda665x.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/tda665x.h    1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/tda665x.h 2010-09-09 12:38:50.000000000 +0000
+@@ -0,0 +1,52 @@
++/*
++      TDA665x tuner driver
++      Copyright (C) Manu Abraham (abraham.manu@gmail.com)
++
++      This program is free software; you can redistribute it and/or modify
++      it under the terms of the GNU General Public License as published by
++      the Free Software Foundation; either version 2 of the License, or
++      (at your option) any later version.
++
++      This program is distributed in the hope that it will be useful,
++      but WITHOUT ANY WARRANTY; without even the implied warranty of
++      MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++      GNU General Public License for more details.
++
++      You should have received a copy of the GNU General Public License
++      along with this program; if not, write to the Free Software
++      Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++*/
++
++#ifndef __TDA665x_H
++#define __TDA665x_H
++
++struct tda665x_config {
++      char name[128];
++
++      u8      addr;
++      u32     frequency_min;
++      u32     frequency_max;
++      u32     frequency_offst;
++      u32     ref_multiplier;
++      u32     ref_divider;
++};
++
++#if defined(CONFIG_DVB_TDA665x) || (defined(CONFIG_DVB_TDA665x_MODULE) && defined(MODULE))
++
++extern struct dvb_frontend *tda665x_attach(struct dvb_frontend *fe,
++                                         const struct tda665x_config *config,
++                                         struct i2c_adapter *i2c);
++
++#else
++
++static inline struct dvb_frontend *tda665x_attach(struct dvb_frontend *fe,
++                                                const struct tda665x_config *config,
++                                                struct i2c_adapter *i2c)
++{
++      printk(KERN_WARNING "%s: Driver disabled by Kconfig\n", __func__);
++      return NULL;
++}
++
++#endif /* CONFIG_DVB_TDA665x */
++
++#endif /* __TDA665x_H */
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/tda8083.h linux-2.6.18/drivers/media/dvb/frontends/tda8083.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/tda8083.h    2006-09-20 03:42:06.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/tda8083.h 2010-09-09 12:38:50.000000000 +0000
+@@ -35,7 +35,16 @@
+       u8 demod_address;
+ };
+ 
++#if defined(CONFIG_DVB_TDA8083) || (defined(CONFIG_DVB_TDA8083_MODULE) && defined(MODULE))
+ extern struct dvb_frontend* tda8083_attach(const struct tda8083_config* config,
+                                          struct i2c_adapter* i2c);
++#else
++static inline struct dvb_frontend* tda8083_attach(const struct tda8083_config* config,
++                                         struct i2c_adapter* i2c)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return NULL;
++}
++#endif // CONFIG_DVB_TDA8083
+ 
+ #endif // TDA8083_H
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/tda80xx.h linux-2.6.18/drivers/media/dvb/frontends/tda80xx.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/tda80xx.h    1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/tda80xx.h 2010-09-09 12:38:50.000000000 +0000
+@@ -0,0 +1,56 @@
++/*
++ * tda80xx.c
++ *
++ * Philips TDA8044 / TDA8083 QPSK demodulator driver
++ *
++ * Copyright (C) 2001 Felix Domke <tmbinc@elitedvb.net>
++ * Copyright (C) 2002-2004 Andreas Oberritter <obi@linuxtv.org>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++ */
++
++#ifndef TDA80XX_H
++#define TDA80XX_H
++
++#include <linux/dvb/frontend.h>
++
++struct tda80xx_config
++{
++      /* the demodulator's i2c address */
++      u8 demod_address;
++
++      /* IRQ to use (0=>no IRQ used) */
++      u32 irq;
++
++      /* Register setting to use for 13v */
++      u8 volt13setting;
++
++      /* Register setting to use for 18v */
++      u8 volt18setting;
++};
++
++#if defined(CONFIG_DVB_TDA80XX) || (defined(CONFIG_DVB_TDA80XX_MODULE) && defined(MODULE))
++extern struct dvb_frontend* tda80xx_attach(const struct tda80xx_config* config,
++                                         struct i2c_adapter* i2c);
++#else
++static inline struct dvb_frontend* tda80xx_attach(const struct tda80xx_config* config,
++                                         struct i2c_adapter* i2c)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __FUNCTION__);
++      return NULL;
++}
++#endif // CONFIG_DVB_TDA80XX
++
++#endif // TDA80XX_H
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/tda8261_cfg.h linux-2.6.18/drivers/media/dvb/frontends/tda8261_cfg.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/tda8261_cfg.h        1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/tda8261_cfg.h     2010-09-09 12:38:50.000000000 +0000
+@@ -0,0 +1,84 @@
++/*
++      TDA8261 8PSK/QPSK tuner driver
++      Copyright (C) Manu Abraham (abraham.manu@gmail.com)
++
++      This program is free software; you can redistribute it and/or modify
++      it under the terms of the GNU General Public License as published by
++      the Free Software Foundation; either version 2 of the License, or
++      (at your option) any later version.
++
++      This program is distributed in the hope that it will be useful,
++      but WITHOUT ANY WARRANTY; without even the implied warranty of
++      MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++      GNU General Public License for more details.
++
++      You should have received a copy of the GNU General Public License
++      along with this program; if not, write to the Free Software
++      Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++*/
++
++static int tda8261_get_frequency(struct dvb_frontend *fe, u32 *frequency)
++{
++      struct dvb_frontend_ops *frontend_ops = NULL;
++      struct dvb_tuner_ops    *tuner_ops = NULL;
++      struct tuner_state      t_state;
++      int err = 0;
++
++      if (&fe->ops)
++              frontend_ops = &fe->ops;
++      if (&frontend_ops->tuner_ops)
++              tuner_ops = &frontend_ops->tuner_ops;
++      if (tuner_ops->get_state) {
++              if ((err = tuner_ops->get_state(fe, DVBFE_TUNER_FREQUENCY, &t_state)) < 0) {
++                      printk("%s: Invalid parameter\n", __func__);
++                      return err;
++              }
++              *frequency = t_state.frequency;
++              printk("%s: Frequency=%d\n", __func__, t_state.frequency);
++      }
++      return 0;
++}
++
++static int tda8261_set_frequency(struct dvb_frontend *fe, u32 frequency)
++{
++      struct dvb_frontend_ops *frontend_ops = NULL;
++      struct dvb_tuner_ops    *tuner_ops = NULL;
++      struct tuner_state      t_state;
++      int err = 0;
++
++      t_state.frequency = frequency;
++      if (&fe->ops)
++              frontend_ops = &fe->ops;
++      if (&frontend_ops->tuner_ops)
++              tuner_ops = &frontend_ops->tuner_ops;
++      if (tuner_ops->set_state) {
++              if ((err = tuner_ops->set_state(fe, DVBFE_TUNER_FREQUENCY, &t_state)) < 0) {
++                      printk("%s: Invalid parameter\n", __func__);
++                      return err;
++              }
++      }
++      printk("%s: Frequency=%d\n", __func__, t_state.frequency);
++      return 0;
++}
++
++static int tda8261_get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth)
++{
++      struct dvb_frontend_ops *frontend_ops = &fe->ops;
++      struct dvb_tuner_ops    *tuner_ops = &frontend_ops->tuner_ops;
++      struct tuner_state      t_state;
++      int err = 0;
++
++      if (&fe->ops)
++              frontend_ops = &fe->ops;
++      if (&frontend_ops->tuner_ops)
++              tuner_ops = &frontend_ops->tuner_ops;
++      if (tuner_ops->get_state) {
++              if ((err = tuner_ops->get_state(fe, DVBFE_TUNER_BANDWIDTH, &t_state)) < 0) {
++                      printk("%s: Invalid parameter\n", __func__);
++                      return err;
++              }
++              *bandwidth = t_state.bandwidth;
++      }
++      printk("%s: Bandwidth=%d\n", __func__, t_state.bandwidth);
++      return 0;
++}
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/tda8261.h linux-2.6.18/drivers/media/dvb/frontends/tda8261.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/tda8261.h    1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/tda8261.h 2010-09-09 12:38:50.000000000 +0000
+@@ -0,0 +1,55 @@
++/*
++      TDA8261 8PSK/QPSK tuner driver
++      Copyright (C) Manu Abraham (abraham.manu@gmail.com)
++
++      This program is free software; you can redistribute it and/or modify
++      it under the terms of the GNU General Public License as published by
++      the Free Software Foundation; either version 2 of the License, or
++      (at your option) any later version.
++
++      This program is distributed in the hope that it will be useful,
++      but WITHOUT ANY WARRANTY; without even the implied warranty of
++      MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++      GNU General Public License for more details.
++
++      You should have received a copy of the GNU General Public License
++      along with this program; if not, write to the Free Software
++      Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++*/
++
++#ifndef __TDA8261_H
++#define __TDA8261_H
++
++enum tda8261_step {
++      TDA8261_STEP_2000 = 0,  /* 2000 kHz */
++      TDA8261_STEP_1000,      /* 1000 kHz */
++      TDA8261_STEP_500,       /*  500 kHz */
++      TDA8261_STEP_250,       /*  250 kHz */
++      TDA8261_STEP_125        /*  125 kHz */
++};
++
++struct tda8261_config {
++//    u8                      buf[16];
++      u8                      addr;
++      enum tda8261_step       step_size;
++};
++
++#if defined(CONFIG_DVB_TDA8261) || (defined(CONFIG_DVB_TDA8261_MODULE) && defined(MODULE))
++
++extern struct dvb_frontend *tda8261_attach(struct dvb_frontend *fe,
++                                         const struct tda8261_config *config,
++                                         struct i2c_adapter *i2c);
++
++#else
++
++static inline struct dvb_frontend *tda8261_attach(struct dvb_frontend *fe,
++                                                const struct tda8261_config *config,
++                                                struct i2c_adapter *i2c)
++{
++      printk(KERN_WARNING "%s: Driver disabled by Kconfig\n", __func__);
++      return NULL;
++}
++
++#endif //CONFIG_DVB_TDA8261
++
++#endif// __TDA8261_H
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/tda826x.h linux-2.6.18/drivers/media/dvb/frontends/tda826x.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/tda826x.h    1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/tda826x.h 2010-09-09 12:38:50.000000000 +0000
+@@ -0,0 +1,53 @@
++  /*
++     Driver for Philips tda8262/tda8263 DVBS Silicon tuners
++
++     (c) 2006 Andrew de Quincey
++
++     This program is free software; you can redistribute it and/or modify
++     it under the terms of the GNU General Public License as published by
++     the Free Software Foundation; either version 2 of the License, or
++     (at your option) any later version.
++
++     This program is distributed in the hope that it will be useful,
++     but WITHOUT ANY WARRANTY; without even the implied warranty of
++     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++
++     GNU General Public License for more details.
++
++     You should have received a copy of the GNU General Public License
++     along with this program; if not, write to the Free Software
++     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++
++  */
++
++#ifndef __DVB_TDA826X_H__
++#define __DVB_TDA826X_H__
++
++#include <linux/i2c.h>
++#include "dvb_frontend.h"
++
++/**
++ * Attach a tda826x tuner to the supplied frontend structure.
++ *
++ * @param fe Frontend to attach to.
++ * @param addr i2c address of the tuner.
++ * @param i2c i2c adapter to use.
++ * @param has_loopthrough Set to 1 if the card has a loopthrough RF connector.
++ * @return FE pointer on success, NULL on failure.
++ */
++#if defined(CONFIG_DVB_TDA826X) || (defined(CONFIG_DVB_TDA826X_MODULE) && defined(MODULE))
++extern struct dvb_frontend* tda826x_attach(struct dvb_frontend *fe, int addr,
++                                         struct i2c_adapter *i2c,
++                                         int has_loopthrough);
++#else
++static inline struct dvb_frontend* tda826x_attach(struct dvb_frontend *fe,
++                                                int addr,
++                                                struct i2c_adapter *i2c,
++                                                int has_loopthrough)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return NULL;
++}
++#endif // CONFIG_DVB_TDA826X
++
++#endif // __DVB_TDA826X_H__
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/tdhd1.h linux-2.6.18/drivers/media/dvb/frontends/tdhd1.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/tdhd1.h      1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/tdhd1.h   2010-09-09 12:38:50.000000000 +0000
+@@ -0,0 +1,73 @@
++/*
++ * tdhd1.h - ALPS TDHD1-204A tuner support
++ *
++ * Copyright (C) 2008 Oliver Endriss <o.endriss@gmx.de>
++ *
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License
++ * as published by the Free Software Foundation; either version 2
++ * of the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
++ * Or, point your browser to http://www.gnu.org/copyleft/gpl.html
++ *
++ *
++ * The project's page is at http://www.linuxtv.org
++ */
++
++#ifndef TDHD1_H
++#define TDHD1_H
++
++#include "tda1004x.h"
++
++static int alps_tdhd1_204_request_firmware(struct dvb_frontend *fe, const struct firmware **fw, char *name);
++
++static struct tda1004x_config alps_tdhd1_204a_config = {
++      .demod_address = 0x8,
++      .invert = 1,
++      .invert_oclk = 0,
++      .xtal_freq = TDA10046_XTAL_4M,
++      .agc_config = TDA10046_AGC_DEFAULT,
++      .if_freq = TDA10046_FREQ_3617,
++      .request_firmware = alps_tdhd1_204_request_firmware
++};
++
++static int alps_tdhd1_204a_tuner_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
++{
++      struct i2c_adapter *i2c = fe->tuner_priv;
++      u8 data[4];
++      struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = data, .len = sizeof(data) };
++      u32 div;
++
++      div = (params->frequency + 36166666) / 166666;
++
++      data[0] = (div >> 8) & 0x7f;
++      data[1] = div & 0xff;
++      data[2] = 0x85;
++
++      if (params->frequency >= 174000000 && params->frequency <= 230000000)
++              data[3] = 0x02;
++      else if (params->frequency >= 470000000 && params->frequency <= 823000000)
++              data[3] = 0x0C;
++      else if (params->frequency > 823000000 && params->frequency <= 862000000)
++              data[3] = 0x8C;
++      else
++              return -EINVAL;
++
++      if (fe->ops.i2c_gate_ctrl)
++              fe->ops.i2c_gate_ctrl(fe, 1);
++      if (i2c_transfer(i2c, &msg, 1) != 1)
++              return -EIO;
++
++      return 0;
++}
++
++#endif /* TDHD1_H */
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/tua6100.h linux-2.6.18/drivers/media/dvb/frontends/tua6100.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/tua6100.h    1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/tua6100.h 2010-09-09 12:38:50.000000000 +0000
+@@ -0,0 +1,47 @@
++/**
++ * Driver for Infineon tua6100 PLL.
++ *
++ * (c) 2006 Andrew de Quincey
++ *
++ * Based on code found in budget-av.c, which has the following:
++ * Compiled from various sources by Michael Hunold <michael@mihu.de>
++ *
++ * CI interface support (c) 2004 Olivier Gournet <ogournet@anevia.com> &
++ *                               Andrew de Quincey <adq_dvb@lidskialf.net>
++ *
++ * Copyright (C) 2002 Ralph Metzler <rjkm@metzlerbros.de>
++ *
++ * Copyright (C) 1999-2002 Ralph  Metzler
++ *                       & Marcus Metzler for convergence integrated media GmbH
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++ */
++
++#ifndef __DVB_TUA6100_H__
++#define __DVB_TUA6100_H__
++
++#include <linux/i2c.h>
++#include "dvb_frontend.h"
++
++#if defined(CONFIG_DVB_TUA6100) || (defined(CONFIG_DVB_TUA6100_MODULE) && defined(MODULE))
++extern struct dvb_frontend *tua6100_attach(struct dvb_frontend *fe, int addr, struct i2c_adapter *i2c);
++#else
++static inline struct dvb_frontend* tua6100_attach(struct dvb_frontend *fe, int addr, struct i2c_adapter *i2c)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return NULL;
++}
++#endif // CONFIG_DVB_TUA6100
++
++#endif
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/ves1820.h linux-2.6.18/drivers/media/dvb/frontends/ves1820.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/ves1820.h    2006-09-20 03:42:06.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/ves1820.h 2010-09-09 12:38:50.000000000 +0000
+@@ -41,7 +41,16 @@
+       u8 selagc:1;
+ };
+ 
++#if defined(CONFIG_DVB_VES1820) || (defined(CONFIG_DVB_VES1820_MODULE) && defined(MODULE))
+ extern struct dvb_frontend* ves1820_attach(const struct ves1820_config* config,
+                                          struct i2c_adapter* i2c, u8 pwm);
++#else
++static inline struct dvb_frontend* ves1820_attach(const struct ves1820_config* config,
++                                         struct i2c_adapter* i2c, u8 pwm)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return NULL;
++}
++#endif // CONFIG_DVB_VES1820
+ 
+ #endif // VES1820_H
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/ves1x93.h linux-2.6.18/drivers/media/dvb/frontends/ves1x93.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/ves1x93.h    2006-09-20 03:42:06.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/ves1x93.h 2010-09-09 12:38:50.000000000 +0000
+@@ -40,7 +40,16 @@
+       u8 invert_pwm:1;
+ };
+ 
++#if defined(CONFIG_DVB_VES1X93) || (defined(CONFIG_DVB_VES1X93_MODULE) && defined(MODULE))
+ extern struct dvb_frontend* ves1x93_attach(const struct ves1x93_config* config,
+                                          struct i2c_adapter* i2c);
++#else
++static inline struct dvb_frontend* ves1x93_attach(const struct ves1x93_config* config,
++                                         struct i2c_adapter* i2c)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return NULL;
++}
++#endif // CONFIG_DVB_VES1X93
+ 
+ #endif // VES1X93_H
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/z0194a.h linux-2.6.18/drivers/media/dvb/frontends/z0194a.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/z0194a.h     1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/z0194a.h  2010-09-09 12:38:50.000000000 +0000
+@@ -0,0 +1,85 @@
++/* z0194a.h Sharp z0194a tuner support
++*
++* Copyright (C) 2008 Igor M. Liplianin (liplianin@me.by)
++*
++*     This program is free software; you can redistribute it and/or modify it
++*     under the terms of the GNU General Public License as published by the
++*     Free Software Foundation, version 2.
++*
++* see Documentation/dvb/README.dvb-usb for more information
++*/
++
++#ifndef Z0194A
++#define Z0194A
++
++static int sharp_z0194a_set_symbol_rate(struct dvb_frontend *fe,
++                                       u32 srate, u32 ratio)
++{
++      u8 aclk = 0;
++      u8 bclk = 0;
++
++      if (srate < 1500000) {
++              aclk = 0xb7; bclk = 0x47; }
++      else if (srate < 3000000) {
++              aclk = 0xb7; bclk = 0x4b; }
++      else if (srate < 7000000) {
++              aclk = 0xb7; bclk = 0x4f; }
++      else if (srate < 14000000) {
++              aclk = 0xb7; bclk = 0x53; }
++      else if (srate < 30000000) {
++              aclk = 0xb6; bclk = 0x53; }
++      else if (srate < 45000000) {
++              aclk = 0xb4; bclk = 0x51; }
++
++      stv0299_writereg(fe, 0x13, aclk);
++      stv0299_writereg(fe, 0x14, bclk);
++      stv0299_writereg(fe, 0x1f, (ratio >> 16) & 0xff);
++      stv0299_writereg(fe, 0x20, (ratio >> 8) & 0xff);
++      stv0299_writereg(fe, 0x21, (ratio) & 0xf0);
++
++      return 0;
++}
++
++static u8 sharp_z0194a_inittab[] = {
++      0x01, 0x15,
++      0x02, 0x00,
++      0x03, 0x00,
++      0x04, 0x7d,   /* F22FR = 0x7d, F22 = f_VCO / 128 / 0x7d = 22 kHz */
++      0x05, 0x35,   /* I2CT = 0, SCLT = 1, SDAT = 1 */
++      0x06, 0x40,   /* DAC not used, set to high impendance mode */
++      0x07, 0x00,   /* DAC LSB */
++      0x08, 0x40,   /* DiSEqC off, LNB power on OP2/LOCK pin on */
++      0x09, 0x00,   /* FIFO */
++      0x0c, 0x51,   /* OP1 ctl = Normal, OP1 val = 1 (LNB Power ON) */
++      0x0d, 0x82,   /* DC offset compensation = ON, beta_agc1 = 2 */
++      0x0e, 0x23,   /* alpha_tmg = 2, beta_tmg = 3 */
++      0x10, 0x3f,   /* AGC2  0x3d */
++      0x11, 0x84,
++      0x12, 0xb9,
++      0x15, 0xc9,   /* lock detector threshold */
++      0x16, 0x00,
++      0x17, 0x00,
++      0x18, 0x00,
++      0x19, 0x00,
++      0x1a, 0x00,
++      0x1f, 0x50,
++      0x20, 0x00,
++      0x21, 0x00,
++      0x22, 0x00,
++      0x23, 0x00,
++      0x28, 0x00,  /* out imp: normal  out type: parallel FEC mode:0 */
++      0x29, 0x1e,  /* 1/2 threshold */
++      0x2a, 0x14,  /* 2/3 threshold */
++      0x2b, 0x0f,  /* 3/4 threshold */
++      0x2c, 0x09,  /* 5/6 threshold */
++      0x2d, 0x05,  /* 7/8 threshold */
++      0x2e, 0x01,
++      0x31, 0x1f,  /* test all FECs */
++      0x32, 0x19,  /* viterbi and synchro search */
++      0x33, 0xfc,  /* rs control */
++      0x34, 0x93,  /* error control */
++      0x0f, 0x52,
++      0xff, 0xff
++};
++
++#endif
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/zl10036.h linux-2.6.18/drivers/media/dvb/frontends/zl10036.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/zl10036.h    1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/zl10036.h 2010-09-09 12:38:50.000000000 +0000
+@@ -0,0 +1,53 @@
++/**
++ * Driver for Zarlink ZL10036 DVB-S silicon tuner
++ *
++ * Copyright (C) 2006 Tino Reichardt
++ * Copyright (C) 2007-2009 Matthias Schwarzott <zzam@gentoo.de>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License Version 2, as
++ * published by the Free Software Foundation.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++ */
++
++#ifndef DVB_ZL10036_H
++#define DVB_ZL10036_H
++
++#include <linux/i2c.h>
++#include "dvb_frontend.h"
++
++/**
++ * Attach a zl10036 tuner to the supplied frontend structure.
++ *
++ * @param fe Frontend to attach to.
++ * @param config zl10036_config structure
++ * @return FE pointer on success, NULL on failure.
++ */
++
++struct zl10036_config {
++      u8 tuner_address;
++      int rf_loop_enable;
++};
++
++#if defined(CONFIG_DVB_ZL10036) || \
++      (defined(CONFIG_DVB_ZL10036_MODULE) && defined(MODULE))
++extern struct dvb_frontend *zl10036_attach(struct dvb_frontend *fe,
++      const struct zl10036_config *config, struct i2c_adapter *i2c);
++#else
++static inline struct dvb_frontend *zl10036_attach(struct dvb_frontend *fe,
++      const struct zl10036_config *config, struct i2c_adapter *i2c)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return NULL;
++}
++#endif
++
++#endif /* DVB_ZL10036_H */
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/zl10039.h linux-2.6.18/drivers/media/dvb/frontends/zl10039.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/zl10039.h    1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/zl10039.h 2010-09-09 12:38:50.000000000 +0000
+@@ -0,0 +1,40 @@
++/*
++    Driver for Zarlink ZL10039 DVB-S tuner
++
++    Copyright (C) 2007 Jan D. Louw <jd.louw@mweb.co.za>
++
++    This program is free software; you can redistribute it and/or modify
++    it under the terms of the GNU General Public License as published by
++    the Free Software Foundation; either version 2 of the License, or
++    (at your option) any later version.
++
++    This program is distributed in the hope that it will be useful,
++    but WITHOUT ANY WARRANTY; without even the implied warranty of
++    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++
++    GNU General Public License for more details.
++
++    You should have received a copy of the GNU General Public License
++    along with this program; if not, write to the Free Software
++    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++*/
++
++#ifndef ZL10039_H
++#define ZL10039_H
++
++#if defined(CONFIG_DVB_ZL10039) || (defined(CONFIG_DVB_ZL10039_MODULE) \
++          && defined(MODULE))
++struct dvb_frontend *zl10039_attach(struct dvb_frontend *fe,
++                                      u8 i2c_addr,
++                                      struct i2c_adapter *i2c);
++#else
++static inline struct dvb_frontend *zl10039_attach(struct dvb_frontend *fe,
++                                      u8 i2c_addr,
++                                      struct i2c_adapter *i2c)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return NULL;
++}
++#endif /* CONFIG_DVB_ZL10039 */
++
++#endif /* ZL10039_H */
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/zl10353.h linux-2.6.18/drivers/media/dvb/frontends/zl10353.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/zl10353.h    2006-09-20 03:42:06.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/zl10353.h 2010-09-09 12:38:50.000000000 +0000
+@@ -1,7 +1,7 @@
+ /*
+  *  Driver for Zarlink DVB-T ZL10353 demodulator
+  *
+- *  Copyright (C) 2006 Christopher Pascoe <c.pascoe@itee.uq.edu.au>
++ *  Copyright (C) 2006, 2007 Christopher Pascoe <c.pascoe@itee.uq.edu.au>
+  *
+  *  This program is free software; you can redistribute it and/or modify
+  *  it under the terms of the GNU General Public License as published by
+@@ -29,13 +29,34 @@
+       /* demodulator's I2C address */
+       u8 demod_address;
+ 
++      /* frequencies in units of 0.1kHz */
++      int adc_clock;  /* default: 450560 (45.056  MHz) */
++      int if2;        /* default: 361667 (36.1667 MHz) */
++
+       /* set if no pll is connected to the secondary i2c bus */
+       int no_tuner;
++
++      /* set if parallel ts output is required */
++      int parallel_ts;
++
++      /* set if i2c_gate_ctrl disable is required */
++      u8 disable_i2c_gate_ctrl:1;
++
++      /* clock control registers (0x51-0x54) */
++      u8 clock_ctl_1;  /* default: 0x46 */
++      u8 pll_0;        /* default: 0x15 */
+ };
+ 
++#if defined(CONFIG_DVB_ZL10353) || (defined(CONFIG_DVB_ZL10353_MODULE) && defined(MODULE))
+ extern struct dvb_frontend* zl10353_attach(const struct zl10353_config *config,
+                                          struct i2c_adapter *i2c);
+-
+-extern int zl10353_write(struct dvb_frontend *fe, u8 *ibuf, int ilen);
++#else
++static inline struct dvb_frontend* zl10353_attach(const struct zl10353_config *config,
++                                         struct i2c_adapter *i2c)
++{
++      printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
++      return NULL;
++}
++#endif /* CONFIG_DVB_ZL10353 */
+ 
+ #endif /* ZL10353_H */
+diff -Naur linux-2.6.18/drivers/media/dvb.orig/frontends/zl10353_priv.h linux-2.6.18/drivers/media/dvb/frontends/zl10353_priv.h
+--- linux-2.6.18/drivers/media/dvb.orig/frontends/zl10353_priv.h       2006-09-20 03:42:06.000000000 +0000
++++ linux-2.6.18/drivers/media/dvb/frontends/zl10353_priv.h    2010-09-09 12:38:50.000000000 +0000
+@@ -1,7 +1,7 @@
+ /*
+  *  Driver for Zarlink DVB-T ZL10353 demodulator
+  *
+- *  Copyright (C) 2006 Christopher Pascoe <c.pascoe@itee.uq.edu.au>
++ *  Copyright (C) 2006, 2007 Christopher Pascoe <c.pascoe@itee.uq.edu.au>
+  *
+  *  This program is free software; you can redistribute it and/or modify
+  *  it under the terms of the GNU General Public License as published by
+@@ -16,27 +16,64 @@
+  *
+  *  You should have received a copy of the GNU General Public License
+  *  along with this program; if not, write to the Free Software
+- *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.=
++ *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+  */
+ 
+ #ifndef _ZL10353_PRIV_
+ #define _ZL10353_PRIV_
+ 
+-#define ID_ZL10353    0x14
++#define ID_ZL10353    0x14 /* Zarlink ZL10353 */
++#define ID_CE6230     0x18 /* Intel CE6230 */
++#define ID_CE6231     0x19 /* Intel CE6231 */
++
++#define msb(x) (((x) >> 8) & 0xff)
++#define lsb(x) ((x) & 0xff)
+ 
+ enum zl10353_reg_addr {
+-      INTERRUPT_0     = 0x00,
+-      INTERRUPT_1     = 0x01,
+-      INTERRUPT_2     = 0x02,
+-      INTERRUPT_3     = 0x03,
+-      INTERRUPT_4     = 0x04,
+-      INTERRUPT_5     = 0x05,
+-      STATUS_6        = 0x06,
+-      STATUS_7        = 0x07,
+-      STATUS_8        = 0x08,
+-      STATUS_9        = 0x09,
+-      SNR             = 0x10,
+-      CHIP_ID         = 0x7F,
++      INTERRUPT_0        = 0x00,
++      INTERRUPT_1        = 0x01,
++      INTERRUPT_2        = 0x02,
++      INTERRUPT_3        = 0x03,
++      INTERRUPT_4        = 0x04,
++      INTERRUPT_5        = 0x05,
++      STATUS_6           = 0x06,
++      STATUS_7           = 0x07,
++      STATUS_8           = 0x08,
++      STATUS_9           = 0x09,
++      AGC_GAIN_1         = 0x0A,
++      AGC_GAIN_0         = 0x0B,
++      SNR                = 0x10,
++      RS_ERR_CNT_2       = 0x11,
++      RS_ERR_CNT_1       = 0x12,
++      RS_ERR_CNT_0       = 0x13,
++      RS_UBC_1           = 0x14,
++      RS_UBC_0           = 0x15,
++      TPS_RECEIVED_1     = 0x1D,
++      TPS_RECEIVED_0     = 0x1E,
++      TPS_CURRENT_1      = 0x1F,
++      TPS_CURRENT_0      = 0x20,
++      CLOCK_CTL_0        = 0x51,
++      CLOCK_CTL_1        = 0x52,
++      PLL_0              = 0x53,
++      PLL_1              = 0x54,
++      RESET              = 0x55,
++      AGC_TARGET         = 0x56,
++      MCLK_RATIO         = 0x5C,
++      ACQ_CTL            = 0x5E,
++      TRL_NOMINAL_RATE_1 = 0x65,
++      TRL_NOMINAL_RATE_0 = 0x66,
++      INPUT_FREQ_1       = 0x6C,
++      INPUT_FREQ_0       = 0x6D,
++      TPS_GIVEN_1        = 0x6E,
++      TPS_GIVEN_0        = 0x6F,
++      TUNER_GO           = 0x70,
++      FSM_GO             = 0x71,
++      CHIP_ID            = 0x7F,
++      CHAN_STEP_1        = 0xE4,
++      CHAN_STEP_0        = 0xE5,
++      OFDM_LOCK_TIME     = 0xE7,
++      FEC_LOCK_TIME      = 0xE8,
++      ACQ_DELAY          = 0xE9,
+ };
+ 
+ #endif                          /* _ZL10353_PRIV_ */

diff --git a/recipes/linux/linux-dm500hd-2.6.18/defconfig b/recipes/linux/linux-dm500hd-2.6.18/defconfig
index 845915b..7f8882d 100644 (file)
--- a/recipes/linux/linux-dm500hd-2.6.18/defconfig
+++ b/recipes/linux/linux-dm500hd-2.6.18/defconfig
@@ -999,90 +999,7 @@ CONFIG_I2C_CHARDEV=y
 #
 # Digital Video Broadcasting Devices
 #
-CONFIG_DVB=y
-CONFIG_DVB_CORE=y
-
-#
-# Supported SAA7146 based PCI Adapters
-#
-
-#
-# Supported USB Adapters
-#
-# CONFIG_DVB_USB is not set
-# CONFIG_DVB_TTUSB_BUDGET is not set
-# CONFIG_DVB_TTUSB_DEC is not set
-# CONFIG_DVB_CINERGYT2 is not set
-
-#
-# Supported FlexCopII (B2C2) Adapters
-#
-# CONFIG_DVB_B2C2_FLEXCOP is not set
-
-#
-# Supported BT878 Adapters
-#
-
-#
-# Supported Pluto2 Adapters
-#
-# CONFIG_DVB_PLUTO2 is not set
-
-#
-# Supported DVB Frontends
-#
-
-#
-# Customise DVB Frontends
-#
-
-#
-# DVB-S (satellite) frontends
-#
-CONFIG_DVB_STV0299=y
-# CONFIG_DVB_CX24110 is not set
-# CONFIG_DVB_CX24123 is not set
-# CONFIG_DVB_TDA8083 is not set
-# CONFIG_DVB_MT312 is not set
-# CONFIG_DVB_VES1X93 is not set
-# CONFIG_DVB_S5H1420 is not set
-
-#
-# DVB-T (terrestrial) frontends
-#
-# CONFIG_DVB_SP8870 is not set
-# CONFIG_DVB_SP887X is not set
-# CONFIG_DVB_CX22700 is not set
-# CONFIG_DVB_CX22702 is not set
-# CONFIG_DVB_L64781 is not set
-# CONFIG_DVB_TDA1004X is not set
-# CONFIG_DVB_NXT6000 is not set
-# CONFIG_DVB_MT352 is not set
-# CONFIG_DVB_ZL10353 is not set
-# CONFIG_DVB_DIB3000MB is not set
-# CONFIG_DVB_DIB3000MC is not set
-
-#
-# DVB-C (cable) frontends
-#
-# CONFIG_DVB_VES1820 is not set
-# CONFIG_DVB_TDA10021 is not set
-# CONFIG_DVB_STV0297 is not set
-
-#
-# ATSC (North American/Korean Terrestrial/Cable DTV) frontends
-#
-# CONFIG_DVB_NXT200X is not set
-# CONFIG_DVB_OR51211 is not set
-# CONFIG_DVB_OR51132 is not set
-# CONFIG_DVB_BCM3510 is not set
-# CONFIG_DVB_LGDT330X is not set
-
-#
-# Miscellaneous devices
-#
-# CONFIG_DVB_LNBP21 is not set
-# CONFIG_DVB_ISL6421 is not set
+# CONFIG_DVB is not set
 # CONFIG_USB_DABUSB is not set
 
 #

diff --git a/recipes/linux/linux-dm800-2.6.18/defconfig b/recipes/linux/linux-dm800-2.6.18/defconfig
index dcb7c99..a8f051f 100644 (file)
--- a/recipes/linux/linux-dm800-2.6.18/defconfig
+++ b/recipes/linux/linux-dm800-2.6.18/defconfig
@@ -984,90 +984,7 @@ CONFIG_I2C_CHARDEV=y
 #
 # Digital Video Broadcasting Devices
 #
-CONFIG_DVB=y
-CONFIG_DVB_CORE=y
-
-#
-# Supported SAA7146 based PCI Adapters
-#
-
-#
-# Supported USB Adapters
-#
-# CONFIG_DVB_USB is not set
-# CONFIG_DVB_TTUSB_BUDGET is not set
-# CONFIG_DVB_TTUSB_DEC is not set
-# CONFIG_DVB_CINERGYT2 is not set
-
-#
-# Supported FlexCopII (B2C2) Adapters
-#
-# CONFIG_DVB_B2C2_FLEXCOP is not set
-
-#
-# Supported BT878 Adapters
-#
-
-#
-# Supported Pluto2 Adapters
-#
-# CONFIG_DVB_PLUTO2 is not set
-
-#
-# Supported DVB Frontends
-#
-
-#
-# Customise DVB Frontends
-#
-
-#
-# DVB-S (satellite) frontends
-#
-CONFIG_DVB_STV0299=y
-# CONFIG_DVB_CX24110 is not set
-# CONFIG_DVB_CX24123 is not set
-# CONFIG_DVB_TDA8083 is not set
-# CONFIG_DVB_MT312 is not set
-# CONFIG_DVB_VES1X93 is not set
-# CONFIG_DVB_S5H1420 is not set
-
-#
-# DVB-T (terrestrial) frontends
-#
-# CONFIG_DVB_SP8870 is not set
-# CONFIG_DVB_SP887X is not set
-# CONFIG_DVB_CX22700 is not set
-# CONFIG_DVB_CX22702 is not set
-# CONFIG_DVB_L64781 is not set
-# CONFIG_DVB_TDA1004X is not set
-# CONFIG_DVB_NXT6000 is not set
-# CONFIG_DVB_MT352 is not set
-# CONFIG_DVB_ZL10353 is not set
-# CONFIG_DVB_DIB3000MB is not set
-# CONFIG_DVB_DIB3000MC is not set
-
-#
-# DVB-C (cable) frontends
-#
-# CONFIG_DVB_VES1820 is not set
-# CONFIG_DVB_TDA10021 is not set
-# CONFIG_DVB_STV0297 is not set
-
-#
-# ATSC (North American/Korean Terrestrial/Cable DTV) frontends
-#
-# CONFIG_DVB_NXT200X is not set
-# CONFIG_DVB_OR51211 is not set
-# CONFIG_DVB_OR51132 is not set
-# CONFIG_DVB_BCM3510 is not set
-# CONFIG_DVB_LGDT330X is not set
-
-#
-# Miscellaneous devices
-#
-# CONFIG_DVB_LNBP21 is not set
-# CONFIG_DVB_ISL6421 is not set
+# CONFIG_DVB is not set
 # CONFIG_USB_DABUSB is not set
 
 #

diff --git a/recipes/linux/linux-dm8000-2.6.18/defconfig b/recipes/linux/linux-dm8000-2.6.18/defconfig
index a6fef11..e6dca99 100644 (file)
--- a/recipes/linux/linux-dm8000-2.6.18/defconfig
+++ b/recipes/linux/linux-dm8000-2.6.18/defconfig
@@ -1000,90 +1000,7 @@ CONFIG_I2C_CHARDEV=y
 #
 # Digital Video Broadcasting Devices
 #
-CONFIG_DVB=y
-CONFIG_DVB_CORE=m
-
-#
-# Supported SAA7146 based PCI Adapters
-#
-
-#
-# Supported USB Adapters
-#
-# CONFIG_DVB_USB is not set
-# CONFIG_DVB_TTUSB_BUDGET is not set
-# CONFIG_DVB_TTUSB_DEC is not set
-# CONFIG_DVB_CINERGYT2 is not set
-
-#
-# Supported FlexCopII (B2C2) Adapters
-#
-# CONFIG_DVB_B2C2_FLEXCOP is not set
-
-#
-# Supported BT878 Adapters
-#
-
-#
-# Supported Pluto2 Adapters
-#
-# CONFIG_DVB_PLUTO2 is not set
-
-#
-# Supported DVB Frontends
-#
-
-#
-# Customise DVB Frontends
-#
-
-#
-# DVB-S (satellite) frontends
-#
-CONFIG_DVB_STV0299=m
-# CONFIG_DVB_CX24110 is not set
-# CONFIG_DVB_CX24123 is not set
-# CONFIG_DVB_TDA8083 is not set
-# CONFIG_DVB_MT312 is not set
-# CONFIG_DVB_VES1X93 is not set
-# CONFIG_DVB_S5H1420 is not set
-
-#
-# DVB-T (terrestrial) frontends
-#
-# CONFIG_DVB_SP8870 is not set
-# CONFIG_DVB_SP887X is not set
-# CONFIG_DVB_CX22700 is not set
-# CONFIG_DVB_CX22702 is not set
-# CONFIG_DVB_L64781 is not set
-# CONFIG_DVB_TDA1004X is not set
-# CONFIG_DVB_NXT6000 is not set
-# CONFIG_DVB_MT352 is not set
-# CONFIG_DVB_ZL10353 is not set
-# CONFIG_DVB_DIB3000MB is not set
-# CONFIG_DVB_DIB3000MC is not set
-
-#
-# DVB-C (cable) frontends
-#
-# CONFIG_DVB_VES1820 is not set
-# CONFIG_DVB_TDA10021 is not set
-# CONFIG_DVB_STV0297 is not set
-
-#
-# ATSC (North American/Korean Terrestrial/Cable DTV) frontends
-#
-# CONFIG_DVB_NXT200X is not set
-# CONFIG_DVB_OR51211 is not set
-# CONFIG_DVB_OR51132 is not set
-# CONFIG_DVB_BCM3510 is not set
-# CONFIG_DVB_LGDT330X is not set
-
-#
-# Miscellaneous devices
-#
-# CONFIG_DVB_LNBP21 is not set
-# CONFIG_DVB_ISL6421 is not set
+# CONFIG_DVB is not set
 # CONFIG_USB_DABUSB is not set
 
 #

diff --git a/recipes/linux/linux-dm8000_2.6.18.bb b/recipes/linux/linux-dm8000_2.6.18.bb
index 76bb747..f86030e 100644 (file)
--- a/recipes/linux/linux-dm8000_2.6.18.bb
+++ b/recipes/linux/linux-dm8000_2.6.18.bb
@@ -1,6 +1,6 @@
 require linux-opendreambox-2.6.18.inc
 
-PR="${PR_INC}.1"
+PR="${PR_INC}.0"
 
 SRC_URI += "\
        file://linux-2.6.18-disable-unneeded-uarts.patch;patch=1 \

diff --git a/recipes/linux/linux-dm800se-2.6.18/defconfig b/recipes/linux/linux-dm800se-2.6.18/defconfig
index 67abfbc..f1658f2 100644 (file)
--- a/recipes/linux/linux-dm800se-2.6.18/defconfig
+++ b/recipes/linux/linux-dm800se-2.6.18/defconfig
@@ -999,90 +999,7 @@ CONFIG_I2C_CHARDEV=y
 #
 # Digital Video Broadcasting Devices
 #
-CONFIG_DVB=y
-CONFIG_DVB_CORE=y
-
-#
-# Supported SAA7146 based PCI Adapters
-#
-
-#
-# Supported USB Adapters
-#
-# CONFIG_DVB_USB is not set
-# CONFIG_DVB_TTUSB_BUDGET is not set
-# CONFIG_DVB_TTUSB_DEC is not set
-# CONFIG_DVB_CINERGYT2 is not set
-
-#
-# Supported FlexCopII (B2C2) Adapters
-#
-# CONFIG_DVB_B2C2_FLEXCOP is not set
-
-#
-# Supported BT878 Adapters
-#
-
-#
-# Supported Pluto2 Adapters
-#
-# CONFIG_DVB_PLUTO2 is not set
-
-#
-# Supported DVB Frontends
-#
-
-#
-# Customise DVB Frontends
-#
-
-#
-# DVB-S (satellite) frontends
-#
-CONFIG_DVB_STV0299=y
-# CONFIG_DVB_CX24110 is not set
-# CONFIG_DVB_CX24123 is not set
-# CONFIG_DVB_TDA8083 is not set
-# CONFIG_DVB_MT312 is not set
-# CONFIG_DVB_VES1X93 is not set
-# CONFIG_DVB_S5H1420 is not set
-
-#
-# DVB-T (terrestrial) frontends
-#
-# CONFIG_DVB_SP8870 is not set
-# CONFIG_DVB_SP887X is not set
-# CONFIG_DVB_CX22700 is not set
-# CONFIG_DVB_CX22702 is not set
-# CONFIG_DVB_L64781 is not set
-# CONFIG_DVB_TDA1004X is not set
-# CONFIG_DVB_NXT6000 is not set
-# CONFIG_DVB_MT352 is not set
-# CONFIG_DVB_ZL10353 is not set
-# CONFIG_DVB_DIB3000MB is not set
-# CONFIG_DVB_DIB3000MC is not set
-
-#
-# DVB-C (cable) frontends
-#
-# CONFIG_DVB_VES1820 is not set
-# CONFIG_DVB_TDA10021 is not set
-# CONFIG_DVB_STV0297 is not set
-
-#
-# ATSC (North American/Korean Terrestrial/Cable DTV) frontends
-#
-# CONFIG_DVB_NXT200X is not set
-# CONFIG_DVB_OR51211 is not set
-# CONFIG_DVB_OR51132 is not set
-# CONFIG_DVB_BCM3510 is not set
-# CONFIG_DVB_LGDT330X is not set
-
-#
-# Miscellaneous devices
-#
-# CONFIG_DVB_LNBP21 is not set
-# CONFIG_DVB_ISL6421 is not set
+# CONFIG_DVB is not set
 # CONFIG_USB_DABUSB is not set
 
 #

diff --git a/recipes/linux/linux-opendreambox-2.6.18.inc b/recipes/linux/linux-opendreambox-2.6.18.inc
index c4d2bfc..deb6474 100644 (file)
--- a/recipes/linux/linux-opendreambox-2.6.18.inc
+++ b/recipes/linux/linux-opendreambox-2.6.18.inc
@@ -1,7 +1,7 @@
 require linux-opendreambox.inc
 
-SRCREV = "97b869e710d741d3eda4f7c915d6190b4054d290"
-PR_INC="r5"
+SRCREV = "05d2029d517f6a1e9e8d1dcacbbe0d41095bdbfb"
+PR_INC = "r6"
 
 RREPLACES_kernel = "kernel-2.6.18-7.1-${MACHINE}"
 RCONFLICTS_kernel = "kernel-2.6.18-7.1-${MACHINE}"
@@ -12,7 +12,10 @@ SRC_URI += " http://trappist.elis.ugent.be/~mronsse/cdfs/download/cdfs-2.6.18.ta
        file://stblinux-2.6.18-cdfs.patch \
        file://linux-2.6.18-fix-mips-crosscompile.patch;patch=1 \
        file://linux-2.6.18-fix-proc-cputype.patch;patch=1 \
-       file://linux-2.6.18-hdd-detection-fix.patch;patch=1"
+       file://dvb-api-2.6.18-5.3.patch;patch=1 \
+       file://linux-2.6.18-dvb-core-headers-20100904.patch;patch=1 \
+       file://linux-2.6.18-dvb-frontends-headers-20100904.patch;patch=1 \
+"
 
 do_configure_prepend() {
        if [ -d ${WORKDIR}/cdfs-${PV} ]; then

diff --git a/recipes/tasks/task-boot.bb b/recipes/tasks/task-boot.bb
index 0adb544..47904d5 100644 (file)
--- a/recipes/tasks/task-boot.bb
+++ b/recipes/tasks/task-boot.bb
@@ -1,5 +1,5 @@
 DESCRIPTION = "Basic task to get a device booting"
-PR = "r55"
+PR = "r56"
 
 inherit task
 

diff --git a/recipes/v4l-dvb/files/basic-dvb-t2-support.patch b/recipes/v4l-dvb/files/basic-dvb-t2-support.patch
new file mode 100644 (file)
index 0000000..ffeb101
--- /dev/null
+++ b/recipes/v4l-dvb/files/basic-dvb-t2-support.patch
@@ -0,0 +1,92 @@
+# HG changeset patch
+# User Andreas Oberritter <obi@linuxtv.org>
+# Date 1284052513 0
+# Node ID 558dc662028e9ae5debcfb708da07ab67be8b3d8
+# Parent  03dc113ca9af927f8a406b02d1b356258ecdcdee
+DVB: Add basic support for DVB-T2
+
+diff --git a/linux/drivers/media/dvb/dvb-core/dvb_frontend.c b/linux/drivers/media/dvb/dvb-core/dvb_frontend.c
+--- a/linux/drivers/media/dvb/dvb-core/dvb_frontend.c
++++ b/linux/drivers/media/dvb/dvb-core/dvb_frontend.c
+@@ -1161,10 +1161,9 @@
+               break;
+       }
+ 
+-      if(c->delivery_system == SYS_ISDBT) {
+-              /* Fake out a generic DVB-T request so we pass validation in the ioctl */
+-              p->frequency = c->frequency;
+-              p->inversion = c->inversion;
++      /* Fake out a generic DVB-T request so we pass validation in the ioctl */
++      if ((c->delivery_system == SYS_ISDBT) ||
++          (c->delivery_system == SYS_DVBT2)) {
+               p->u.ofdm.constellation = QAM_AUTO;
+               p->u.ofdm.code_rate_HP = FEC_AUTO;
+               p->u.ofdm.code_rate_LP = FEC_AUTO;
+diff --git a/linux/include/linux/dvb/frontend.h b/linux/include/linux/dvb/frontend.h
+--- a/linux/include/linux/dvb/frontend.h
++++ b/linux/include/linux/dvb/frontend.h
+@@ -175,14 +175,20 @@
+       TRANSMISSION_MODE_2K,
+       TRANSMISSION_MODE_8K,
+       TRANSMISSION_MODE_AUTO,
+-      TRANSMISSION_MODE_4K
++      TRANSMISSION_MODE_4K,
++      TRANSMISSION_MODE_1K,
++      TRANSMISSION_MODE_16K,
++      TRANSMISSION_MODE_32K,
+ } fe_transmit_mode_t;
+ 
+ typedef enum fe_bandwidth {
+       BANDWIDTH_8_MHZ,
+       BANDWIDTH_7_MHZ,
+       BANDWIDTH_6_MHZ,
+-      BANDWIDTH_AUTO
++      BANDWIDTH_AUTO,
++      BANDWIDTH_5_MHZ,
++      BANDWIDTH_10_MHZ,
++      BANDWIDTH_1_712_MHZ,
+ } fe_bandwidth_t;
+ 
+ 
+@@ -191,7 +197,10 @@
+       GUARD_INTERVAL_1_16,
+       GUARD_INTERVAL_1_8,
+       GUARD_INTERVAL_1_4,
+-      GUARD_INTERVAL_AUTO
++      GUARD_INTERVAL_AUTO,
++      GUARD_INTERVAL_1_128,
++      GUARD_INTERVAL_19_128,
++      GUARD_INTERVAL_19_256,
+ } fe_guard_interval_t;
+ 
+ 
+@@ -305,7 +314,9 @@
+ 
+ #define DTV_ISDBS_TS_ID               42
+ 
+-#define DTV_MAX_COMMAND                               DTV_ISDBS_TS_ID
++#define DTV_DVBT2_PLP_ID      43
++
++#define DTV_MAX_COMMAND                               DTV_DVBT2_PLP_ID
+ 
+ typedef enum fe_pilot {
+       PILOT_ON,
+@@ -337,6 +348,7 @@
+       SYS_DMBTH,
+       SYS_CMMB,
+       SYS_DAB,
++      SYS_DVBT2,
+ } fe_delivery_system_t;
+ 
+ struct dtv_cmds_h {
+diff --git a/linux/include/linux/dvb/version.h b/linux/include/linux/dvb/version.h
+--- a/linux/include/linux/dvb/version.h
++++ b/linux/include/linux/dvb/version.h
+@@ -24,6 +24,6 @@
+ #define _DVBVERSION_H_
+ 
+ #define DVB_API_VERSION 5
+-#define DVB_API_VERSION_MINOR 2
++#define DVB_API_VERSION_MINOR 3
+ 
+ #endif /*_DVBVERSION_H_*/

diff --git a/recipes/v4l-dvb/files/build-fix.patch b/recipes/v4l-dvb/files/build-fix.patch
new file mode 100644 (file)
index 0000000..b451f73
--- /dev/null
+++ b/recipes/v4l-dvb/files/build-fix.patch
@@ -0,0 +1,11 @@
+--- v4l-dvb-org/linux/drivers/media/dvb/frontends/bcm3510_priv.h       2010-09-27 23:05:47.014695899 +0200
++++ v4l-dvb/linux/drivers/media/dvb/frontends/bcm3510_priv.h   2010-09-27 23:03:43.666610967 +0200
+@@ -311,7 +311,7 @@
+ #define MSGID_TRI_STATE 0x2e
+ struct bcm3510_hab_cmd_tri_state {
+       u8 RE :1; /* a/d ram port pins */
+-      u8 PE :1; /* baud clock pin */
++      u8 XE :1; /* baud clock pin */
+       u8 AC :1; /* a/d clock pin */
+       u8 BE :1; /* baud clock pin */
+       u8 unused :4;

diff --git a/recipes/v4l-dvb/files/defconfig b/recipes/v4l-dvb/files/defconfig
new file mode 100644 (file)
index 0000000..6f7e510
--- /dev/null
+++ b/recipes/v4l-dvb/files/defconfig
@@ -0,0 +1,320 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 
+# Thu Sep  9 12:06:47 2010
+#
+# CONFIG_SND_MIRO is not set
+CONFIG_INPUT=y
+CONFIG_USB=y
+# CONFIG_ARCH_DAVINCI_DM365 is not set
+CONFIG_FW_LOADER=y
+# CONFIG_SPARC64 is not set
+# CONFIG_PLAT_M32700UT is not set
+# CONFIG_SND_FM801 is not set
+CONFIG_FB_CFB_IMAGEBLIT=m
+# CONFIG_GPIO_PCA953X is not set
+# CONFIG_HAVE_CLK is not set
+# CONFIG_FIQ is not set
+# CONFIG_OMAP2_DSS is not set
+CONFIG_SND=m
+# CONFIG_MT9M001_PCA9536_SWITCH is not set
+# CONFIG_ARCH_OMAP2 is not set
+# CONFIG_FONT_8x16 is not set
+# CONFIG_SPARC32 is not set
+# CONFIG_I2C_ALGOBIT is not set
+# CONFIG_SND_ISA is not set
+CONFIG_INET=y
+CONFIG_CRC32=m
+CONFIG_SYSFS=y
+# CONFIG_MMC is not set
+# CONFIG_ISA is not set
+CONFIG_PCI=y
+# CONFIG_OMAP2_VRFB is not set
+# CONFIG_OMAP2_VRAM is not set
+# CONFIG_PARPORT_1284 is not set
+CONFIG_FB_CFB_FILLRECT=m
+# CONFIG_MT9V022_PCA9536_SWITCH is not set
+CONFIG_VIRT_TO_BUS=y
+# CONFIG_PARPORT is not set
+# CONFIG_ARCH_DAVINCI_DM644x is not set
+# CONFIG_FIREWIRE is not set
+# CONFIG_FRAMEBUFFER_CONSOLE is not set
+CONFIG_NET=y
+# CONFIG_ARCH_DAVINCI is not set
+CONFIG_FB_CFB_COPYAREA=m
+# CONFIG_PXA27x is not set
+# CONFIG_SGI_IP22 is not set
+# CONFIG_ARCH_OMAP34XX is not set
+CONFIG_I2C=y
+# CONFIG_ARCH_DAVINCI_DM355 is not set
+CONFIG_MODULES=y
+CONFIG_HAS_IOMEM=y
+# CONFIG_MACH_DAVINCI_DM6467_EVM is not set
+# CONFIG_MFD_TIMBERDALE is not set
+# CONFIG_ARCH_OMAP24XX is not set
+CONFIG_HAS_DMA=y
+CONFIG_FB=m
+# CONFIG_STI_CONSOLE is not set
+# CONFIG_ARCH_MX1 is not set
+# CONFIG_SONY_LAPTOP is not set
+CONFIG_USB_ARCH_HAS_HCD=y
+# CONFIG_MX3_IPU is not set
+CONFIG_SND_PCM=m
+# CONFIG_FONTS is not set
+# CONFIG_ARCH_SHMOBILE is not set
+CONFIG_EXPERIMENTAL=y
+# CONFIG_M32R is not set
+# CONFIG_IEEE1394 is not set
+# CONFIG_BITREVERSE is not set
+# CONFIG_VIDEO_KERNEL_VERSION is not set
+CONFIG_MEDIA_SUPPORT=m
+
+#
+# Multimedia core support
+#
+CONFIG_VIDEO_DEV=m
+CONFIG_VIDEO_V4L2_COMMON=m
+CONFIG_VIDEO_ALLOW_V4L1=y
+CONFIG_VIDEO_V4L1_COMPAT=y
+CONFIG_DVB_CORE=m
+CONFIG_VIDEO_MEDIA=m
+
+#
+# Multimedia drivers
+#
+# CONFIG_IR_CORE is not set
+CONFIG_MEDIA_ATTACH=y
+CONFIG_MEDIA_TUNER=m
+# CONFIG_MEDIA_TUNER_CUSTOMISE is not set
+CONFIG_MEDIA_TUNER_SIMPLE=m
+CONFIG_MEDIA_TUNER_TDA8290=m
+CONFIG_MEDIA_TUNER_TDA827X=m
+CONFIG_MEDIA_TUNER_TDA18271=m
+CONFIG_MEDIA_TUNER_TDA9887=m
+CONFIG_MEDIA_TUNER_TEA5761=m
+CONFIG_MEDIA_TUNER_TEA5767=m
+CONFIG_MEDIA_TUNER_MT20XX=m
+CONFIG_MEDIA_TUNER_MT2060=m
+CONFIG_MEDIA_TUNER_MT2266=m
+CONFIG_MEDIA_TUNER_QT1010=m
+CONFIG_MEDIA_TUNER_XC2028=m
+CONFIG_MEDIA_TUNER_XC5000=m
+CONFIG_MEDIA_TUNER_MXL5005S=m
+CONFIG_MEDIA_TUNER_MXL5007T=m
+CONFIG_MEDIA_TUNER_MC44S803=m
+CONFIG_MEDIA_TUNER_MAX2165=m
+CONFIG_VIDEO_V4L2=m
+CONFIG_VIDEO_V4L1=m
+CONFIG_VIDEO_CAPTURE_DRIVERS=y
+# CONFIG_VIDEO_ADV_DEBUG is not set
+# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set
+CONFIG_VIDEO_HELPER_CHIPS_AUTO=y
+# CONFIG_VIDEO_BT848 is not set
+CONFIG_VIDEO_CPIA2=m
+CONFIG_VIDEO_SAA5246A=m
+CONFIG_VIDEO_SAA5249=m
+# CONFIG_VIDEO_STRADIS is not set
+# CONFIG_VIDEO_SAA7134 is not set
+# CONFIG_VIDEO_MXB is not set
+# CONFIG_VIDEO_HEXIUM_ORION is not set
+# CONFIG_VIDEO_HEXIUM_GEMINI is not set
+# CONFIG_VIDEO_CX23885 is not set
+# CONFIG_VIDEO_AU0828 is not set
+# CONFIG_VIDEO_IVTV is not set
+# CONFIG_VIDEO_CX18 is not set
+CONFIG_V4L_USB_DRIVERS=y
+CONFIG_USB_VIDEO_CLASS=m
+CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y
+CONFIG_USB_GSPCA=m
+CONFIG_USB_M5602=m
+CONFIG_USB_STV06XX=m
+CONFIG_USB_GL860=m
+CONFIG_USB_GSPCA_BENQ=m
+CONFIG_USB_GSPCA_CONEX=m
+CONFIG_USB_GSPCA_CPIA1=m
+CONFIG_USB_GSPCA_ETOMS=m
+CONFIG_USB_GSPCA_MARS=m
+CONFIG_USB_GSPCA_MR97310A=m
+CONFIG_USB_GSPCA_OV519=m
+CONFIG_USB_GSPCA_OV534=m
+CONFIG_USB_GSPCA_OV534_9=m
+CONFIG_USB_GSPCA_PAC207=m
+CONFIG_USB_GSPCA_PAC7302=m
+CONFIG_USB_GSPCA_PAC7311=m
+CONFIG_USB_GSPCA_SN9C2028=m
+CONFIG_USB_GSPCA_SN9C20X=m
+CONFIG_USB_GSPCA_SONIXB=m
+CONFIG_USB_GSPCA_SONIXJ=m
+CONFIG_USB_GSPCA_SPCA500=m
+CONFIG_USB_GSPCA_SPCA501=m
+CONFIG_USB_GSPCA_SPCA505=m
+CONFIG_USB_GSPCA_SPCA506=m
+CONFIG_USB_GSPCA_SPCA508=m
+CONFIG_USB_GSPCA_SPCA561=m
+CONFIG_USB_GSPCA_SPCA1528=m
+CONFIG_USB_GSPCA_SQ930X=m
+CONFIG_USB_GSPCA_STK014=m
+CONFIG_USB_GSPCA_STV0680=m
+CONFIG_USB_GSPCA_SUNPLUS=m
+CONFIG_USB_GSPCA_T613=m
+CONFIG_USB_GSPCA_TV8532=m
+CONFIG_USB_GSPCA_VC032X=m
+CONFIG_USB_GSPCA_ZC3XX=m
+CONFIG_VIDEO_USBVIDEO=m
+CONFIG_USB_VICAM=m
+CONFIG_USB_IBMCAM=m
+CONFIG_USB_KONICAWC=m
+CONFIG_USB_SE401=m
+CONFIG_USB_ZC0301=m
+# CONFIG_V4L_MEM2MEM_DRIVERS is not set
+# CONFIG_RADIO_ADAPTERS is not set
+CONFIG_DVB_MAX_ADAPTERS=8
+CONFIG_DVB_DYNAMIC_MINORS=y
+CONFIG_DVB_CAPTURE_DRIVERS=y
+
+#
+# Supported SAA7146 based PCI Adapters
+#
+# CONFIG_TTPCI_EEPROM is not set
+# CONFIG_DVB_BUDGET_CORE is not set
+
+#
+# Supported USB Adapters
+#
+CONFIG_DVB_USB=m
+# CONFIG_DVB_USB_DEBUG is not set
+CONFIG_DVB_USB_A800=m
+CONFIG_DVB_USB_DIBUSB_MB=m
+CONFIG_DVB_USB_DIBUSB_MB_FAULTY=y
+CONFIG_DVB_USB_DIBUSB_MC=m
+CONFIG_DVB_USB_DIB0700=m
+CONFIG_DVB_USB_UMT_010=m
+CONFIG_DVB_USB_CXUSB=m
+CONFIG_DVB_USB_M920X=m
+CONFIG_DVB_USB_GL861=m
+CONFIG_DVB_USB_AU6610=m
+CONFIG_DVB_USB_DIGITV=m
+CONFIG_DVB_USB_VP7045=m
+CONFIG_DVB_USB_VP702X=m
+CONFIG_DVB_USB_GP8PSK=m
+CONFIG_DVB_USB_NOVA_T_USB2=m
+CONFIG_DVB_USB_TTUSB2=m
+CONFIG_DVB_USB_DTT200U=m
+CONFIG_DVB_USB_OPERA1=m
+CONFIG_DVB_USB_AF9005=m
+CONFIG_DVB_USB_AF9005_REMOTE=m
+CONFIG_DVB_USB_DW2102=m
+CONFIG_DVB_USB_CINERGY_T2=m
+CONFIG_DVB_USB_ANYSEE=m
+CONFIG_DVB_USB_DTV5100=m
+CONFIG_DVB_USB_AF9015=m
+CONFIG_DVB_USB_CE6230=m
+CONFIG_DVB_USB_FRIIO=m
+CONFIG_DVB_USB_EC168=m
+CONFIG_DVB_USB_AZ6027=m
+CONFIG_DVB_TTUSB_BUDGET=m
+CONFIG_DVB_TTUSB_DEC=m
+CONFIG_SMS_SIANO_MDTV=m
+
+#
+# Siano module components
+#
+CONFIG_SMS_USB_DRV=m
+
+#
+# Supported FlexCopII (B2C2) Adapters
+#
+CONFIG_DVB_B2C2_FLEXCOP=m
+# CONFIG_DVB_B2C2_FLEXCOP_PCI is not set
+CONFIG_DVB_B2C2_FLEXCOP_USB=m
+# CONFIG_DVB_B2C2_FLEXCOP_DEBUG is not set
+
+#
+# Supported BT878 Adapters
+#
+
+#
+# Supported Pluto2 Adapters
+#
+# CONFIG_DVB_PLUTO2 is not set
+
+#
+# Supported SDMC DM1105 Adapters
+#
+
+#
+# Supported Earthsoft PT1 Adapters
+#
+
+#
+# Supported Mantis Adapters
+#
+
+#
+# Supported nGene Adapters
+#
+# CONFIG_DVB_NGENE is not set
+
+#
+# Supported DVB Frontends
+#
+# CONFIG_DVB_FE_CUSTOMISE is not set
+CONFIG_DVB_STB0899=m
+CONFIG_DVB_STB6100=m
+CONFIG_DVB_CX24123=m
+CONFIG_DVB_MT312=m
+CONFIG_DVB_ZL10039=m
+CONFIG_DVB_S5H1420=m
+CONFIG_DVB_STV0288=m
+CONFIG_DVB_STB6000=m
+CONFIG_DVB_STV0299=m
+CONFIG_DVB_STV6110=m
+CONFIG_DVB_STV0900=m
+CONFIG_DVB_TDA8083=m
+CONFIG_DVB_TDA10086=m
+CONFIG_DVB_TUNER_ITD1000=m
+CONFIG_DVB_TUNER_CX24113=m
+CONFIG_DVB_TDA826X=m
+CONFIG_DVB_CX24116=m
+CONFIG_DVB_SI21XX=m
+CONFIG_DVB_DS3000=m
+CONFIG_DVB_CX22700=m
+CONFIG_DVB_CX22702=m
+CONFIG_DVB_TDA1004X=m
+CONFIG_DVB_NXT6000=m
+CONFIG_DVB_MT352=m
+CONFIG_DVB_ZL10353=m
+CONFIG_DVB_DIB3000MB=m
+CONFIG_DVB_DIB3000MC=m
+CONFIG_DVB_DIB7000M=m
+CONFIG_DVB_DIB7000P=m
+CONFIG_DVB_AF9013=m
+CONFIG_DVB_EC100=m
+CONFIG_DVB_VES1820=m
+CONFIG_DVB_TDA10023=m
+CONFIG_DVB_STV0297=m
+CONFIG_DVB_NXT200X=m
+CONFIG_DVB_BCM3510=m
+CONFIG_DVB_LGDT330X=m
+CONFIG_DVB_LGDT3305=m
+CONFIG_DVB_S5H1411=m
+CONFIG_DVB_DIB8000=m
+CONFIG_DVB_PLL=m
+CONFIG_DVB_TUNER_DIB0070=m
+CONFIG_DVB_TUNER_DIB0090=m
+CONFIG_DVB_LNBP21=m
+CONFIG_DVB_ISL6421=m
+CONFIG_DVB_LGS8GXX=m
+CONFIG_DVB_ATBM8830=m
+CONFIG_DAB=y
+CONFIG_USB_DABUSB=m
+
+#
+# Audio devices for multimedia
+#
+
+#
+# ALSA sound
+#
+# CONFIG_SND_BT87X is not set
+# CONFIG_STAGING is not set

diff --git a/recipes/v4l-dvb/files/fix-blocking-demux.patch b/recipes/v4l-dvb/files/fix-blocking-demux.patch
new file mode 100644 (file)
index 0000000..a1c577f
--- /dev/null
+++ b/recipes/v4l-dvb/files/fix-blocking-demux.patch
@@ -0,0 +1,131 @@
+# HG changeset patch
+# User Andreas Oberritter <obi@linuxtv.org>
+# Date 1284052381 0
+# Node ID 03dc113ca9af927f8a406b02d1b356258ecdcdee
+# Parent  604fc5b3136ea3bc92c47a1c04007a4c6ecce97c
+DVB/V4L: interrupt blocking demux read on demux ioctl
+
+diff --git a/linux/drivers/media/dvb/dvb-core/dmxdev.c b/linux/drivers/media/dvb/dvb-core/dmxdev.c
+--- a/linux/drivers/media/dvb/dvb-core/dmxdev.c
++++ b/linux/drivers/media/dvb/dvb-core/dmxdev.c
+@@ -83,7 +83,11 @@
+ 
+               ret = wait_event_interruptible(src->queue,
+                                              !dvb_ringbuffer_empty(src) ||
+-                                             (src->error != 0));
++                                             (src->error != 0) ||
++                                             (src->do_wait != 1));
++              if (src->do_wait != 1)
++                      ret = -EINTR;
++
+               if (ret < 0)
+                       break;
+ 
+@@ -963,6 +967,22 @@
+       return ret;
+ }
+ 
++static int dvb_demux_lock_filter(struct dmxdev_filter *dmxdevfilter)
++{
++      int ret;
++
++      dmxdevfilter->buffer.do_wait = 0;
++
++      if (waitqueue_active(&dmxdevfilter->buffer.queue))
++              wake_up(&dmxdevfilter->buffer.queue);
++
++      ret = mutex_lock_interruptible(&dmxdevfilter->mutex);
++
++      dmxdevfilter->buffer.do_wait = 1;
++
++      return ret;
++}
++
+ static int dvb_demux_do_ioctl(struct inode *inode, struct file *file,
+                             unsigned int cmd, void *parg)
+ {
+@@ -976,7 +996,7 @@
+ 
+       switch (cmd) {
+       case DMX_START:
+-              if (mutex_lock_interruptible(&dmxdevfilter->mutex)) {
++              if (dvb_demux_lock_filter(dmxdevfilter)) {
+                       mutex_unlock(&dmxdev->mutex);
+                       return -ERESTARTSYS;
+               }
+@@ -988,7 +1008,7 @@
+               break;
+ 
+       case DMX_STOP:
+-              if (mutex_lock_interruptible(&dmxdevfilter->mutex)) {
++              if (dvb_demux_lock_filter(dmxdevfilter)) {
+                       mutex_unlock(&dmxdev->mutex);
+                       return -ERESTARTSYS;
+               }
+@@ -997,7 +1017,7 @@
+               break;
+ 
+       case DMX_SET_FILTER:
+-              if (mutex_lock_interruptible(&dmxdevfilter->mutex)) {
++              if (dvb_demux_lock_filter(dmxdevfilter)) {
+                       mutex_unlock(&dmxdev->mutex);
+                       return -ERESTARTSYS;
+               }
+@@ -1006,7 +1026,7 @@
+               break;
+ 
+       case DMX_SET_PES_FILTER:
+-              if (mutex_lock_interruptible(&dmxdevfilter->mutex)) {
++              if (dvb_demux_lock_filter(dmxdevfilter)) {
+                       mutex_unlock(&dmxdev->mutex);
+                       return -ERESTARTSYS;
+               }
+@@ -1015,7 +1035,7 @@
+               break;
+ 
+       case DMX_SET_BUFFER_SIZE:
+-              if (mutex_lock_interruptible(&dmxdevfilter->mutex)) {
++              if (dvb_demux_lock_filter(dmxdevfilter)) {
+                       mutex_unlock(&dmxdev->mutex);
+                       return -ERESTARTSYS;
+               }
+@@ -1059,7 +1079,7 @@
+               break;
+ 
+       case DMX_ADD_PID:
+-              if (mutex_lock_interruptible(&dmxdevfilter->mutex)) {
++              if (dvb_demux_lock_filter(dmxdevfilter)) {
+                       ret = -ERESTARTSYS;
+                       break;
+               }
+@@ -1068,7 +1088,7 @@
+               break;
+ 
+       case DMX_REMOVE_PID:
+-              if (mutex_lock_interruptible(&dmxdevfilter->mutex)) {
++              if (dvb_demux_lock_filter(dmxdevfilter)) {
+                       ret = -ERESTARTSYS;
+                       break;
+               }
+diff --git a/linux/drivers/media/dvb/dvb-core/dvb_ringbuffer.c b/linux/drivers/media/dvb/dvb-core/dvb_ringbuffer.c
+--- a/linux/drivers/media/dvb/dvb-core/dvb_ringbuffer.c
++++ b/linux/drivers/media/dvb/dvb-core/dvb_ringbuffer.c
+@@ -45,6 +45,7 @@
+       rbuf->data=data;
+       rbuf->size=len;
+       rbuf->error=0;
++      rbuf->do_wait=1;
+ 
+       init_waitqueue_head(&rbuf->queue);
+ 
+diff --git a/linux/drivers/media/dvb/dvb-core/dvb_ringbuffer.h b/linux/drivers/media/dvb/dvb-core/dvb_ringbuffer.h
+--- a/linux/drivers/media/dvb/dvb-core/dvb_ringbuffer.h
++++ b/linux/drivers/media/dvb/dvb-core/dvb_ringbuffer.h
+@@ -38,6 +38,7 @@
+       int               error;
+ 
+       wait_queue_head_t queue;
++      int               do_wait;
+       spinlock_t        lock;
+ };
+ 

diff --git a/recipes/v4l-dvb/files/localversion.patch b/recipes/v4l-dvb/files/localversion.patch
new file mode 100644 (file)
index 0000000..23a0bb8
--- /dev/null
+++ b/recipes/v4l-dvb/files/localversion.patch
@@ -0,0 +1,115 @@
+# HG changeset patch
+# User Andreas Oberritter <obi@linuxtv.org>
+# Date 1284119639 0
+# Node ID 008dba7f69aa8461f3210919fdc2396941241013
+# Parent  558dc662028e9ae5debcfb708da07ab67be8b3d8
+Support CONFIG_LOCALVERSION by parsing UTS_RELEASE
+
+diff --git a/v4l/Makefile b/v4l/Makefile
+--- a/v4l/Makefile
++++ b/v4l/Makefile
+@@ -236,22 +236,8 @@
+ $(obj)/.version:
+ ifneq ($(DIR),)
+       @echo "Searching in $(DIR)/Makefile for kernel version."
+-      @perl \
+-      -e '$$d="$(DIR)"; ' \
+-      -e 'S: open IN,"$$d/Makefile"; ' \
+-      -e 'while (<IN>) {' \
+-      -e '    if (/^VERSION\s*=\s*(\d+)/){ $$version=$$1; }' \
+-      -e '    elsif (/^PATCHLEVEL\s*=\s*(\d+)/){ $$level=$$1; }' \
+-      -e '    elsif (/^SUBLEVEL\s*=\s*(\d+)/){ $$sublevel=$$1; }' \
+-      -e '    elsif (/^EXTRAVERSION\s*=\s*(\S+)\n/){ $$extra=$$1; }' \
+-      -e '    elsif (/^KERNELSRC\s*:=\s*(\S.*)\n/ || /^MAKEARGS\s*:=\s*-C\s*(\S.*)\n/)' \
+-      -e '        { $$o=$$d; $$d=$$1; goto S; }' \
+-      -e '};' \
+-      -e 'printf ("VERSION=%s\nPATCHLEVEL:=%s\nSUBLEVEL:=%s\nKERNELRELEASE:=%s.%s.%s%s\n",' \
+-      -e '    $$version,$$level,$$sublevel,$$version,$$level,$$sublevel,$$extra);' \
+-      -e 'print "OUTDIR:=$$o\n" if($$o);' \
+-      -e 'print "SRCDIR:=$$d\n";' > $(obj)/.version
+-      @cat .version|grep KERNELRELEASE:|sed s,'KERNELRELEASE:=','Forcing compiling to version ',
++      @perl scripts/generate-dot-version.pl "$(DIR)" > $(obj)/.version
++      @grep KERNELRELEASE: $(obj)/.version | sed s,'KERNELRELEASE:=','Forcing compiling to version ',
+ 
+       @if [ ! -f $(DIR)/scripts/kallsyms ]; then \
+               echo "*** Warning: You should configure and build kernel before compiling V4L"; \
+diff --git a/v4l/scripts/generate-dot-version.pl b/v4l/scripts/generate-dot-version.pl
+new file mode 100755
+--- /dev/null
++++ b/v4l/scripts/generate-dot-version.pl
+@@ -0,0 +1,75 @@
++#!/usr/bin/perl -w
++
++use strict;
++
++my @headers = (
++      "generated/utsrelease.h",
++      "linux/utsrelease.h",
++      "linux/version.h",
++);
++
++if (@ARGV < 1) {
++      print "Usage: generate-dot-version <srcdir>\n";
++      exit 1;
++}
++
++my $srcdir = $ARGV[0];
++
++if (! -d $srcdir) {
++      print "Not a directory: $srcdir\n";
++      exit 1;
++}
++
++sub print_uts_release($)
++{
++      my $path = shift;
++
++      open IN, "<$path" or die $!;
++
++      while (<IN>) {
++              if (m/#define\s+UTS_RELEASE\s+"(\d+)\.(\d+)\.(\d+)(.*)"/) {
++                      print "VERSION:=$1\n";
++                      print "PATCHLEVEL:=$2\n";
++                      print "SUBLEVEL:=$3\n";
++                      print "KERNELRELEASE:=$1.$2.$3$4\n";
++                      last;
++              }
++      }
++
++      close IN;
++}
++
++sub print_directories($)
++{
++      my $srcdir = shift;
++      my $outdir = undef;
++
++      open IN, "<$srcdir/Makefile" or die $!;
++
++      while (<IN>) {
++              if (m/^KERNELSRC\s*:=\s*(\S.*)\n/ || m/^MAKEARGS\s*:=\s*-C\s*(\S.*)\n/) {
++                      $outdir = $srcdir;
++                      $srcdir = $1;
++                      last;
++              }
++      }
++
++      close IN;
++
++      if (defined $outdir) {
++              print "OUTDIR:=$outdir\n";
++      }
++
++      print "SRCDIR:=$srcdir\n";
++}
++
++for (@headers) {
++      my $path = "$srcdir/include/$_";
++      if (-f $path) {
++              print_uts_release($path);
++              last;
++      }
++}
++
++print_directories($srcdir);
++

diff --git a/recipes/v4l-dvb/files/v4l-2.6.18-compat.patch b/recipes/v4l-dvb/files/v4l-2.6.18-compat.patch
new file mode 100644 (file)
index 0000000..e962b33
--- /dev/null
+++ b/recipes/v4l-dvb/files/v4l-2.6.18-compat.patch
@@ -0,0 +1,39 @@
+diff -Naur v4l-dvb-org/linux/drivers/media/dvb/dvb-core/dvbdev.c v4l-dvb/linux/drivers/media/dvb/dvb-core/dvbdev.c
+--- v4l-dvb-org/linux/drivers/media/dvb/dvb-core/dvbdev.c      2010-09-23 11:13:16.717123999 +0200
++++ v4l-dvb/linux/drivers/media/dvb/dvb-core/dvbdev.c  2010-09-23 11:14:07.832369385 +0200
+@@ -201,7 +201,7 @@
+ {
+       struct dvb_device *dvbdev;
+       struct file_operations *dvbdevfops;
+-#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,18)
++#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,18)
+       struct device *clsdev;
+ #else
+       struct class_device *clsdev;
+@@ -276,10 +276,13 @@
+       clsdev = device_create_drvdata(dvb_class, adap->device,
+                              MKDEV(DVB_MAJOR, minor),
+                              dvbdev, "dvb%d.%s%d", adap->num, dnames[type], id);
+-#else
++#elif LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 18)
+       clsdev = device_create(dvb_class, adap->device,
+                              MKDEV(DVB_MAJOR, minor),
+                              "dvb%d.%s%d", adap->num, dnames[type], id);
++#else
++      clsdev = class_device_create(dvb_class, NULL, MKDEV(DVB_MAJOR, minor),
++                          adap->device, "dvb%d.%s%d", adap->num, dnames[type], id);
+ #endif
+       if (IS_ERR(clsdev)) {
+               printk(KERN_ERR "%s: failed to create device dvb%d.%s%d (%ld)\n",
+@@ -304,7 +307,11 @@
+       dvb_minors[dvbdev->minor] = NULL;
+       up_write(&minor_rwsem);
+ 
++#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,18)
+       device_destroy(dvb_class, MKDEV(DVB_MAJOR, dvbdev->minor));
++#else
++      class_device_destroy(dvb_class, MKDEV(DVB_MAJOR, dvbdev->minor));
++#endif
+ 
+       list_del (&dvbdev->list_head);
+       kfree (dvbdev->fops);

diff --git a/recipes/v4l-dvb/files/v4l-dvb-compat.patch b/recipes/v4l-dvb/files/v4l-dvb-compat.patch
new file mode 100644 (file)
index 0000000..344f11b
--- /dev/null
+++ b/recipes/v4l-dvb/files/v4l-dvb-compat.patch
@@ -0,0 +1,158 @@
+# HG changeset patch
+# User Andreas Oberritter <obi@linuxtv.org>
+# Date 1284051179 0
+# Node ID 604fc5b3136ea3bc92c47a1c04007a4c6ecce97c
+# Parent  6e0befab696af3ee5c8e563d699dd11559aef508
+(cross-)compile fixes for 2.6.18
+
+diff -r 6e0befab696a -r 604fc5b3136e linux/drivers/media/IR/Kconfig
+--- a/linux/drivers/media/IR/Kconfig   Fri Sep 03 00:28:05 2010 -0300
++++ b/linux/drivers/media/IR/Kconfig   Thu Sep 09 16:52:59 2010 +0000
+@@ -1,5 +1,5 @@
+ config IR_CORE
+-      tristate
++      tristate "Enable IR core"
+       depends on INPUT
+       default INPUT
+ 
+diff -r 6e0befab696a -r 604fc5b3136e linux/drivers/media/video/em28xx/Kconfig
+--- a/linux/drivers/media/video/em28xx/Kconfig Fri Sep 03 00:28:05 2010 -0300
++++ b/linux/drivers/media/video/em28xx/Kconfig Thu Sep 09 16:52:59 2010 +0000
+@@ -1,6 +1,6 @@
+ config VIDEO_EM28XX
+       tristate "Empia EM28xx USB video capture support"
+-      depends on VIDEO_DEV && I2C && INPUT
++      depends on VIDEO_DEV && I2C && INPUT && IR_CORE
+       select VIDEO_TUNER
+       select VIDEO_TVEEPROM
+       select VIDEO_IR
+diff -r 6e0befab696a -r 604fc5b3136e linux/drivers/media/video/v4l2-event.c
+--- a/linux/drivers/media/video/v4l2-event.c   Fri Sep 03 00:28:05 2010 -0300
++++ b/linux/drivers/media/video/v4l2-event.c   Thu Sep 09 16:52:59 2010 +0000
+@@ -28,6 +28,7 @@
+ 
+ #include <linux/sched.h>
+ #include <linux/slab.h>
++#include "compat.h"
+ 
+ int v4l2_event_init(struct v4l2_fh *fh)
+ {
+diff -r 6e0befab696a -r 604fc5b3136e v4l/Makefile
+--- a/v4l/Makefile     Fri Sep 03 00:28:05 2010 -0300
++++ b/v4l/Makefile     Thu Sep 09 16:52:59 2010 +0000
+@@ -42,13 +42,13 @@
+ default:: config-compat.h Makefile.media links oss firmware
+       @echo Kernel build directory is $(OUTDIR)
+       $(MAKE) -C $(OUTDIR) SUBDIRS=$(PWD) $(MYCFLAGS) modules
+-      ./scripts/rmmod.pl check
++      if [ -z "$(DIR)" ]; then ./scripts/rmmod.pl check; fi
+ #     $(MAKE) checkpatch
+ 
+ mismatch:: config-compat.h Makefile.media links oss firmware
+       @echo Kernel build directory is $(OUTDIR)
+       $(MAKE) -Wfatal-errors -C $(OUTDIR) SUBDIRS=$(PWD) $(MYCFLAGS) CONFIG_DEBUG_SECTION_MISMATCH=y modules
+-      ./scripts/rmmod.pl check
++      if [ -z "$(DIR)" ]; then ./scripts/rmmod.pl check; fi
+ 
+ firmware::
+       $(MAKE) -C firmware prep
+diff -r 6e0befab696a -r 604fc5b3136e v4l/compat.h
+--- a/v4l/compat.h     Fri Sep 03 00:28:05 2010 -0300
++++ b/v4l/compat.h     Thu Sep 09 16:52:59 2010 +0000
+@@ -33,6 +33,10 @@
+ #include <linux/i2c-dev.h>
+ #endif
+ 
++#ifndef kmalloc_track_caller
++#define kmalloc_track_caller(size, flags) ____kmalloc(size, flags)
++#endif
++
+ #if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 30)
+ #include <linux/mm.h>
+ #include <asm/uaccess.h>
+@@ -55,6 +59,18 @@
+               return ERR_PTR(-EFAULT);
+       }
+ 
++      return p;
++}
++#endif
++
++#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 19)
++static inline void *kmemdup(const void *src, size_t len, gfp_t gfp)
++{
++      void *p;
++
++      p = kmalloc_track_caller(len, gfp);
++      if (p)
++              memcpy(p, src, len);
+       return p;
+ }
+ #endif
+@@ -368,7 +384,8 @@
+ #define hweight64(x)  generic_hweight64(x)
+ #endif
+ 
+-#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 24)
++#ifdef NEED_UINTPTR_T_TYPE
++/* uintptr_t type was added in 2.6.24 */
+ typedef unsigned long uintptr_t;
+ #endif
+ 
+diff -r 6e0befab696a -r 604fc5b3136e v4l/scripts/make_config_compat.pl
+--- a/v4l/scripts/make_config_compat.pl        Fri Sep 03 00:28:05 2010 -0300
++++ b/v4l/scripts/make_config_compat.pl        Thu Sep 09 16:52:59 2010 +0000
+@@ -98,6 +98,25 @@
+ 
+       if ($old_syntax) {
+               $out.= "\n#define NEED_BOOL_TYPE 1\n";
++      }
++      close INDEP;
++}
++
++sub check_uintptr_t()
++{
++      my $file = "$kdir/include/linux/types.h";
++      my $need_type = 1;
++
++      open INDEP, "<$file" or die "File not found: $file";
++      while (<INDEP>) {
++              if (m/^\s*typedef.*uintptr_t;/) {
++                      $need_type = 0;
++                      last;
++              }
++      }
++
++      if ($need_type) {
++              $out.= "\n#define NEED_UINTPTR_T_TYPE 1\n";
+       }
+       close INDEP;
+ }
+@@ -365,6 +384,7 @@
+       check_snd_ctl_boolean_mono_info();
+       check_snd_pcm_rate_to_rate_bit();
+       check_bool();
++      check_uintptr_t();
+       check_is_singular();
+       check_clamp();
+       check_proc_create();
+diff -r 6e0befab696a -r 604fc5b3136e v4l/scripts/make_makefile.pl
+--- a/v4l/scripts/make_makefile.pl     Fri Sep 03 00:28:05 2010 -0300
++++ b/v4l/scripts/make_makefile.pl     Thu Sep 09 16:52:59 2010 +0000
+@@ -204,6 +204,7 @@
+ find({wanted => \&parse_dir, no_chdir => 1}, '../linux/drivers/staging');
+ 
+ # Creating Install rule
++print OUT "DEPMOD ?= \"/sbin/depmod\"\n";
+ print OUT "media-install::\n";
+ 
+ removeobsolete();
+@@ -226,7 +227,7 @@
+       print OUT "fi;\n\n";
+ }
+ print OUT "\t@echo\n";
+-print OUT "\t/sbin/depmod -a \$(KERNELRELEASE) \$(if \$(DESTDIR),-b \$(DESTDIR))\n\n";
++print OUT "\t\$(DEPMOD) -a \$(KERNELRELEASE) \$(if \$(DESTDIR),-b \$(DESTDIR))\n\n";
+ 
+ # Creating Remove rule
+ print OUT "media-rminstall::\n";

diff --git a/recipes/v4l-dvb/v4l-dvb-modules.inc b/recipes/v4l-dvb/v4l-dvb-modules.inc
new file mode 100644 (file)
index 0000000..06914fe
--- /dev/null
+++ b/recipes/v4l-dvb/v4l-dvb-modules.inc
@@ -0,0 +1,225 @@
+DESCRIPTION = "v4l-dvb drivers"
+HOMEPAGE = "http://linuxtv.org/"
+SECTION = "kernel/modules"
+LICENSE = "GPL"
+
+inherit module
+
+PACKAGES_DYNAMIC += "v4l-dvb-module-*"
+PACKAGES_DYNAMIC += "v4l-dvb-firmware-*"
+
+do_configure() {
+       install -m 0644 ${WORKDIR}/defconfig ${S}/v4l/.config
+}
+
+do_compile() {
+       unset CFLAGS CPPFLAGS CXXFLAGS LDFLAGS
+       oe_runmake DIR="${STAGING_KERNEL_DIR}" ${MAKE_TARGETS}
+}
+
+do_install() {
+       unset CFLAGS CPPFLAGS CXXFLAGS LDFLAGS
+       oe_runmake DIR="${STAGING_KERNEL_DIR}" DEPMOD=echo DESTDIR="${D}" install
+}
+
+PACKAGES = "v4l-dvb-modules"
+FILES_${PN} = ""
+ALLOW_EMPTY_${PN} = "1"
+
+pkg_postinst_modules () {
+if [ -n "$D" ]; then
+       ${HOST_PREFIX}depmod-${KERNEL_MAJOR_VERSION} -A -b $D -F ${STAGING_KERNEL_DIR}/System.map-${KERNEL_VERSION} ${KERNEL_VERSION}
+else
+       depmod -a
+       update-modules || true
+fi
+}
+
+pkg_postrm_modules () {
+update-modules || true
+}
+
+autoload_postinst_fragment() {
+if [ x"$D" = "x" ]; then
+       modprobe %s || true
+fi
+}
+
+python populate_packages_prepend () {
+       import os
+       def extract_modinfo(file):
+               import tempfile, re
+               tempfile.tempdir = bb.data.getVar("WORKDIR", d, 1)
+               tf = tempfile.mkstemp()
+               tmpfile = tf[1]
+               cmd = "PATH=\"%s\" %sobjcopy -j .modinfo -O binary %s %s" % (bb.data.getVar("PATH", d, 1), bb.data.getVar("HOST_PREFIX", d, 1) or "", file, tmpfile)
+               os.system(cmd)
+               f = open(tmpfile)
+               l = f.read().split("\000")
+               f.close()
+               os.close(tf[0])
+               os.unlink(tmpfile)
+               exp = re.compile("([^=]+)=(.*)")
+               vals = {}
+               for i in l:
+                       m = exp.match(i)
+                       if not m:
+                               continue
+                       vals[m.group(1)] = m.group(2)
+               return vals
+
+       def parse_depmod():
+               import re
+
+               dvar = bb.data.getVar('PKGD', d, 1)
+               if not dvar:
+                       bb.error("D not defined")
+                       return
+
+               kernelver = bb.data.getVar('KERNEL_VERSION', d, 1)
+               kernelver_stripped = kernelver
+               m = re.match('^(.*-hh.*)[\.\+].*$', kernelver)
+               if m:
+                       kernelver_stripped = m.group(1)
+               path = bb.data.getVar("PATH", d, 1)
+               host_prefix = bb.data.getVar("HOST_PREFIX", d, 1) or ""
+               major_version = bb.data.getVar('KERNEL_MAJOR_VERSION', d, 1)
+
+               cmd = "PATH=\"%s\" %sdepmod-%s -n -a -r -b %s -F %s/boot/System.map-%s %s" % (path, host_prefix, major_version, dvar, dvar, kernelver, kernelver_stripped)
+               f = os.popen(cmd, 'r')
+
+               deps = {}
+               pattern0 = "^(.*\.k?o):..*$"
+               pattern1 = "^(.*\.k?o):\s*(.*\.k?o)\s*$"
+               pattern2 = "^(.*\.k?o):\s*(.*\.k?o)\s*\\\$"
+               pattern3 = "^\t(.*\.k?o)\s*\\\$"
+               pattern4 = "^\t(.*\.k?o)\s*$"
+
+               line = f.readline()
+               while line:
+                       if not re.match(pattern0, line):
+                               line = f.readline()
+                               continue
+                       m1 = re.match(pattern1, line)
+                       if m1:
+                               deps[m1.group(1)] = m1.group(2).split()
+                       else:
+                               m2 = re.match(pattern2, line)
+                               if m2:
+                                       deps[m2.group(1)] = m2.group(2).split()
+                                       line = f.readline()
+                                       m3 = re.match(pattern3, line)
+                                       while m3:
+                                               deps[m2.group(1)].extend(m3.group(1).split())
+                                               line = f.readline()
+                                               m3 = re.match(pattern3, line)
+                                       m4 = re.match(pattern4, line)
+                                       deps[m2.group(1)].extend(m4.group(1).split())
+                       line = f.readline()
+               f.close()
+               return deps
+
+       def get_dependencies(file, pattern, format):
+               file = file.replace(bb.data.getVar('PKGD', d, 1) or '', '', 1)
+
+               if module_deps.has_key(file):
+                       import re
+                       dependencies = []
+                       for i in module_deps[file]:
+                               m = re.match(pattern, os.path.basename(i))
+                               if not m:
+                                       continue
+                               on = legitimize_package_name(m.group(1))
+                               dependency_pkg = format % on
+                               dependencies.append(dependency_pkg)
+                       return dependencies
+               return []
+
+       def frob_metadata(file, pkg, pattern, format, basename):
+               import re
+               vals = extract_modinfo(file)
+
+               dvar = bb.data.getVar('PKGD', d, 1)
+
+               # If autoloading is requested, output /etc/modutils/<name> and append
+               # appropriate modprobe commands to the postinst
+               autoload = bb.data.getVar('module_autoload_%s' % basename, d, 1)
+               if not autoload:
+                   # Also, try canonical name with dashes
+                   autoload = bb.data.getVar('module_autoload_%s' % basename.replace('_', '-'), d, 1)
+               if autoload:
+                       name = '%s/etc/modutils/%s' % (dvar, basename)
+                       f = open(name, 'w')
+                       for m in autoload.split():
+                               f.write('%s\n' % m)
+                       f.close()
+                       postinst = bb.data.getVar('pkg_postinst_%s' % pkg, d, 1)
+                       if not postinst:
+                               bb.fatal("pkg_postinst_%s not defined" % pkg)
+                       postinst += bb.data.getVar('autoload_postinst_fragment', d, 1) % autoload
+                       bb.data.setVar('pkg_postinst_%s' % pkg, postinst, d)
+
+               # Write out any modconf fragment
+               modconf = bb.data.getVar('module_conf_%s' % basename, d, 1)
+               if modconf:
+                       if bb.data.getVar("KERNEL_MAJOR_VERSION", d, 1) == "2.6":
+                               name = '%s/etc/modprobe.d/%s.conf' % (dvar, basename)
+                       else:
+                               name = '%s/etc/modutils/%s.conf' % (dvar, basename)
+                       f = open(name, 'w')
+                       f.write("%s\n" % modconf)
+                       f.close()
+
+               files = bb.data.getVar('FILES_%s' % pkg, d, 1)
+               files = "%s /etc/modutils/%s /etc/modutils/%s.conf /etc/modprobe.d/%s.conf" % (files, basename, basename, basename)
+               bb.data.setVar('FILES_%s' % pkg, files, d)
+
+               if vals.has_key("description"):
+                       old_desc = bb.data.getVar('DESCRIPTION_' + pkg, d, 1) or ""
+                       bb.data.setVar('DESCRIPTION_' + pkg, old_desc + "; " + vals["description"], d)
+
+               rdepends_str = bb.data.getVar('RDEPENDS_' + pkg, d, 1)
+               if rdepends_str:
+                       rdepends = rdepends_str.split()
+               else:
+                       rdepends = []
+               rdepends.extend(get_dependencies(file, pattern, format))
+               bb.data.setVar('RDEPENDS_' + pkg, ' '.join(rdepends), d)
+
+       module_deps = parse_depmod()
+       module_regex = '^(.*)\.k?o$'
+       module_pattern = 'v4l-dvb-module-%s'
+
+       postinst = bb.data.getVar('pkg_postinst_modules', d, 1)
+       postrm = bb.data.getVar('pkg_postrm_modules', d, 1)
+
+        maybe_update_modules = "update-modules "
+        if bb.data.getVar("ONLINE_PACKAGE_MANAGEMENT", d) == "none":
+                maybe_update_modules = ""
+
+       do_split_packages(d, root='/lib/firmware', file_regex='^(.*)\.bin$', output_pattern='v4l-dvb-firmware-%s', description='Firmware for %s', recursive=True, extra_depends='')
+       do_split_packages(d, root='/lib/firmware', file_regex='^(.*)\.fw$', output_pattern='v4l-dvb-firmware-%s', description='Firmware for %s', recursive=True, extra_depends='')
+       do_split_packages(d, root='/lib/modules', file_regex=module_regex, output_pattern=module_pattern, description='%s kernel module', postinst=postinst, postrm=postrm, recursive=True, hook=frob_metadata, extra_depends='%skernel-%s' % (maybe_update_modules, bb.data.getVar("KERNEL_VERSION", d, 1)))
+
+       import re
+       metapkg = bb.data.getVar('PN', d, 1)
+       bb.data.setVar('ALLOW_EMPTY_' + metapkg, "1", d)
+       bb.data.setVar('FILES_' + metapkg, "", d)
+       blacklist = []
+       for l in module_deps.values():
+               for i in l:
+                       pkg = module_pattern % legitimize_package_name(re.match(module_regex, os.path.basename(i)).group(1))
+                       blacklist.append(pkg)
+       metapkg_rdepends = []
+       packages = bb.data.getVar('PACKAGES', d, 1).split()
+       for pkg in packages[1:]:
+               if not pkg in blacklist and not pkg in metapkg_rdepends:
+                       metapkg_rdepends.append(pkg)
+               p = pkg.find('v4l-dvb-module')
+               if p != -1:
+                       name = pkg.split('-')[-1]
+                       bb.data.setVar('RREPLACES_' + pkg, 'kernel-module-' + name, d)
+                       bb.data.setVar('RCONFLICTS_' + pkg, 'kernel-module-' + name, d)
+       bb.data.setVar('RDEPENDS_' + metapkg, ' '.join(metapkg_rdepends), d)
+       bb.data.setVar('DESCRIPTION_' + metapkg, 'v4l-dvb modules meta package', d)
+}

diff --git a/recipes/v4l-dvb/v4l-dvb-modules_hg.bb b/recipes/v4l-dvb/v4l-dvb-modules_hg.bb
new file mode 100644 (file)
index 0000000..a5c7f1f
--- /dev/null
+++ b/recipes/v4l-dvb/v4l-dvb-modules_hg.bb
@@ -0,0 +1,21 @@
+require v4l-dvb-modules.inc
+
+DEPENDS += " mercurial-native"
+
+SRCDATE = "20100904"
+SRCREV = "6e0befab696a"
+PV = "0.0+hg${SRCDATE}"
+PR = "r0"
+
+SRC_URI = "hg://linuxtv.org/hg/;module=v4l-dvb;rev=${SRCREV} \
+           file://defconfig \
+           file://v4l-dvb-compat.patch;patch=1 \
+           file://v4l-2.6.18-compat.patch;patch=1 \
+           file://fix-blocking-demux.patch;patch=1 \
+           file://basic-dvb-t2-support.patch;patch=1 \
+           file://localversion.patch;patch=1 \
+           file://build-fix.patch;patch=1 \
+"
+
+S = "${WORKDIR}/v4l-dvb"
+